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initial commit with v2.6.9
[linux-2.6.9-moxart.git] / drivers / atm / nicstar.c
blob3f18782bd50460a319f2b7c9073b770a838cc23e
1 /******************************************************************************
2 *
3 * nicstar.c
4 *
5 * Device driver supporting CBR for IDT 77201/77211 "NICStAR" based cards.
6 *
7 * IMPORTANT: The included file nicstarmac.c was NOT WRITTEN BY ME.
8 * It was taken from the frle-0.22 device driver.
9 * As the file doesn't have a copyright notice, in the file
10 * nicstarmac.copyright I put the copyright notice from the
11 * frle-0.22 device driver.
12 * Some code is based on the nicstar driver by M. Welsh.
13 *
14 * Author: Rui Prior (rprior@inescn.pt)
15 * PowerPC support by Jay Talbott (jay_talbott@mcg.mot.com) April 1999
16 *
17 *
18 * (C) INESC 1999
19 *
20 *
21 ******************************************************************************/
22
23
24 /**** IMPORTANT INFORMATION ***************************************************
25 *
26 * There are currently three types of spinlocks:
27 *
28 * 1 - Per card interrupt spinlock (to protect structures and such)
29 * 2 - Per SCQ scq spinlock
30 * 3 - Per card resource spinlock (to access registers, etc.)
31 *
32 * These must NEVER be grabbed in reverse order.
33 *
34 ******************************************************************************/
35
36 /* Header files ***************************************************************/
37
38 #include <linux/module.h>
39 #include <linux/config.h>
40 #include <linux/kernel.h>
41 #include <linux/skbuff.h>
42 #include <linux/atmdev.h>
43 #include <linux/atm.h>
44 #include <linux/pci.h>
45 #include <linux/types.h>
46 #include <linux/string.h>
47 #include <linux/delay.h>
48 #include <linux/init.h>
49 #include <linux/sched.h>
50 #include <linux/timer.h>
51 #include <linux/interrupt.h>
52 #include <linux/bitops.h>
53 #include <asm/io.h>
54 #include <asm/uaccess.h>
55 #include <asm/atomic.h>
56 #include "nicstar.h"
57 #include "nicstarmac.h"
58 #ifdef CONFIG_ATM_NICSTAR_USE_SUNI
59 #include "suni.h"
60 #endif /* CONFIG_ATM_NICSTAR_USE_SUNI */
61 #ifdef CONFIG_ATM_NICSTAR_USE_IDT77105
62 #include "idt77105.h"
63 #endif /* CONFIG_ATM_NICSTAR_USE_IDT77105 */
64
65 #if BITS_PER_LONG != 32
66 # error FIXME: this driver requires a 32-bit platform
67 #endif
68
69 /* Additional code ************************************************************/
70
71 #include "nicstarmac.c"
72
73
74 /* Configurable parameters ****************************************************/
75
76 #undef PHY_LOOPBACK
77 #undef TX_DEBUG
78 #undef RX_DEBUG
79 #undef GENERAL_DEBUG
80 #undef EXTRA_DEBUG
81
82 #undef NS_USE_DESTRUCTORS /* For now keep this undefined unless you know
83 you're going to use only raw ATM */
84
85
86 /* Do not touch these *********************************************************/
87
88 #ifdef TX_DEBUG
89 #define TXPRINTK(args...) printk(args)
90 #else
91 #define TXPRINTK(args...)
92 #endif /* TX_DEBUG */
93
94 #ifdef RX_DEBUG
95 #define RXPRINTK(args...) printk(args)
96 #else
97 #define RXPRINTK(args...)
98 #endif /* RX_DEBUG */
99
100 #ifdef GENERAL_DEBUG
101 #define PRINTK(args...) printk(args)
102 #else
103 #define PRINTK(args...)
104 #endif /* GENERAL_DEBUG */
105
106 #ifdef EXTRA_DEBUG
107 #define XPRINTK(args...) printk(args)
108 #else
109 #define XPRINTK(args...)
110 #endif /* EXTRA_DEBUG */
111
112
113 /* Macros *********************************************************************/
114
115 #define CMD_BUSY(card) (readl((card)->membase + STAT) & NS_STAT_CMDBZ)
116
117 #define NS_DELAY mdelay(1)
118
119 #define ALIGN_BUS_ADDR(addr, alignment) \
120 ((((u32) (addr)) + (((u32) (alignment)) - 1)) & ~(((u32) (alignment)) - 1))
121 #define ALIGN_ADDRESS(addr, alignment) \
122 bus_to_virt(ALIGN_BUS_ADDR(virt_to_bus(addr), alignment))
123
124 #undef CEIL
125
126 #ifndef ATM_SKB
127 #define ATM_SKB(s) (&(s)->atm)
128 #endif
129
130 /* Spinlock debugging stuff */
131 #ifdef NS_DEBUG_SPINLOCKS /* See nicstar.h */
132 #define ns_grab_int_lock(card,flags) \
133 do { \
134 unsigned long nsdsf, nsdsf2; \
135 local_irq_save(flags); \
136 save_flags(nsdsf); cli();\
137 if (nsdsf & (1<<9)) printk ("nicstar.c: ints %sabled -> enabled.\n", \
138 (flags)&(1<<9)?"en":"dis"); \
139 if (spin_is_locked(&(card)->int_lock) && \
140 (card)->cpu_int == smp_processor_id()) { \
141 printk("nicstar.c: line %d (cpu %d) int_lock already locked at line %d (cpu %d)\n", \
142 __LINE__, smp_processor_id(), (card)->has_int_lock, \
143 (card)->cpu_int); \
144 printk("nicstar.c: ints were %sabled.\n", ((flags)&(1<<9)?"en":"dis")); \
145 } \
146 if (spin_is_locked(&(card)->res_lock) && \
147 (card)->cpu_res == smp_processor_id()) { \
148 printk("nicstar.c: line %d (cpu %d) res_lock locked at line %d (cpu %d)(trying int)\n", \
149 __LINE__, smp_processor_id(), (card)->has_res_lock, \
150 (card)->cpu_res); \
151 printk("nicstar.c: ints were %sabled.\n", ((flags)&(1<<9)?"en":"dis")); \
152 } \
153 spin_lock_irq(&(card)->int_lock); \
154 (card)->has_int_lock = __LINE__; \
155 (card)->cpu_int = smp_processor_id(); \
156 restore_flags(nsdsf); } while (0)
157 #define ns_grab_res_lock(card,flags) \
158 do { \
159 unsigned long nsdsf, nsdsf2; \
160 local_irq_save(flags); \
161 save_flags(nsdsf); cli();\
162 if (nsdsf & (1<<9)) printk ("nicstar.c: ints %sabled -> enabled.\n", \
163 (flags)&(1<<9)?"en":"dis"); \
164 if (spin_is_locked(&(card)->res_lock) && \
165 (card)->cpu_res == smp_processor_id()) { \
166 printk("nicstar.c: line %d (cpu %d) res_lock already locked at line %d (cpu %d)\n", \
167 __LINE__, smp_processor_id(), (card)->has_res_lock, \
168 (card)->cpu_res); \
169 printk("nicstar.c: ints were %sabled.\n", ((flags)&(1<<9)?"en":"dis")); \
170 } \
171 spin_lock_irq(&(card)->res_lock); \
172 (card)->has_res_lock = __LINE__; \
173 (card)->cpu_res = smp_processor_id(); \
174 restore_flags(nsdsf); } while (0)
175 #define ns_grab_scq_lock(card,scq,flags) \
176 do { \
177 unsigned long nsdsf, nsdsf2; \
178 local_irq_save(flags); \
179 save_flags(nsdsf); cli();\
180 if (nsdsf & (1<<9)) printk ("nicstar.c: ints %sabled -> enabled.\n", \
181 (flags)&(1<<9)?"en":"dis"); \
182 if (spin_is_locked(&(scq)->lock) && \
183 (scq)->cpu_lock == smp_processor_id()) { \
184 printk("nicstar.c: line %d (cpu %d) this scq_lock already locked at line %d (cpu %d)\n", \
185 __LINE__, smp_processor_id(), (scq)->has_lock, \
186 (scq)->cpu_lock); \
187 printk("nicstar.c: ints were %sabled.\n", ((flags)&(1<<9)?"en":"dis")); \
188 } \
189 if (spin_is_locked(&(card)->res_lock) && \
190 (card)->cpu_res == smp_processor_id()) { \
191 printk("nicstar.c: line %d (cpu %d) res_lock locked at line %d (cpu %d)(trying scq)\n", \
192 __LINE__, smp_processor_id(), (card)->has_res_lock, \
193 (card)->cpu_res); \
194 printk("nicstar.c: ints were %sabled.\n", ((flags)&(1<<9)?"en":"dis")); \
195 } \
196 spin_lock_irq(&(scq)->lock); \
197 (scq)->has_lock = __LINE__; \
198 (scq)->cpu_lock = smp_processor_id(); \
199 restore_flags(nsdsf); } while (0)
200 #else /* !NS_DEBUG_SPINLOCKS */
201 #define ns_grab_int_lock(card,flags) \
202 spin_lock_irqsave(&(card)->int_lock,(flags))
203 #define ns_grab_res_lock(card,flags) \
204 spin_lock_irqsave(&(card)->res_lock,(flags))
205 #define ns_grab_scq_lock(card,scq,flags) \
206 spin_lock_irqsave(&(scq)->lock,flags)
207 #endif /* NS_DEBUG_SPINLOCKS */
208
209
210 /* Function declarations ******************************************************/
211
212 static u32 ns_read_sram(ns_dev *card, u32 sram_address);
213 static void ns_write_sram(ns_dev *card, u32 sram_address, u32 *value, int count);
214 static int __devinit ns_init_card(int i, struct pci_dev *pcidev);
215 static void __devinit ns_init_card_error(ns_dev *card, int error);
216 static scq_info *get_scq(int size, u32 scd);
217 static void free_scq(scq_info *scq, struct atm_vcc *vcc);
218 static void push_rxbufs(ns_dev *card, u32 type, u32 handle1, u32 addr1,
219 u32 handle2, u32 addr2);
220 static irqreturn_t ns_irq_handler(int irq, void *dev_id, struct pt_regs *regs);
221 static int ns_open(struct atm_vcc *vcc);
222 static void ns_close(struct atm_vcc *vcc);
223 static void fill_tst(ns_dev *card, int n, vc_map *vc);
224 static int ns_send(struct atm_vcc *vcc, struct sk_buff *skb);
225 static int push_scqe(ns_dev *card, vc_map *vc, scq_info *scq, ns_scqe *tbd,
226 struct sk_buff *skb);
227 static void process_tsq(ns_dev *card);
228 static void drain_scq(ns_dev *card, scq_info *scq, int pos);
229 static void process_rsq(ns_dev *card);
230 static void dequeue_rx(ns_dev *card, ns_rsqe *rsqe);
231 #ifdef NS_USE_DESTRUCTORS
232 static void ns_sb_destructor(struct sk_buff *sb);
233 static void ns_lb_destructor(struct sk_buff *lb);
234 static void ns_hb_destructor(struct sk_buff *hb);
235 #endif /* NS_USE_DESTRUCTORS */
236 static void recycle_rx_buf(ns_dev *card, struct sk_buff *skb);
237 static void recycle_iovec_rx_bufs(ns_dev *card, struct iovec *iov, int count);
238 static void recycle_iov_buf(ns_dev *card, struct sk_buff *iovb);
239 static void dequeue_sm_buf(ns_dev *card, struct sk_buff *sb);
240 static void dequeue_lg_buf(ns_dev *card, struct sk_buff *lb);
241 static int ns_proc_read(struct atm_dev *dev, loff_t *pos, char *page);
242 static int ns_ioctl(struct atm_dev *dev, unsigned int cmd, void __user *arg);
243 static void which_list(ns_dev *card, struct sk_buff *skb);
244 static void ns_poll(unsigned long arg);
245 static int ns_parse_mac(char *mac, unsigned char *esi);
246 static short ns_h2i(char c);
247 static void ns_phy_put(struct atm_dev *dev, unsigned char value,
248 unsigned long addr);
249 static unsigned char ns_phy_get(struct atm_dev *dev, unsigned long addr);
250
251
252
253 /* Global variables ***********************************************************/
254
255 static struct ns_dev *cards[NS_MAX_CARDS];
256 static unsigned num_cards;
257 static struct atmdev_ops atm_ops =
258 {
259 .open = ns_open,
260 .close = ns_close,
261 .ioctl = ns_ioctl,
262 .send = ns_send,
263 .phy_put = ns_phy_put,
264 .phy_get = ns_phy_get,
265 .proc_read = ns_proc_read,
266 .owner = THIS_MODULE,
267 };
268 static struct timer_list ns_timer;
269 static char *mac[NS_MAX_CARDS];
270 MODULE_PARM(mac, "1-" __MODULE_STRING(NS_MAX_CARDS) "s");
271 MODULE_LICENSE("GPL");
272
273
274 /* Functions*******************************************************************/
275
276 static int __devinit nicstar_init_one(struct pci_dev *pcidev,
277 const struct pci_device_id *ent)
278 {
279 static int index = -1;
280 unsigned int error;
281
282 index++;
283 cards[index] = NULL;
284
285 error = ns_init_card(index, pcidev);
286 if (error) {
287 cards[index--] = NULL; /* don't increment index */
288 goto err_out;
289 }
290
291 return 0;
292 err_out:
293 return -ENODEV;
294 }
295
296
297
298 static void __devexit nicstar_remove_one(struct pci_dev *pcidev)
299 {
300 int i, j;
301 ns_dev *card = pci_get_drvdata(pcidev);
302 struct sk_buff *hb;
303 struct sk_buff *iovb;
304 struct sk_buff *lb;
305 struct sk_buff *sb;
306
307 i = card->index;
308
309 if (cards[i] == NULL)
310 return;
311
312 if (card->atmdev->phy && card->atmdev->phy->stop)
313 card->atmdev->phy->stop(card->atmdev);
314
315 /* Stop everything */
316 writel(0x00000000, card->membase + CFG);
317
318 /* De-register device */
319 atm_dev_deregister(card->atmdev);
320
321 /* Disable PCI device */
322 pci_disable_device(pcidev);
323
324 /* Free up resources */
325 j = 0;
326 PRINTK("nicstar%d: freeing %d huge buffers.\n", i, card->hbpool.count);
327 while ((hb = skb_dequeue(&card->hbpool.queue)) != NULL)
328 {
329 dev_kfree_skb_any(hb);
330 j++;
331 }
332 PRINTK("nicstar%d: %d huge buffers freed.\n", i, j);
333 j = 0;
334 PRINTK("nicstar%d: freeing %d iovec buffers.\n", i, card->iovpool.count);
335 while ((iovb = skb_dequeue(&card->iovpool.queue)) != NULL)
336 {
337 dev_kfree_skb_any(iovb);
338 j++;
339 }
340 PRINTK("nicstar%d: %d iovec buffers freed.\n", i, j);
341 while ((lb = skb_dequeue(&card->lbpool.queue)) != NULL)
342 dev_kfree_skb_any(lb);
343 while ((sb = skb_dequeue(&card->sbpool.queue)) != NULL)
344 dev_kfree_skb_any(sb);
345 free_scq(card->scq0, NULL);
346 for (j = 0; j < NS_FRSCD_NUM; j++)
347 {
348 if (card->scd2vc[j] != NULL)
349 free_scq(card->scd2vc[j]->scq, card->scd2vc[j]->tx_vcc);
350 }
351 kfree(card->rsq.org);
352 kfree(card->tsq.org);
353 free_irq(card->pcidev->irq, card);
354 iounmap((void *) card->membase);
355 kfree(card);
356 }
357
358
359
360 static struct pci_device_id nicstar_pci_tbl[] __devinitdata =
361 {
362 {PCI_VENDOR_ID_IDT, PCI_DEVICE_ID_IDT_IDT77201,
363 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
364 {0,} /* terminate list */
365 };
366 MODULE_DEVICE_TABLE(pci, nicstar_pci_tbl);
367
368
369
370 static struct pci_driver nicstar_driver = {
371 .name = "nicstar",
372 .id_table = nicstar_pci_tbl,
373 .probe = nicstar_init_one,
374 .remove = __devexit_p(nicstar_remove_one),
375 };
376
377
378
379 static int __init nicstar_init(void)
380 {
381 unsigned error = 0; /* Initialized to remove compile warning */
382
383 XPRINTK("nicstar: nicstar_init() called.\n");
384
385 error = pci_module_init(&nicstar_driver);
386
387 TXPRINTK("nicstar: TX debug enabled.\n");
388 RXPRINTK("nicstar: RX debug enabled.\n");
389 PRINTK("nicstar: General debug enabled.\n");
390 #ifdef PHY_LOOPBACK
391 printk("nicstar: using PHY loopback.\n");
392 #endif /* PHY_LOOPBACK */
393 XPRINTK("nicstar: nicstar_init() returned.\n");
394
395 if (!error) {
396 init_timer(&ns_timer);
397 ns_timer.expires = jiffies + NS_POLL_PERIOD;
398 ns_timer.data = 0UL;
399 ns_timer.function = ns_poll;
400 add_timer(&ns_timer);
401 }
402
403 return error;
404 }
405
406
407
408 static void __exit nicstar_cleanup(void)
409 {
410 XPRINTK("nicstar: nicstar_cleanup() called.\n");
411
412 del_timer(&ns_timer);
413
414 pci_unregister_driver(&nicstar_driver);
415
416 XPRINTK("nicstar: nicstar_cleanup() returned.\n");
417 }
418
419
420
421 static u32 ns_read_sram(ns_dev *card, u32 sram_address)
422 {
423 unsigned long flags;
424 u32 data;
425 sram_address <<= 2;
426 sram_address &= 0x0007FFFC; /* address must be dword aligned */
427 sram_address |= 0x50000000; /* SRAM read command */
428 ns_grab_res_lock(card, flags);
429 while (CMD_BUSY(card));
430 writel(sram_address, card->membase + CMD);
431 while (CMD_BUSY(card));
432 data = readl(card->membase + DR0);
433 spin_unlock_irqrestore(&card->res_lock, flags);
434 return data;
435 }
436
437
438
439 static void ns_write_sram(ns_dev *card, u32 sram_address, u32 *value, int count)
440 {
441 unsigned long flags;
442 int i, c;
443 count--; /* count range now is 0..3 instead of 1..4 */
444 c = count;
445 c <<= 2; /* to use increments of 4 */
446 ns_grab_res_lock(card, flags);
447 while (CMD_BUSY(card));
448 for (i = 0; i <= c; i += 4)
449 writel(*(value++), card->membase + i);
450 /* Note: DR# registers are the first 4 dwords in nicstar's memspace,
451 so card->membase + DR0 == card->membase */
452 sram_address <<= 2;
453 sram_address &= 0x0007FFFC;
454 sram_address |= (0x40000000 | count);
455 writel(sram_address, card->membase + CMD);
456 spin_unlock_irqrestore(&card->res_lock, flags);
457 }
458
459
460 static int __devinit ns_init_card(int i, struct pci_dev *pcidev)
461 {
462 int j;
463 struct ns_dev *card = NULL;
464 unsigned char pci_latency;
465 unsigned error;
466 u32 data;
467 u32 u32d[4];
468 u32 ns_cfg_rctsize;
469 int bcount;
470 unsigned long membase;
471
472 error = 0;
473
474 if (pci_enable_device(pcidev))
475 {
476 printk("nicstar%d: can't enable PCI device\n", i);
477 error = 2;
478 ns_init_card_error(card, error);
479 return error;
480 }
481
482 if ((card = kmalloc(sizeof(ns_dev), GFP_KERNEL)) == NULL)
483 {
484 printk("nicstar%d: can't allocate memory for device structure.\n", i);
485 error = 2;
486 ns_init_card_error(card, error);
487 return error;
488 }
489 cards[i] = card;
490 spin_lock_init(&card->int_lock);
491 spin_lock_init(&card->res_lock);
492
493 pci_set_drvdata(pcidev, card);
494
495 card->index = i;
496 card->atmdev = NULL;
497 card->pcidev = pcidev;
498 membase = pci_resource_start(pcidev, 1);
499 card->membase = ioremap(membase, NS_IOREMAP_SIZE);
500 if (card->membase == 0)
501 {
502 printk("nicstar%d: can't ioremap() membase.\n",i);
503 error = 3;
504 ns_init_card_error(card, error);
505 return error;
506 }
507 PRINTK("nicstar%d: membase at 0x%x.\n", i, card->membase);
508
509 pci_set_master(pcidev);
510
511 if (pci_read_config_byte(pcidev, PCI_LATENCY_TIMER, &pci_latency) != 0)
512 {
513 printk("nicstar%d: can't read PCI latency timer.\n", i);
514 error = 6;
515 ns_init_card_error(card, error);
516 return error;
517 }
518 #ifdef NS_PCI_LATENCY
519 if (pci_latency < NS_PCI_LATENCY)
520 {
521 PRINTK("nicstar%d: setting PCI latency timer to %d.\n", i, NS_PCI_LATENCY);
522 for (j = 1; j < 4; j++)
523 {
524 if (pci_write_config_byte(pcidev, PCI_LATENCY_TIMER, NS_PCI_LATENCY) != 0)
525 break;
526 }
527 if (j == 4)
528 {
529 printk("nicstar%d: can't set PCI latency timer to %d.\n", i, NS_PCI_LATENCY);
530 error = 7;
531 ns_init_card_error(card, error);
532 return error;
533 }
534 }
535 #endif /* NS_PCI_LATENCY */
536
537 /* Clear timer overflow */
538 data = readl(card->membase + STAT);
539 if (data & NS_STAT_TMROF)
540 writel(NS_STAT_TMROF, card->membase + STAT);
541
542 /* Software reset */
543 writel(NS_CFG_SWRST, card->membase + CFG);
544 NS_DELAY;
545 writel(0x00000000, card->membase + CFG);
546
547 /* PHY reset */
548 writel(0x00000008, card->membase + GP);
549 NS_DELAY;
550 writel(0x00000001, card->membase + GP);
551 NS_DELAY;
552 while (CMD_BUSY(card));
553 writel(NS_CMD_WRITE_UTILITY | 0x00000100, card->membase + CMD); /* Sync UTOPIA with SAR clock */
554 NS_DELAY;
555
556 /* Detect PHY type */
557 while (CMD_BUSY(card));
558 writel(NS_CMD_READ_UTILITY | 0x00000200, card->membase + CMD);
559 while (CMD_BUSY(card));
560 data = readl(card->membase + DR0);
561 switch(data) {
562 case 0x00000009:
563 printk("nicstar%d: PHY seems to be 25 Mbps.\n", i);
564 card->max_pcr = ATM_25_PCR;
565 while(CMD_BUSY(card));
566 writel(0x00000008, card->membase + DR0);
567 writel(NS_CMD_WRITE_UTILITY | 0x00000200, card->membase + CMD);
568 /* Clear an eventual pending interrupt */
569 writel(NS_STAT_SFBQF, card->membase + STAT);
570 #ifdef PHY_LOOPBACK
571 while(CMD_BUSY(card));
572 writel(0x00000022, card->membase + DR0);
573 writel(NS_CMD_WRITE_UTILITY | 0x00000202, card->membase + CMD);
574 #endif /* PHY_LOOPBACK */
575 break;
576 case 0x00000030:
577 case 0x00000031:
578 printk("nicstar%d: PHY seems to be 155 Mbps.\n", i);
579 card->max_pcr = ATM_OC3_PCR;
580 #ifdef PHY_LOOPBACK
581 while(CMD_BUSY(card));
582 writel(0x00000002, card->membase + DR0);
583 writel(NS_CMD_WRITE_UTILITY | 0x00000205, card->membase + CMD);
584 #endif /* PHY_LOOPBACK */
585 break;
586 default:
587 printk("nicstar%d: unknown PHY type (0x%08X).\n", i, data);
588 error = 8;
589 ns_init_card_error(card, error);
590 return error;
591 }
592 writel(0x00000000, card->membase + GP);
593
594 /* Determine SRAM size */
595 data = 0x76543210;
596 ns_write_sram(card, 0x1C003, &data, 1);
597 data = 0x89ABCDEF;
598 ns_write_sram(card, 0x14003, &data, 1);
599 if (ns_read_sram(card, 0x14003) == 0x89ABCDEF &&
600 ns_read_sram(card, 0x1C003) == 0x76543210)
601 card->sram_size = 128;
602 else
603 card->sram_size = 32;
604 PRINTK("nicstar%d: %dK x 32bit SRAM size.\n", i, card->sram_size);
605
606 card->rct_size = NS_MAX_RCTSIZE;
607
608 #if (NS_MAX_RCTSIZE == 4096)
609 if (card->sram_size == 128)
610 printk("nicstar%d: limiting maximum VCI. See NS_MAX_RCTSIZE in nicstar.h\n", i);
611 #elif (NS_MAX_RCTSIZE == 16384)
612 if (card->sram_size == 32)
613 {
614 printk("nicstar%d: wasting memory. See NS_MAX_RCTSIZE in nicstar.h\n", i);
615 card->rct_size = 4096;
616 }
617 #else
618 #error NS_MAX_RCTSIZE must be either 4096 or 16384 in nicstar.c
619 #endif
620
621 card->vpibits = NS_VPIBITS;
622 if (card->rct_size == 4096)
623 card->vcibits = 12 - NS_VPIBITS;
624 else /* card->rct_size == 16384 */
625 card->vcibits = 14 - NS_VPIBITS;
626
627 /* Initialize the nicstar eeprom/eprom stuff, for the MAC addr */
628 if (mac[i] == NULL)
629 nicstar_init_eprom(card->membase);
630
631 if (request_irq(pcidev->irq, &ns_irq_handler, SA_INTERRUPT | SA_SHIRQ, "nicstar", card) != 0)
632 {
633 printk("nicstar%d: can't allocate IRQ %d.\n", i, pcidev->irq);
634 error = 9;
635 ns_init_card_error(card, error);
636 return error;
637 }
638
639 /* Set the VPI/VCI MSb mask to zero so we can receive OAM cells */
640 writel(0x00000000, card->membase + VPM);
641
642 /* Initialize TSQ */
643 card->tsq.org = kmalloc(NS_TSQSIZE + NS_TSQ_ALIGNMENT, GFP_KERNEL);
644 if (card->tsq.org == NULL)
645 {
646 printk("nicstar%d: can't allocate TSQ.\n", i);
647 error = 10;
648 ns_init_card_error(card, error);
649 return error;
650 }
651 card->tsq.base = (ns_tsi *) ALIGN_ADDRESS(card->tsq.org, NS_TSQ_ALIGNMENT);
652 card->tsq.next = card->tsq.base;
653 card->tsq.last = card->tsq.base + (NS_TSQ_NUM_ENTRIES - 1);
654 for (j = 0; j < NS_TSQ_NUM_ENTRIES; j++)
655 ns_tsi_init(card->tsq.base + j);
656 writel(0x00000000, card->membase + TSQH);
657 writel((u32) virt_to_bus(card->tsq.base), card->membase + TSQB);
658 PRINTK("nicstar%d: TSQ base at 0x%x 0x%x 0x%x.\n", i, (u32) card->tsq.base,
659 (u32) virt_to_bus(card->tsq.base), readl(card->membase + TSQB));
660
661 /* Initialize RSQ */
662 card->rsq.org = kmalloc(NS_RSQSIZE + NS_RSQ_ALIGNMENT, GFP_KERNEL);
663 if (card->rsq.org == NULL)
664 {
665 printk("nicstar%d: can't allocate RSQ.\n", i);
666 error = 11;
667 ns_init_card_error(card, error);
668 return error;
669 }
670 card->rsq.base = (ns_rsqe *) ALIGN_ADDRESS(card->rsq.org, NS_RSQ_ALIGNMENT);
671 card->rsq.next = card->rsq.base;
672 card->rsq.last = card->rsq.base + (NS_RSQ_NUM_ENTRIES - 1);
673 for (j = 0; j < NS_RSQ_NUM_ENTRIES; j++)
674 ns_rsqe_init(card->rsq.base + j);
675 writel(0x00000000, card->membase + RSQH);
676 writel((u32) virt_to_bus(card->rsq.base), card->membase + RSQB);
677 PRINTK("nicstar%d: RSQ base at 0x%x.\n", i, (u32) card->rsq.base);
678
679 /* Initialize SCQ0, the only VBR SCQ used */
680 card->scq1 = (scq_info *) NULL;
681 card->scq2 = (scq_info *) NULL;
682 card->scq0 = get_scq(VBR_SCQSIZE, NS_VRSCD0);
683 if (card->scq0 == (scq_info *) NULL)
684 {
685 printk("nicstar%d: can't get SCQ0.\n", i);
686 error = 12;
687 ns_init_card_error(card, error);
688 return error;
689 }
690 u32d[0] = (u32) virt_to_bus(card->scq0->base);
691 u32d[1] = (u32) 0x00000000;
692 u32d[2] = (u32) 0xffffffff;
693 u32d[3] = (u32) 0x00000000;
694 ns_write_sram(card, NS_VRSCD0, u32d, 4);
695 ns_write_sram(card, NS_VRSCD1, u32d, 4); /* These last two won't be used */
696 ns_write_sram(card, NS_VRSCD2, u32d, 4); /* but are initialized, just in case... */
697 card->scq0->scd = NS_VRSCD0;
698 PRINTK("nicstar%d: VBR-SCQ0 base at 0x%x.\n", i, (u32) card->scq0->base);
699
700 /* Initialize TSTs */
701 card->tst_addr = NS_TST0;
702 card->tst_free_entries = NS_TST_NUM_ENTRIES;
703 data = NS_TST_OPCODE_VARIABLE;
704 for (j = 0; j < NS_TST_NUM_ENTRIES; j++)
705 ns_write_sram(card, NS_TST0 + j, &data, 1);
706 data = ns_tste_make(NS_TST_OPCODE_END, NS_TST0);
707 ns_write_sram(card, NS_TST0 + NS_TST_NUM_ENTRIES, &data, 1);
708 for (j = 0; j < NS_TST_NUM_ENTRIES; j++)
709 ns_write_sram(card, NS_TST1 + j, &data, 1);
710 data = ns_tste_make(NS_TST_OPCODE_END, NS_TST1);
711 ns_write_sram(card, NS_TST1 + NS_TST_NUM_ENTRIES, &data, 1);
712 for (j = 0; j < NS_TST_NUM_ENTRIES; j++)
713 card->tste2vc[j] = NULL;
714 writel(NS_TST0 << 2, card->membase + TSTB);
715
716
717 /* Initialize RCT. AAL type is set on opening the VC. */
718 #ifdef RCQ_SUPPORT
719 u32d[0] = NS_RCTE_RAWCELLINTEN;
720 #else
721 u32d[0] = 0x00000000;
722 #endif /* RCQ_SUPPORT */
723 u32d[1] = 0x00000000;
724 u32d[2] = 0x00000000;
725 u32d[3] = 0xFFFFFFFF;
726 for (j = 0; j < card->rct_size; j++)
727 ns_write_sram(card, j * 4, u32d, 4);
728
729 memset(card->vcmap, 0, NS_MAX_RCTSIZE * sizeof(vc_map));
730
731 for (j = 0; j < NS_FRSCD_NUM; j++)
732 card->scd2vc[j] = NULL;
733
734 /* Initialize buffer levels */
735 card->sbnr.min = MIN_SB;
736 card->sbnr.init = NUM_SB;
737 card->sbnr.max = MAX_SB;
738 card->lbnr.min = MIN_LB;
739 card->lbnr.init = NUM_LB;
740 card->lbnr.max = MAX_LB;
741 card->iovnr.min = MIN_IOVB;
742 card->iovnr.init = NUM_IOVB;
743 card->iovnr.max = MAX_IOVB;
744 card->hbnr.min = MIN_HB;
745 card->hbnr.init = NUM_HB;
746 card->hbnr.max = MAX_HB;
747
748 card->sm_handle = 0x00000000;
749 card->sm_addr = 0x00000000;
750 card->lg_handle = 0x00000000;
751 card->lg_addr = 0x00000000;
752
753 card->efbie = 1; /* To prevent push_rxbufs from enabling the interrupt */
754
755 /* Pre-allocate some huge buffers */
756 skb_queue_head_init(&card->hbpool.queue);
757 card->hbpool.count = 0;
758 for (j = 0; j < NUM_HB; j++)
759 {
760 struct sk_buff *hb;
761 hb = __dev_alloc_skb(NS_HBUFSIZE, GFP_KERNEL);
762 if (hb == NULL)
763 {
764 printk("nicstar%d: can't allocate %dth of %d huge buffers.\n",
765 i, j, NUM_HB);
766 error = 13;
767 ns_init_card_error(card, error);
768 return error;
769 }
770 skb_queue_tail(&card->hbpool.queue, hb);
771 card->hbpool.count++;
772 }
773
774
775 /* Allocate large buffers */
776 skb_queue_head_init(&card->lbpool.queue);
777 card->lbpool.count = 0; /* Not used */
778 for (j = 0; j < NUM_LB; j++)
779 {
780 struct sk_buff *lb;
781 lb = __dev_alloc_skb(NS_LGSKBSIZE, GFP_KERNEL);
782 if (lb == NULL)
783 {
784 printk("nicstar%d: can't allocate %dth of %d large buffers.\n",
785 i, j, NUM_LB);
786 error = 14;
787 ns_init_card_error(card, error);
788 return error;
789 }
790 skb_queue_tail(&card->lbpool.queue, lb);
791 skb_reserve(lb, NS_SMBUFSIZE);
792 push_rxbufs(card, BUF_LG, (u32) lb, (u32) virt_to_bus(lb->data), 0, 0);
793 /* Due to the implementation of push_rxbufs() this is 1, not 0 */
794 if (j == 1)
795 {
796 card->rcbuf = lb;
797 card->rawch = (u32) virt_to_bus(lb->data);
798 }
799 }
800 /* Test for strange behaviour which leads to crashes */
801 if ((bcount = ns_stat_lfbqc_get(readl(card->membase + STAT))) < card->lbnr.min)
802 {
803 printk("nicstar%d: Strange... Just allocated %d large buffers and lfbqc = %d.\n",
804 i, j, bcount);
805 error = 14;
806 ns_init_card_error(card, error);
807 return error;
808 }
809
810
811 /* Allocate small buffers */
812 skb_queue_head_init(&card->sbpool.queue);
813 card->sbpool.count = 0; /* Not used */
814 for (j = 0; j < NUM_SB; j++)
815 {
816 struct sk_buff *sb;
817 sb = __dev_alloc_skb(NS_SMSKBSIZE, GFP_KERNEL);
818 if (sb == NULL)
819 {
820 printk("nicstar%d: can't allocate %dth of %d small buffers.\n",
821 i, j, NUM_SB);
822 error = 15;
823 ns_init_card_error(card, error);
824 return error;
825 }
826 skb_queue_tail(&card->sbpool.queue, sb);
827 skb_reserve(sb, NS_AAL0_HEADER);
828 push_rxbufs(card, BUF_SM, (u32) sb, (u32) virt_to_bus(sb->data), 0, 0);
829 }
830 /* Test for strange behaviour which leads to crashes */
831 if ((bcount = ns_stat_sfbqc_get(readl(card->membase + STAT))) < card->sbnr.min)
832 {
833 printk("nicstar%d: Strange... Just allocated %d small buffers and sfbqc = %d.\n",
834 i, j, bcount);
835 error = 15;
836 ns_init_card_error(card, error);
837 return error;
838 }
839
840
841 /* Allocate iovec buffers */
842 skb_queue_head_init(&card->iovpool.queue);
843 card->iovpool.count = 0;
844 for (j = 0; j < NUM_IOVB; j++)
845 {
846 struct sk_buff *iovb;
847 iovb = alloc_skb(NS_IOVBUFSIZE, GFP_KERNEL);
848 if (iovb == NULL)
849 {
850 printk("nicstar%d: can't allocate %dth of %d iovec buffers.\n",
851 i, j, NUM_IOVB);
852 error = 16;
853 ns_init_card_error(card, error);
854 return error;
855 }
856 skb_queue_tail(&card->iovpool.queue, iovb);
857 card->iovpool.count++;
858 }
859
860 card->intcnt = 0;
861
862 /* Configure NICStAR */
863 if (card->rct_size == 4096)
864 ns_cfg_rctsize = NS_CFG_RCTSIZE_4096_ENTRIES;
865 else /* (card->rct_size == 16384) */
866 ns_cfg_rctsize = NS_CFG_RCTSIZE_16384_ENTRIES;
867
868 card->efbie = 1;
869
870 /* Register device */
871 card->atmdev = atm_dev_register("nicstar", &atm_ops, -1, NULL);
872 if (card->atmdev == NULL)
873 {
874 printk("nicstar%d: can't register device.\n", i);
875 error = 17;
876 ns_init_card_error(card, error);
877 return error;
878 }
879
880 if (ns_parse_mac(mac[i], card->atmdev->esi)) {
881 nicstar_read_eprom(card->membase, NICSTAR_EPROM_MAC_ADDR_OFFSET,
882 card->atmdev->esi, 6);
883 if (memcmp(card->atmdev->esi, "\x00\x00\x00\x00\x00\x00", 6) == 0) {
884 nicstar_read_eprom(card->membase, NICSTAR_EPROM_MAC_ADDR_OFFSET_ALT,
885 card->atmdev->esi, 6);
886 }
887 }
888
889 printk("nicstar%d: MAC address %02X:%02X:%02X:%02X:%02X:%02X\n", i,
890 card->atmdev->esi[0], card->atmdev->esi[1], card->atmdev->esi[2],
891 card->atmdev->esi[3], card->atmdev->esi[4], card->atmdev->esi[5]);
892
893 card->atmdev->dev_data = card;
894 card->atmdev->ci_range.vpi_bits = card->vpibits;
895 card->atmdev->ci_range.vci_bits = card->vcibits;
896 card->atmdev->link_rate = card->max_pcr;
897 card->atmdev->phy = NULL;
898
899 #ifdef CONFIG_ATM_NICSTAR_USE_SUNI
900 if (card->max_pcr == ATM_OC3_PCR)
901 suni_init(card->atmdev);
902 #endif /* CONFIG_ATM_NICSTAR_USE_SUNI */
903
904 #ifdef CONFIG_ATM_NICSTAR_USE_IDT77105
905 if (card->max_pcr == ATM_25_PCR)
906 idt77105_init(card->atmdev);
907 #endif /* CONFIG_ATM_NICSTAR_USE_IDT77105 */
908
909 if (card->atmdev->phy && card->atmdev->phy->start)
910 card->atmdev->phy->start(card->atmdev);
911
912 writel(NS_CFG_RXPATH |
913 NS_CFG_SMBUFSIZE |
914 NS_CFG_LGBUFSIZE |
915 NS_CFG_EFBIE |
916 NS_CFG_RSQSIZE |
917 NS_CFG_VPIBITS |
918 ns_cfg_rctsize |
919 NS_CFG_RXINT_NODELAY |
920 NS_CFG_RAWIE | /* Only enabled if RCQ_SUPPORT */
921 NS_CFG_RSQAFIE |
922 NS_CFG_TXEN |
923 NS_CFG_TXIE |
924 NS_CFG_TSQFIE_OPT | /* Only enabled if ENABLE_TSQFIE */
925 NS_CFG_PHYIE,
926 card->membase + CFG);
927
928 num_cards++;
929
930 return error;
931 }
932
933
934
935 static void __devinit ns_init_card_error(ns_dev *card, int error)
936 {
937 if (error >= 17)
938 {
939 writel(0x00000000, card->membase + CFG);
940 }
941 if (error >= 16)
942 {
943 struct sk_buff *iovb;
944 while ((iovb = skb_dequeue(&card->iovpool.queue)) != NULL)
945 dev_kfree_skb_any(iovb);
946 }
947 if (error >= 15)
948 {
949 struct sk_buff *sb;
950 while ((sb = skb_dequeue(&card->sbpool.queue)) != NULL)
951 dev_kfree_skb_any(sb);
952 free_scq(card->scq0, NULL);
953 }
954 if (error >= 14)
955 {
956 struct sk_buff *lb;
957 while ((lb = skb_dequeue(&card->lbpool.queue)) != NULL)
958 dev_kfree_skb_any(lb);
959 }
960 if (error >= 13)
961 {
962 struct sk_buff *hb;
963 while ((hb = skb_dequeue(&card->hbpool.queue)) != NULL)
964 dev_kfree_skb_any(hb);
965 }
966 if (error >= 12)
967 {
968 kfree(card->rsq.org);
969 }
970 if (error >= 11)
971 {
972 kfree(card->tsq.org);
973 }
974 if (error >= 10)
975 {
976 free_irq(card->pcidev->irq, card);
977 }
978 if (error >= 4)
979 {
980 iounmap((void *) card->membase);
981 }
982 if (error >= 3)
983 {
984 pci_disable_device(card->pcidev);
985 kfree(card);
986 }
987 }
988
989
990
991 static scq_info *get_scq(int size, u32 scd)
992 {
993 scq_info *scq;
994 int i;
995
996 if (size != VBR_SCQSIZE && size != CBR_SCQSIZE)
997 return (scq_info *) NULL;
998
999 scq = (scq_info *) kmalloc(sizeof(scq_info), GFP_KERNEL);
1000 if (scq == (scq_info *) NULL)
1001 return (scq_info *) NULL;
1002 scq->org = kmalloc(2 * size, GFP_KERNEL);
1003 if (scq->org == NULL)
1004 {
1005 kfree(scq);
1006 return (scq_info *) NULL;
1007 }
1008 scq->skb = (struct sk_buff **) kmalloc(sizeof(struct sk_buff *) *
1009 (size / NS_SCQE_SIZE), GFP_KERNEL);
1010 if (scq->skb == (struct sk_buff **) NULL)
1011 {
1012 kfree(scq->org);
1013 kfree(scq);
1014 return (scq_info *) NULL;
1015 }
1016 scq->num_entries = size / NS_SCQE_SIZE;
1017 scq->base = (ns_scqe *) ALIGN_ADDRESS(scq->org, size);
1018 scq->next = scq->base;
1019 scq->last = scq->base + (scq->num_entries - 1);
1020 scq->tail = scq->last;
1021 scq->scd = scd;
1022 scq->num_entries = size / NS_SCQE_SIZE;
1023 scq->tbd_count = 0;
1024 init_waitqueue_head(&scq->scqfull_waitq);
1025 scq->full = 0;
1026 spin_lock_init(&scq->lock);
1027
1028 for (i = 0; i < scq->num_entries; i++)
1029 scq->skb[i] = NULL;
1030
1031 return scq;
1032 }
1033
1034
1035
1036 /* For variable rate SCQ vcc must be NULL */
1037 static void free_scq(scq_info *scq, struct atm_vcc *vcc)
1038 {
1039 int i;
1040
1041 if (scq->num_entries == VBR_SCQ_NUM_ENTRIES)
1042 for (i = 0; i < scq->num_entries; i++)
1043 {
1044 if (scq->skb[i] != NULL)
1045 {
1046 vcc = ATM_SKB(scq->skb[i])->vcc;
1047 if (vcc->pop != NULL)
1048 vcc->pop(vcc, scq->skb[i]);
1049 else
1050 dev_kfree_skb_any(scq->skb[i]);
1051 }
1052 }
1053 else /* vcc must be != NULL */
1054 {
1055 if (vcc == NULL)
1056 {
1057 printk("nicstar: free_scq() called with vcc == NULL for fixed rate scq.");
1058 for (i = 0; i < scq->num_entries; i++)
1059 dev_kfree_skb_any(scq->skb[i]);
1060 }
1061 else
1062 for (i = 0; i < scq->num_entries; i++)
1063 {
1064 if (scq->skb[i] != NULL)
1065 {
1066 if (vcc->pop != NULL)
1067 vcc->pop(vcc, scq->skb[i]);
1068 else
1069 dev_kfree_skb_any(scq->skb[i]);
1070 }
1071 }
1072 }
1073 kfree(scq->skb);
1074 kfree(scq->org);
1075 kfree(scq);
1076 }
1077
1078
1079
1080 /* The handles passed must be pointers to the sk_buff containing the small
1081 or large buffer(s) cast to u32. */
1082 static void push_rxbufs(ns_dev *card, u32 type, u32 handle1, u32 addr1,
1083 u32 handle2, u32 addr2)
1084 {
1085 u32 stat;
1086 unsigned long flags;
1087
1088
1089 #ifdef GENERAL_DEBUG
1090 if (!addr1)
1091 printk("nicstar%d: push_rxbufs called with addr1 = 0.\n", card->index);
1092 #endif /* GENERAL_DEBUG */
1093
1094 stat = readl(card->membase + STAT);
1095 card->sbfqc = ns_stat_sfbqc_get(stat);
1096 card->lbfqc = ns_stat_lfbqc_get(stat);
1097 if (type == BUF_SM)
1098 {
1099 if (!addr2)
1100 {
1101 if (card->sm_addr)
1102 {
1103 addr2 = card->sm_addr;
1104 handle2 = card->sm_handle;
1105 card->sm_addr = 0x00000000;
1106 card->sm_handle = 0x00000000;
1107 }
1108 else /* (!sm_addr) */
1109 {
1110 card->sm_addr = addr1;
1111 card->sm_handle = handle1;
1112 }
1113 }
1114 }
1115 else /* type == BUF_LG */
1116 {
1117 if (!addr2)
1118 {
1119 if (card->lg_addr)
1120 {
1121 addr2 = card->lg_addr;
1122 handle2 = card->lg_handle;
1123 card->lg_addr = 0x00000000;
1124 card->lg_handle = 0x00000000;
1125 }
1126 else /* (!lg_addr) */
1127 {
1128 card->lg_addr = addr1;
1129 card->lg_handle = handle1;
1130 }
1131 }
1132 }
1133
1134 if (addr2)
1135 {
1136 if (type == BUF_SM)
1137 {
1138 if (card->sbfqc >= card->sbnr.max)
1139 {
1140 skb_unlink((struct sk_buff *) handle1);
1141 dev_kfree_skb_any((struct sk_buff *) handle1);
1142 skb_unlink((struct sk_buff *) handle2);
1143 dev_kfree_skb_any((struct sk_buff *) handle2);
1144 return;
1145 }
1146 else
1147 card->sbfqc += 2;
1148 }
1149 else /* (type == BUF_LG) */
1150 {
1151 if (card->lbfqc >= card->lbnr.max)
1152 {
1153 skb_unlink((struct sk_buff *) handle1);
1154 dev_kfree_skb_any((struct sk_buff *) handle1);
1155 skb_unlink((struct sk_buff *) handle2);
1156 dev_kfree_skb_any((struct sk_buff *) handle2);
1157 return;
1158 }
1159 else
1160 card->lbfqc += 2;
1161 }
1162
1163 ns_grab_res_lock(card, flags);
1164
1165 while (CMD_BUSY(card));
1166 writel(addr2, card->membase + DR3);
1167 writel(handle2, card->membase + DR2);
1168 writel(addr1, card->membase + DR1);
1169 writel(handle1, card->membase + DR0);
1170 writel(NS_CMD_WRITE_FREEBUFQ | (u32) type, card->membase + CMD);
1171
1172 spin_unlock_irqrestore(&card->res_lock, flags);
1173
1174 XPRINTK("nicstar%d: Pushing %s buffers at 0x%x and 0x%x.\n", card->index,
1175 (type == BUF_SM ? "small" : "large"), addr1, addr2);
1176 }
1177
1178 if (!card->efbie && card->sbfqc >= card->sbnr.min &&
1179 card->lbfqc >= card->lbnr.min)
1180 {
1181 card->efbie = 1;
1182 writel((readl(card->membase + CFG) | NS_CFG_EFBIE), card->membase + CFG);
1183 }
1184
1185 return;
1186 }
1187
1188
1189
1190 static irqreturn_t ns_irq_handler(int irq, void *dev_id, struct pt_regs *regs)
1191 {
1192 u32 stat_r;
1193 ns_dev *card;
1194 struct atm_dev *dev;
1195 unsigned long flags;
1196
1197 card = (ns_dev *) dev_id;
1198 dev = card->atmdev;
1199 card->intcnt++;
1200
1201 PRINTK("nicstar%d: NICStAR generated an interrupt\n", card->index);
1202
1203 ns_grab_int_lock(card, flags);
1204
1205 stat_r = readl(card->membase + STAT);
1206
1207 /* Transmit Status Indicator has been written to T. S. Queue */
1208 if (stat_r & NS_STAT_TSIF)
1209 {
1210 TXPRINTK("nicstar%d: TSI interrupt\n", card->index);
1211 process_tsq(card);
1212 writel(NS_STAT_TSIF, card->membase + STAT);
1213 }
1214
1215 /* Incomplete CS-PDU has been transmitted */
1216 if (stat_r & NS_STAT_TXICP)
1217 {
1218 writel(NS_STAT_TXICP, card->membase + STAT);
1219 TXPRINTK("nicstar%d: Incomplete CS-PDU transmitted.\n",
1220 card->index);
1221 }
1222
1223 /* Transmit Status Queue 7/8 full */
1224 if (stat_r & NS_STAT_TSQF)
1225 {
1226 writel(NS_STAT_TSQF, card->membase + STAT);
1227 PRINTK("nicstar%d: TSQ full.\n", card->index);
1228 process_tsq(card);
1229 }
1230
1231 /* Timer overflow */
1232 if (stat_r & NS_STAT_TMROF)
1233 {
1234 writel(NS_STAT_TMROF, card->membase + STAT);
1235 PRINTK("nicstar%d: Timer overflow.\n", card->index);
1236 }
1237
1238 /* PHY device interrupt signal active */
1239 if (stat_r & NS_STAT_PHYI)
1240 {
1241 writel(NS_STAT_PHYI, card->membase + STAT);
1242 PRINTK("nicstar%d: PHY interrupt.\n", card->index);
1243 if (dev->phy && dev->phy->interrupt) {
1244 dev->phy->interrupt(dev);
1245 }
1246 }
1247
1248 /* Small Buffer Queue is full */
1249 if (stat_r & NS_STAT_SFBQF)
1250 {
1251 writel(NS_STAT_SFBQF, card->membase + STAT);
1252 printk("nicstar%d: Small free buffer queue is full.\n", card->index);
1253 }
1254
1255 /* Large Buffer Queue is full */
1256 if (stat_r & NS_STAT_LFBQF)
1257 {
1258 writel(NS_STAT_LFBQF, card->membase + STAT);
1259 printk("nicstar%d: Large free buffer queue is full.\n", card->index);
1260 }
1261
1262 /* Receive Status Queue is full */
1263 if (stat_r & NS_STAT_RSQF)
1264 {
1265 writel(NS_STAT_RSQF, card->membase + STAT);
1266 printk("nicstar%d: RSQ full.\n", card->index);
1267 process_rsq(card);
1268 }
1269
1270 /* Complete CS-PDU received */
1271 if (stat_r & NS_STAT_EOPDU)
1272 {
1273 RXPRINTK("nicstar%d: End of CS-PDU received.\n", card->index);
1274 process_rsq(card);
1275 writel(NS_STAT_EOPDU, card->membase + STAT);
1276 }
1277
1278 /* Raw cell received */
1279 if (stat_r & NS_STAT_RAWCF)
1280 {
1281 writel(NS_STAT_RAWCF, card->membase + STAT);
1282 #ifndef RCQ_SUPPORT
1283 printk("nicstar%d: Raw cell received and no support yet...\n",
1284 card->index);
1285 #endif /* RCQ_SUPPORT */
1286 /* NOTE: the following procedure may keep a raw cell pending until the
1287 next interrupt. As this preliminary support is only meant to
1288 avoid buffer leakage, this is not an issue. */
1289 while (readl(card->membase + RAWCT) != card->rawch)
1290 {
1291 ns_rcqe *rawcell;
1292
1293 rawcell = (ns_rcqe *) bus_to_virt(card->rawch);
1294 if (ns_rcqe_islast(rawcell))
1295 {
1296 struct sk_buff *oldbuf;
1297
1298 oldbuf = card->rcbuf;
1299 card->rcbuf = (struct sk_buff *) ns_rcqe_nextbufhandle(rawcell);
1300 card->rawch = (u32) virt_to_bus(card->rcbuf->data);
1301 recycle_rx_buf(card, oldbuf);
1302 }
1303 else
1304 card->rawch += NS_RCQE_SIZE;
1305 }
1306 }
1307
1308 /* Small buffer queue is empty */
1309 if (stat_r & NS_STAT_SFBQE)
1310 {
1311 int i;
1312 struct sk_buff *sb;
1313
1314 writel(NS_STAT_SFBQE, card->membase + STAT);
1315 printk("nicstar%d: Small free buffer queue empty.\n",
1316 card->index);
1317 for (i = 0; i < card->sbnr.min; i++)
1318 {
1319 sb = dev_alloc_skb(NS_SMSKBSIZE);
1320 if (sb == NULL)
1321 {
1322 writel(readl(card->membase + CFG) & ~NS_CFG_EFBIE, card->membase + CFG);
1323 card->efbie = 0;
1324 break;
1325 }
1326 skb_queue_tail(&card->sbpool.queue, sb);
1327 skb_reserve(sb, NS_AAL0_HEADER);
1328 push_rxbufs(card, BUF_SM, (u32) sb, (u32) virt_to_bus(sb->data), 0, 0);
1329 }
1330 card->sbfqc = i;
1331 process_rsq(card);
1332 }
1333
1334 /* Large buffer queue empty */
1335 if (stat_r & NS_STAT_LFBQE)
1336 {
1337 int i;
1338 struct sk_buff *lb;
1339
1340 writel(NS_STAT_LFBQE, card->membase + STAT);
1341 printk("nicstar%d: Large free buffer queue empty.\n",
1342 card->index);
1343 for (i = 0; i < card->lbnr.min; i++)
1344 {
1345 lb = dev_alloc_skb(NS_LGSKBSIZE);
1346 if (lb == NULL)
1347 {
1348 writel(readl(card->membase + CFG) & ~NS_CFG_EFBIE, card->membase + CFG);
1349 card->efbie = 0;
1350 break;
1351 }
1352 skb_queue_tail(&card->lbpool.queue, lb);
1353 skb_reserve(lb, NS_SMBUFSIZE);
1354 push_rxbufs(card, BUF_LG, (u32) lb, (u32) virt_to_bus(lb->data), 0, 0);
1355 }
1356 card->lbfqc = i;
1357 process_rsq(card);
1358 }
1359
1360 /* Receive Status Queue is 7/8 full */
1361 if (stat_r & NS_STAT_RSQAF)
1362 {
1363 writel(NS_STAT_RSQAF, card->membase + STAT);
1364 RXPRINTK("nicstar%d: RSQ almost full.\n", card->index);
1365 process_rsq(card);
1366 }
1367
1368 spin_unlock_irqrestore(&card->int_lock, flags);
1369 PRINTK("nicstar%d: end of interrupt service\n", card->index);
1370 return IRQ_HANDLED;
1371 }
1372
1373
1374
1375 static int ns_open(struct atm_vcc *vcc)
1376 {
1377 ns_dev *card;
1378 vc_map *vc;
1379 unsigned long tmpl, modl;
1380 int tcr, tcra; /* target cell rate, and absolute value */
1381 int n = 0; /* Number of entries in the TST. Initialized to remove
1382 the compiler warning. */
1383 u32 u32d[4];
1384 int frscdi = 0; /* Index of the SCD. Initialized to remove the compiler
1385 warning. How I wish compilers were clever enough to
1386 tell which variables can truly be used
1387 uninitialized... */
1388 int inuse; /* tx or rx vc already in use by another vcc */
1389 short vpi = vcc->vpi;
1390 int vci = vcc->vci;
1391
1392 card = (ns_dev *) vcc->dev->dev_data;
1393 PRINTK("nicstar%d: opening vpi.vci %d.%d \n", card->index, (int) vpi, vci);
1394 if (vcc->qos.aal != ATM_AAL5 && vcc->qos.aal != ATM_AAL0)
1395 {
1396 PRINTK("nicstar%d: unsupported AAL.\n", card->index);
1397 return -EINVAL;
1398 }
1399
1400 vc = &(card->vcmap[vpi << card->vcibits | vci]);
1401 vcc->dev_data = vc;
1402
1403 inuse = 0;
1404 if (vcc->qos.txtp.traffic_class != ATM_NONE && vc->tx)
1405 inuse = 1;
1406 if (vcc->qos.rxtp.traffic_class != ATM_NONE && vc->rx)
1407 inuse += 2;
1408 if (inuse)
1409 {
1410 printk("nicstar%d: %s vci already in use.\n", card->index,
1411 inuse == 1 ? "tx" : inuse == 2 ? "rx" : "tx and rx");
1412 return -EINVAL;
1413 }
1414
1415 set_bit(ATM_VF_ADDR,&vcc->flags);
1416
1417 /* NOTE: You are not allowed to modify an open connection's QOS. To change
1418 that, remove the ATM_VF_PARTIAL flag checking. There may be other changes
1419 needed to do that. */
1420 if (!test_bit(ATM_VF_PARTIAL,&vcc->flags))
1421 {
1422 scq_info *scq;
1423
1424 set_bit(ATM_VF_PARTIAL,&vcc->flags);
1425 if (vcc->qos.txtp.traffic_class == ATM_CBR)
1426 {
1427 /* Check requested cell rate and availability of SCD */
1428 if (vcc->qos.txtp.max_pcr == 0 && vcc->qos.txtp.pcr == 0 &&
1429 vcc->qos.txtp.min_pcr == 0)
1430 {
1431 PRINTK("nicstar%d: trying to open a CBR vc with cell rate = 0 \n",
1432 card->index);
1433 clear_bit(ATM_VF_PARTIAL,&vcc->flags);
1434 clear_bit(ATM_VF_ADDR,&vcc->flags);
1435 return -EINVAL;
1436 }
1437
1438 tcr = atm_pcr_goal(&(vcc->qos.txtp));
1439 tcra = tcr >= 0 ? tcr : -tcr;
1440
1441 PRINTK("nicstar%d: target cell rate = %d.\n", card->index,
1442 vcc->qos.txtp.max_pcr);
1443
1444 tmpl = (unsigned long)tcra * (unsigned long)NS_TST_NUM_ENTRIES;
1445 modl = tmpl % card->max_pcr;
1446
1447 n = (int)(tmpl / card->max_pcr);
1448 if (tcr > 0)
1449 {
1450 if (modl > 0) n++;
1451 }
1452 else if (tcr == 0)
1453 {
1454 if ((n = (card->tst_free_entries - NS_TST_RESERVED)) <= 0)
1455 {
1456 PRINTK("nicstar%d: no CBR bandwidth free.\n", card->index);
1457 clear_bit(ATM_VF_PARTIAL,&vcc->flags);
1458 clear_bit(ATM_VF_ADDR,&vcc->flags);
1459 return -EINVAL;
1460 }
1461 }
1462
1463 if (n == 0)
1464 {
1465 printk("nicstar%d: selected bandwidth < granularity.\n", card->index);
1466 clear_bit(ATM_VF_PARTIAL,&vcc->flags);
1467 clear_bit(ATM_VF_ADDR,&vcc->flags);
1468 return -EINVAL;
1469 }
1470
1471 if (n > (card->tst_free_entries - NS_TST_RESERVED))
1472 {
1473 PRINTK("nicstar%d: not enough free CBR bandwidth.\n", card->index);
1474 clear_bit(ATM_VF_PARTIAL,&vcc->flags);
1475 clear_bit(ATM_VF_ADDR,&vcc->flags);
1476 return -EINVAL;
1477 }
1478 else
1479 card->tst_free_entries -= n;
1480
1481 XPRINTK("nicstar%d: writing %d tst entries.\n", card->index, n);
1482 for (frscdi = 0; frscdi < NS_FRSCD_NUM; frscdi++)
1483 {
1484 if (card->scd2vc[frscdi] == NULL)
1485 {
1486 card->scd2vc[frscdi] = vc;
1487 break;
1488 }
1489 }
1490 if (frscdi == NS_FRSCD_NUM)
1491 {
1492 PRINTK("nicstar%d: no SCD available for CBR channel.\n", card->index);
1493 card->tst_free_entries += n;
1494 clear_bit(ATM_VF_PARTIAL,&vcc->flags);
1495 clear_bit(ATM_VF_ADDR,&vcc->flags);
1496 return -EBUSY;
1497 }
1498
1499 vc->cbr_scd = NS_FRSCD + frscdi * NS_FRSCD_SIZE;
1500
1501 scq = get_scq(CBR_SCQSIZE, vc->cbr_scd);
1502 if (scq == (scq_info *) NULL)
1503 {
1504 PRINTK("nicstar%d: can't get fixed rate SCQ.\n", card->index);
1505 card->scd2vc[frscdi] = NULL;
1506 card->tst_free_entries += n;
1507 clear_bit(ATM_VF_PARTIAL,&vcc->flags);
1508 clear_bit(ATM_VF_ADDR,&vcc->flags);
1509 return -ENOMEM;
1510 }
1511 vc->scq = scq;
1512 u32d[0] = (u32) virt_to_bus(scq->base);
1513 u32d[1] = (u32) 0x00000000;
1514 u32d[2] = (u32) 0xffffffff;
1515 u32d[3] = (u32) 0x00000000;
1516 ns_write_sram(card, vc->cbr_scd, u32d, 4);
1517
1518 fill_tst(card, n, vc);
1519 }
1520 else if (vcc->qos.txtp.traffic_class == ATM_UBR)
1521 {
1522 vc->cbr_scd = 0x00000000;
1523 vc->scq = card->scq0;
1524 }
1525
1526 if (vcc->qos.txtp.traffic_class != ATM_NONE)
1527 {
1528 vc->tx = 1;
1529 vc->tx_vcc = vcc;
1530 vc->tbd_count = 0;
1531 }
1532 if (vcc->qos.rxtp.traffic_class != ATM_NONE)
1533 {
1534 u32 status;
1535
1536 vc->rx = 1;
1537 vc->rx_vcc = vcc;
1538 vc->rx_iov = NULL;
1539
1540 /* Open the connection in hardware */
1541 if (vcc->qos.aal == ATM_AAL5)
1542 status = NS_RCTE_AAL5 | NS_RCTE_CONNECTOPEN;
1543 else /* vcc->qos.aal == ATM_AAL0 */
1544 status = NS_RCTE_AAL0 | NS_RCTE_CONNECTOPEN;
1545 #ifdef RCQ_SUPPORT
1546 status |= NS_RCTE_RAWCELLINTEN;
1547 #endif /* RCQ_SUPPORT */
1548 ns_write_sram(card, NS_RCT + (vpi << card->vcibits | vci) *
1549 NS_RCT_ENTRY_SIZE, &status, 1);
1550 }
1551
1552 }
1553
1554 set_bit(ATM_VF_READY,&vcc->flags);
1555 return 0;
1556 }
1557
1558
1559
1560 static void ns_close(struct atm_vcc *vcc)
1561 {
1562 vc_map *vc;
1563 ns_dev *card;
1564 u32 data;
1565 int i;
1566
1567 vc = vcc->dev_data;
1568 card = vcc->dev->dev_data;
1569 PRINTK("nicstar%d: closing vpi.vci %d.%d \n", card->index,
1570 (int) vcc->vpi, vcc->vci);
1571
1572 clear_bit(ATM_VF_READY,&vcc->flags);
1573
1574 if (vcc->qos.rxtp.traffic_class != ATM_NONE)
1575 {
1576 u32 addr;
1577 unsigned long flags;
1578
1579 addr = NS_RCT + (vcc->vpi << card->vcibits | vcc->vci) * NS_RCT_ENTRY_SIZE;
1580 ns_grab_res_lock(card, flags);
1581 while(CMD_BUSY(card));
1582 writel(NS_CMD_CLOSE_CONNECTION | addr << 2, card->membase + CMD);
1583 spin_unlock_irqrestore(&card->res_lock, flags);
1584
1585 vc->rx = 0;
1586 if (vc->rx_iov != NULL)
1587 {
1588 struct sk_buff *iovb;
1589 u32 stat;
1590
1591 stat = readl(card->membase + STAT);
1592 card->sbfqc = ns_stat_sfbqc_get(stat);
1593 card->lbfqc = ns_stat_lfbqc_get(stat);
1594
1595 PRINTK("nicstar%d: closing a VC with pending rx buffers.\n",
1596 card->index);
1597 iovb = vc->rx_iov;
1598 recycle_iovec_rx_bufs(card, (struct iovec *) iovb->data,
1599 NS_SKB(iovb)->iovcnt);
1600 NS_SKB(iovb)->iovcnt = 0;
1601 NS_SKB(iovb)->vcc = NULL;
1602 ns_grab_int_lock(card, flags);
1603 recycle_iov_buf(card, iovb);
1604 spin_unlock_irqrestore(&card->int_lock, flags);
1605 vc->rx_iov = NULL;
1606 }
1607 }
1608
1609 if (vcc->qos.txtp.traffic_class != ATM_NONE)
1610 {
1611 vc->tx = 0;
1612 }
1613
1614 if (vcc->qos.txtp.traffic_class == ATM_CBR)
1615 {
1616 unsigned long flags;
1617 ns_scqe *scqep;
1618 scq_info *scq;
1619
1620 scq = vc->scq;
1621
1622 for (;;)
1623 {
1624 ns_grab_scq_lock(card, scq, flags);
1625 scqep = scq->next;
1626 if (scqep == scq->base)
1627 scqep = scq->last;
1628 else
1629 scqep--;
1630 if (scqep == scq->tail)
1631 {
1632 spin_unlock_irqrestore(&scq->lock, flags);
1633 break;
1634 }
1635 /* If the last entry is not a TSR, place one in the SCQ in order to
1636 be able to completely drain it and then close. */
1637 if (!ns_scqe_is_tsr(scqep) && scq->tail != scq->next)
1638 {
1639 ns_scqe tsr;
1640 u32 scdi, scqi;
1641 u32 data;
1642 int index;
1643
1644 tsr.word_1 = ns_tsr_mkword_1(NS_TSR_INTENABLE);
1645 scdi = (vc->cbr_scd - NS_FRSCD) / NS_FRSCD_SIZE;
1646 scqi = scq->next - scq->base;
1647 tsr.word_2 = ns_tsr_mkword_2(scdi, scqi);
1648 tsr.word_3 = 0x00000000;
1649 tsr.word_4 = 0x00000000;
1650 *scq->next = tsr;
1651 index = (int) scqi;
1652 scq->skb[index] = NULL;
1653 if (scq->next == scq->last)
1654 scq->next = scq->base;
1655 else
1656 scq->next++;
1657 data = (u32) virt_to_bus(scq->next);
1658 ns_write_sram(card, scq->scd, &data, 1);
1659 }
1660 spin_unlock_irqrestore(&scq->lock, flags);
1661 schedule();
1662 }
1663
1664 /* Free all TST entries */
1665 data = NS_TST_OPCODE_VARIABLE;
1666 for (i = 0; i < NS_TST_NUM_ENTRIES; i++)
1667 {
1668 if (card->tste2vc[i] == vc)
1669 {
1670 ns_write_sram(card, card->tst_addr + i, &data, 1);
1671 card->tste2vc[i] = NULL;
1672 card->tst_free_entries++;
1673 }
1674 }
1675
1676 card->scd2vc[(vc->cbr_scd - NS_FRSCD) / NS_FRSCD_SIZE] = NULL;
1677 free_scq(vc->scq, vcc);
1678 }
1679
1680 /* remove all references to vcc before deleting it */
1681 if (vcc->qos.txtp.traffic_class != ATM_NONE)
1682 {
1683 unsigned long flags;
1684 scq_info *scq = card->scq0;
1685
1686 ns_grab_scq_lock(card, scq, flags);
1687
1688 for(i = 0; i < scq->num_entries; i++) {
1689 if(scq->skb[i] && ATM_SKB(scq->skb[i])->vcc == vcc) {
1690 ATM_SKB(scq->skb[i])->vcc = NULL;
1691 atm_return(vcc, scq->skb[i]->truesize);
1692 PRINTK("nicstar: deleted pending vcc mapping\n");
1693 }
1694 }
1695
1696 spin_unlock_irqrestore(&scq->lock, flags);
1697 }
1698
1699 vcc->dev_data = NULL;
1700 clear_bit(ATM_VF_PARTIAL,&vcc->flags);
1701 clear_bit(ATM_VF_ADDR,&vcc->flags);
1702
1703 #ifdef RX_DEBUG
1704 {
1705 u32 stat, cfg;
1706 stat = readl(card->membase + STAT);
1707 cfg = readl(card->membase + CFG);
1708 printk("STAT = 0x%08X CFG = 0x%08X \n", stat, cfg);
1709 printk("TSQ: base = 0x%08X next = 0x%08X last = 0x%08X TSQT = 0x%08X \n",
1710 (u32) card->tsq.base, (u32) card->tsq.next,(u32) card->tsq.last,
1711 readl(card->membase + TSQT));
1712 printk("RSQ: base = 0x%08X next = 0x%08X last = 0x%08X RSQT = 0x%08X \n",
1713 (u32) card->rsq.base, (u32) card->rsq.next,(u32) card->rsq.last,
1714 readl(card->membase + RSQT));
1715 printk("Empty free buffer queue interrupt %s \n",
1716 card->efbie ? "enabled" : "disabled");
1717 printk("SBCNT = %d count = %d LBCNT = %d count = %d \n",
1718 ns_stat_sfbqc_get(stat), card->sbpool.count,
1719 ns_stat_lfbqc_get(stat), card->lbpool.count);
1720 printk("hbpool.count = %d iovpool.count = %d \n",
1721 card->hbpool.count, card->iovpool.count);
1722 }
1723 #endif /* RX_DEBUG */
1724 }
1725
1726
1727
1728 static void fill_tst(ns_dev *card, int n, vc_map *vc)
1729 {
1730 u32 new_tst;
1731 unsigned long cl;
1732 int e, r;
1733 u32 data;
1734
1735 /* It would be very complicated to keep the two TSTs synchronized while
1736 assuring that writes are only made to the inactive TST. So, for now I
1737 will use only one TST. If problems occur, I will change this again */
1738
1739 new_tst = card->tst_addr;
1740
1741 /* Fill procedure */
1742
1743 for (e = 0; e < NS_TST_NUM_ENTRIES; e++)
1744 {
1745 if (card->tste2vc[e] == NULL)
1746 break;
1747 }
1748 if (e == NS_TST_NUM_ENTRIES) {
1749 printk("nicstar%d: No free TST entries found. \n", card->index);
1750 return;
1751 }
1752
1753 r = n;
1754 cl = NS_TST_NUM_ENTRIES;
1755 data = ns_tste_make(NS_TST_OPCODE_FIXED, vc->cbr_scd);
1756
1757 while (r > 0)
1758 {
1759 if (cl >= NS_TST_NUM_ENTRIES && card->tste2vc[e] == NULL)
1760 {
1761 card->tste2vc[e] = vc;
1762 ns_write_sram(card, new_tst + e, &data, 1);
1763 cl -= NS_TST_NUM_ENTRIES;
1764 r--;
1765 }
1766
1767 if (++e == NS_TST_NUM_ENTRIES) {
1768 e = 0;
1769 }
1770 cl += n;
1771 }
1772
1773 /* End of fill procedure */
1774
1775 data = ns_tste_make(NS_TST_OPCODE_END, new_tst);
1776 ns_write_sram(card, new_tst + NS_TST_NUM_ENTRIES, &data, 1);
1777 ns_write_sram(card, card->tst_addr + NS_TST_NUM_ENTRIES, &data, 1);
1778 card->tst_addr = new_tst;
1779 }
1780
1781
1782
1783 static int ns_send(struct atm_vcc *vcc, struct sk_buff *skb)
1784 {
1785 ns_dev *card;
1786 vc_map *vc;
1787 scq_info *scq;
1788 unsigned long buflen;
1789 ns_scqe scqe;
1790 u32 flags; /* TBD flags, not CPU flags */
1791
1792 card = vcc->dev->dev_data;
1793 TXPRINTK("nicstar%d: ns_send() called.\n", card->index);
1794 if ((vc = (vc_map *) vcc->dev_data) == NULL)
1795 {
1796 printk("nicstar%d: vcc->dev_data == NULL on ns_send().\n", card->index);
1797 atomic_inc(&vcc->stats->tx_err);
1798 dev_kfree_skb_any(skb);
1799 return -EINVAL;
1800 }
1801
1802 if (!vc->tx)
1803 {
1804 printk("nicstar%d: Trying to transmit on a non-tx VC.\n", card->index);
1805 atomic_inc(&vcc->stats->tx_err);
1806 dev_kfree_skb_any(skb);
1807 return -EINVAL;
1808 }
1809
1810 if (vcc->qos.aal != ATM_AAL5 && vcc->qos.aal != ATM_AAL0)
1811 {
1812 printk("nicstar%d: Only AAL0 and AAL5 are supported.\n", card->index);
1813 atomic_inc(&vcc->stats->tx_err);
1814 dev_kfree_skb_any(skb);
1815 return -EINVAL;
1816 }
1817
1818 if (skb_shinfo(skb)->nr_frags != 0)
1819 {
1820 printk("nicstar%d: No scatter-gather yet.\n", card->index);
1821 atomic_inc(&vcc->stats->tx_err);
1822 dev_kfree_skb_any(skb);
1823 return -EINVAL;
1824 }
1825
1826 ATM_SKB(skb)->vcc = vcc;
1827
1828 if (vcc->qos.aal == ATM_AAL5)
1829 {
1830 buflen = (skb->len + 47 + 8) / 48 * 48; /* Multiple of 48 */
1831 flags = NS_TBD_AAL5;
1832 scqe.word_2 = cpu_to_le32((u32) virt_to_bus(skb->data));
1833 scqe.word_3 = cpu_to_le32((u32) skb->len);
1834 scqe.word_4 = ns_tbd_mkword_4(0, (u32) vcc->vpi, (u32) vcc->vci, 0,
1835 ATM_SKB(skb)->atm_options & ATM_ATMOPT_CLP ? 1 : 0);
1836 flags |= NS_TBD_EOPDU;
1837 }
1838 else /* (vcc->qos.aal == ATM_AAL0) */
1839 {
1840 buflen = ATM_CELL_PAYLOAD; /* i.e., 48 bytes */
1841 flags = NS_TBD_AAL0;
1842 scqe.word_2 = cpu_to_le32((u32) virt_to_bus(skb->data) + NS_AAL0_HEADER);
1843 scqe.word_3 = cpu_to_le32(0x00000000);
1844 if (*skb->data & 0x02) /* Payload type 1 - end of pdu */
1845 flags |= NS_TBD_EOPDU;
1846 scqe.word_4 = cpu_to_le32(*((u32 *) skb->data) & ~NS_TBD_VC_MASK);
1847 /* Force the VPI/VCI to be the same as in VCC struct */
1848 scqe.word_4 |= cpu_to_le32((((u32) vcc->vpi) << NS_TBD_VPI_SHIFT |
1849 ((u32) vcc->vci) << NS_TBD_VCI_SHIFT) &
1850 NS_TBD_VC_MASK);
1851 }
1852
1853 if (vcc->qos.txtp.traffic_class == ATM_CBR)
1854 {
1855 scqe.word_1 = ns_tbd_mkword_1_novbr(flags, (u32) buflen);
1856 scq = ((vc_map *) vcc->dev_data)->scq;
1857 }
1858 else
1859 {
1860 scqe.word_1 = ns_tbd_mkword_1(flags, (u32) 1, (u32) 1, (u32) buflen);
1861 scq = card->scq0;
1862 }
1863
1864 if (push_scqe(card, vc, scq, &scqe, skb) != 0)
1865 {
1866 atomic_inc(&vcc->stats->tx_err);
1867 dev_kfree_skb_any(skb);
1868 return -EIO;
1869 }
1870 atomic_inc(&vcc->stats->tx);
1871
1872 return 0;
1873 }
1874
1875
1876
1877 static int push_scqe(ns_dev *card, vc_map *vc, scq_info *scq, ns_scqe *tbd,
1878 struct sk_buff *skb)
1879 {
1880 unsigned long flags;
1881 ns_scqe tsr;
1882 u32 scdi, scqi;
1883 int scq_is_vbr;
1884 u32 data;
1885 int index;
1886
1887 ns_grab_scq_lock(card, scq, flags);
1888 while (scq->tail == scq->next)
1889 {
1890 if (in_interrupt()) {
1891 spin_unlock_irqrestore(&scq->lock, flags);
1892 printk("nicstar%d: Error pushing TBD.\n", card->index);
1893 return 1;
1894 }
1895
1896 scq->full = 1;
1897 spin_unlock_irqrestore(&scq->lock, flags);
1898 interruptible_sleep_on_timeout(&scq->scqfull_waitq, SCQFULL_TIMEOUT);
1899 ns_grab_scq_lock(card, scq, flags);
1900
1901 if (scq->full) {
1902 spin_unlock_irqrestore(&scq->lock, flags);
1903 printk("nicstar%d: Timeout pushing TBD.\n", card->index);
1904 return 1;
1905 }
1906 }
1907 *scq->next = *tbd;
1908 index = (int) (scq->next - scq->base);
1909 scq->skb[index] = skb;
1910 XPRINTK("nicstar%d: sending skb at 0x%x (pos %d).\n",
1911 card->index, (u32) skb, index);
1912 XPRINTK("nicstar%d: TBD written:\n0x%x\n0x%x\n0x%x\n0x%x\n at 0x%x.\n",
1913 card->index, le32_to_cpu(tbd->word_1), le32_to_cpu(tbd->word_2),
1914 le32_to_cpu(tbd->word_3), le32_to_cpu(tbd->word_4),
1915 (u32) scq->next);
1916 if (scq->next == scq->last)
1917 scq->next = scq->base;
1918 else
1919 scq->next++;
1920
1921 vc->tbd_count++;
1922 if (scq->num_entries == VBR_SCQ_NUM_ENTRIES)
1923 {
1924 scq->tbd_count++;
1925 scq_is_vbr = 1;
1926 }
1927 else
1928 scq_is_vbr = 0;
1929
1930 if (vc->tbd_count >= MAX_TBD_PER_VC || scq->tbd_count >= MAX_TBD_PER_SCQ)
1931 {
1932 int has_run = 0;
1933
1934 while (scq->tail == scq->next)
1935 {
1936 if (in_interrupt()) {
1937 data = (u32) virt_to_bus(scq->next);
1938 ns_write_sram(card, scq->scd, &data, 1);
1939 spin_unlock_irqrestore(&scq->lock, flags);
1940 printk("nicstar%d: Error pushing TSR.\n", card->index);
1941 return 0;
1942 }
1943
1944 scq->full = 1;
1945 if (has_run++) break;
1946 spin_unlock_irqrestore(&scq->lock, flags);
1947 interruptible_sleep_on_timeout(&scq->scqfull_waitq, SCQFULL_TIMEOUT);
1948 ns_grab_scq_lock(card, scq, flags);
1949 }
1950
1951 if (!scq->full)
1952 {
1953 tsr.word_1 = ns_tsr_mkword_1(NS_TSR_INTENABLE);
1954 if (scq_is_vbr)
1955 scdi = NS_TSR_SCDISVBR;
1956 else
1957 scdi = (vc->cbr_scd - NS_FRSCD) / NS_FRSCD_SIZE;
1958 scqi = scq->next - scq->base;
1959 tsr.word_2 = ns_tsr_mkword_2(scdi, scqi);
1960 tsr.word_3 = 0x00000000;
1961 tsr.word_4 = 0x00000000;
1962
1963 *scq->next = tsr;
1964 index = (int) scqi;
1965 scq->skb[index] = NULL;
1966 XPRINTK("nicstar%d: TSR written:\n0x%x\n0x%x\n0x%x\n0x%x\n at 0x%x.\n",
1967 card->index, le32_to_cpu(tsr.word_1), le32_to_cpu(tsr.word_2),
1968 le32_to_cpu(tsr.word_3), le32_to_cpu(tsr.word_4),
1969 (u32) scq->next);
1970 if (scq->next == scq->last)
1971 scq->next = scq->base;
1972 else
1973 scq->next++;
1974 vc->tbd_count = 0;
1975 scq->tbd_count = 0;
1976 }
1977 else
1978 PRINTK("nicstar%d: Timeout pushing TSR.\n", card->index);
1979 }
1980 data = (u32) virt_to_bus(scq->next);
1981 ns_write_sram(card, scq->scd, &data, 1);
1982
1983 spin_unlock_irqrestore(&scq->lock, flags);
1984
1985 return 0;
1986 }
1987
1988
1989
1990 static void process_tsq(ns_dev *card)
1991 {
1992 u32 scdi;
1993 scq_info *scq;
1994 ns_tsi *previous = NULL, *one_ahead, *two_ahead;
1995 int serviced_entries; /* flag indicating at least on entry was serviced */
1996
1997 serviced_entries = 0;
1998
1999 if (card->tsq.next == card->tsq.last)
2000 one_ahead = card->tsq.base;
2001 else
2002 one_ahead = card->tsq.next + 1;
2003
2004 if (one_ahead == card->tsq.last)
2005 two_ahead = card->tsq.base;
2006 else
2007 two_ahead = one_ahead + 1;
2008
2009 while (!ns_tsi_isempty(card->tsq.next) || !ns_tsi_isempty(one_ahead) ||
2010 !ns_tsi_isempty(two_ahead))
2011 /* At most two empty, as stated in the 77201 errata */
2012 {
2013 serviced_entries = 1;
2014
2015 /* Skip the one or two possible empty entries */
2016 while (ns_tsi_isempty(card->tsq.next)) {
2017 if (card->tsq.next == card->tsq.last)
2018 card->tsq.next = card->tsq.base;
2019 else
2020 card->tsq.next++;
2021 }
2022
2023 if (!ns_tsi_tmrof(card->tsq.next))
2024 {
2025 scdi = ns_tsi_getscdindex(card->tsq.next);
2026 if (scdi == NS_TSI_SCDISVBR)
2027 scq = card->scq0;
2028 else
2029 {
2030 if (card->scd2vc[scdi] == NULL)
2031 {
2032 printk("nicstar%d: could not find VC from SCD index.\n",
2033 card->index);
2034 ns_tsi_init(card->tsq.next);
2035 return;
2036 }
2037 scq = card->scd2vc[scdi]->scq;
2038 }
2039 drain_scq(card, scq, ns_tsi_getscqpos(card->tsq.next));
2040 scq->full = 0;
2041 wake_up_interruptible(&(scq->scqfull_waitq));
2042 }
2043
2044 ns_tsi_init(card->tsq.next);
2045 previous = card->tsq.next;
2046 if (card->tsq.next == card->tsq.last)
2047 card->tsq.next = card->tsq.base;
2048 else
2049 card->tsq.next++;
2050
2051 if (card->tsq.next == card->tsq.last)
2052 one_ahead = card->tsq.base;
2053 else
2054 one_ahead = card->tsq.next + 1;
2055
2056 if (one_ahead == card->tsq.last)
2057 two_ahead = card->tsq.base;
2058 else
2059 two_ahead = one_ahead + 1;
2060 }
2061
2062 if (serviced_entries) {
2063 writel((((u32) previous) - ((u32) card->tsq.base)),
2064 card->membase + TSQH);
2065 }
2066 }
2067
2068
2069
2070 static void drain_scq(ns_dev *card, scq_info *scq, int pos)
2071 {
2072 struct atm_vcc *vcc;
2073 struct sk_buff *skb;
2074 int i;
2075 unsigned long flags;
2076
2077 XPRINTK("nicstar%d: drain_scq() called, scq at 0x%x, pos %d.\n",
2078 card->index, (u32) scq, pos);
2079 if (pos >= scq->num_entries)
2080 {
2081 printk("nicstar%d: Bad index on drain_scq().\n", card->index);
2082 return;
2083 }
2084
2085 ns_grab_scq_lock(card, scq, flags);
2086 i = (int) (scq->tail - scq->base);
2087 if (++i == scq->num_entries)
2088 i = 0;
2089 while (i != pos)
2090 {
2091 skb = scq->skb[i];
2092 XPRINTK("nicstar%d: freeing skb at 0x%x (index %d).\n",
2093 card->index, (u32) skb, i);
2094 if (skb != NULL)
2095 {
2096 vcc = ATM_SKB(skb)->vcc;
2097 if (vcc && vcc->pop != NULL) {
2098 vcc->pop(vcc, skb);
2099 } else {
2100 dev_kfree_skb_irq(skb);
2101 }
2102 scq->skb[i] = NULL;
2103 }
2104 if (++i == scq->num_entries)
2105 i = 0;
2106 }
2107 scq->tail = scq->base + pos;
2108 spin_unlock_irqrestore(&scq->lock, flags);
2109 }
2110
2111
2112
2113 static void process_rsq(ns_dev *card)
2114 {
2115 ns_rsqe *previous;
2116
2117 if (!ns_rsqe_valid(card->rsq.next))
2118 return;
2119 while (ns_rsqe_valid(card->rsq.next))
2120 {
2121 dequeue_rx(card, card->rsq.next);
2122 ns_rsqe_init(card->rsq.next);
2123 previous = card->rsq.next;
2124 if (card->rsq.next == card->rsq.last)
2125 card->rsq.next = card->rsq.base;
2126 else
2127 card->rsq.next++;
2128 }
2129 writel((((u32) previous) - ((u32) card->rsq.base)),
2130 card->membase + RSQH);
2131 }
2132
2133
2134
2135 static void dequeue_rx(ns_dev *card, ns_rsqe *rsqe)
2136 {
2137 u32 vpi, vci;
2138 vc_map *vc;
2139 struct sk_buff *iovb;
2140 struct iovec *iov;
2141 struct atm_vcc *vcc;
2142 struct sk_buff *skb;
2143 unsigned short aal5_len;
2144 int len;
2145 u32 stat;
2146
2147 stat = readl(card->membase + STAT);
2148 card->sbfqc = ns_stat_sfbqc_get(stat);
2149 card->lbfqc = ns_stat_lfbqc_get(stat);
2150
2151 skb = (struct sk_buff *) le32_to_cpu(rsqe->buffer_handle);
2152 vpi = ns_rsqe_vpi(rsqe);
2153 vci = ns_rsqe_vci(rsqe);
2154 if (vpi >= 1UL << card->vpibits || vci >= 1UL << card->vcibits)
2155 {
2156 printk("nicstar%d: SDU received for out-of-range vc %d.%d.\n",
2157 card->index, vpi, vci);
2158 recycle_rx_buf(card, skb);
2159 return;
2160 }
2161
2162 vc = &(card->vcmap[vpi << card->vcibits | vci]);
2163 if (!vc->rx)
2164 {
2165 RXPRINTK("nicstar%d: SDU received on non-rx vc %d.%d.\n",
2166 card->index, vpi, vci);
2167 recycle_rx_buf(card, skb);
2168 return;
2169 }
2170
2171 vcc = vc->rx_vcc;
2172
2173 if (vcc->qos.aal == ATM_AAL0)
2174 {
2175 struct sk_buff *sb;
2176 unsigned char *cell;
2177 int i;
2178
2179 cell = skb->data;
2180 for (i = ns_rsqe_cellcount(rsqe); i; i--)
2181 {
2182 if ((sb = dev_alloc_skb(NS_SMSKBSIZE)) == NULL)
2183 {
2184 printk("nicstar%d: Can't allocate buffers for aal0.\n",
2185 card->index);
2186 atomic_add(i,&vcc->stats->rx_drop);
2187 break;
2188 }
2189 if (!atm_charge(vcc, sb->truesize))
2190 {
2191 RXPRINTK("nicstar%d: atm_charge() dropped aal0 packets.\n",
2192 card->index);
2193 atomic_add(i-1,&vcc->stats->rx_drop); /* already increased by 1 */
2194 dev_kfree_skb_any(sb);
2195 break;
2196 }
2197 /* Rebuild the header */
2198 *((u32 *) sb->data) = le32_to_cpu(rsqe->word_1) << 4 |
2199 (ns_rsqe_clp(rsqe) ? 0x00000001 : 0x00000000);
2200 if (i == 1 && ns_rsqe_eopdu(rsqe))
2201 *((u32 *) sb->data) |= 0x00000002;
2202 skb_put(sb, NS_AAL0_HEADER);
2203 memcpy(sb->tail, cell, ATM_CELL_PAYLOAD);
2204 skb_put(sb, ATM_CELL_PAYLOAD);
2205 ATM_SKB(sb)->vcc = vcc;
2206 do_gettimeofday(&sb->stamp);
2207 vcc->push(vcc, sb);
2208 atomic_inc(&vcc->stats->rx);
2209 cell += ATM_CELL_PAYLOAD;
2210 }
2211
2212 recycle_rx_buf(card, skb);
2213 return;
2214 }
2215
2216 /* To reach this point, the AAL layer can only be AAL5 */
2217
2218 if ((iovb = vc->rx_iov) == NULL)
2219 {
2220 iovb = skb_dequeue(&(card->iovpool.queue));
2221 if (iovb == NULL) /* No buffers in the queue */
2222 {
2223 iovb = alloc_skb(NS_IOVBUFSIZE, GFP_ATOMIC);
2224 if (iovb == NULL)
2225 {
2226 printk("nicstar%d: Out of iovec buffers.\n", card->index);
2227 atomic_inc(&vcc->stats->rx_drop);
2228 recycle_rx_buf(card, skb);
2229 return;
2230 }
2231 }
2232 else
2233 if (--card->iovpool.count < card->iovnr.min)
2234 {
2235 struct sk_buff *new_iovb;
2236 if ((new_iovb = alloc_skb(NS_IOVBUFSIZE, GFP_ATOMIC)) != NULL)
2237 {
2238 skb_queue_tail(&card->iovpool.queue, new_iovb);
2239 card->iovpool.count++;
2240 }
2241 }
2242 vc->rx_iov = iovb;
2243 NS_SKB(iovb)->iovcnt = 0;
2244 iovb->len = 0;
2245 iovb->tail = iovb->data = iovb->head;
2246 NS_SKB(iovb)->vcc = vcc;
2247 /* IMPORTANT: a pointer to the sk_buff containing the small or large
2248 buffer is stored as iovec base, NOT a pointer to the
2249 small or large buffer itself. */
2250 }
2251 else if (NS_SKB(iovb)->iovcnt >= NS_MAX_IOVECS)
2252 {
2253 printk("nicstar%d: received too big AAL5 SDU.\n", card->index);
2254 atomic_inc(&vcc->stats->rx_err);
2255 recycle_iovec_rx_bufs(card, (struct iovec *) iovb->data, NS_MAX_IOVECS);
2256 NS_SKB(iovb)->iovcnt = 0;
2257 iovb->len = 0;
2258 iovb->tail = iovb->data = iovb->head;
2259 NS_SKB(iovb)->vcc = vcc;
2260 }
2261 iov = &((struct iovec *) iovb->data)[NS_SKB(iovb)->iovcnt++];
2262 iov->iov_base = (void *) skb;
2263 iov->iov_len = ns_rsqe_cellcount(rsqe) * 48;
2264 iovb->len += iov->iov_len;
2265
2266 if (NS_SKB(iovb)->iovcnt == 1)
2267 {
2268 if (skb->list != &card->sbpool.queue)
2269 {
2270 printk("nicstar%d: Expected a small buffer, and this is not one.\n",
2271 card->index);
2272 which_list(card, skb);
2273 atomic_inc(&vcc->stats->rx_err);
2274 recycle_rx_buf(card, skb);
2275 vc->rx_iov = NULL;
2276 recycle_iov_buf(card, iovb);
2277 return;
2278 }
2279 }
2280 else /* NS_SKB(iovb)->iovcnt >= 2 */
2281 {
2282 if (skb->list != &card->lbpool.queue)
2283 {
2284 printk("nicstar%d: Expected a large buffer, and this is not one.\n",
2285 card->index);
2286 which_list(card, skb);
2287 atomic_inc(&vcc->stats->rx_err);
2288 recycle_iovec_rx_bufs(card, (struct iovec *) iovb->data,
2289 NS_SKB(iovb)->iovcnt);
2290 vc->rx_iov = NULL;
2291 recycle_iov_buf(card, iovb);
2292 return;
2293 }
2294 }
2295
2296 if (ns_rsqe_eopdu(rsqe))
2297 {
2298 /* This works correctly regardless of the endianness of the host */
2299 unsigned char *L1L2 = (unsigned char *)((u32)skb->data +
2300 iov->iov_len - 6);
2301 aal5_len = L1L2[0] << 8 | L1L2[1];
2302 len = (aal5_len == 0x0000) ? 0x10000 : aal5_len;
2303 if (ns_rsqe_crcerr(rsqe) ||
2304 len + 8 > iovb->len || len + (47 + 8) < iovb->len)
2305 {
2306 printk("nicstar%d: AAL5 CRC error", card->index);
2307 if (len + 8 > iovb->len || len + (47 + 8) < iovb->len)
2308 printk(" - PDU size mismatch.\n");
2309 else
2310 printk(".\n");
2311 atomic_inc(&vcc->stats->rx_err);
2312 recycle_iovec_rx_bufs(card, (struct iovec *) iovb->data,
2313 NS_SKB(iovb)->iovcnt);
2314 vc->rx_iov = NULL;
2315 recycle_iov_buf(card, iovb);
2316 return;
2317 }
2318
2319 /* By this point we (hopefully) have a complete SDU without errors. */
2320
2321 if (NS_SKB(iovb)->iovcnt == 1) /* Just a small buffer */
2322 {
2323 /* skb points to a small buffer */
2324 if (!atm_charge(vcc, skb->truesize))
2325 {
2326 push_rxbufs(card, BUF_SM, (u32) skb, (u32) virt_to_bus(skb->data),
2327 0, 0);
2328 atomic_inc(&vcc->stats->rx_drop);
2329 }
2330 else
2331 {
2332 skb_put(skb, len);
2333 dequeue_sm_buf(card, skb);
2334 #ifdef NS_USE_DESTRUCTORS
2335 skb->destructor = ns_sb_destructor;
2336 #endif /* NS_USE_DESTRUCTORS */
2337 ATM_SKB(skb)->vcc = vcc;
2338 do_gettimeofday(&skb->stamp);
2339 vcc->push(vcc, skb);
2340 atomic_inc(&vcc->stats->rx);
2341 }
2342 }
2343 else if (NS_SKB(iovb)->iovcnt == 2) /* One small plus one large buffer */
2344 {
2345 struct sk_buff *sb;
2346
2347 sb = (struct sk_buff *) (iov - 1)->iov_base;
2348 /* skb points to a large buffer */
2349
2350 if (len <= NS_SMBUFSIZE)
2351 {
2352 if (!atm_charge(vcc, sb->truesize))
2353 {
2354 push_rxbufs(card, BUF_SM, (u32) sb, (u32) virt_to_bus(sb->data),
2355 0, 0);
2356 atomic_inc(&vcc->stats->rx_drop);
2357 }
2358 else
2359 {
2360 skb_put(sb, len);
2361 dequeue_sm_buf(card, sb);
2362 #ifdef NS_USE_DESTRUCTORS
2363 sb->destructor = ns_sb_destructor;
2364 #endif /* NS_USE_DESTRUCTORS */
2365 ATM_SKB(sb)->vcc = vcc;
2366 do_gettimeofday(&sb->stamp);
2367 vcc->push(vcc, sb);
2368 atomic_inc(&vcc->stats->rx);
2369 }
2370
2371 push_rxbufs(card, BUF_LG, (u32) skb,
2372 (u32) virt_to_bus(skb->data), 0, 0);
2373
2374 }
2375 else /* len > NS_SMBUFSIZE, the usual case */
2376 {
2377 if (!atm_charge(vcc, skb->truesize))
2378 {
2379 push_rxbufs(card, BUF_LG, (u32) skb,
2380 (u32) virt_to_bus(skb->data), 0, 0);
2381 atomic_inc(&vcc->stats->rx_drop);
2382 }
2383 else
2384 {
2385 dequeue_lg_buf(card, skb);
2386 #ifdef NS_USE_DESTRUCTORS
2387 skb->destructor = ns_lb_destructor;
2388 #endif /* NS_USE_DESTRUCTORS */
2389 skb_push(skb, NS_SMBUFSIZE);
2390 memcpy(skb->data, sb->data, NS_SMBUFSIZE);
2391 skb_put(skb, len - NS_SMBUFSIZE);
2392 ATM_SKB(skb)->vcc = vcc;
2393 do_gettimeofday(&skb->stamp);
2394 vcc->push(vcc, skb);
2395 atomic_inc(&vcc->stats->rx);
2396 }
2397
2398 push_rxbufs(card, BUF_SM, (u32) sb, (u32) virt_to_bus(sb->data),
2399 0, 0);
2400
2401 }
2402
2403 }
2404 else /* Must push a huge buffer */
2405 {
2406 struct sk_buff *hb, *sb, *lb;
2407 int remaining, tocopy;
2408 int j;
2409
2410 hb = skb_dequeue(&(card->hbpool.queue));
2411 if (hb == NULL) /* No buffers in the queue */
2412 {
2413
2414 hb = dev_alloc_skb(NS_HBUFSIZE);
2415 if (hb == NULL)
2416 {
2417 printk("nicstar%d: Out of huge buffers.\n", card->index);
2418 atomic_inc(&vcc->stats->rx_drop);
2419 recycle_iovec_rx_bufs(card, (struct iovec *) iovb->data,
2420 NS_SKB(iovb)->iovcnt);
2421 vc->rx_iov = NULL;
2422 recycle_iov_buf(card, iovb);
2423 return;
2424 }
2425 else if (card->hbpool.count < card->hbnr.min)
2426 {
2427 struct sk_buff *new_hb;
2428 if ((new_hb = dev_alloc_skb(NS_HBUFSIZE)) != NULL)
2429 {
2430 skb_queue_tail(&card->hbpool.queue, new_hb);
2431 card->hbpool.count++;
2432 }
2433 }
2434 }
2435 else
2436 if (--card->hbpool.count < card->hbnr.min)
2437 {
2438 struct sk_buff *new_hb;
2439 if ((new_hb = dev_alloc_skb(NS_HBUFSIZE)) != NULL)
2440 {
2441 skb_queue_tail(&card->hbpool.queue, new_hb);
2442 card->hbpool.count++;
2443 }
2444 if (card->hbpool.count < card->hbnr.min)
2445 {
2446 if ((new_hb = dev_alloc_skb(NS_HBUFSIZE)) != NULL)
2447 {
2448 skb_queue_tail(&card->hbpool.queue, new_hb);
2449 card->hbpool.count++;
2450 }
2451 }
2452 }
2453
2454 iov = (struct iovec *) iovb->data;
2455
2456 if (!atm_charge(vcc, hb->truesize))
2457 {
2458 recycle_iovec_rx_bufs(card, iov, NS_SKB(iovb)->iovcnt);
2459 if (card->hbpool.count < card->hbnr.max)
2460 {
2461 skb_queue_tail(&card->hbpool.queue, hb);
2462 card->hbpool.count++;
2463 }
2464 else
2465 dev_kfree_skb_any(hb);
2466 atomic_inc(&vcc->stats->rx_drop);
2467 }
2468 else
2469 {
2470 /* Copy the small buffer to the huge buffer */
2471 sb = (struct sk_buff *) iov->iov_base;
2472 memcpy(hb->data, sb->data, iov->iov_len);
2473 skb_put(hb, iov->iov_len);
2474 remaining = len - iov->iov_len;
2475 iov++;
2476 /* Free the small buffer */
2477 push_rxbufs(card, BUF_SM, (u32) sb, (u32) virt_to_bus(sb->data),
2478 0, 0);
2479
2480 /* Copy all large buffers to the huge buffer and free them */
2481 for (j = 1; j < NS_SKB(iovb)->iovcnt; j++)
2482 {
2483 lb = (struct sk_buff *) iov->iov_base;
2484 tocopy = min_t(int, remaining, iov->iov_len);
2485 memcpy(hb->tail, lb->data, tocopy);
2486 skb_put(hb, tocopy);
2487 iov++;
2488 remaining -= tocopy;
2489 push_rxbufs(card, BUF_LG, (u32) lb,
2490 (u32) virt_to_bus(lb->data), 0, 0);
2491 }
2492 #ifdef EXTRA_DEBUG
2493 if (remaining != 0 || hb->len != len)
2494 printk("nicstar%d: Huge buffer len mismatch.\n", card->index);
2495 #endif /* EXTRA_DEBUG */
2496 ATM_SKB(hb)->vcc = vcc;
2497 #ifdef NS_USE_DESTRUCTORS
2498 hb->destructor = ns_hb_destructor;
2499 #endif /* NS_USE_DESTRUCTORS */
2500 do_gettimeofday(&hb->stamp);
2501 vcc->push(vcc, hb);
2502 atomic_inc(&vcc->stats->rx);
2503 }
2504 }
2505
2506 vc->rx_iov = NULL;
2507 recycle_iov_buf(card, iovb);
2508 }
2509
2510 }
2511
2512
2513
2514 #ifdef NS_USE_DESTRUCTORS
2515
2516 static void ns_sb_destructor(struct sk_buff *sb)
2517 {
2518 ns_dev *card;
2519 u32 stat;
2520
2521 card = (ns_dev *) ATM_SKB(sb)->vcc->dev->dev_data;
2522 stat = readl(card->membase + STAT);
2523 card->sbfqc = ns_stat_sfbqc_get(stat);
2524 card->lbfqc = ns_stat_lfbqc_get(stat);
2525
2526 do
2527 {
2528 sb = __dev_alloc_skb(NS_SMSKBSIZE, GFP_KERNEL);
2529 if (sb == NULL)
2530 break;
2531 skb_queue_tail(&card->sbpool.queue, sb);
2532 skb_reserve(sb, NS_AAL0_HEADER);
2533 push_rxbufs(card, BUF_SM, (u32) sb, (u32) virt_to_bus(sb->data), 0, 0);
2534 } while (card->sbfqc < card->sbnr.min);
2535 }
2536
2537
2538
2539 static void ns_lb_destructor(struct sk_buff *lb)
2540 {
2541 ns_dev *card;
2542 u32 stat;
2543
2544 card = (ns_dev *) ATM_SKB(lb)->vcc->dev->dev_data;
2545 stat = readl(card->membase + STAT);
2546 card->sbfqc = ns_stat_sfbqc_get(stat);
2547 card->lbfqc = ns_stat_lfbqc_get(stat);
2548
2549 do
2550 {
2551 lb = __dev_alloc_skb(NS_LGSKBSIZE, GFP_KERNEL);
2552 if (lb == NULL)
2553 break;
2554 skb_queue_tail(&card->lbpool.queue, lb);
2555 skb_reserve(lb, NS_SMBUFSIZE);
2556 push_rxbufs(card, BUF_LG, (u32) lb, (u32) virt_to_bus(lb->data), 0, 0);
2557 } while (card->lbfqc < card->lbnr.min);
2558 }
2559
2560
2561
2562 static void ns_hb_destructor(struct sk_buff *hb)
2563 {
2564 ns_dev *card;
2565
2566 card = (ns_dev *) ATM_SKB(hb)->vcc->dev->dev_data;
2567
2568 while (card->hbpool.count < card->hbnr.init)
2569 {
2570 hb = __dev_alloc_skb(NS_HBUFSIZE, GFP_KERNEL);
2571 if (hb == NULL)
2572 break;
2573 skb_queue_tail(&card->hbpool.queue, hb);
2574 card->hbpool.count++;
2575 }
2576 }
2577
2578 #endif /* NS_USE_DESTRUCTORS */
2579
2580
2581
2582 static void recycle_rx_buf(ns_dev *card, struct sk_buff *skb)
2583 {
2584 if (skb->list == &card->sbpool.queue)
2585 push_rxbufs(card, BUF_SM, (u32) skb, (u32) virt_to_bus(skb->data), 0, 0);
2586 else if (skb->list == &card->lbpool.queue)
2587 push_rxbufs(card, BUF_LG, (u32) skb, (u32) virt_to_bus(skb->data), 0, 0);
2588 else
2589 {
2590 printk("nicstar%d: What kind of rx buffer is this?\n", card->index);
2591 dev_kfree_skb_any(skb);
2592 }
2593 }
2594
2595
2596
2597 static void recycle_iovec_rx_bufs(ns_dev *card, struct iovec *iov, int count)
2598 {
2599 struct sk_buff *skb;
2600
2601 for (; count > 0; count--)
2602 {
2603 skb = (struct sk_buff *) (iov++)->iov_base;
2604 if (skb->list == &card->sbpool.queue)
2605 push_rxbufs(card, BUF_SM, (u32) skb, (u32) virt_to_bus(skb->data),
2606 0, 0);
2607 else if (skb->list == &card->lbpool.queue)
2608 push_rxbufs(card, BUF_LG, (u32) skb, (u32) virt_to_bus(skb->data),
2609 0, 0);
2610 else
2611 {
2612 printk("nicstar%d: What kind of rx buffer is this?\n", card->index);
2613 dev_kfree_skb_any(skb);
2614 }
2615 }
2616 }
2617
2618
2619
2620 static void recycle_iov_buf(ns_dev *card, struct sk_buff *iovb)
2621 {
2622 if (card->iovpool.count < card->iovnr.max)
2623 {
2624 skb_queue_tail(&card->iovpool.queue, iovb);
2625 card->iovpool.count++;
2626 }
2627 else
2628 dev_kfree_skb_any(iovb);
2629 }
2630
2631
2632
2633 static void dequeue_sm_buf(ns_dev *card, struct sk_buff *sb)
2634 {
2635 skb_unlink(sb);
2636 #ifdef NS_USE_DESTRUCTORS
2637 if (card->sbfqc < card->sbnr.min)
2638 #else
2639 if (card->sbfqc < card->sbnr.init)
2640 {
2641 struct sk_buff *new_sb;
2642 if ((new_sb = dev_alloc_skb(NS_SMSKBSIZE)) != NULL)
2643 {
2644 skb_queue_tail(&card->sbpool.queue, new_sb);
2645 skb_reserve(new_sb, NS_AAL0_HEADER);
2646 push_rxbufs(card, BUF_SM, (u32) new_sb,
2647 (u32) virt_to_bus(new_sb->data), 0, 0);
2648 }
2649 }
2650 if (card->sbfqc < card->sbnr.init)
2651 #endif /* NS_USE_DESTRUCTORS */
2652 {
2653 struct sk_buff *new_sb;
2654 if ((new_sb = dev_alloc_skb(NS_SMSKBSIZE)) != NULL)
2655 {
2656 skb_queue_tail(&card->sbpool.queue, new_sb);
2657 skb_reserve(new_sb, NS_AAL0_HEADER);
2658 push_rxbufs(card, BUF_SM, (u32) new_sb,
2659 (u32) virt_to_bus(new_sb->data), 0, 0);
2660 }
2661 }
2662 }
2663
2664
2665
2666 static void dequeue_lg_buf(ns_dev *card, struct sk_buff *lb)
2667 {
2668 skb_unlink(lb);
2669 #ifdef NS_USE_DESTRUCTORS
2670 if (card->lbfqc < card->lbnr.min)
2671 #else
2672 if (card->lbfqc < card->lbnr.init)
2673 {
2674 struct sk_buff *new_lb;
2675 if ((new_lb = dev_alloc_skb(NS_LGSKBSIZE)) != NULL)
2676 {
2677 skb_queue_tail(&card->lbpool.queue, new_lb);
2678 skb_reserve(new_lb, NS_SMBUFSIZE);
2679 push_rxbufs(card, BUF_LG, (u32) new_lb,
2680 (u32) virt_to_bus(new_lb->data), 0, 0);
2681 }
2682 }
2683 if (card->lbfqc < card->lbnr.init)
2684 #endif /* NS_USE_DESTRUCTORS */
2685 {
2686 struct sk_buff *new_lb;
2687 if ((new_lb = dev_alloc_skb(NS_LGSKBSIZE)) != NULL)
2688 {
2689 skb_queue_tail(&card->lbpool.queue, new_lb);
2690 skb_reserve(new_lb, NS_SMBUFSIZE);
2691 push_rxbufs(card, BUF_LG, (u32) new_lb,
2692 (u32) virt_to_bus(new_lb->data), 0, 0);
2693 }
2694 }
2695 }
2696
2697
2698
2699 static int ns_proc_read(struct atm_dev *dev, loff_t *pos, char *page)
2700 {
2701 u32 stat;
2702 ns_dev *card;
2703 int left;
2704
2705 left = (int) *pos;
2706 card = (ns_dev *) dev->dev_data;
2707 stat = readl(card->membase + STAT);
2708 if (!left--)
2709 return sprintf(page, "Pool count min init max \n");
2710 if (!left--)
2711 return sprintf(page, "Small %5d %5d %5d %5d \n",
2712 ns_stat_sfbqc_get(stat), card->sbnr.min, card->sbnr.init,
2713 card->sbnr.max);
2714 if (!left--)
2715 return sprintf(page, "Large %5d %5d %5d %5d \n",
2716 ns_stat_lfbqc_get(stat), card->lbnr.min, card->lbnr.init,
2717 card->lbnr.max);
2718 if (!left--)
2719 return sprintf(page, "Huge %5d %5d %5d %5d \n", card->hbpool.count,
2720 card->hbnr.min, card->hbnr.init, card->hbnr.max);
2721 if (!left--)
2722 return sprintf(page, "Iovec %5d %5d %5d %5d \n", card->iovpool.count,
2723 card->iovnr.min, card->iovnr.init, card->iovnr.max);
2724 if (!left--)
2725 {
2726 int retval;
2727 retval = sprintf(page, "Interrupt counter: %u \n", card->intcnt);
2728 card->intcnt = 0;
2729 return retval;
2730 }
2731 #if 0
2732 /* Dump 25.6 Mbps PHY registers */
2733 /* Now there's a 25.6 Mbps PHY driver this code isn't needed. I left it
2734 here just in case it's needed for debugging. */
2735 if (card->max_pcr == ATM_25_PCR && !left--)
2736 {
2737 u32 phy_regs[4];
2738 u32 i;
2739
2740 for (i = 0; i < 4; i++)
2741 {
2742 while (CMD_BUSY(card));
2743 writel(NS_CMD_READ_UTILITY | 0x00000200 | i, card->membase + CMD);
2744 while (CMD_BUSY(card));
2745 phy_regs[i] = readl(card->membase + DR0) & 0x000000FF;
2746 }
2747
2748 return sprintf(page, "PHY regs: 0x%02X 0x%02X 0x%02X 0x%02X \n",
2749 phy_regs[0], phy_regs[1], phy_regs[2], phy_regs[3]);
2750 }
2751 #endif /* 0 - Dump 25.6 Mbps PHY registers */
2752 #if 0
2753 /* Dump TST */
2754 if (left-- < NS_TST_NUM_ENTRIES)
2755 {
2756 if (card->tste2vc[left + 1] == NULL)
2757 return sprintf(page, "%5d - VBR/UBR \n", left + 1);
2758 else
2759 return sprintf(page, "%5d - %d %d \n", left + 1,
2760 card->tste2vc[left + 1]->tx_vcc->vpi,
2761 card->tste2vc[left + 1]->tx_vcc->vci);
2762 }
2763 #endif /* 0 */
2764 return 0;
2765 }
2766
2767
2768
2769 static int ns_ioctl(struct atm_dev *dev, unsigned int cmd, void __user *arg)
2770 {
2771 ns_dev *card;
2772 pool_levels pl;
2773 int btype;
2774 unsigned long flags;
2775
2776 card = dev->dev_data;
2777 switch (cmd)
2778 {
2779 case NS_GETPSTAT:
2780 if (get_user(pl.buftype, &((pool_levels __user *) arg)->buftype))
2781 return -EFAULT;
2782 switch (pl.buftype)
2783 {
2784 case NS_BUFTYPE_SMALL:
2785 pl.count = ns_stat_sfbqc_get(readl(card->membase + STAT));
2786 pl.level.min = card->sbnr.min;
2787 pl.level.init = card->sbnr.init;
2788 pl.level.max = card->sbnr.max;
2789 break;
2790
2791 case NS_BUFTYPE_LARGE:
2792 pl.count = ns_stat_lfbqc_get(readl(card->membase + STAT));
2793 pl.level.min = card->lbnr.min;
2794 pl.level.init = card->lbnr.init;
2795 pl.level.max = card->lbnr.max;
2796 break;
2797
2798 case NS_BUFTYPE_HUGE:
2799 pl.count = card->hbpool.count;
2800 pl.level.min = card->hbnr.min;
2801 pl.level.init = card->hbnr.init;
2802 pl.level.max = card->hbnr.max;
2803 break;
2804
2805 case NS_BUFTYPE_IOVEC:
2806 pl.count = card->iovpool.count;
2807 pl.level.min = card->iovnr.min;
2808 pl.level.init = card->iovnr.init;
2809 pl.level.max = card->iovnr.max;
2810 break;
2811
2812 default:
2813 return -ENOIOCTLCMD;
2814
2815 }
2816 if (!copy_to_user((pool_levels __user *) arg, &pl, sizeof(pl)))
2817 return (sizeof(pl));
2818 else
2819 return -EFAULT;
2820
2821 case NS_SETBUFLEV:
2822 if (!capable(CAP_NET_ADMIN))
2823 return -EPERM;
2824 if (copy_from_user(&pl, (pool_levels __user *) arg, sizeof(pl)))
2825 return -EFAULT;
2826 if (pl.level.min >= pl.level.init || pl.level.init >= pl.level.max)
2827 return -EINVAL;
2828 if (pl.level.min == 0)
2829 return -EINVAL;
2830 switch (pl.buftype)
2831 {
2832 case NS_BUFTYPE_SMALL:
2833 if (pl.level.max > TOP_SB)
2834 return -EINVAL;
2835 card->sbnr.min = pl.level.min;
2836 card->sbnr.init = pl.level.init;
2837 card->sbnr.max = pl.level.max;
2838 break;
2839
2840 case NS_BUFTYPE_LARGE:
2841 if (pl.level.max > TOP_LB)
2842 return -EINVAL;
2843 card->lbnr.min = pl.level.min;
2844 card->lbnr.init = pl.level.init;
2845 card->lbnr.max = pl.level.max;
2846 break;
2847
2848 case NS_BUFTYPE_HUGE:
2849 if (pl.level.max > TOP_HB)
2850 return -EINVAL;
2851 card->hbnr.min = pl.level.min;
2852 card->hbnr.init = pl.level.init;
2853 card->hbnr.max = pl.level.max;
2854 break;
2855
2856 case NS_BUFTYPE_IOVEC:
2857 if (pl.level.max > TOP_IOVB)
2858 return -EINVAL;
2859 card->iovnr.min = pl.level.min;
2860 card->iovnr.init = pl.level.init;
2861 card->iovnr.max = pl.level.max;
2862 break;
2863
2864 default:
2865 return -EINVAL;
2866
2867 }
2868 return 0;
2869
2870 case NS_ADJBUFLEV:
2871 if (!capable(CAP_NET_ADMIN))
2872 return -EPERM;
2873 btype = (int) arg; /* an int is the same size as a pointer */
2874 switch (btype)
2875 {
2876 case NS_BUFTYPE_SMALL:
2877 while (card->sbfqc < card->sbnr.init)
2878 {
2879 struct sk_buff *sb;
2880
2881 sb = __dev_alloc_skb(NS_SMSKBSIZE, GFP_KERNEL);
2882 if (sb == NULL)
2883 return -ENOMEM;
2884 skb_queue_tail(&card->sbpool.queue, sb);
2885 skb_reserve(sb, NS_AAL0_HEADER);
2886 push_rxbufs(card, BUF_SM, (u32) sb, (u32) virt_to_bus(sb->data), 0, 0);
2887 }
2888 break;
2889
2890 case NS_BUFTYPE_LARGE:
2891 while (card->lbfqc < card->lbnr.init)
2892 {
2893 struct sk_buff *lb;
2894
2895 lb = __dev_alloc_skb(NS_LGSKBSIZE, GFP_KERNEL);
2896 if (lb == NULL)
2897 return -ENOMEM;
2898 skb_queue_tail(&card->lbpool.queue, lb);
2899 skb_reserve(lb, NS_SMBUFSIZE);
2900 push_rxbufs(card, BUF_LG, (u32) lb, (u32) virt_to_bus(lb->data), 0, 0);
2901 }
2902 break;
2903
2904 case NS_BUFTYPE_HUGE:
2905 while (card->hbpool.count > card->hbnr.init)
2906 {
2907 struct sk_buff *hb;
2908
2909 ns_grab_int_lock(card, flags);
2910 hb = skb_dequeue(&card->hbpool.queue);
2911 card->hbpool.count--;
2912 spin_unlock_irqrestore(&card->int_lock, flags);
2913 if (hb == NULL)
2914 printk("nicstar%d: huge buffer count inconsistent.\n",
2915 card->index);
2916 else
2917 dev_kfree_skb_any(hb);
2918
2919 }
2920 while (card->hbpool.count < card->hbnr.init)
2921 {
2922 struct sk_buff *hb;
2923
2924 hb = __dev_alloc_skb(NS_HBUFSIZE, GFP_KERNEL);
2925 if (hb == NULL)
2926 return -ENOMEM;
2927 ns_grab_int_lock(card, flags);
2928 skb_queue_tail(&card->hbpool.queue, hb);
2929 card->hbpool.count++;
2930 spin_unlock_irqrestore(&card->int_lock, flags);
2931 }
2932 break;
2933
2934 case NS_BUFTYPE_IOVEC:
2935 while (card->iovpool.count > card->iovnr.init)
2936 {
2937 struct sk_buff *iovb;
2938
2939 ns_grab_int_lock(card, flags);
2940 iovb = skb_dequeue(&card->iovpool.queue);
2941 card->iovpool.count--;
2942 spin_unlock_irqrestore(&card->int_lock, flags);
2943 if (iovb == NULL)
2944 printk("nicstar%d: iovec buffer count inconsistent.\n",
2945 card->index);
2946 else
2947 dev_kfree_skb_any(iovb);
2948
2949 }
2950 while (card->iovpool.count < card->iovnr.init)
2951 {
2952 struct sk_buff *iovb;
2953
2954 iovb = alloc_skb(NS_IOVBUFSIZE, GFP_KERNEL);
2955 if (iovb == NULL)
2956 return -ENOMEM;
2957 ns_grab_int_lock(card, flags);
2958 skb_queue_tail(&card->iovpool.queue, iovb);
2959 card->iovpool.count++;
2960 spin_unlock_irqrestore(&card->int_lock, flags);
2961 }
2962 break;
2963
2964 default:
2965 return -EINVAL;
2966
2967 }
2968 return 0;
2969
2970 default:
2971 if (dev->phy && dev->phy->ioctl) {
2972 return dev->phy->ioctl(dev, cmd, arg);
2973 }
2974 else {
2975 printk("nicstar%d: %s == NULL \n", card->index,
2976 dev->phy ? "dev->phy->ioctl" : "dev->phy");
2977 return -ENOIOCTLCMD;
2978 }
2979 }
2980 }
2981
2982
2983
2984 static void which_list(ns_dev *card, struct sk_buff *skb)
2985 {
2986 printk("It's a %s buffer.\n", skb->list == &card->sbpool.queue ?
2987 "small" : skb->list == &card->lbpool.queue ? "large" :
2988 skb->list == &card->hbpool.queue ? "huge" :
2989 skb->list == &card->iovpool.queue ? "iovec" : "unknown");
2990 }
2991
2992
2993
2994 static void ns_poll(unsigned long arg)
2995 {
2996 int i;
2997 ns_dev *card;
2998 unsigned long flags;
2999 u32 stat_r, stat_w;
3000
3001 PRINTK("nicstar: Entering ns_poll().\n");
3002 for (i = 0; i < num_cards; i++)
3003 {
3004 card = cards[i];
3005 if (spin_is_locked(&card->int_lock)) {
3006 /* Probably it isn't worth spinning */
3007 continue;
3008 }
3009 ns_grab_int_lock(card, flags);
3010
3011 stat_w = 0;
3012 stat_r = readl(card->membase + STAT);
3013 if (stat_r & NS_STAT_TSIF)
3014 stat_w |= NS_STAT_TSIF;
3015 if (stat_r & NS_STAT_EOPDU)
3016 stat_w |= NS_STAT_EOPDU;
3017
3018 process_tsq(card);
3019 process_rsq(card);
3020
3021 writel(stat_w, card->membase + STAT);
3022 spin_unlock_irqrestore(&card->int_lock, flags);
3023 }
3024 mod_timer(&ns_timer, jiffies + NS_POLL_PERIOD);
3025 PRINTK("nicstar: Leaving ns_poll().\n");
3026 }
3027
3028
3029
3030 static int ns_parse_mac(char *mac, unsigned char *esi)
3031 {
3032 int i, j;
3033 short byte1, byte0;
3034
3035 if (mac == NULL || esi == NULL)
3036 return -1;
3037 j = 0;
3038 for (i = 0; i < 6; i++)
3039 {
3040 if ((byte1 = ns_h2i(mac[j++])) < 0)
3041 return -1;
3042 if ((byte0 = ns_h2i(mac[j++])) < 0)
3043 return -1;
3044 esi[i] = (unsigned char) (byte1 * 16 + byte0);
3045 if (i < 5)
3046 {
3047 if (mac[j++] != ':')
3048 return -1;
3049 }
3050 }
3051 return 0;
3052 }
3053
3054
3055
3056 static short ns_h2i(char c)
3057 {
3058 if (c >= '0' && c <= '9')
3059 return (short) (c - '0');
3060 if (c >= 'A' && c <= 'F')
3061 return (short) (c - 'A' + 10);
3062 if (c >= 'a' && c <= 'f')
3063 return (short) (c - 'a' + 10);
3064 return -1;
3065 }
3066
3067
3068
3069 static void ns_phy_put(struct atm_dev *dev, unsigned char value,
3070 unsigned long addr)
3071 {
3072 ns_dev *card;
3073 unsigned long flags;
3074
3075 card = dev->dev_data;
3076 ns_grab_res_lock(card, flags);
3077 while(CMD_BUSY(card));
3078 writel((unsigned long) value, card->membase + DR0);
3079 writel(NS_CMD_WRITE_UTILITY | 0x00000200 | (addr & 0x000000FF),
3080 card->membase + CMD);
3081 spin_unlock_irqrestore(&card->res_lock, flags);
3082 }
3083
3084
3085
3086 static unsigned char ns_phy_get(struct atm_dev *dev, unsigned long addr)
3087 {
3088 ns_dev *card;
3089 unsigned long flags;
3090 unsigned long data;
3091
3092 card = dev->dev_data;
3093 ns_grab_res_lock(card, flags);
3094 while(CMD_BUSY(card));
3095 writel(NS_CMD_READ_UTILITY | 0x00000200 | (addr & 0x000000FF),
3096 card->membase + CMD);
3097 while(CMD_BUSY(card));
3098 data = readl(card->membase + DR0) & 0x000000FF;
3099 spin_unlock_irqrestore(&card->res_lock, flags);
3100 return (unsigned char) data;
3101 }
3102
3103
3104
3105 module_init(nicstar_init);
3106 module_exit(nicstar_cleanup);
MOXA 2.6.9 from sdlinux-moxaart.tgz