1 /* sun4d_smp.c: Sparc SS1000/SC2000 SMP support.
3 * Copyright (C) 1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
5 * Based on sun4m's smp.c, which is:
6 * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
11 #include <linux/kernel.h>
12 #include <linux/sched.h>
13 #include <linux/threads.h>
14 #include <linux/smp.h>
15 #include <linux/smp_lock.h>
16 #include <linux/interrupt.h>
17 #include <linux/kernel_stat.h>
18 #include <linux/init.h>
19 #include <linux/spinlock.h>
21 #include <linux/swap.h>
22 #include <linux/profile.h>
24 #include <asm/ptrace.h>
25 #include <asm/atomic.h>
27 #include <asm/delay.h>
30 #include <asm/pgalloc.h>
31 #include <asm/pgtable.h>
32 #include <asm/oplib.h>
35 #include <asm/tlbflush.h>
36 #include <asm/cacheflush.h>
37 #include <asm/cpudata.h>
39 #define IRQ_CROSS_CALL 15
41 extern ctxd_t
*srmmu_ctx_table_phys
;
43 extern void calibrate_delay(void);
45 extern volatile int smp_processors_ready
;
46 extern int smp_num_cpus
;
47 static int smp_highest_cpu
;
48 extern int smp_threads_ready
;
49 extern volatile unsigned long cpu_callin_map
[NR_CPUS
];
50 extern struct cpuinfo_sparc cpu_data
[NR_CPUS
];
51 extern unsigned char boot_cpu_id
;
52 extern int smp_activated
;
53 extern volatile int __cpu_number_map
[NR_CPUS
];
54 extern volatile int __cpu_logical_map
[NR_CPUS
];
55 extern volatile unsigned long ipi_count
;
56 extern volatile int smp_process_available
;
57 extern volatile int smp_commenced
;
58 extern int __smp4d_processor_id(void);
60 /* #define SMP_DEBUG */
63 #define SMP_PRINTK(x) printk x
68 static inline unsigned long swap(volatile unsigned long *ptr
, unsigned long val
)
70 __asm__
__volatile__("swap [%1], %0\n\t" :
71 "=&r" (val
), "=&r" (ptr
) :
72 "0" (val
), "1" (ptr
));
76 static void smp_setup_percpu_timer(void);
77 extern void cpu_probe(void);
78 extern void sun4d_distribute_irqs(void);
80 void __init
smp4d_callin(void)
82 int cpuid
= hard_smp4d_processor_id();
83 extern spinlock_t sun4d_imsk_lock
;
86 /* Show we are alive */
87 cpu_leds
[cpuid
] = 0x6;
90 /* Enable level15 interrupt, disable level14 interrupt for now */
91 cc_set_imsk((cc_get_imsk() & ~0x8000) | 0x4000);
93 local_flush_cache_all();
94 local_flush_tlb_all();
97 * Unblock the master CPU _only_ when the scheduler state
98 * of all secondary CPUs will be up-to-date, so after
99 * the SMP initialization the master will be just allowed
100 * to call the scheduler code.
102 /* Get our local ticker going. */
103 smp_setup_percpu_timer();
106 smp_store_cpu_info(cpuid
);
107 local_flush_cache_all();
108 local_flush_tlb_all();
110 /* Allow master to continue. */
111 swap((unsigned long *)&cpu_callin_map
[cpuid
], 1);
112 local_flush_cache_all();
113 local_flush_tlb_all();
117 while((unsigned long)current_set
[cpuid
] < PAGE_OFFSET
)
120 while(current_set
[cpuid
]->cpu
!= cpuid
)
123 /* Fix idle thread fields. */
124 __asm__
__volatile__("ld [%0], %%g6\n\t"
125 "sta %%g6, [%%g0] %1\n\t"
126 : : "r" (¤t_set
[cpuid
]), "i" (ASI_M_VIKING_TMP2
)
127 : "memory" /* paranoid */);
129 cpu_leds
[cpuid
] = 0x9;
132 /* Attach to the address space of init_task. */
133 atomic_inc(&init_mm
.mm_count
);
134 current
->active_mm
= &init_mm
;
136 local_flush_cache_all();
137 local_flush_tlb_all();
139 local_irq_enable(); /* We don't allow PIL 14 yet */
141 while(!smp_commenced
)
144 spin_lock_irqsave(&sun4d_imsk_lock
, flags
);
145 cc_set_imsk(cc_get_imsk() & ~0x4000); /* Allow PIL 14 as well */
146 spin_unlock_irqrestore(&sun4d_imsk_lock
, flags
);
149 extern int cpu_idle(void *unused
);
150 extern void init_IRQ(void);
151 extern void cpu_panic(void);
154 * Cycle through the processors asking the PROM to start each one.
157 extern struct linux_prom_registers smp_penguin_ctable
;
158 extern unsigned long trapbase_cpu1
[];
159 extern unsigned long trapbase_cpu2
[];
160 extern unsigned long trapbase_cpu3
[];
162 void __init
smp4d_boot_cpus(void)
167 printk("Entering SMP Mode...\n");
170 current_set
[0] = NULL
;
173 cpus_clear(cpu_present_map
);
175 /* XXX This whole thing has to go. See sparc64. */
176 for (i
= 0; !cpu_find_by_instance(i
, NULL
, &mid
); i
++)
177 cpu_set(mid
, cpu_present_map
);
178 SMP_PRINTK(("cpu_present_map %08lx\n", cpus_addr(cpu_present_map
)[0]));
179 for(i
=0; i
< NR_CPUS
; i
++)
180 __cpu_number_map
[i
] = -1;
181 for(i
=0; i
< NR_CPUS
; i
++)
182 __cpu_logical_map
[i
] = -1;
183 __cpu_number_map
[boot_cpu_id
] = 0;
184 __cpu_logical_map
[0] = boot_cpu_id
;
185 current_thread_info()->cpu
= boot_cpu_id
;
186 smp_store_cpu_info(boot_cpu_id
);
187 smp_setup_percpu_timer();
188 local_flush_cache_all();
189 if (cpu_find_by_instance(1, NULL
, NULL
))
190 return; /* Not an MP box. */
191 SMP_PRINTK(("Iterating over CPUs\n"));
192 for(i
= 0; i
< NR_CPUS
; i
++) {
196 if (cpu_isset(i
, cpu_present_map
)) {
197 extern unsigned long sun4d_cpu_startup
;
198 unsigned long *entry
= &sun4d_cpu_startup
;
199 struct task_struct
*p
;
203 /* Cook up an idler for this guy. */
206 current_set
[i
] = p
->thread_info
;
207 for (no
= 0; !cpu_find_by_instance(no
, NULL
, &mid
)
211 * Initialize the contexts table
212 * Since the call to prom_startcpu() trashes the structure,
213 * we need to re-initialize it for each cpu
215 smp_penguin_ctable
.which_io
= 0;
216 smp_penguin_ctable
.phys_addr
= (unsigned int) srmmu_ctx_table_phys
;
217 smp_penguin_ctable
.reg_size
= 0;
219 /* whirrr, whirrr, whirrrrrrrrr... */
220 SMP_PRINTK(("Starting CPU %d at %p task %d node %08x\n", i
, entry
, cpucount
, cpu_data(no
).prom_node
));
221 local_flush_cache_all();
222 prom_startcpu(cpu_data(no
).prom_node
,
223 &smp_penguin_ctable
, 0, (char *)entry
);
225 SMP_PRINTK(("prom_startcpu returned :)\n"));
227 /* wheee... it's going... */
228 for(timeout
= 0; timeout
< 10000; timeout
++) {
229 if(cpu_callin_map
[i
])
234 if(cpu_callin_map
[i
]) {
235 /* Another "Red Snapper". */
236 __cpu_number_map
[i
] = cpucount
;
237 __cpu_logical_map
[cpucount
] = i
;
240 printk("Processor %d is stuck.\n", i
);
243 if(!(cpu_callin_map
[i
])) {
244 cpu_clear(i
, cpu_present_map
);
245 __cpu_number_map
[i
] = -1;
248 local_flush_cache_all();
250 printk("Error: only one Processor found.\n");
251 cpu_present_map
= cpumask_of_cpu(hard_smp4d_processor_id());
253 unsigned long bogosum
= 0;
255 for(i
= 0; i
< NR_CPUS
; i
++) {
256 if (cpu_isset(i
, cpu_present_map
)) {
257 bogosum
+= cpu_data(i
).udelay_val
;
261 SMP_PRINTK(("Total of %d Processors activated (%lu.%02lu BogoMIPS).\n", cpucount
+ 1, bogosum
/(500000/HZ
), (bogosum
/(5000/HZ
))%100));
262 printk("Total of %d Processors activated (%lu.%02lu BogoMIPS).\n",
265 (bogosum
/(5000/HZ
))%100);
267 smp_num_cpus
= cpucount
+ 1;
270 /* Free unneeded trap tables */
271 ClearPageReserved(virt_to_page(trapbase_cpu1
));
272 set_page_count(virt_to_page(trapbase_cpu1
), 1);
273 free_page((unsigned long)trapbase_cpu1
);
277 ClearPageReserved(virt_to_page(trapbase_cpu2
));
278 set_page_count(virt_to_page(trapbase_cpu2
), 1);
279 free_page((unsigned long)trapbase_cpu2
);
283 ClearPageReserved(virt_to_page(trapbase_cpu3
));
284 set_page_count(virt_to_page(trapbase_cpu3
), 1);
285 free_page((unsigned long)trapbase_cpu3
);
289 /* Ok, they are spinning and ready to go. */
290 smp_processors_ready
= 1;
291 sun4d_distribute_irqs();
294 static struct smp_funcall
{
301 unsigned char processors_in
[NR_CPUS
]; /* Set when ipi entered. */
302 unsigned char processors_out
[NR_CPUS
]; /* Set when ipi exited. */
303 } ccall_info
__attribute__((aligned(8)));
305 static spinlock_t cross_call_lock
= SPIN_LOCK_UNLOCKED
;
307 /* Cross calls must be serialized, at least currently. */
308 void smp4d_cross_call(smpfunc_t func
, unsigned long arg1
, unsigned long arg2
,
309 unsigned long arg3
, unsigned long arg4
, unsigned long arg5
)
311 if(smp_processors_ready
) {
312 register int high
= smp_highest_cpu
;
315 spin_lock_irqsave(&cross_call_lock
, flags
);
318 /* If you make changes here, make sure gcc generates proper code... */
319 register smpfunc_t f
asm("i0") = func
;
320 register unsigned long a1
asm("i1") = arg1
;
321 register unsigned long a2
asm("i2") = arg2
;
322 register unsigned long a3
asm("i3") = arg3
;
323 register unsigned long a4
asm("i4") = arg4
;
324 register unsigned long a5
asm("i5") = arg5
;
326 __asm__
__volatile__(
328 "std %2, [%6 + 8]\n\t"
329 "std %4, [%6 + 16]\n\t" : :
330 "r"(f
), "r"(a1
), "r"(a2
), "r"(a3
), "r"(a4
), "r"(a5
),
331 "r" (&ccall_info
.func
));
334 /* Init receive/complete mapping, plus fire the IPI's off. */
339 mask
= cpumask_of_cpu(hard_smp4d_processor_id());
340 cpus_andnot(mask
, cpu_present_map
, mask
);
341 for(i
= 0; i
<= high
; i
++) {
342 if (cpu_isset(i
, mask
)) {
343 ccall_info
.processors_in
[i
] = 0;
344 ccall_info
.processors_out
[i
] = 0;
345 sun4d_send_ipi(i
, IRQ_CROSS_CALL
);
355 while(!ccall_info
.processors_in
[i
])
357 } while(++i
<= high
);
361 while(!ccall_info
.processors_out
[i
])
363 } while(++i
<= high
);
366 spin_unlock_irqrestore(&cross_call_lock
, flags
);
370 /* Running cross calls. */
371 void smp4d_cross_call_irq(void)
373 int i
= hard_smp4d_processor_id();
375 ccall_info
.processors_in
[i
] = 1;
376 ccall_info
.func(ccall_info
.arg1
, ccall_info
.arg2
, ccall_info
.arg3
,
377 ccall_info
.arg4
, ccall_info
.arg5
);
378 ccall_info
.processors_out
[i
] = 1;
381 static int smp4d_stop_cpu_sender
;
383 static void smp4d_stop_cpu(void)
385 int me
= hard_smp4d_processor_id();
387 if (me
!= smp4d_stop_cpu_sender
)
391 /* Cross calls, in order to work efficiently and atomically do all
392 * the message passing work themselves, only stopcpu and reschedule
393 * messages come through here.
395 void smp4d_message_pass(int target
, int msg
, unsigned long data
, int wait
)
397 int me
= hard_smp4d_processor_id();
399 SMP_PRINTK(("smp4d_message_pass %d %d %08lx %d\n", target
, msg
, data
, wait
));
400 if (msg
== MSG_STOP_CPU
&& target
== MSG_ALL_BUT_SELF
) {
402 static spinlock_t stop_cpu_lock
= SPIN_LOCK_UNLOCKED
;
403 spin_lock_irqsave(&stop_cpu_lock
, flags
);
404 smp4d_stop_cpu_sender
= me
;
405 smp4d_cross_call((smpfunc_t
)smp4d_stop_cpu
, 0, 0, 0, 0, 0);
406 spin_unlock_irqrestore(&stop_cpu_lock
, flags
);
408 printk("Yeeee, trying to send SMP msg(%d) to %d on cpu %d\n", msg
, target
, me
);
409 panic("Bogon SMP message pass.");
412 void smp4d_percpu_timer_interrupt(struct pt_regs
*regs
)
414 int cpu
= hard_smp4d_processor_id();
415 static int cpu_tick
[NR_CPUS
];
416 static char led_mask
[] = { 0xe, 0xd, 0xb, 0x7, 0xb, 0xd };
418 bw_get_prof_limit(cpu
);
419 bw_clear_intr_mask(0, 1); /* INTR_TABLE[0] & 1 is Profile IRQ */
422 if (!(cpu_tick
[cpu
] & 15)) {
423 if (cpu_tick
[cpu
] == 0x60)
425 cpu_leds
[cpu
] = led_mask
[cpu_tick
[cpu
] >> 4];
429 profile_tick(CPU_PROFILING
, regs
);
431 if(!--prof_counter(cpu
)) {
432 int user
= user_mode(regs
);
435 update_process_times(user
);
438 prof_counter(cpu
) = prof_multiplier(cpu
);
442 extern unsigned int lvl14_resolution
;
444 static void __init
smp_setup_percpu_timer(void)
446 int cpu
= hard_smp4d_processor_id();
448 prof_counter(cpu
) = prof_multiplier(cpu
) = 1;
449 load_profile_irq(cpu
, lvl14_resolution
);
452 void __init
smp4d_blackbox_id(unsigned *addr
)
454 int rd
= *addr
& 0x3e000000;
456 addr
[0] = 0xc0800800 | rd
; /* lda [%g0] ASI_M_VIKING_TMP1, reg */
457 addr
[1] = 0x01000000; /* nop */
458 addr
[2] = 0x01000000; /* nop */
461 void __init
smp4d_blackbox_current(unsigned *addr
)
463 /* We have a nice Linux current register :) */
464 int rd
= addr
[1] & 0x3e000000;
466 addr
[0] = 0x10800006; /* b .+24 */
467 addr
[1] = 0xc0800820 | rd
; /* lda [%g0] ASI_M_VIKING_TMP2, reg */
470 void __init
sun4d_init_smp(void)
473 extern unsigned int patchme_store_new_current
[];
474 extern unsigned int t_nmi
[], linux_trap_ipi15_sun4d
[], linux_trap_ipi15_sun4m
[];
476 /* Store current into Linux current register :) */
477 __asm__
__volatile__("sta %%g6, [%%g0] %0" : : "i"(ASI_M_VIKING_TMP2
));
479 /* Patch switch_to */
480 patchme_store_new_current
[0] = (patchme_store_new_current
[0] & 0x3e000000) | 0xc0a00820;
482 /* Patch ipi15 trap table */
483 t_nmi
[1] = t_nmi
[1] + (linux_trap_ipi15_sun4d
- linux_trap_ipi15_sun4m
);
485 /* And set btfixup... */
486 BTFIXUPSET_BLACKBOX(hard_smp_processor_id
, smp4d_blackbox_id
);
487 BTFIXUPSET_BLACKBOX(load_current
, smp4d_blackbox_current
);
488 BTFIXUPSET_CALL(smp_cross_call
, smp4d_cross_call
, BTFIXUPCALL_NORM
);
489 BTFIXUPSET_CALL(smp_message_pass
, smp4d_message_pass
, BTFIXUPCALL_NORM
);
490 BTFIXUPSET_CALL(__hard_smp_processor_id
, __smp4d_processor_id
, BTFIXUPCALL_NORM
);
492 for (i
= 0; i
< NR_CPUS
; i
++) {
493 ccall_info
.processors_in
[i
] = 1;
494 ccall_info
.processors_out
[i
] = 1;