arch/sh/mm/tlb-sh3.c

   1 /*
   2  * arch/sh/mm/tlb-sh3.c
   3  *
   4  * SH-3 specific TLB operations
   5  *
   6  * Copyright (C) 1999  Niibe Yutaka
   7  * Copyright (C) 2002  Paul Mundt
   8  *
   9  * Released under the terms of the GNU GPL v2.0.
  10  */
  11 #include <linux/signal.h>
  12 #include <linux/sched.h>
  13 #include <linux/kernel.h>
  14 #include <linux/errno.h>
  15 #include <linux/string.h>
  16 #include <linux/types.h>
  17 #include <linux/ptrace.h>
  18 #include <linux/mman.h>
  19 #include <linux/mm.h>
  20 #include <linux/smp.h>
  21 #include <linux/smp_lock.h>
  22 #include <linux/interrupt.h>
  23
  24 #include <asm/system.h>
  25 #include <asm/io.h>
  26 #include <asm/uaccess.h>
  27 #include <asm/pgalloc.h>
  28 #include <asm/mmu_context.h>
  29 #include <asm/cacheflush.h>
  30
  31 void update_mmu_cache(struct vm_area_struct * vma,
  32                       unsigned long address, pte_t pte)
  33 {
  34         unsigned long flags;
  35         unsigned long pteval;
  36         unsigned long vpn;
  37
  38         /* Ptrace may call this routine. */
  39         if (vma && current->active_mm != vma->vm_mm)
  40                 return;
  41
  42         local_irq_save(flags);
  43
  44         /* Set PTEH register */
  45         vpn = (address & MMU_VPN_MASK) | get_asid();
  46         ctrl_outl(vpn, MMU_PTEH);
  47
  48         pteval = pte_val(pte);
  49
  50         /* Set PTEL register */
  51         pteval &= _PAGE_FLAGS_HARDWARE_MASK; /* drop software flags */
  52         /* conveniently, we want all the software flags to be 0 anyway */
  53         ctrl_outl(pteval, MMU_PTEL);
  54
  55         /* Load the TLB */
  56         asm volatile("ldtlb": /* no output */ : /* no input */ : "memory");
  57         local_irq_restore(flags);
  58 }
  59
  60 void __flush_tlb_page(unsigned long asid, unsigned long page)
  61 {
  62         unsigned long addr, data;
  63         int i, ways = MMU_NTLB_WAYS;
  64
  65         /*
  66          * NOTE: PTEH.ASID should be set to this MM
  67          *       _AND_ we need to write ASID to the array.
  68          *
  69          * It would be simple if we didn't need to set PTEH.ASID...
  70          */
  71         addr = MMU_TLB_ADDRESS_ARRAY | (page & 0x1F000);
  72         data = (page & 0xfffe0000) | asid; /* VALID bit is off */
  73
  74         if ((cpu_data->flags & CPU_HAS_MMU_PAGE_ASSOC)) {
  75                 addr |= MMU_PAGE_ASSOC_BIT;
  76                 ways = 1;       /* we already know the way .. */
  77         }
  78
  79         for (i = 0; i < ways; i++)
  80                 ctrl_outl(data, addr + (i << 8));
  81 }
  82