arch/mips/tx4927/common/tx4927_irq.c

   1 /*
   2  * Common tx4927 irq handler
   3  *
   4  * Author: MontaVista Software, Inc.
   5  *         source@mvista.com
   6  *
   7  *  under the terms of the GNU General Public License as published by the
   8  *  Free Software Foundation; either version 2 of the License, or (at your
   9  *  option) any later version.
  10  *
  11  *  THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  12  *  WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  13  *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  14  *  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  15  *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  16  *  BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
  17  *  OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  18  *  ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
  19  *  TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
  20  *  USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  21  *
  22  *  You should have received a copy of the GNU General Public License along
  23  *  with this program; if not, write to the Free Software Foundation, Inc.,
  24  *  675 Mass Ave, Cambridge, MA 02139, USA.
  25  */
  26 #include <linux/config.h>
  27 #include <linux/errno.h>
  28 #include <linux/init.h>
  29 #include <linux/kernel_stat.h>
  30 #include <linux/module.h>
  31 #include <linux/signal.h>
  32 #include <linux/sched.h>
  33 #include <linux/types.h>
  34 #include <linux/interrupt.h>
  35 #include <linux/ioport.h>
  36 #include <linux/timex.h>
  37 #include <linux/slab.h>
  38 #include <linux/random.h>
  39 #include <linux/irq.h>
  40 #include <asm/bitops.h>
  41 #include <asm/bootinfo.h>
  42 #include <asm/io.h>
  43 #include <asm/irq.h>
  44 #include <asm/mipsregs.h>
  45 #include <asm/system.h>
  46 #include <asm/tx4927/tx4927.h>
  47
  48 /*
  49  * DEBUG
  50  */
  51 #define TX4927_IRQ_CHECK_CP0
  52 #define TX4927_IRQ_CHECK_PIC
  53
  54 #undef TX4927_IRQ_DEBUG
  55
  56 #ifdef TX4927_IRQ_DEBUG
  57 #define TX4927_IRQ_NONE        0x00000000
  58
  59 #define TX4927_IRQ_INFO        ( 1 <<  0 )
  60 #define TX4927_IRQ_WARN        ( 1 <<  1 )
  61 #define TX4927_IRQ_EROR        ( 1 <<  2 )
  62
  63 #define TX4927_IRQ_INIT        ( 1 <<  5 )
  64 #define TX4927_IRQ_NEST1       ( 1 <<  6 )
  65 #define TX4927_IRQ_NEST2       ( 1 <<  7 )
  66 #define TX4927_IRQ_NEST3       ( 1 <<  8 )
  67 #define TX4927_IRQ_NEST4       ( 1 <<  9 )
  68
  69 #define TX4927_IRQ_CP0_INIT     ( 1 << 10 )
  70 #define TX4927_IRQ_CP0_STARTUP  ( 1 << 11 )
  71 #define TX4927_IRQ_CP0_SHUTDOWN ( 1 << 12 )
  72 #define TX4927_IRQ_CP0_ENABLE   ( 1 << 13 )
  73 #define TX4927_IRQ_CP0_DISABLE  ( 1 << 14 )
  74 #define TX4927_IRQ_CP0_MASK     ( 1 << 15 )
  75 #define TX4927_IRQ_CP0_ENDIRQ   ( 1 << 16 )
  76
  77 #define TX4927_IRQ_PIC_INIT     ( 1 << 20 )
  78 #define TX4927_IRQ_PIC_STARTUP  ( 1 << 21 )
  79 #define TX4927_IRQ_PIC_SHUTDOWN ( 1 << 22 )
  80 #define TX4927_IRQ_PIC_ENABLE   ( 1 << 23 )
  81 #define TX4927_IRQ_PIC_DISABLE  ( 1 << 24 )
  82 #define TX4927_IRQ_PIC_MASK     ( 1 << 25 )
  83 #define TX4927_IRQ_PIC_ENDIRQ   ( 1 << 26 )
  84
  85 #define TX4927_IRQ_ALL         0xffffffff
  86 #endif
  87
  88 #ifdef TX4927_IRQ_DEBUG
  89 static const u32 tx4927_irq_debug_flag = (TX4927_IRQ_NONE
  90                                           | TX4927_IRQ_INFO
  91                                           | TX4927_IRQ_WARN | TX4927_IRQ_EROR
  92 //                                       | TX4927_IRQ_CP0_INIT
  93 //                                       | TX4927_IRQ_CP0_STARTUP
  94 //                                       | TX4927_IRQ_CP0_SHUTDOWN
  95 //                                       | TX4927_IRQ_CP0_ENABLE
  96 //                                       | TX4927_IRQ_CP0_DISABLE
  97 //                                       | TX4927_IRQ_CP0_MASK
  98 //                                       | TX4927_IRQ_CP0_ENDIRQ
  99 //                                       | TX4927_IRQ_PIC_INIT
 100 //                                       | TX4927_IRQ_PIC_STARTUP
 101 //                                       | TX4927_IRQ_PIC_SHUTDOWN
 102 //                                       | TX4927_IRQ_PIC_ENABLE
 103 //                                       | TX4927_IRQ_PIC_DISABLE
 104 //                                       | TX4927_IRQ_PIC_MASK
 105 //                                       | TX4927_IRQ_PIC_ENDIRQ
 106 //                                       | TX4927_IRQ_INIT
 107 //                                       | TX4927_IRQ_NEST1
 108 //                                       | TX4927_IRQ_NEST2
 109 //                                       | TX4927_IRQ_NEST3
 110 //                                       | TX4927_IRQ_NEST4
 111     );
 112 #endif
 113
 114 #ifdef TX4927_IRQ_DEBUG
 115 #define TX4927_IRQ_DPRINTK(flag,str...) \
 116         if ( (tx4927_irq_debug_flag) & (flag) ) \
 117         { \
 118            char tmp[100]; \
 119            sprintf( tmp, str ); \
 120            printk( "%s(%s:%u)::%s", __FUNCTION__, __FILE__, __LINE__, tmp ); \
 121         }
 122 #else
 123 #define TX4927_IRQ_DPRINTK(flag,str...)
 124 #endif
 125
 126 /*
 127  * Forwad definitions for all pic's
 128  */
 129
 130 static unsigned int tx4927_irq_cp0_startup(unsigned int irq);
 131 static void tx4927_irq_cp0_shutdown(unsigned int irq);
 132 static void tx4927_irq_cp0_enable(unsigned int irq);
 133 static void tx4927_irq_cp0_disable(unsigned int irq);
 134 static void tx4927_irq_cp0_mask_and_ack(unsigned int irq);
 135 static void tx4927_irq_cp0_end(unsigned int irq);
 136
 137 static unsigned int tx4927_irq_pic_startup(unsigned int irq);
 138 static void tx4927_irq_pic_shutdown(unsigned int irq);
 139 static void tx4927_irq_pic_enable(unsigned int irq);
 140 static void tx4927_irq_pic_disable(unsigned int irq);
 141 static void tx4927_irq_pic_mask_and_ack(unsigned int irq);
 142 static void tx4927_irq_pic_end(unsigned int irq);
 143
 144 /*
 145  * Kernel structs for all pic's
 146  */
 147
 148 static spinlock_t tx4927_cp0_lock = SPIN_LOCK_UNLOCKED;
 149 static spinlock_t tx4927_pic_lock = SPIN_LOCK_UNLOCKED;
 150
 151 #define TX4927_CP0_NAME "TX4927-CP0"
 152 static struct hw_interrupt_type tx4927_irq_cp0_type = {
 153         .typename       = TX4927_CP0_NAME,
 154         .startup        = tx4927_irq_cp0_startup,
 155         .shutdown       = tx4927_irq_cp0_shutdown,
 156         .enable         = tx4927_irq_cp0_enable,
 157         .disable        = tx4927_irq_cp0_disable,
 158         .ack            = tx4927_irq_cp0_mask_and_ack,
 159         .end            = tx4927_irq_cp0_end,
 160         .set_affinity   = NULL
 161 };
 162
 163 #define TX4927_PIC_NAME "TX4927-PIC"
 164 static struct hw_interrupt_type tx4927_irq_pic_type = {
 165         .typename       = TX4927_PIC_NAME,
 166         .startup        = tx4927_irq_pic_startup,
 167         .shutdown       = tx4927_irq_pic_shutdown,
 168         .enable         = tx4927_irq_pic_enable,
 169         .disable        = tx4927_irq_pic_disable,
 170         .ack            = tx4927_irq_pic_mask_and_ack,
 171         .end            = tx4927_irq_pic_end,
 172         .set_affinity   = NULL
 173 };
 174
 175 #define TX4927_PIC_ACTION(s) { no_action, 0, CPU_MASK_NONE, s, NULL, NULL }
 176 static struct irqaction tx4927_irq_pic_action =
 177 TX4927_PIC_ACTION(TX4927_PIC_NAME);
 178
 179 #define CCP0_STATUS 12
 180 #define CCP0_CAUSE 13
 181
 182 /*
 183  * Functions for cp0
 184  */
 185
 186 #define tx4927_irq_cp0_mask(irq) ( 1 << ( irq-TX4927_IRQ_CP0_BEG+8 ) )
 187
 188 static void
 189 tx4927_irq_cp0_modify(unsigned cp0_reg, unsigned clr_bits, unsigned set_bits)
 190 {
 191         unsigned long val = 0;
 192
 193         switch (cp0_reg) {
 194         case CCP0_STATUS:
 195                 val = read_c0_status();
 196                 break;
 197
 198         case CCP0_CAUSE:
 199                 val = read_c0_cause();
 200                 break;
 201
 202         }
 203
 204         val &= (~clr_bits);
 205         val |= (set_bits);
 206
 207         switch (cp0_reg) {
 208         case CCP0_STATUS:{
 209                         write_c0_status(val);
 210                         break;
 211                 }
 212         case CCP0_CAUSE:{
 213                         write_c0_cause(val);
 214                         break;
 215                 }
 216         }
 217
 218         return;
 219 }
 220
 221 static void __init tx4927_irq_cp0_init(void)
 222 {
 223         int i;
 224
 225         TX4927_IRQ_DPRINTK(TX4927_IRQ_CP0_INIT, "beg=%d end=%d\n",
 226                            TX4927_IRQ_CP0_BEG, TX4927_IRQ_CP0_END);
 227
 228         for (i = TX4927_IRQ_CP0_BEG; i <= TX4927_IRQ_CP0_END; i++) {
 229                 irq_desc[i].status = IRQ_DISABLED;
 230                 irq_desc[i].action = 0;
 231                 irq_desc[i].depth = 1;
 232                 irq_desc[i].handler = &tx4927_irq_cp0_type;
 233         }
 234
 235         return;
 236 }
 237
 238 static unsigned int tx4927_irq_cp0_startup(unsigned int irq)
 239 {
 240         TX4927_IRQ_DPRINTK(TX4927_IRQ_CP0_STARTUP, "irq=%d \n", irq);
 241
 242 #ifdef TX4927_IRQ_CHECK_CP0
 243         {
 244                 if (irq < TX4927_IRQ_CP0_BEG || irq > TX4927_IRQ_CP0_END) {
 245                         TX4927_IRQ_DPRINTK(TX4927_IRQ_EROR,
 246                                            "bad irq=%d \n", irq);
 247                         panic("\n");
 248                 }
 249         }
 250 #endif
 251
 252         tx4927_irq_cp0_enable(irq);
 253
 254         return (0);
 255 }
 256
 257 static void tx4927_irq_cp0_shutdown(unsigned int irq)
 258 {
 259         TX4927_IRQ_DPRINTK(TX4927_IRQ_CP0_SHUTDOWN, "irq=%d \n", irq);
 260
 261 #ifdef TX4927_IRQ_CHECK_CP0
 262         {
 263                 if (irq < TX4927_IRQ_CP0_BEG || irq > TX4927_IRQ_CP0_END) {
 264                         TX4927_IRQ_DPRINTK(TX4927_IRQ_EROR,
 265                                            "bad irq=%d \n", irq);
 266                         panic("\n");
 267                 }
 268         }
 269 #endif
 270
 271         tx4927_irq_cp0_disable(irq);
 272
 273         return;
 274 }
 275
 276 static void tx4927_irq_cp0_enable(unsigned int irq)
 277 {
 278         unsigned long flags;
 279
 280         TX4927_IRQ_DPRINTK(TX4927_IRQ_CP0_ENABLE, "irq=%d \n", irq);
 281
 282 #ifdef TX4927_IRQ_CHECK_CP0
 283         {
 284                 if (irq < TX4927_IRQ_CP0_BEG || irq > TX4927_IRQ_CP0_END) {
 285                         TX4927_IRQ_DPRINTK(TX4927_IRQ_EROR,
 286                                            "bad irq=%d \n", irq);
 287                         panic("\n");
 288                 }
 289         }
 290 #endif
 291
 292         spin_lock_irqsave(&tx4927_cp0_lock, flags);
 293
 294         tx4927_irq_cp0_modify(CCP0_STATUS, 0, tx4927_irq_cp0_mask(irq));
 295
 296         spin_unlock_irqrestore(&tx4927_cp0_lock, flags);
 297
 298         return;
 299 }
 300
 301 static void tx4927_irq_cp0_disable(unsigned int irq)
 302 {
 303         unsigned long flags;
 304
 305         TX4927_IRQ_DPRINTK(TX4927_IRQ_CP0_DISABLE, "irq=%d \n", irq);
 306
 307 #ifdef TX4927_IRQ_CHECK_CP0
 308         {
 309                 if (irq < TX4927_IRQ_CP0_BEG || irq > TX4927_IRQ_CP0_END) {
 310                         TX4927_IRQ_DPRINTK(TX4927_IRQ_EROR,
 311                                            "bad irq=%d \n", irq);
 312                         panic("\n");
 313                 }
 314         }
 315 #endif
 316
 317         spin_lock_irqsave(&tx4927_cp0_lock, flags);
 318
 319         tx4927_irq_cp0_modify(CCP0_STATUS, tx4927_irq_cp0_mask(irq), 0);
 320
 321         spin_unlock_irqrestore(&tx4927_cp0_lock, flags);
 322
 323         return;
 324 }
 325
 326 static void tx4927_irq_cp0_mask_and_ack(unsigned int irq)
 327 {
 328         TX4927_IRQ_DPRINTK(TX4927_IRQ_CP0_MASK, "irq=%d \n", irq);
 329
 330 #ifdef TX4927_IRQ_CHECK_CP0
 331         {
 332                 if (irq < TX4927_IRQ_CP0_BEG || irq > TX4927_IRQ_CP0_END) {
 333                         TX4927_IRQ_DPRINTK(TX4927_IRQ_EROR,
 334                                            "bad irq=%d \n", irq);
 335                         panic("\n");
 336                 }
 337         }
 338 #endif
 339
 340         tx4927_irq_cp0_disable(irq);
 341
 342         return;
 343 }
 344
 345 static void tx4927_irq_cp0_end(unsigned int irq)
 346 {
 347         TX4927_IRQ_DPRINTK(TX4927_IRQ_CP0_ENDIRQ, "irq=%d \n", irq);
 348
 349 #ifdef TX4927_IRQ_CHECK_CP0
 350         {
 351                 if (irq < TX4927_IRQ_CP0_BEG || irq > TX4927_IRQ_CP0_END) {
 352                         TX4927_IRQ_DPRINTK(TX4927_IRQ_EROR,
 353                                            "bad irq=%d \n", irq);
 354                         panic("\n");
 355                 }
 356         }
 357 #endif
 358
 359         if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) {
 360                 tx4927_irq_cp0_enable(irq);
 361         }
 362
 363         return;
 364 }
 365
 366 /*
 367  * Functions for pic
 368  */
 369 u32 tx4927_irq_pic_addr(int irq)
 370 {
 371         /* MVMCP -- need to formulize this */
 372         irq -= TX4927_IRQ_PIC_BEG;
 373         switch (irq) {
 374         case 17:
 375         case 16:
 376         case 1:
 377         case 0:
 378                 return (0xff1ff610);
 379
 380         case 19:
 381         case 18:
 382         case 3:
 383         case 2:
 384                 return (0xff1ff614);
 385
 386         case 21:
 387         case 20:
 388         case 5:
 389         case 4:
 390                 return (0xff1ff618);
 391
 392         case 23:
 393         case 22:
 394         case 7:
 395         case 6:
 396                 return (0xff1ff61c);
 397
 398         case 25:
 399         case 24:
 400         case 9:
 401         case 8:
 402                 return (0xff1ff620);
 403
 404         case 27:
 405         case 26:
 406         case 11:
 407         case 10:
 408                 return (0xff1ff624);
 409
 410         case 29:
 411         case 28:
 412         case 13:
 413         case 12:
 414                 return (0xff1ff628);
 415
 416         case 31:
 417         case 30:
 418         case 15:
 419         case 14:
 420                 return (0xff1ff62c);
 421
 422         }
 423         return (0);
 424 }
 425
 426 u32 tx4927_irq_pic_mask(int irq)
 427 {
 428         /* MVMCP -- need to formulize this */
 429         irq -= TX4927_IRQ_PIC_BEG;
 430         switch (irq) {
 431         case 31:
 432         case 29:
 433         case 27:
 434         case 25:
 435         case 23:
 436         case 21:
 437         case 19:
 438         case 17:{
 439                         return (0x07000000);
 440                 }
 441         case 30:
 442         case 28:
 443         case 26:
 444         case 24:
 445         case 22:
 446         case 20:
 447         case 18:
 448         case 16:{
 449                         return (0x00070000);
 450                 }
 451         case 15:
 452         case 13:
 453         case 11:
 454         case 9:
 455         case 7:
 456         case 5:
 457         case 3:
 458         case 1:{
 459                         return (0x00000700);
 460                 }
 461         case 14:
 462         case 12:
 463         case 10:
 464         case 8:
 465         case 6:
 466         case 4:
 467         case 2:
 468         case 0:{
 469                         return (0x00000007);
 470                 }
 471         }
 472         return (0x00000000);
 473 }
 474
 475 static void tx4927_irq_pic_modify(unsigned pic_reg, unsigned clr_bits,
 476         unsigned set_bits)
 477 {
 478         unsigned long val = 0;
 479
 480         val = TX4927_RD(pic_reg);
 481         val &= (~clr_bits);
 482         val |= (set_bits);
 483         TX4927_WR(pic_reg, val);
 484
 485         return;
 486 }
 487
 488 static void __init tx4927_irq_pic_init(void)
 489 {
 490         unsigned long flags;
 491         int i;
 492
 493         TX4927_IRQ_DPRINTK(TX4927_IRQ_PIC_INIT, "beg=%d end=%d\n",
 494                            TX4927_IRQ_PIC_BEG, TX4927_IRQ_PIC_END);
 495
 496         for (i = TX4927_IRQ_PIC_BEG; i <= TX4927_IRQ_PIC_END; i++) {
 497                 irq_desc[i].status = IRQ_DISABLED;
 498                 irq_desc[i].action = 0;
 499                 irq_desc[i].depth = 2;
 500                 irq_desc[i].handler = &tx4927_irq_pic_type;
 501         }
 502
 503         setup_irq(TX4927_IRQ_NEST_PIC_ON_CP0, &tx4927_irq_pic_action);
 504
 505         spin_lock_irqsave(&tx4927_pic_lock, flags);
 506
 507         TX4927_WR(0xff1ff640, 0x6);     /* irq level mask -- only accept hightest */
 508         TX4927_WR(0xff1ff600, TX4927_RD(0xff1ff600) | 0x1);     /* irq enable */
 509
 510         spin_unlock_irqrestore(&tx4927_pic_lock, flags);
 511
 512         return;
 513 }
 514
 515 static unsigned int tx4927_irq_pic_startup(unsigned int irq)
 516 {
 517         TX4927_IRQ_DPRINTK(TX4927_IRQ_PIC_STARTUP, "irq=%d\n", irq);
 518
 519 #ifdef TX4927_IRQ_CHECK_PIC
 520         {
 521                 if (irq < TX4927_IRQ_PIC_BEG || irq > TX4927_IRQ_PIC_END) {
 522                         TX4927_IRQ_DPRINTK(TX4927_IRQ_EROR,
 523                                            "bad irq=%d \n", irq);
 524                         panic("\n");
 525                 }
 526         }
 527 #endif
 528
 529         tx4927_irq_pic_enable(irq);
 530
 531         return (0);
 532 }
 533
 534 static void tx4927_irq_pic_shutdown(unsigned int irq)
 535 {
 536         TX4927_IRQ_DPRINTK(TX4927_IRQ_PIC_SHUTDOWN, "irq=%d\n", irq);
 537
 538 #ifdef TX4927_IRQ_CHECK_PIC
 539         {
 540                 if (irq < TX4927_IRQ_PIC_BEG || irq > TX4927_IRQ_PIC_END) {
 541                         TX4927_IRQ_DPRINTK(TX4927_IRQ_EROR,
 542                                            "bad irq=%d \n", irq);
 543                         panic("\n");
 544                 }
 545         }
 546 #endif
 547
 548         tx4927_irq_pic_disable(irq);
 549
 550         return;
 551 }
 552
 553 static void tx4927_irq_pic_enable(unsigned int irq)
 554 {
 555         unsigned long flags;
 556
 557         TX4927_IRQ_DPRINTK(TX4927_IRQ_PIC_ENABLE, "irq=%d\n", irq);
 558
 559 #ifdef TX4927_IRQ_CHECK_PIC
 560         {
 561                 if (irq < TX4927_IRQ_PIC_BEG || irq > TX4927_IRQ_PIC_END) {
 562                         TX4927_IRQ_DPRINTK(TX4927_IRQ_EROR,
 563                                            "bad irq=%d \n", irq);
 564                         panic("\n");
 565                 }
 566         }
 567 #endif
 568
 569         spin_lock_irqsave(&tx4927_pic_lock, flags);
 570
 571         tx4927_irq_pic_modify(tx4927_irq_pic_addr(irq), 0,
 572                               tx4927_irq_pic_mask(irq));
 573
 574         spin_unlock_irqrestore(&tx4927_pic_lock, flags);
 575
 576         return;
 577 }
 578
 579 static void tx4927_irq_pic_disable(unsigned int irq)
 580 {
 581         unsigned long flags;
 582
 583         TX4927_IRQ_DPRINTK(TX4927_IRQ_PIC_DISABLE, "irq=%d\n", irq);
 584
 585 #ifdef TX4927_IRQ_CHECK_PIC
 586         {
 587                 if (irq < TX4927_IRQ_PIC_BEG || irq > TX4927_IRQ_PIC_END) {
 588                         TX4927_IRQ_DPRINTK(TX4927_IRQ_EROR,
 589                                            "bad irq=%d \n", irq);
 590                         panic("\n");
 591                 }
 592         }
 593 #endif
 594
 595         spin_lock_irqsave(&tx4927_pic_lock, flags);
 596
 597         tx4927_irq_pic_modify(tx4927_irq_pic_addr(irq),
 598                               tx4927_irq_pic_mask(irq), 0);
 599
 600         spin_unlock_irqrestore(&tx4927_pic_lock, flags);
 601
 602         return;
 603 }
 604
 605 static void tx4927_irq_pic_mask_and_ack(unsigned int irq)
 606 {
 607         TX4927_IRQ_DPRINTK(TX4927_IRQ_PIC_MASK, "irq=%d\n", irq);
 608
 609 #ifdef TX4927_IRQ_CHECK_PIC
 610         {
 611                 if (irq < TX4927_IRQ_PIC_BEG || irq > TX4927_IRQ_PIC_END) {
 612                         TX4927_IRQ_DPRINTK(TX4927_IRQ_EROR,
 613                                            "bad irq=%d \n", irq);
 614                         panic("\n");
 615                 }
 616         }
 617 #endif
 618
 619         tx4927_irq_pic_disable(irq);
 620
 621         return;
 622 }
 623
 624 static void tx4927_irq_pic_end(unsigned int irq)
 625 {
 626         TX4927_IRQ_DPRINTK(TX4927_IRQ_PIC_ENDIRQ, "irq=%d\n", irq);
 627
 628 #ifdef TX4927_IRQ_CHECK_PIC
 629         {
 630                 if (irq < TX4927_IRQ_PIC_BEG || irq > TX4927_IRQ_PIC_END) {
 631                         TX4927_IRQ_DPRINTK(TX4927_IRQ_EROR,
 632                                            "bad irq=%d \n", irq);
 633                         panic("\n");
 634                 }
 635         }
 636 #endif
 637
 638         if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) {
 639                 tx4927_irq_pic_enable(irq);
 640         }
 641
 642         return;
 643 }
 644
 645 /*
 646  * Main init functions
 647  */
 648 void __init tx4927_irq_init(void)
 649 {
 650         extern asmlinkage void tx4927_irq_handler(void);
 651
 652         TX4927_IRQ_DPRINTK(TX4927_IRQ_INIT, "-\n");
 653
 654         TX4927_IRQ_DPRINTK(TX4927_IRQ_INIT, "=Calling tx4927_irq_cp0_init()\n");
 655         tx4927_irq_cp0_init();
 656
 657         TX4927_IRQ_DPRINTK(TX4927_IRQ_INIT, "=Calling tx4927_irq_pic_init()\n");
 658         tx4927_irq_pic_init();
 659
 660         TX4927_IRQ_DPRINTK(TX4927_IRQ_INIT,
 661                            "=Calling set_except_vector(tx4927_irq_handler)\n");
 662         set_except_vector(0, tx4927_irq_handler);
 663
 664         TX4927_IRQ_DPRINTK(TX4927_IRQ_INIT, "+\n");
 665
 666         return;
 667 }
 668
 669 int tx4927_irq_nested(void)
 670 {
 671         int sw_irq = 0;
 672         u32 level2;
 673
 674         TX4927_IRQ_DPRINTK(TX4927_IRQ_NEST1, "-\n");
 675
 676         level2 = TX4927_RD(0xff1ff6a0);
 677         TX4927_IRQ_DPRINTK(TX4927_IRQ_NEST2, "=level2a=0x%x\n", level2);
 678
 679         if ((level2 & 0x10000) == 0) {
 680                 level2 &= 0x1f;
 681                 TX4927_IRQ_DPRINTK(TX4927_IRQ_NEST3, "=level2b=0x%x\n", level2);
 682
 683                 sw_irq = TX4927_IRQ_PIC_BEG + level2;
 684                 TX4927_IRQ_DPRINTK(TX4927_IRQ_NEST3, "=sw_irq=%d\n", sw_irq);
 685
 686                 if (sw_irq == 27) {
 687                         TX4927_IRQ_DPRINTK(TX4927_IRQ_NEST4, "=irq-%d\n",
 688                                            sw_irq);
 689
 690 #ifdef CONFIG_TOSHIBA_RBTX4927
 691                         {
 692                                 sw_irq = toshiba_rbtx4927_irq_nested(sw_irq);
 693                         }
 694 #endif
 695
 696                         TX4927_IRQ_DPRINTK(TX4927_IRQ_NEST4, "=irq+%d\n",
 697                                            sw_irq);
 698                 }
 699         }
 700
 701         TX4927_IRQ_DPRINTK(TX4927_IRQ_NEST2, "=sw_irq=%d\n", sw_irq);
 702
 703         TX4927_IRQ_DPRINTK(TX4927_IRQ_NEST1, "+\n");
 704
 705         return (sw_irq);
 706 }