arch/mips/pci/pci-ddb5477.c

   1 /*
   2  * PCI code for DDB5477.
   3  *
   4  * Copyright (C) 2001 MontaVista Software Inc.
   5  * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
   6  *
   7  * This program is free software; you can redistribute  it and/or modify it
   8  * under  the terms of  the GNU General  Public License as published by the
   9  * Free Software Foundation;  either version 2 of the  License, or (at your
  10  * option) any later version.
  11  */
  12 #include <linux/kernel.h>
  13 #include <linux/init.h>
  14 #include <linux/types.h>
  15 #include <linux/pci.h>
  16
  17 #include <asm/bootinfo.h>
  18 #include <asm/pci_channel.h>
  19 #include <asm/debug.h>
  20
  21 #include <asm/ddb5xxx/ddb5xxx.h>
  22
  23 static struct resource extpci_io_resource = {
  24         "ext pci IO space",
  25         DDB_PCI0_IO_BASE - DDB_PCI_IO_BASE + 0x4000,
  26         DDB_PCI0_IO_BASE - DDB_PCI_IO_BASE + DDB_PCI0_IO_SIZE - 1,
  27         IORESOURCE_IO
  28 };
  29
  30 static struct resource extpci_mem_resource = {
  31         "ext pci memory space",
  32         DDB_PCI0_MEM_BASE + 0x100000,
  33         DDB_PCI0_MEM_BASE + DDB_PCI0_MEM_SIZE - 1,
  34         IORESOURCE_MEM
  35 };
  36
  37 static struct resource iopci_io_resource = {
  38         "io pci IO space",
  39         DDB_PCI1_IO_BASE - DDB_PCI_IO_BASE,
  40         DDB_PCI1_IO_BASE - DDB_PCI_IO_BASE + DDB_PCI1_IO_SIZE - 1,
  41         IORESOURCE_IO
  42 };
  43
  44 static struct resource iopci_mem_resource = {
  45         "ext pci memory space",
  46         DDB_PCI1_MEM_BASE,
  47         DDB_PCI1_MEM_BASE + DDB_PCI1_MEM_SIZE - 1,
  48         IORESOURCE_MEM
  49 };
  50
  51 extern struct pci_ops ddb5477_ext_pci_ops;
  52 extern struct pci_ops ddb5477_io_pci_ops;
  53
  54 struct pci_controller ddb5477_ext_controller = {
  55         .pci_ops        = &ddb5477_ext_pci_ops,
  56         .io_resource    = &extpci_io_resource,
  57         .mem_resource   = &extpci_mem_resource
  58 };
  59
  60 struct pci_controller ddb5477_io_controller = {
  61         .pci_ops        = &ddb5477_io_pci_ops,
  62         .io_resource    = &iopci_io_resource,
  63         .mem_resource   = &iopci_mem_resource
  64 };
  65
  66
  67
  68 /*
  69  * we fix up irqs based on the slot number.
  70  * The first entry is at AD:11.
  71  * Fortunately this works because, although we have two pci buses,
  72  * they all have different slot numbers (except for rockhopper slot 20
  73  * which is handled below).
  74  *
  75  */
  76
  77 /*
  78  * irq mapping : device -> pci int # -> vrc4377 irq# ,
  79  * ddb5477 board manual page 4  and vrc5477 manual page 46
  80  */
  81
  82 /*
  83  * based on ddb5477 manual page 11
  84  */
  85 #define         MAX_SLOT_NUM            21
  86 static unsigned char irq_map[MAX_SLOT_NUM] = {
  87         /* SLOT:  0, AD:11 */ 0xff,
  88         /* SLOT:  1, AD:12 */ 0xff,
  89         /* SLOT:  2, AD:13 */ 0xff,
  90         /* SLOT:  3, AD:14 */ 0xff,
  91         /* SLOT:  4, AD:15 */ VRC5477_IRQ_INTA, /* onboard tulip */
  92         /* SLOT:  5, AD:16 */ VRC5477_IRQ_INTB, /* slot 1 */
  93         /* SLOT:  6, AD:17 */ VRC5477_IRQ_INTC, /* slot 2 */
  94         /* SLOT:  7, AD:18 */ VRC5477_IRQ_INTD, /* slot 3 */
  95         /* SLOT:  8, AD:19 */ VRC5477_IRQ_INTE, /* slot 4 */
  96         /* SLOT:  9, AD:20 */ 0xff,
  97         /* SLOT: 10, AD:21 */ 0xff,
  98         /* SLOT: 11, AD:22 */ 0xff,
  99         /* SLOT: 12, AD:23 */ 0xff,
 100         /* SLOT: 13, AD:24 */ 0xff,
 101         /* SLOT: 14, AD:25 */ 0xff,
 102         /* SLOT: 15, AD:26 */ 0xff,
 103         /* SLOT: 16, AD:27 */ 0xff,
 104         /* SLOT: 17, AD:28 */ 0xff,
 105         /* SLOT: 18, AD:29 */ VRC5477_IRQ_IOPCI_INTC, /* vrc5477 ac97 */
 106         /* SLOT: 19, AD:30 */ VRC5477_IRQ_IOPCI_INTB, /* vrc5477 usb peri */
 107         /* SLOT: 20, AD:31 */ VRC5477_IRQ_IOPCI_INTA, /* vrc5477 usb host */
 108 };
 109 static unsigned char rockhopperII_irq_map[MAX_SLOT_NUM] = {
 110         /* SLOT:  0, AD:11 */ 0xff,
 111         /* SLOT:  1, AD:12 */ VRC5477_IRQ_INTB, /* onboard AMD PCNET */
 112         /* SLOT:  2, AD:13 */ 0xff,
 113         /* SLOT:  3, AD:14 */ 0xff,
 114         /* SLOT:  4, AD:15 */ 14, /* M5229 ide ISA irq */
 115         /* SLOT:  5, AD:16 */ VRC5477_IRQ_INTD, /* slot 3 */
 116         /* SLOT:  6, AD:17 */ VRC5477_IRQ_INTA, /* slot 4 */
 117         /* SLOT:  7, AD:18 */ VRC5477_IRQ_INTD, /* slot 5 */
 118         /* SLOT:  8, AD:19 */ 0, /* M5457 modem nop */
 119         /* SLOT:  9, AD:20 */ VRC5477_IRQ_INTA, /* slot 2 */
 120         /* SLOT: 10, AD:21 */ 0xff,
 121         /* SLOT: 11, AD:22 */ 0xff,
 122         /* SLOT: 12, AD:23 */ 0xff,
 123         /* SLOT: 13, AD:24 */ 0xff,
 124         /* SLOT: 14, AD:25 */ 0xff,
 125         /* SLOT: 15, AD:26 */ 0xff,
 126         /* SLOT: 16, AD:27 */ 0xff,
 127         /* SLOT: 17, AD:28 */ 0, /* M7101 PMU nop */
 128         /* SLOT: 18, AD:29 */ VRC5477_IRQ_IOPCI_INTC, /* vrc5477 ac97 */
 129         /* SLOT: 19, AD:30 */ VRC5477_IRQ_IOPCI_INTB, /* vrc5477 usb peri */
 130         /* SLOT: 20, AD:31 */ VRC5477_IRQ_IOPCI_INTA, /* vrc5477 usb host */
 131 };
 132
 133 int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
 134 {
 135         int slot_num;
 136         unsigned char *slot_irq_map;
 137         unsigned char irq;
 138
 139         /*
 140          * We ignore the swizzled slot and pin values.  The original
 141          * pci_fixup_irq() codes largely base irq number on the dev slot
 142          * numbers because except for one case they are unique even
 143          * though there are multiple pci buses.
 144          */
 145
 146         if (mips_machtype == MACH_NEC_ROCKHOPPERII)
 147                 slot_irq_map = rockhopperII_irq_map;
 148         else
 149                 slot_irq_map = irq_map;
 150
 151         slot_num = PCI_SLOT(dev->devfn);
 152         irq = slot_irq_map[slot_num];
 153
 154         db_assert(slot_num < MAX_SLOT_NUM);
 155
 156         db_assert(irq != 0xff);
 157
 158         pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
 159
 160         if (mips_machtype == MACH_NEC_ROCKHOPPERII) {
 161                 /* hack to distinquish overlapping slot 20s, one
 162                  * on bus 0 (ALI USB on the M1535 on the backplane),
 163                  * and one on bus 2 (NEC USB controller on the CPU board)
 164                  * Make the M1535 USB - ISA IRQ number 9.
 165                  */
 166                 if (slot_num == 20 && dev->bus->number == 0) {
 167                         pci_write_config_byte(dev,
 168                                               PCI_INTERRUPT_LINE,
 169                                               9);
 170                         irq = 9;
 171                 }
 172
 173         }
 174
 175         return irq;
 176 }
 177
 178 void ddb_pci_reset_bus(void)
 179 {
 180         u32 temp;
 181
 182         /*
 183          * I am not sure about the "official" procedure, the following
 184          * steps work as far as I know:
 185          * We first set PCI cold reset bit (bit 31) in PCICTRL-H.
 186          * Then we clear the PCI warm reset bit (bit 30) to 0 in PCICTRL-H.
 187          * The same is true for both PCI channels.
 188          */
 189         temp = ddb_in32(DDB_PCICTL0_H);
 190         temp |= 0x80000000;
 191         ddb_out32(DDB_PCICTL0_H, temp);
 192         temp &= ~0xc0000000;
 193         ddb_out32(DDB_PCICTL0_H, temp);
 194
 195         temp = ddb_in32(DDB_PCICTL1_H);
 196         temp |= 0x80000000;
 197         ddb_out32(DDB_PCICTL1_H, temp);
 198         temp &= ~0xc0000000;
 199         ddb_out32(DDB_PCICTL1_H, temp);
 200 }