arch/mips/momentum/ocelot_c/irq.c

   1 /*
   2  * Copyright (C) 2000 RidgeRun, Inc.
   3  * Author: RidgeRun, Inc.
   4  *   glonnon@ridgerun.com, skranz@ridgerun.com, stevej@ridgerun.com
   5  *
   6  * Copyright 2001 MontaVista Software Inc.
   7  * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
   8  * Copyright (C) 2000, 2001 Ralf Baechle (ralf@gnu.org)
   9  *
  10  *  This program is free software; you can redistribute  it and/or modify it
  11  *  under  the terms of  the GNU General  Public License as published by the
  12  *  Free Software Foundation;  either version 2 of the  License, or (at your
  13  *  option) any later version.
  14  *
  15  *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
  16  *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
  17  *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
  18  *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
  19  *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  20  *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
  21  *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  22  *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
  23  *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  24  *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  25  *
  26  *  You should have received a copy of the  GNU General Public License along
  27  *  with this program; if not, write  to the Free Software Foundation, Inc.,
  28  *  675 Mass Ave, Cambridge, MA 02139, USA.
  29  *
  30  */
  31 #include <linux/config.h>
  32 #include <linux/errno.h>
  33 #include <linux/init.h>
  34 #include <linux/kernel_stat.h>
  35 #include <linux/module.h>
  36 #include <linux/signal.h>
  37 #include <linux/sched.h>
  38 #include <linux/types.h>
  39 #include <linux/interrupt.h>
  40 #include <linux/ioport.h>
  41 #include <linux/timex.h>
  42 #include <linux/slab.h>
  43 #include <linux/random.h>
  44 #include <asm/bitops.h>
  45 #include <asm/bootinfo.h>
  46 #include <asm/io.h>
  47 #include <asm/irq_cpu.h>
  48 #include <asm/mipsregs.h>
  49 #include <asm/mv64340.h>
  50 #include <asm/system.h>
  51
  52 extern asmlinkage void ocelot_handle_int(void);
  53 extern void uart_irq_init(void);
  54 extern void cpci_irq_init(void);
  55
  56 static struct irqaction cascade_fpga = {
  57         no_action, SA_INTERRUPT, CPU_MASK_NONE, "cascade via FPGA", NULL, NULL
  58 };
  59
  60 static struct irqaction cascade_mv64340 = {
  61         no_action, SA_INTERRUPT, CPU_MASK_NONE, "cascade via MV64340", NULL, NULL
  62 };
  63
  64 void __init init_IRQ(void)
  65 {
  66         /*
  67          * Clear all of the interrupts while we change the able around a bit.
  68          * int-handler is not on bootstrap
  69          */
  70         clear_c0_status(ST0_IM);
  71
  72         /* Sets the first-level interrupt dispatcher. */
  73         set_except_vector(0, ocelot_handle_int);
  74         init_generic_irq();
  75         mips_cpu_irq_init(0);
  76
  77         /* set up the cascading interrupts */
  78         setup_irq(3, &cascade_fpga);
  79         setup_irq(5, &cascade_fpga);
  80         setup_irq(6, &cascade_mv64340);
  81
  82         mv64340_irq_init(16);
  83         uart_irq_init();
  84         cpci_irq_init();
  85
  86 #ifdef CONFIG_KGDB
  87         printk("start kgdb ...\n");
  88         set_debug_traps();
  89         breakpoint();   /* you may move this line to whereever you want :-) */
  90 #endif
  91 }