2 * Carsten Langgaard, carstenl@mips.com
3 * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
5 * This program is free software; you can distribute it and/or modify it
6 * under the terms of the GNU General Public License (Version 2) as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 * You should have received a copy of the GNU General Public License along
15 * with this program; if not, write to the Free Software Foundation, Inc.,
16 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
18 * PROM library initialisation code.
20 #include <linux/config.h>
21 #include <linux/init.h>
22 #include <linux/string.h>
23 #include <linux/kernel.h>
26 #include <asm/bootinfo.h>
27 #include <asm/mips-boards/prom.h>
28 #include <asm/mips-boards/generic.h>
29 #ifdef CONFIG_MIPS_GT64120
30 #include <asm/gt64120.h>
32 #include <asm/mips-boards/msc01_pci.h>
33 #include <asm/mips-boards/bonito64.h>
34 #ifdef CONFIG_MIPS_MALTA
35 #include <asm/mips-boards/malta.h>
39 extern int rs_kgdb_hook(int, int);
40 extern int rs_putDebugChar(char);
41 extern char rs_getDebugChar(void);
42 extern int saa9730_kgdb_hook(int);
43 extern int saa9730_putDebugChar(char);
44 extern char saa9730_getDebugChar(void);
50 int *_prom_argv
, *_prom_envp
;
53 * YAMON (32-bit PROM) pass arguments and environment as 32-bit pointer.
54 * This macro take care of sign extension, if running in 64-bit mode.
56 #define prom_envp(index) ((char *)(long)_prom_envp[(index)])
60 unsigned int mips_revision_corid
;
62 /* Bonito64 system controller register base. */
63 unsigned long _pcictrl_bonito
;
64 unsigned long _pcictrl_bonito_pcicfg
;
66 /* GT64120 system controller register base */
67 unsigned long _pcictrl_gt64120
;
69 /* MIPS System controller register base */
70 unsigned long _pcictrl_msc
;
72 char *prom_getenv(char *envname
)
75 * Return a pointer to the given environment variable.
76 * In 64-bit mode: we're using 64-bit pointers, but all pointers
77 * in the PROM structures are only 32-bit, so we need some
78 * workarounds, if we are running in 64-bit mode.
84 while (prom_envp(index
)) {
85 if(strncmp(envname
, prom_envp(index
), i
) == 0) {
86 return(prom_envp(index
+1));
94 static inline unsigned char str2hexnum(unsigned char c
)
96 if (c
>= '0' && c
<= '9')
98 if (c
>= 'a' && c
<= 'f')
103 static inline void str2eaddr(unsigned char *ea
, unsigned char *str
)
107 for (i
= 0; i
< 6; i
++) {
110 if((*str
== '.') || (*str
== ':'))
112 num
= str2hexnum(*str
++) << 4;
113 num
|= (str2hexnum(*str
++));
118 int get_ethernet_addr(char *ethernet_addr
)
122 ethaddr_str
= prom_getenv("ethaddr");
124 printk("ethaddr not set in boot prom\n");
127 str2eaddr(ethernet_addr
, ethaddr_str
);
129 if (init_debug
> 1) {
131 printk("get_ethernet_addr: ");
133 printk("%02x:", (unsigned char)*(ethernet_addr
+i
));
134 printk("%02x\n", *(ethernet_addr
+i
));
140 #ifdef CONFIG_SERIAL_8250_CONSOLE
141 static void __init
console_config(void)
143 char console_string
[40];
145 char parity
= '\0', bits
= '\0', flow
= '\0';
148 if ((strstr(prom_getcmdline(), "console=ttyS")) == NULL
) {
149 s
= prom_getenv("modetty0");
151 while (*s
>= '0' && *s
<= '9')
152 baud
= baud
*10 + *s
++ - '0';
154 if (*s
) parity
= *s
++;
158 if (*s
== 'h') flow
= 'r';
162 if (parity
!= 'n' && parity
!= 'o' && parity
!= 'e')
164 if (bits
!= '7' && bits
!= '8')
168 sprintf (console_string
, " console=ttyS0,%d%c%c%c", baud
, parity
, bits
, flow
);
169 strcat (prom_getcmdline(), console_string
);
170 prom_printf("Config serial console:%s\n", console_string
);
176 void __init
kgdb_config (void)
178 extern int (*generic_putDebugChar
)(char);
179 extern char (*generic_getDebugChar
)(void);
183 argptr
= prom_getcmdline();
184 if ((argptr
= strstr(argptr
, "kgdb=ttyS")) != NULL
) {
185 argptr
+= strlen("kgdb=ttyS");
186 if (*argptr
!= '0' && *argptr
!= '1')
187 printk("KGDB: Unknown serial line /dev/ttyS%c, "
188 "falling back to /dev/ttyS1\n", *argptr
);
189 line
= *argptr
== '0' ? 0 : 1;
190 printk("KGDB: Using serial line /dev/ttyS%d for session\n", line
);
193 if (*++argptr
== ',')
196 while ((c
= *++argptr
) && ('0' <= c
&& c
<= '9'))
197 speed
= speed
* 10 + c
- '0';
199 #ifdef CONFIG_MIPS_ATLAS
201 speed
= saa9730_kgdb_hook(speed
);
202 generic_putDebugChar
= saa9730_putDebugChar
;
203 generic_getDebugChar
= saa9730_getDebugChar
;
208 speed
= rs_kgdb_hook(line
, speed
);
209 generic_putDebugChar
= rs_putDebugChar
;
210 generic_getDebugChar
= rs_getDebugChar
;
213 prom_printf("KGDB: Using serial line /dev/ttyS%d at %d for session, "
214 "please connect your debugger\n", line
? 1 : 0, speed
);
218 for (s
= "Please connect GDB to this port\r\n"; *s
; )
219 generic_putDebugChar (*s
++);
223 /* Breakpoint is invoked after interrupts are initialised */
228 void __init
prom_init(void)
231 _prom_argv
= (int *) fw_arg1
;
232 _prom_envp
= (int *) fw_arg2
;
234 mips_display_message("LINUX");
236 #ifdef CONFIG_MIPS_SEAD
237 set_io_port_base(KSEG1
);
240 * early setup of _pcictrl_bonito so that we can determine
241 * the system controller on a CORE_EMUL board
243 _pcictrl_bonito
= (unsigned long)ioremap(BONITO_REG_BASE
, BONITO_REG_SIZE
);
245 mips_revision_corid
= MIPS_REVISION_CORID
;
247 if (mips_revision_corid
== MIPS_REVISION_CORID_CORE_EMUL
) {
248 if (BONITO_PCIDID
== 0x0001df53 ||
249 BONITO_PCIDID
== 0x0003df53)
250 mips_revision_corid
= MIPS_REVISION_CORID_CORE_EMUL_BON
;
252 mips_revision_corid
= MIPS_REVISION_CORID_CORE_EMUL_MSC
;
254 switch(mips_revision_corid
) {
255 case MIPS_REVISION_CORID_QED_RM5261
:
256 case MIPS_REVISION_CORID_CORE_LV
:
257 case MIPS_REVISION_CORID_CORE_FPGA
:
258 case MIPS_REVISION_CORID_CORE_FPGAR2
:
260 * Setup the North bridge to do Master byte-lane swapping
261 * when running in bigendian.
263 _pcictrl_gt64120
= (unsigned long)ioremap(MIPS_GT_BASE
, 0x2000);
265 #ifdef CONFIG_CPU_LITTLE_ENDIAN
266 GT_WRITE(GT_PCI0_CMD_OFS
, GT_PCI0_CMD_MBYTESWAP_BIT
|
267 GT_PCI0_CMD_SBYTESWAP_BIT
);
269 GT_WRITE(GT_PCI0_CMD_OFS
, 0);
272 #ifdef CONFIG_MIPS_MALTA
273 set_io_port_base(MALTA_GT_PORT_BASE
);
275 set_io_port_base((unsigned long)ioremap(0, 0x20000000));
279 case MIPS_REVISION_CORID_CORE_EMUL_BON
:
280 case MIPS_REVISION_CORID_BONITO64
:
281 case MIPS_REVISION_CORID_CORE_20K
:
282 _pcictrl_bonito_pcicfg
= (unsigned long)ioremap(BONITO_PCICFG_BASE
, BONITO_PCICFG_SIZE
);
285 * Disable Bonito IOBC.
287 BONITO_PCIMEMBASECFG
= BONITO_PCIMEMBASECFG
&
288 ~(BONITO_PCIMEMBASECFG_MEMBASE0_CACHED
|
289 BONITO_PCIMEMBASECFG_MEMBASE1_CACHED
);
292 * Setup the North bridge to do Master byte-lane swapping
293 * when running in bigendian.
295 #ifdef CONFIG_CPU_LITTLE_ENDIAN
296 BONITO_BONGENCFG
= BONITO_BONGENCFG
&
297 ~(BONITO_BONGENCFG_MSTRBYTESWAP
|
298 BONITO_BONGENCFG_BYTESWAP
);
300 BONITO_BONGENCFG
= BONITO_BONGENCFG
|
301 BONITO_BONGENCFG_MSTRBYTESWAP
|
302 BONITO_BONGENCFG_BYTESWAP
;
305 #ifdef CONFIG_MIPS_MALTA
306 set_io_port_base(MALTA_BONITO_PORT_BASE
);
308 set_io_port_base((unsigned long)ioremap(0, 0x20000000));
312 case MIPS_REVISION_CORID_CORE_MSC
:
313 case MIPS_REVISION_CORID_CORE_FPGA2
:
314 case MIPS_REVISION_CORID_CORE_EMUL_MSC
:
315 _pcictrl_msc
= (unsigned long)ioremap(MIPS_MSC01_PCI_REG_BASE
, 0x2000);
317 #ifdef CONFIG_CPU_LITTLE_ENDIAN
318 MSC_WRITE(MSC01_PCI_SWAP
, MSC01_PCI_SWAP_NOSWAP
);
320 MSC_WRITE(MSC01_PCI_SWAP
,
321 MSC01_PCI_SWAP_BYTESWAP
<< MSC01_PCI_SWAP_IO_SHF
|
322 MSC01_PCI_SWAP_BYTESWAP
<< MSC01_PCI_SWAP_MEM_SHF
|
323 MSC01_PCI_SWAP_BYTESWAP
<< MSC01_PCI_SWAP_BAR0_SHF
);
326 #ifdef CONFIG_MIPS_MALTA
327 set_io_port_base(MALTA_MSC_PORT_BASE
);
329 set_io_port_base((unsigned long)ioremap(0, 0x20000000));
334 /* Unknown Core card */
335 mips_display_message("CC Error");
336 while(1); /* We die here... */
339 prom_printf("\nLINUX started...\n");
342 #ifdef CONFIG_SERIAL_8250_CONSOLE