arch/mips/hp-lj/gdb_hook.c

   1 /*
   2  * Carsten Langgaard, carstenl@mips.com
   3  * Copyright (C) 2000 MIPS Technologies, Inc.  All rights reserved.
   4  *
   5  * ########################################################################
   6  *
   7  *  This program is free software; you can distribute it and/or modify it
   8  *  under the terms of the GNU General Public License (Version 2) as
   9  *  published by the Free Software Foundation.
  10  *
  11  *  This program is distributed in the hope it will be useful, but WITHOUT
  12  *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13  *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  14  *  for more details.
  15  *
  16  *  You should have received a copy of the GNU General Public License along
  17  *  with this program; if not, write to the Free Software Foundation, Inc.,
  18  *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
  19  *
  20  * ########################################################################
  21  *
  22  * This is the interface to the remote debugger stub.
  23  */
  24 #include <linux/serialP.h>
  25 #include <linux/serial_reg.h>
  26
  27 #include <asm/serial.h>
  28 #include <asm/io.h>
  29 #include <asm/hp-lj/asic.h>
  30
  31
  32 int putDebugChar(char c);
  33 char getDebugChar(void);
  34
  35
  36 ///////////////////////  andros values ///////////////////////////////////////////////////////
  37 #define SERIAL_REG(offset) (*((volatile unsigned int*)(HPSR_BASE_ADDR|offset)))
  38
  39 // Register set base address
  40 #define HPSR_BASE_ADDR   0xbfe00000UL
  41
  42 // Transmit / Receive Data
  43 #define HPSR_DATA_OFFSET    0x00020010UL
  44 // Transmit control / status
  45 #define HPSR_TX_STAT_OFFSET 0x0002000CUL
  46 // Receive status
  47 #define HPSR_RX_STAT_OFFSET 0x00020008UL
  48
  49 #define HPSR_TX_STAT_READY  0x8UL
  50 #define HPSR_RX_DATA_AVAIL  0x4UL
  51
  52
  53 ///////////////////////  harmony values ///////////////////////////////////////////////////////
  54 // Transmit / Receive Data
  55 #define H_HPSR_DATA_TX       *((volatile unsigned int*)0xbff65014)
  56 // Transmit / Receive Data
  57 #define H_HPSR_DATA_RX       *((volatile unsigned int*)0xbff65018)
  58 // Status
  59 #define H_HPSR_STAT          *((volatile unsigned int*)0xbff65004)
  60
  61 // harmony serial status bits
  62 #define H_SER_STAT_TX_EMPTY       0x04
  63 #define H_SER_STAT_RX_EMPTY       0x10
  64
  65
  66
  67
  68 int putDebugChar(char c)
  69 {
  70         if (GetAsicId() == HarmonyAsic) {
  71                 while (!( ( (H_HPSR_STAT) & H_SER_STAT_TX_EMPTY) != 0));
  72
  73                 H_HPSR_DATA_TX = (unsigned int) c;
  74
  75         } else if (GetAsicId() == AndrosAsic) {
  76                 while (((SERIAL_REG(HPSR_TX_STAT_OFFSET) & HPSR_TX_STAT_READY) == 0))
  77                         ;
  78                 SERIAL_REG(HPSR_DATA_OFFSET) = (unsigned int) c;
  79         }
  80         return 1;
  81 }
  82
  83 char getDebugChar(void)
  84 {
  85         if (GetAsicId() == HarmonyAsic) {
  86                 while (!(((H_HPSR_STAT) & H_SER_STAT_RX_EMPTY) == 0));
  87
  88                 return H_HPSR_DATA_RX;
  89
  90         } else if (GetAsicId() == AndrosAsic) {
  91                 while ((SERIAL_REG(HPSR_RX_STAT_OFFSET) & HPSR_RX_DATA_AVAIL) == 0)
  92                         ;
  93
  94                 return (SERIAL_REG(HPSR_DATA_OFFSET));
  95
  96         }
  97 }
  98
  99