2 * setup.c: Baget/MIPS specific setup, including init of the feature struct.
4 * Copyright (C) 1998 Gleb Raiko & Vladimir Roganov
6 #include <linux/init.h>
7 #include <linux/kernel.h>
8 #include <linux/sched.h>
10 #include <asm/addrspace.h>
11 #include <asm/reboot.h>
13 #include <asm/baget/baget.h>
15 long int vac_memory_upper
;
17 #define CACHEABLE_STR(val) ((val) ? "not cached" : "cached")
19 static void __init
vac_show(void)
22 unsigned short val
, decode
= vac_inw(VAC_DECODE_CTRL
);
23 unsigned short a24_base
= vac_inw(VAC_A24_BASE
);
24 unsigned long a24_addr
= ((unsigned long)
25 (a24_base
& VAC_A24_MASK
)) << 16;
26 char *decode_mode
[] = { "eprom", "vsb", "shared", "dram" };
27 char *address_mode
[] = { "", ", A16", ", A32/A24", ", A32/A24/A16" };
28 char *state
[] = { "", " on write", " on read", " on read/write", };
29 char *region_mode
[] = { "inactive", "shared", "vsb", "vme" };
30 char *asiz
[] = { "user", "A32", "A16", "A24" };
31 unsigned short regs
[] = { VAC_REG1
, VAC_REG2
, VAC_REG3
};
32 unsigned short bndr
[] = { VAC_DRAM_MASK
,VAC_BNDR2
,VAC_BNDR3
};
33 unsigned short io_sels
[] = { VAC_IOSEL0_CTRL
,
40 printk("[DSACKi %s, DRAMCS%s qualified, boundary%s qualified%s]\n",
41 (decode
& VAC_DECODE_DSACKI
) ? "on" : "off",
42 (decode
& VAC_DECODE_QFY_DRAMCS
) ? "" : " not",
43 (decode
& VAC_DECODE_QFY_BNDR
) ? "" : " not",
44 (decode
& VAC_DECODE_FPUCS
) ? ", fpu" : "");
47 if (decode
& VAC_DECODE_RDR_SLSEL0
)
48 printk("at %08lx (%d MB)\t[dram %s]\n",
49 ((unsigned long)vac_inw(VAC_SLSEL0_BASE
))<<16,
50 ((0xffff ^ vac_inw(VAC_SLSEL0_MASK
)) + 1) >> 4,
51 (decode
& VAC_DECODE_QFY_SLSEL0
) ? "qualified" : "");
56 if (decode
& VAC_DECODE_RDR_SLSEL1
)
57 printk("at %08lx (%d MB)\t[%s%s, %s]\n",
58 ((unsigned long)vac_inw(VAC_SLSEL1_BASE
))<<16,
59 ((0xffff ^ vac_inw(VAC_SLSEL1_MASK
)) + 1) >> 4,
60 decode_mode
[VAC_DECODE_MODE_VAL(decode
)],
61 address_mode
[VAC_DECODE_CMP_SLSEL1_VAL(decode
)],
62 (decode
& VAC_DECODE_QFY_SLSEL1
) ? "qualified" : "");
66 printk("icf global at %04x, module at %04x [%s]\n",
68 VAC_ICFSEL_GLOBAL_VAL(vac_inw(VAC_ICFSEL_BASE
)))<<4,
70 VAC_ICFSEL_MODULE_VAL(vac_inw(VAC_ICFSEL_BASE
)))<<4,
71 (decode
& VAC_DECODE_QFY_ICFSEL
) ? "qualified" : "");
74 printk("region0 at 00000000 (%dMB)\t[dram, %s, delay %d cpuclk"
76 (vac_inw(VAC_DRAM_MASK
)+1)>>4,
77 (decode
& VAC_DECODE_DSACK
) ? "D32" : "3state",
78 VAC_DECODE_CPUCLK_VAL(decode
));
80 for (i
= 0; i
< sizeof(regs
)/sizeof(regs
[0]); i
++) {
82 ((unsigned long)vac_inw(bndr
[i
]))<<16;
85 ((i
+1 == sizeof(bndr
)/sizeof(bndr
[0])) ?
86 0xff00 : vac_inw(bndr
[i
+1])))<<16;
89 val
= vac_inw(regs
[i
]);
90 printk("region%d at %08lx (%dMB)\t[%s %s/%s, %s]\n",
93 (unsigned int)((to
- from
) >> 20),
94 region_mode
[VAC_REG_MODE(val
)],
95 asiz
[VAC_REG_ASIZ_VAL(val
)],
96 ((val
& VAC_REG_WORD
) ? "D16" : "D32"),
97 CACHEABLE_STR(val
&VAC_A24_A24_CACHINH
));
99 if (a24_addr
>= from
&& a24_addr
< to
)
100 printk("\ta24 at %08lx (%dMB)\t[vme, A24/%s, %s]\n",
102 min((unsigned int)(a24_addr
- from
)>>20, 32U),
103 (a24_base
& VAC_A24_DATAPATH
) ? "user" :
104 ((a24_base
& VAC_A24_D32_ENABLE
) ?
106 CACHEABLE_STR(a24_base
& VAC_A24_A24_CACHINH
));
109 printk("region4 at ff000000 (15MB)\t[eprom]\n");
110 val
= vac_inw(VAC_EPROMCS_CTRL
);
111 printk("\t[ack %d cpuclk%s, %s%srecovery %d cpuclk, "
112 "read %d%s, write %d%s, assert %d%s]\n",
113 VAC_CTRL_DELAY_DSACKI_VAL(val
),
114 state
[val
& (VAC_CTRL_IORD
|VAC_CTRL_IOWR
)],
115 (val
& VAC_CTRL_DSACK0
) ? "dsack0*, " : "",
116 (val
& VAC_CTRL_DSACK1
) ? "dsack1*, " : "",
117 VAC_CTRL_RECOVERY_IOSELI_VAL(val
),
118 VAC_CTRL_DELAY_IORD_VAL(val
)/2,
119 (VAC_CTRL_DELAY_IORD_VAL(val
)&1) ? ".5" : "",
120 VAC_CTRL_DELAY_IOWR_VAL(val
)/2,
121 (VAC_CTRL_DELAY_IOWR_VAL(val
)&1) ? ".5" : "",
122 VAC_CTRL_DELAY_IOSELI_VAL(val
)/2,
123 (VAC_CTRL_DELAY_IOSELI_VAL(val
)&1) ? ".5" : "");
125 printk("region5 at fff00000 (896KB)\t[local io, %s]\n",
126 CACHEABLE_STR(vac_inw(VAC_A24_BASE
) & VAC_A24_IO_CACHINH
));
128 for (i
= 0; i
< sizeof(io_sels
)/sizeof(io_sels
[0]); i
++) {
129 val
= vac_inw(io_sels
[i
]);
130 printk("\tio%d[ack %d cpuclk%s, %s%srecovery %d cpuclk, "
131 "\n\t read %d%s cpuclk, write %d%s cpuclk, "
132 "assert %d%s%s cpuclk]\n",
134 VAC_CTRL_DELAY_DSACKI_VAL(val
),
135 state
[val
& (VAC_CTRL_IORD
|VAC_CTRL_IOWR
)],
136 (val
& VAC_CTRL_DSACK0
) ? "dsack0*, " : "",
137 (val
& VAC_CTRL_DSACK1
) ? "dsack1*, " : "",
138 VAC_CTRL_RECOVERY_IOSELI_VAL(val
),
139 VAC_CTRL_DELAY_IORD_VAL(val
)/2,
140 (VAC_CTRL_DELAY_IORD_VAL(val
)&1) ? ".5" : "",
141 VAC_CTRL_DELAY_IOWR_VAL(val
)/2,
142 (VAC_CTRL_DELAY_IOWR_VAL(val
)&1) ? ".5" : "",
143 VAC_CTRL_DELAY_IOSELI_VAL(val
)/2,
144 (VAC_CTRL_DELAY_IOSELI_VAL(val
)&1) ? ".5" : "",
145 (vac_inw(VAC_DEV_LOC
) & VAC_DEV_LOC_IOSEL(i
)) ?
149 printk("region6 at fffe0000 (128KB)\t[vme, A16/%s, "
151 (a24_base
& VAC_A24_A16D32_ENABLE
) ?
152 ((a24_base
& VAC_A24_A16D32
) ? "D32" : "D16") : "user");
154 val
= vac_inw(VAC_SHRCS_CTRL
);
155 printk("shared[ack %d cpuclk%s, %s%srecovery %d cpuclk, "
156 "read %d%s, write %d%s, assert %d%s]\n",
157 VAC_CTRL_DELAY_DSACKI_VAL(val
),
158 state
[val
& (VAC_CTRL_IORD
|VAC_CTRL_IOWR
)],
159 (val
& VAC_CTRL_DSACK0
) ? "dsack0*, " : "",
160 (val
& VAC_CTRL_DSACK1
) ? "dsack1*, " : "",
161 VAC_CTRL_RECOVERY_IOSELI_VAL(val
),
162 VAC_CTRL_DELAY_IORD_VAL(val
)/2,
163 (VAC_CTRL_DELAY_IORD_VAL(val
)&1) ? ".5" : "",
164 VAC_CTRL_DELAY_IOWR_VAL(val
)/2,
165 (VAC_CTRL_DELAY_IOWR_VAL(val
)&1) ? ".5" : "",
166 VAC_CTRL_DELAY_IOSELI_VAL(val
)/2,
167 (VAC_CTRL_DELAY_IOSELI_VAL(val
)&1) ? ".5" : "");
170 static void __init
vac_init(void)
172 unsigned short mem_limit
= (vac_memory_upper
>> 16);
174 switch(vac_inw(VAC_ID
)) {
176 printk("VAC068-F5: ");
182 panic("Unknown VAC revision number");
185 vac_outw(mem_limit
-1, VAC_DRAM_MASK
);
186 vac_outw(mem_limit
, VAC_BNDR2
);
187 vac_outw(mem_limit
, VAC_BNDR3
);
188 vac_outw(((BAGET_A24M_BASE
>>16)&~VAC_A24_D32_ENABLE
)|VAC_A24_DATAPATH
,
190 vac_outw(VAC_REG_INACTIVE
|VAC_REG_ASIZ0
,VAC_REG1
);
191 vac_outw(VAC_REG_INACTIVE
|VAC_REG_ASIZ0
,VAC_REG2
);
192 vac_outw(VAC_REG_MWB
|VAC_REG_ASIZ1
,VAC_REG3
);
193 vac_outw(BAGET_A24S_BASE
>>16,VAC_SLSEL0_BASE
);
194 vac_outw(BAGET_A24S_MASK
>>16,VAC_SLSEL0_MASK
);
195 vac_outw(BAGET_A24S_BASE
>>16,VAC_SLSEL1_BASE
);
196 vac_outw(BAGET_A24S_MASK
>>16,VAC_SLSEL1_MASK
);
197 vac_outw(BAGET_GSW_BASE
|BAGET_MSW_BASE(0),VAC_ICFSEL_BASE
);
198 vac_outw(VAC_DECODE_FPUCS
|
199 VAC_DECODE_CPUCLK(3)|
200 VAC_DECODE_RDR_SLSEL0
|VAC_DECODE_RDR_SLSEL1
|
203 VAC_DECODE_QFY_ICFSEL
|
204 VAC_DECODE_QFY_SLSEL1
|VAC_DECODE_QFY_SLSEL0
|
205 VAC_DECODE_CMP_SLSEL1_HI
|
207 VAC_DECODE_QFY_DRAMCS
|
208 VAC_DECODE_DSACKI
,VAC_DECODE_CTRL
);
209 vac_outw(VAC_PIO_FUNC_UART_A_TX
|VAC_PIO_FUNC_UART_A_RX
|
210 VAC_PIO_FUNC_UART_B_TX
|VAC_PIO_FUNC_UART_B_RX
|
213 VAC_PIO_FUNC_IRQ7
|VAC_PIO_FUNC_IRQ10
|VAC_PIO_FUNC_IRQ11
|
215 VAC_PIO_FUNC_FCIACK
,VAC_PIO_FUNC
);
216 vac_outw(VAC_PIO_DIR_FCIACK
|
230 VAC_PIO_DIR_OUT(13),VAC_PIO_DIRECTION
);
231 vac_outw(VAC_DEV_LOC_IOSEL(2),VAC_DEV_LOC
);
232 vac_outw(VAC_CTRL_IOWR
|
233 VAC_CTRL_DELAY_IOWR(3)|
234 VAC_CTRL_DELAY_IORD(3)|
235 VAC_CTRL_RECOVERY_IOSELI(1)|
236 VAC_CTRL_DELAY_DSACKI(8),VAC_SHRCS_CTRL
);
237 vac_outw(VAC_CTRL_IOWR
|
238 VAC_CTRL_DELAY_IOWR(3)|
239 VAC_CTRL_DELAY_IORD(3)|
240 VAC_CTRL_RECOVERY_IOSELI(1)|
241 VAC_CTRL_DSACK0
|VAC_CTRL_DSACK1
|
242 VAC_CTRL_DELAY_DSACKI(8),VAC_EPROMCS_CTRL
);
243 vac_outw(VAC_CTRL_IOWR
|
244 VAC_CTRL_DELAY_IOWR(3)|
245 VAC_CTRL_DELAY_IORD(3)|
246 VAC_CTRL_RECOVERY_IOSELI(2)|
247 VAC_CTRL_DSACK0
|VAC_CTRL_DSACK1
|
248 VAC_CTRL_DELAY_DSACKI(8),VAC_IOSEL0_CTRL
);
249 vac_outw(VAC_CTRL_IOWR
|
250 VAC_CTRL_DELAY_IOWR(3)|
251 VAC_CTRL_DELAY_IORD(3)|
252 VAC_CTRL_RECOVERY_IOSELI(2)|
253 VAC_CTRL_DSACK0
|VAC_CTRL_DSACK1
|
254 VAC_CTRL_DELAY_DSACKI(8),VAC_IOSEL1_CTRL
);
255 vac_outw(VAC_CTRL_IOWR
|
256 VAC_CTRL_DELAY_IOWR(3)|
257 VAC_CTRL_DELAY_IORD(3)|
258 VAC_CTRL_RECOVERY_IOSELI(2)|
259 VAC_CTRL_DSACK0
|VAC_CTRL_DSACK1
|
260 VAC_CTRL_DELAY_DSACKI(8),VAC_IOSEL2_CTRL
);
261 vac_outw(VAC_CTRL_IOWR
|
262 VAC_CTRL_DELAY_IOWR(3)|
263 VAC_CTRL_DELAY_IORD(3)|
264 VAC_CTRL_RECOVERY_IOSELI(2)|
265 VAC_CTRL_DSACK0
|VAC_CTRL_DSACK1
|
266 VAC_CTRL_DELAY_DSACKI(8),VAC_IOSEL3_CTRL
);
267 vac_outw(VAC_CTRL_IOWR
|
268 VAC_CTRL_DELAY_IOWR(3)|
269 VAC_CTRL_DELAY_IORD(3)|
270 VAC_CTRL_RECOVERY_IOSELI(2)|
271 VAC_CTRL_DELAY_DSACKI(8),VAC_IOSEL4_CTRL
);
272 vac_outw(VAC_CTRL_IOWR
|
273 VAC_CTRL_DELAY_IOWR(3)|
274 VAC_CTRL_DELAY_IORD(3)|
275 VAC_CTRL_RECOVERY_IOSELI(2)|
276 VAC_CTRL_DELAY_DSACKI(8),VAC_IOSEL5_CTRL
);
281 static void __init
vac_start(void)
284 vac_outw(VAC_INT_CTRL_TIMER_DISABLE
|
285 VAC_INT_CTRL_UART_B_DISABLE
|
286 VAC_INT_CTRL_UART_A_DISABLE
|
287 VAC_INT_CTRL_MBOX_DISABLE
|
288 VAC_INT_CTRL_PIO4_DISABLE
|
289 VAC_INT_CTRL_PIO7_DISABLE
|
290 VAC_INT_CTRL_PIO8_DISABLE
|
291 VAC_INT_CTRL_PIO9_DISABLE
,VAC_INT_CTRL
);
292 vac_outw(VAC_INT_CTRL_TIMER_PIO10
|
293 VAC_INT_CTRL_UART_B_PIO7
|
294 VAC_INT_CTRL_UART_A_PIO7
,VAC_INT_CTRL
);
296 * Set quadro speed for both UARTs.
297 * To do it we need use formulae from VIC/VAC manual,
298 * keeping in mind Baget's 50MHz frequency...
300 vac_outw((500000/(384*16))<<8,VAC_CPU_CLK_DIV
);
303 static void __init
vic_show(void)
306 char *timeout
[] = { "4", "16", "32", "64", "128", "256", "disabled" };
307 char *deadlock
[] = { "[dedlk only]", "[dedlk only]",
308 "[dedlk], [halt w/ rmc], [lberr]",
309 "[dedlk], [halt w/o rmc], [lberr]" };
311 val
= vic_inb(VIC_IFACE_CFG
);
312 if (val
& VIC_IFACE_CFG_VME
)
313 printk("VMEbus controller ");
314 if (val
& VIC_IFACE_CFG_TURBO
)
316 if (val
& VIC_IFACE_CFG_MSTAB
)
317 printk("metastability delay ");
319 deadlock
[VIC_IFACE_CFG_DEADLOCK_VAL(val
)]);
322 printk("interrupts: ");
323 val
= vic_inb(VIC_ERR_INT
);
324 if (!(val
& VIC_ERR_INT_SYSFAIL
))
326 if (!(val
& VIC_ERR_INT_TIMO
))
328 if (!(val
& VIC_ERR_INT_WRPOST
))
329 printk("[write post]");
330 if (!(val
& VIC_ERR_INT_ACFAIL
))
334 printk("timeouts: ");
335 val
= vic_inb(VIC_XFER_TIMO
);
336 printk("local %s, vme %s ",
337 timeout
[VIC_XFER_TIMO_LOCAL_PERIOD_VAL(val
)],
338 timeout
[VIC_XFER_TIMO_VME_PERIOD_VAL(val
)]);
339 if (val
& VIC_XFER_TIMO_VME
)
340 printk("acquisition ");
341 if (val
& VIC_XFER_TIMO_ARB
)
342 printk("arbitration ");
345 val
= vic_inb(VIC_LOCAL_TIM
);
346 printk("pas time: (%d,%d), ds time: %d\n",
347 VIC_LOCAL_TIM_PAS_ASSERT_VAL(val
),
348 VIC_LOCAL_TIM_PAS_DEASSERT_VAL(val
),
349 VIC_LOCAT_TIM_DS_DEASSERT_VAL(val
));
351 val
= vic_inb(VIC_BXFER_DEF
);
353 if (val
& VIC_BXFER_DEF_DUAL
)
354 printk("[dual path]");
355 if (val
& VIC_BXFER_DEF_LOCAL_CROSS
)
356 printk("[local boundary cross]");
357 if (val
& VIC_BXFER_DEF_VME_CROSS
)
358 printk("[vme boundary cross]");
362 static void __init
vic_init(void)
364 unsigned char id
= vic_inb(VIC_ID
);
365 if ((id
& 0xf0) != 0xf0)
366 panic("VIC not found");
367 printk(" VIC068A Rev. %X: ", id
& 0x0f);
369 vic_outb(VIC_INT_IPL(3)|VIC_INT_DISABLE
,VIC_VME_II
);
370 vic_outb(VIC_INT_IPL(3)|VIC_INT_DISABLE
,VIC_VME_INT1
);
371 vic_outb(VIC_INT_IPL(3)|VIC_INT_DISABLE
,VIC_VME_INT2
);
372 vic_outb(VIC_INT_IPL(3)|VIC_INT_DISABLE
,VIC_VME_INT3
);
373 vic_outb(VIC_INT_IPL(3)|VIC_INT_DISABLE
,VIC_VME_INT4
);
375 vic_outb(VIC_INT_IPL(3)|VIC_INT_DISABLE, VIC_VME_INT5);
377 vic_outb(VIC_INT_IPL(3)|VIC_INT_DISABLE
, VIC_VME_INT6
);
379 vic_outb(VIC_INT_IPL(3)|VIC_INT_DISABLE
, VIC_VME_INT7
);
380 vic_outb(VIC_INT_IPL(3)|VIC_INT_DISABLE
, VIC_DMA_INT
);
381 vic_outb(VIC_INT_IPL(3)|VIC_INT_NOAUTO
|VIC_INT_EDGE
|
382 VIC_INT_LOW
|VIC_INT_DISABLE
, VIC_LINT1
);
383 vic_outb(VIC_INT_IPL(3)|VIC_INT_NOAUTO
|VIC_INT_EDGE
|
384 VIC_INT_HIGH
|VIC_INT_DISABLE
, VIC_LINT2
);
385 vic_outb(VIC_INT_IPL(3)|VIC_INT_NOAUTO
|VIC_INT_EDGE
|
386 VIC_INT_HIGH
|VIC_INT_DISABLE
, VIC_LINT3
);
387 vic_outb(VIC_INT_IPL(3)|VIC_INT_NOAUTO
|VIC_INT_EDGE
|
388 VIC_INT_LOW
|VIC_INT_DISABLE
, VIC_LINT4
);
390 vic_outb(VIC_INT_IPL(3)|VIC_INT_NOAUTO|VIC_INT_LEVEL|
391 VIC_INT_LOW|VIC_INT_DISABLE, VIC_LINT5);
393 vic_outb(VIC_INT_IPL(6)|VIC_INT_NOAUTO
|VIC_INT_EDGE
|
394 VIC_INT_LOW
|VIC_INT_DISABLE
, VIC_LINT6
);
395 vic_outb(VIC_INT_IPL(6)|VIC_INT_NOAUTO
|VIC_INT_EDGE
|
396 VIC_INT_LOW
|VIC_INT_DISABLE
, VIC_LINT7
);
398 vic_outb(VIC_INT_IPL(3)|
402 VIC_INT_SWITCH(3), VIC_ICGS_INT
);
403 vic_outb(VIC_INT_IPL(3)|
407 VIC_INT_SWITCH(3), VIC_ICMS_INT
);
408 vic_outb(VIC_INT_IPL(6)|
412 VIC_ERR_INT_ACFAIL
, VIC_ERR_INT
);
413 vic_outb(VIC_ICxS_BASE_ID(0xf), VIC_ICGS_BASE
);
414 vic_outb(VIC_ICxS_BASE_ID(0xe), VIC_ICMS_BASE
);
415 vic_outb(VIC_LOCAL_BASE_ID(0x6), VIC_LOCAL_BASE
);
416 vic_outb(VIC_ERR_BASE_ID(0x3), VIC_ERR_BASE
);
417 vic_outb(VIC_XFER_TIMO_VME_PERIOD_32
|
418 VIC_XFER_TIMO_LOCAL_PERIOD_32
, VIC_XFER_TIMO
);
419 vic_outb(VIC_LOCAL_TIM_PAS_ASSERT(2)|
420 VIC_LOCAT_TIM_DS_DEASSERT(1)|
421 VIC_LOCAL_TIM_PAS_DEASSERT(1), VIC_LOCAL_TIM
);
422 vic_outb(VIC_BXFER_DEF_VME_CROSS
|
423 VIC_BXFER_DEF_LOCAL_CROSS
|
425 VIC_BXFER_DEF_DUAL
, VIC_BXFER_DEF
);
426 vic_outb(VIC_SSxCR0_LOCAL_XFER_SINGLE
|
427 VIC_SSxCR0_A32
|VIC_SSxCR0_D32
|
428 VIC_SS0CR0_TIMER_FREQ_NONE
, VIC_SS0CR0
);
429 vic_outb(VIC_SSxCR1_TF1(0xf)|
430 VIC_SSxCR1_TF2(0xf), VIC_SS0CR1
);
431 vic_outb(VIC_SSxCR0_LOCAL_XFER_SINGLE
|
432 VIC_SSxCR0_A24
|VIC_SSxCR0_D32
, VIC_SS1CR0
);
433 vic_outb(VIC_SSxCR1_TF1(0xf)|
434 VIC_SSxCR1_TF2(0xf), VIC_SS1CR1
);
435 vic_outb(VIC_IFACE_CFG_NOHALT
|
436 VIC_IFACE_CFG_NOTURBO
, VIC_IFACE_CFG
);
437 vic_outb(VIC_AMS_CODE(0), VIC_AMS
);
438 vic_outb(VIC_BXFER_CTRL_INTERLEAVE(0), VIC_BXFER_CTRL
);
439 vic_outb(0, VIC_BXFER_LEN_LO
);
440 vic_outb(0, VIC_BXFER_LEN_HI
);
441 vic_outb(VIC_REQ_CFG_FAIRNESS_DISABLED
|
442 VIC_REQ_CFG_LEVEL(3)|
443 VIC_REQ_CFG_RR_ARBITRATION
, VIC_REQ_CFG
);
444 vic_outb(VIC_RELEASE_BLKXFER_BLEN(0)|
445 VIC_RELEASE_RWD
, VIC_RELEASE
);
446 vic_outb(VIC_IC6_RUN
, VIC_IC6
);
447 vic_outb(0, VIC_IC7
);
452 static void vic_start(void)
454 vic_outb(VIC_INT_IPL(3)|
458 VIC_INT_ENABLE
, VIC_LINT7
);
461 void __init
baget_irq_setup(void)
463 extern void bagetIRQ(void);
465 /* Now, it's safe to set the exception vector. */
466 set_except_vector(0, bagetIRQ
);
469 extern void baget_machine_restart(char *command
);
470 extern void baget_machine_halt(void);
471 extern void baget_machine_power_off(void);
473 static void __init
baget_setup(void)
475 printk("BT23/63-201n found.\n");
476 *BAGET_WRERR_ACK
= 0;
477 irq_setup
= baget_irq_setup
;
479 _machine_restart
= baget_machine_restart
;
480 _machine_halt
= baget_machine_halt
;
481 _machine_power_off
= baget_machine_power_off
;
489 early_initcall(baget_setup
);