arch/mips/au1000/common/setup.c

   1 /*
   2  * Copyright 2000 MontaVista Software Inc.
   3  * Author: MontaVista Software, Inc.
   4  *              ppopov@mvista.com or source@mvista.com
   5  *
   6  *  This program is free software; you can redistribute  it and/or modify it
   7  *  under  the terms of  the GNU General  Public License as published by the
   8  *  Free Software Foundation;  either version 2 of the  License, or (at your
   9  *  option) any later version.
  10  *
  11  *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
  12  *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
  13  *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
  14  *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
  15  *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  16  *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
  17  *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  18  *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
  19  *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  20  *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  21  *
  22  *  You should have received a copy of the  GNU General Public License along
  23  *  with this program; if not, write  to the Free Software Foundation, Inc.,
  24  *  675 Mass Ave, Cambridge, MA 02139, USA.
  25  */
  26 #include <linux/config.h>
  27 #include <linux/init.h>
  28 #include <linux/sched.h>
  29 #include <linux/ioport.h>
  30 #include <linux/mm.h>
  31 #include <linux/delay.h>
  32 #include <linux/interrupt.h>
  33
  34 #include <asm/cpu.h>
  35 #include <asm/bootinfo.h>
  36 #include <asm/irq.h>
  37 #include <asm/mipsregs.h>
  38 #include <asm/reboot.h>
  39 #include <asm/pgtable.h>
  40 #include <asm/mach-au1x00/au1000.h>
  41 #include <asm/time.h>
  42
  43 #ifdef CONFIG_BLK_DEV_INITRD
  44 extern unsigned long initrd_start, initrd_end;
  45 extern void * __rd_start, * __rd_end;
  46 #endif
  47
  48 extern char * __init prom_getcmdline(void);
  49 extern void __init board_setup(void);
  50 extern void au1000_restart(char *);
  51 extern void au1000_halt(void);
  52 extern void au1000_power_off(void);
  53 extern struct resource ioport_resource;
  54 extern struct resource iomem_resource;
  55 extern void (*board_time_init)(void);
  56 extern void au1x_time_init(void);
  57 extern void (*board_timer_setup)(struct irqaction *irq);
  58 extern void au1x_timer_setup(struct irqaction *irq);
  59 #if defined(CONFIG_64BIT_PHYS_ADDR) && (defined(CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1550))
  60 extern phys_t (*fixup_bigphys_addr)(phys_t phys_addr, phys_t size);
  61 static phys_t au1500_fixup_bigphys_addr(phys_t phys_addr, phys_t size);
  62 #endif
  63 extern void au1xxx_time_init(void);
  64 extern void au1xxx_timer_setup(struct irqaction *irq);
  65
  66 static int __init au1x00_setup(void)
  67 {
  68         struct  cpu_spec *sp;
  69         char *argptr;
  70         unsigned long prid, cpupll, bclk = 1;
  71
  72         set_cpuspec();
  73         sp = cur_cpu_spec[0];
  74
  75         board_setup();  /* board specific setup */
  76
  77         prid = read_c0_prid();
  78         cpupll = (au_readl(0xB1900060) & 0x3F) * 12;
  79         printk("(PRId %08X) @ %dMHZ\n", prid, cpupll);
  80
  81         bclk = sp->cpu_bclk;
  82         if (bclk)
  83         {
  84                 /* Enable BCLK switching */
  85                 bclk = au_readl(0xB190003C);
  86                 au_writel(bclk | 0x60, 0xB190003C);
  87                 printk("BCLK switching enabled!\n");
  88         }
  89
  90         if (sp->cpu_od) {
  91                 /* Various early Au1000 Errata corrected by this */
  92                 set_c0_config(1<<19); /* Set Config[OD] */
  93         }
  94         else {
  95                 /* Clear to obtain best system bus performance */
  96                 clear_c0_config(1<<19); /* Clear Config[OD] */
  97         }
  98
  99         argptr = prom_getcmdline();
 100
 101 #ifdef CONFIG_SERIAL_AU1X00_CONSOLE
 102         if ((argptr = strstr(argptr, "console=")) == NULL) {
 103                 argptr = prom_getcmdline();
 104                 strcat(argptr, " console=ttyS0,115200");
 105         }
 106 #endif
 107
 108 #ifdef CONFIG_FB_AU1100
 109     if ((argptr = strstr(argptr, "video=")) == NULL) {
 110         argptr = prom_getcmdline();
 111         /* default panel */
 112         /*strcat(argptr, " video=au1100fb:panel:Sharp_320x240_16");*/
 113 #ifdef CONFIG_MIPS_HYDROGEN3
 114          strcat(argptr, " video=au1100fb:panel:Hydrogen_3_NEC_panel_320x240,nohwcursor");
 115 #else
 116         strcat(argptr, " video=au1100fb:panel:s10,nohwcursor");
 117 #endif
 118     }
 119 #endif
 120
 121 #ifdef CONFIG_FB_E1356
 122         if ((argptr = strstr(argptr, "video=")) == NULL) {
 123                 argptr = prom_getcmdline();
 124 #ifdef CONFIG_MIPS_PB1000
 125                 strcat(argptr, " video=e1356fb:system:pb1000,mmunalign:1");
 126 #else
 127                 strcat(argptr, " video=e1356fb:system:pb1500");
 128 #endif
 129         }
 130 #endif
 131
 132 #ifdef CONFIG_FB_XPERT98
 133         if ((argptr = strstr(argptr, "video=")) == NULL) {
 134                 argptr = prom_getcmdline();
 135                 strcat(argptr, " video=atyfb:1024x768-8@70");
 136         }
 137 #endif
 138
 139 #if defined(CONFIG_SOUND_AU1X00) && !defined(CONFIG_SOC_AU1000)
 140         /* au1000 does not support vra, au1500 and au1100 do */
 141         strcat(argptr, " au1000_audio=vra");
 142         argptr = prom_getcmdline();
 143 #endif
 144         _machine_restart = au1000_restart;
 145         _machine_halt = au1000_halt;
 146         _machine_power_off = au1000_power_off;
 147         board_time_init = au1xxx_time_init;
 148         board_timer_setup = au1xxx_timer_setup;
 149 #if defined(CONFIG_64BIT_PHYS_ADDR) && (defined(CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1550))
 150         fixup_bigphys_addr = au1500_fixup_bigphys_addr;
 151 #endif
 152
 153         /* IO/MEM resources. */
 154         set_io_port_base(0);
 155         ioport_resource.start = IOPORT_RESOURCE_START;
 156         ioport_resource.end = IOPORT_RESOURCE_END;
 157         iomem_resource.start = IOMEM_RESOURCE_START;
 158         iomem_resource.end = IOMEM_RESOURCE_END;
 159
 160 #ifdef CONFIG_BLK_DEV_INITRD
 161         ROOT_DEV = MKDEV(RAMDISK_MAJOR, 0);
 162         initrd_start = (unsigned long)&__rd_start;
 163         initrd_end = (unsigned long)&__rd_end;
 164 #endif
 165
 166 #if defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1X00_USB_DEVICE)
 167 #ifdef CONFIG_USB_OHCI
 168         if ((argptr = strstr(argptr, "usb_ohci=")) == NULL) {
 169                 char usb_args[80];
 170                 argptr = prom_getcmdline();
 171                 memset(usb_args, 0, sizeof(usb_args));
 172                 sprintf(usb_args, " usb_ohci=base:0x%x,len:0x%x,irq:%d",
 173                         USB_OHCI_BASE, USB_OHCI_LEN, AU1000_USB_HOST_INT);
 174                 strcat(argptr, usb_args);
 175         }
 176 #endif
 177
 178 #ifdef CONFIG_USB_OHCI
 179         /* enable host controller and wait for reset done */
 180         au_writel(0x08, USB_HOST_CONFIG);
 181         udelay(1000);
 182         au_writel(0x0E, USB_HOST_CONFIG);
 183         udelay(1000);
 184         au_readl(USB_HOST_CONFIG); /* throw away first read */
 185         while (!(au_readl(USB_HOST_CONFIG) & 0x10))
 186                 au_readl(USB_HOST_CONFIG);
 187 #endif
 188 #endif /* defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1X00_USB_DEVICE) */
 189
 190         while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_E0S);
 191         au_writel(SYS_CNTRL_E0 | SYS_CNTRL_EN0, SYS_COUNTER_CNTRL);
 192         au_sync();
 193         while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_T0S);
 194         au_writel(0, SYS_TOYTRIM);
 195         return 0;
 196 }
 197
 198 early_initcall(au1x00_setup);
 199
 200 #if defined(CONFIG_64BIT_PHYS_ADDR) && (defined(CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1550))
 201 /* This routine should be valid for all Au1500 based boards */
 202 static phys_t au1500_fixup_bigphys_addr(phys_t phys_addr, phys_t size)
 203 {
 204         u32 pci_start = (u32)Au1500_PCI_MEM_START;
 205         u32 pci_end = (u32)Au1500_PCI_MEM_END;
 206
 207         /* Don't fixup 36 bit addresses */
 208         if ((phys_addr >> 32) != 0) return phys_addr;
 209
 210         /* check for pci memory window */
 211         if ((phys_addr >= pci_start) && ((phys_addr + size) < pci_end)) {
 212                 return (phys_t)((phys_addr - pci_start) +
 213                                      Au1500_PCI_MEM_START);
 214         }
 215         else
 216                 return phys_addr;
 217 }
 218 #endif