arch/ia64/sn/io/snia_if.c

   1 /*
   2  * This file is subject to the terms and conditions of the GNU General Public
   3  * License.  See the file "COPYING" in the main directory of this archive
   4  * for more details.
   5  *
   6  * Copyright (C) 2003 Silicon Graphics, Inc. All rights reserved.
   7  */
   8
   9 #include <asm/sn/sgi.h>
  10 #include <asm/sn/sn_sal.h>
  11 #include <asm/sn/pci/pci_bus_cvlink.h>
  12 #include <asm/sn/simulator.h>
  13
  14 extern pciio_provider_t *pciio_to_provider_fns(vertex_hdl_t dev);
  15
  16 int
  17 snia_badaddr_val(volatile void *addr, int len, volatile void *ptr)
  18 {
  19         int ret = 0;
  20         volatile void *new_addr;
  21
  22         switch (len) {
  23         case 4:
  24                 new_addr = (void *) addr;
  25                 ret = ia64_sn_probe_io_slot((long) new_addr, len, (void *) ptr);
  26                 break;
  27         default:
  28                 printk(KERN_WARNING
  29                        "snia_badaddr_val given len %x but supports len of 4 only\n",
  30                        len);
  31         }
  32
  33         if (ret < 0)
  34                 panic("snia_badaddr_val: unexpected status (%d) in probing",
  35                       ret);
  36         return (ret);
  37
  38 }
  39
  40 nasid_t
  41 snia_get_console_nasid(void)
  42 {
  43         extern nasid_t console_nasid;
  44         extern nasid_t master_baseio_nasid;
  45
  46         if (console_nasid < 0) {
  47                 console_nasid = ia64_sn_get_console_nasid();
  48                 if (console_nasid < 0) {
  49 // ZZZ What do we do if we don't get a console nasid on the hardware????
  50                         if (IS_RUNNING_ON_SIMULATOR())
  51                                 console_nasid = master_baseio_nasid;
  52                 }
  53         }
  54         return console_nasid;
  55 }
  56
  57 nasid_t
  58 snia_get_master_baseio_nasid(void)
  59 {
  60         extern nasid_t master_baseio_nasid;
  61         extern char master_baseio_wid;
  62
  63         if (master_baseio_nasid < 0) {
  64                 master_baseio_nasid = ia64_sn_get_master_baseio_nasid();
  65
  66                 if (master_baseio_nasid >= 0) {
  67                         master_baseio_wid =
  68                             WIDGETID_GET(KL_CONFIG_CH_CONS_INFO
  69                                          (master_baseio_nasid)->memory_base);
  70                 }
  71         }
  72         return master_baseio_nasid;
  73 }
  74
  75 /*
  76  * XXX: should probably be called __sn2_pci_rrb_alloc
  77  * used by qla1280
  78  */
  79
  80 int
  81 snia_pcibr_rrb_alloc(struct pci_dev *pci_dev,
  82                      int *count_vchan0, int *count_vchan1)
  83 {
  84         vertex_hdl_t dev = PCIDEV_VERTEX(pci_dev);
  85
  86         return pcibr_rrb_alloc(dev, count_vchan0, count_vchan1);
  87 }
  88
  89 /*
  90  * XXX: interface should be more like
  91  *
  92  *     int __sn2_pci_enable_bwswap(struct pci_dev *dev);
  93  *     void __sn2_pci_disable_bswap(struct pci_dev *dev);
  94  */
  95 /* used by ioc4 ide */
  96
  97 pciio_endian_t
  98 snia_pciio_endian_set(struct pci_dev * pci_dev,
  99                       pciio_endian_t device_end, pciio_endian_t desired_end)
 100 {
 101         vertex_hdl_t dev = PCIDEV_VERTEX(pci_dev);
 102
 103         return ((pciio_to_provider_fns(dev))->endian_set)
 104                 (dev, device_end, desired_end);
 105 }
 106
 107 EXPORT_SYMBOL(snia_pciio_endian_set);
 108 EXPORT_SYMBOL(snia_pcibr_rrb_alloc);