arch/i386/kernel/cpu/cpufreq/p4-clockmod.c

   1 /*
   2  *      Pentium 4/Xeon CPU on demand clock modulation/speed scaling
   3  *      (C) 2002 - 2003 Dominik Brodowski <linux@brodo.de>
   4  *      (C) 2002 Zwane Mwaikambo <zwane@commfireservices.com>
   5  *      (C) 2002 Arjan van de Ven <arjanv@redhat.com>
   6  *      (C) 2002 Tora T. Engstad
   7  *      All Rights Reserved
   8  *
   9  *      This program is free software; you can redistribute it and/or
  10  *      modify it under the terms of the GNU General Public License
  11  *      as published by the Free Software Foundation; either version
  12  *      2 of the License, or (at your option) any later version.
  13  *
  14  *      The author(s) of this software shall not be held liable for damages
  15  *      of any nature resulting due to the use of this software. This
  16  *      software is provided AS-IS with no warranties.
  17  *
  18  *      Date            Errata                  Description
  19  *      20020525        N44, O17        12.5% or 25% DC causes lockup
  20  *
  21  */
  22
  23 #include <linux/config.h>
  24 #include <linux/kernel.h>
  25 #include <linux/module.h>
  26 #include <linux/init.h>
  27 #include <linux/smp.h>
  28 #include <linux/cpufreq.h>
  29 #include <linux/slab.h>
  30 #include <linux/cpumask.h>
  31
  32 #include <asm/processor.h>
  33 #include <asm/msr.h>
  34 #include <asm/timex.h>
  35
  36 #include "speedstep-lib.h"
  37
  38 #define PFX     "p4-clockmod: "
  39
  40 /*
  41  * Duty Cycle (3bits), note DC_DISABLE is not specified in
  42  * intel docs i just use it to mean disable
  43  */
  44 enum {
  45         DC_RESV, DC_DFLT, DC_25PT, DC_38PT, DC_50PT,
  46         DC_64PT, DC_75PT, DC_88PT, DC_DISABLE
  47 };
  48
  49 #define DC_ENTRIES      8
  50
  51
  52 static int has_N44_O17_errata[NR_CPUS];
  53 static unsigned int stock_freq;
  54 static struct cpufreq_driver p4clockmod_driver;
  55 static unsigned int cpufreq_p4_get(unsigned int cpu);
  56
  57 static int cpufreq_p4_setdc(unsigned int cpu, unsigned int newstate)
  58 {
  59         u32 l, h;
  60
  61         if (!cpu_online(cpu) || (newstate > DC_DISABLE) || (newstate == DC_RESV))
  62                 return -EINVAL;
  63
  64         rdmsr(MSR_IA32_THERM_STATUS, l, h);
  65 #if 0
  66         if (l & 0x01)
  67                 printk(KERN_DEBUG PFX "CPU#%d currently thermal throttled\n", cpu);
  68 #endif
  69         if (has_N44_O17_errata[cpu] && (newstate == DC_25PT || newstate == DC_DFLT))
  70                 newstate = DC_38PT;
  71
  72         rdmsr(MSR_IA32_THERM_CONTROL, l, h);
  73         if (newstate == DC_DISABLE) {
  74                 /* printk(KERN_INFO PFX "CPU#%d disabling modulation\n", cpu); */
  75                 wrmsr(MSR_IA32_THERM_CONTROL, l & ~(1<<4), h);
  76         } else {
  77                 /* printk(KERN_INFO PFX "CPU#%d setting duty cycle to %d%%\n",
  78                         cpu, ((125 * newstate) / 10)); */
  79                 /* bits 63 - 5  : reserved
  80                  * bit  4       : enable/disable
  81                  * bits 3-1     : duty cycle
  82                  * bit  0       : reserved
  83                  */
  84                 l = (l & ~14);
  85                 l = l | (1<<4) | ((newstate & 0x7)<<1);
  86                 wrmsr(MSR_IA32_THERM_CONTROL, l, h);
  87         }
  88
  89         return 0;
  90 }
  91
  92
  93 static struct cpufreq_frequency_table p4clockmod_table[] = {
  94         {DC_RESV, CPUFREQ_ENTRY_INVALID},
  95         {DC_DFLT, 0},
  96         {DC_25PT, 0},
  97         {DC_38PT, 0},
  98         {DC_50PT, 0},
  99         {DC_64PT, 0},
 100         {DC_75PT, 0},
 101         {DC_88PT, 0},
 102         {DC_DISABLE, 0},
 103         {DC_RESV, CPUFREQ_TABLE_END},
 104 };
 105
 106
 107 static int cpufreq_p4_target(struct cpufreq_policy *policy,
 108                              unsigned int target_freq,
 109                              unsigned int relation)
 110 {
 111         unsigned int    newstate = DC_RESV;
 112         struct cpufreq_freqs freqs;
 113         cpumask_t cpus_allowed, affected_cpu_map;
 114         int i;
 115
 116         if (cpufreq_frequency_table_target(policy, &p4clockmod_table[0], target_freq, relation, &newstate))
 117                 return -EINVAL;
 118
 119         freqs.old = cpufreq_p4_get(policy->cpu);
 120         freqs.new = stock_freq * p4clockmod_table[newstate].index / 8;
 121
 122         if (freqs.new == freqs.old)
 123                 return 0;
 124
 125         /* switch to physical CPU where state is to be changed*/
 126         cpus_allowed = current->cpus_allowed;
 127
 128         /* only run on CPU to be set, or on its sibling */
 129 #ifdef CONFIG_SMP
 130         affected_cpu_map = cpu_sibling_map[policy->cpu];
 131 #else
 132         affected_cpu_map = cpumask_of_cpu(policy->cpu);
 133 #endif
 134
 135         /* notifiers */
 136         for_each_cpu_mask(i, affected_cpu_map) {
 137                 freqs.cpu = i;
 138                 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
 139         }
 140
 141         /* run on each logical CPU, see section 13.15.3 of IA32 Intel Architecture Software
 142          * Developer's Manual, Volume 3
 143          */
 144         for_each_cpu_mask(i, affected_cpu_map) {
 145                 cpumask_t this_cpu = cpumask_of_cpu(i);
 146
 147                 set_cpus_allowed(current, this_cpu);
 148                 BUG_ON(smp_processor_id() != i);
 149
 150                 cpufreq_p4_setdc(i, p4clockmod_table[newstate].index);
 151         }
 152         set_cpus_allowed(current, cpus_allowed);
 153
 154         /* notifiers */
 155         for_each_cpu_mask(i, affected_cpu_map) {
 156                 freqs.cpu = i;
 157                 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
 158         }
 159
 160         return 0;
 161 }
 162
 163
 164 static int cpufreq_p4_verify(struct cpufreq_policy *policy)
 165 {
 166         return cpufreq_frequency_table_verify(policy, &p4clockmod_table[0]);
 167 }
 168
 169
 170 static unsigned int cpufreq_p4_get_frequency(struct cpuinfo_x86 *c)
 171 {
 172         if ((c->x86 == 0x06) && (c->x86_model == 0x09)) {
 173                 /* Pentium M (Banias) */
 174                 printk(KERN_WARNING PFX "Warning: Pentium M detected. "
 175                        "The speedstep_centrino module offers voltage scaling"
 176                        " in addition of frequency scaling. You should use "
 177                        "that instead of p4-clockmod, if possible.\n");
 178                 return speedstep_get_processor_frequency(SPEEDSTEP_PROCESSOR_PM);
 179         }
 180
 181         if ((c->x86 == 0x06) && (c->x86_model == 0x13)) {
 182                 /* Pentium M (Dothan) */
 183                 printk(KERN_WARNING PFX "Warning: Pentium M detected. "
 184                        "The speedstep_centrino module offers voltage scaling"
 185                        " in addition of frequency scaling. You should use "
 186                        "that instead of p4-clockmod, if possible.\n");
 187                 /* on P-4s, the TSC runs with constant frequency independent whether
 188                  * throttling is active or not. */
 189                 p4clockmod_driver.flags |= CPUFREQ_CONST_LOOPS;
 190                 return speedstep_get_processor_frequency(SPEEDSTEP_PROCESSOR_PM);
 191         }
 192
 193         if (c->x86 != 0xF) {
 194                 printk(KERN_WARNING PFX "Unknown p4-clockmod-capable CPU. Please send an e-mail to <linux@brodo.de>\n");
 195                 return 0;
 196         }
 197
 198         /* on P-4s, the TSC runs with constant frequency independent whether
 199          * throttling is active or not. */
 200         p4clockmod_driver.flags |= CPUFREQ_CONST_LOOPS;
 201
 202         if (speedstep_detect_processor() == SPEEDSTEP_PROCESSOR_P4M) {
 203                 printk(KERN_WARNING PFX "Warning: Pentium 4-M detected. "
 204                        "The speedstep-ich or acpi cpufreq modules offer "
 205                        "voltage scaling in addition of frequency scaling. "
 206                        "You should use either one instead of p4-clockmod, "
 207                        "if possible.\n");
 208                 return speedstep_get_processor_frequency(SPEEDSTEP_PROCESSOR_P4M);
 209         }
 210
 211         return speedstep_get_processor_frequency(SPEEDSTEP_PROCESSOR_P4D);
 212 }
 213
 214
 215
 216 static int cpufreq_p4_cpu_init(struct cpufreq_policy *policy)
 217 {
 218         struct cpuinfo_x86 *c = &cpu_data[policy->cpu];
 219         int cpuid = 0;
 220         unsigned int i;
 221
 222         /* Errata workaround */
 223         cpuid = (c->x86 << 8) | (c->x86_model << 4) | c->x86_mask;
 224         switch (cpuid) {
 225         case 0x0f07:
 226         case 0x0f0a:
 227         case 0x0f11:
 228         case 0x0f12:
 229                 has_N44_O17_errata[policy->cpu] = 1;
 230         }
 231
 232         /* get max frequency */
 233         stock_freq = cpufreq_p4_get_frequency(c);
 234         if (!stock_freq)
 235                 return -EINVAL;
 236
 237         /* table init */
 238         for (i=1; (p4clockmod_table[i].frequency != CPUFREQ_TABLE_END); i++) {
 239                 if ((i<2) && (has_N44_O17_errata[policy->cpu]))
 240                         p4clockmod_table[i].frequency = CPUFREQ_ENTRY_INVALID;
 241                 else
 242                         p4clockmod_table[i].frequency = (stock_freq * i)/8;
 243         }
 244         cpufreq_frequency_table_get_attr(p4clockmod_table, policy->cpu);
 245
 246         /* cpuinfo and default policy values */
 247         policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
 248         policy->cpuinfo.transition_latency = 1000000; /* assumed */
 249         policy->cur = stock_freq;
 250
 251         return cpufreq_frequency_table_cpuinfo(policy, &p4clockmod_table[0]);
 252 }
 253
 254
 255 static int cpufreq_p4_cpu_exit(struct cpufreq_policy *policy)
 256 {
 257         cpufreq_frequency_table_put_attr(policy->cpu);
 258         return 0;
 259 }
 260
 261 static unsigned int cpufreq_p4_get(unsigned int cpu)
 262 {
 263         cpumask_t cpus_allowed, affected_cpu_map;
 264         u32 l, h;
 265
 266         cpus_allowed = current->cpus_allowed;
 267         affected_cpu_map = cpumask_of_cpu(cpu);
 268
 269         set_cpus_allowed(current, affected_cpu_map);
 270         BUG_ON(!cpu_isset(smp_processor_id(), affected_cpu_map));
 271
 272         rdmsr(MSR_IA32_THERM_CONTROL, l, h);
 273
 274         set_cpus_allowed(current, cpus_allowed);
 275
 276         if (l & 0x10) {
 277                 l = l >> 1;
 278                 l &= 0x7;
 279         } else
 280                 l = DC_DISABLE;
 281
 282         if (l != DC_DISABLE)
 283                 return (stock_freq * l / 8);
 284
 285         return stock_freq;
 286 }
 287
 288 static struct freq_attr* p4clockmod_attr[] = {
 289         &cpufreq_freq_attr_scaling_available_freqs,
 290         NULL,
 291 };
 292
 293 static struct cpufreq_driver p4clockmod_driver = {
 294         .verify         = cpufreq_p4_verify,
 295         .target         = cpufreq_p4_target,
 296         .init           = cpufreq_p4_cpu_init,
 297         .exit           = cpufreq_p4_cpu_exit,
 298         .get            = cpufreq_p4_get,
 299         .name           = "p4-clockmod",
 300         .owner          = THIS_MODULE,
 301         .attr           = p4clockmod_attr,
 302 };
 303
 304
 305 static int __init cpufreq_p4_init(void)
 306 {
 307         struct cpuinfo_x86 *c = cpu_data;
 308
 309         /*
 310          * THERM_CONTROL is architectural for IA32 now, so
 311          * we can rely on the capability checks
 312          */
 313         if (c->x86_vendor != X86_VENDOR_INTEL)
 314                 return -ENODEV;
 315
 316         if (!test_bit(X86_FEATURE_ACPI, c->x86_capability) ||
 317                 !test_bit(X86_FEATURE_ACC, c->x86_capability))
 318                 return -ENODEV;
 319
 320         printk(KERN_INFO PFX "P4/Xeon(TM) CPU On-Demand Clock Modulation available\n");
 321
 322         return cpufreq_register_driver(&p4clockmod_driver);
 323 }
 324
 325
 326 static void __exit cpufreq_p4_exit(void)
 327 {
 328         cpufreq_unregister_driver(&p4clockmod_driver);
 329 }
 330
 331
 332 MODULE_AUTHOR ("Zwane Mwaikambo <zwane@commfireservices.com>");
 333 MODULE_DESCRIPTION ("cpufreq driver for Pentium(TM) 4/Xeon(TM)");
 334 MODULE_LICENSE ("GPL");
 335
 336 late_initcall(cpufreq_p4_init);
 337 module_exit(cpufreq_p4_exit);
 338