arch/arm/mach-pxa/pxa27x.c

   1 /*
   2  *  linux/arch/arm/mach-pxa/pxa27x.c
   3  *
   4  *  Author:     Nicolas Pitre
   5  *  Created:    Nov 05, 2002
   6  *  Copyright:  MontaVista Software Inc.
   7  *
   8  * Code specific to PXA27x aka Bulverde.
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License version 2 as
  12  * published by the Free Software Foundation.
  13  */
  14 #include <linux/config.h>
  15 #include <linux/module.h>
  16 #include <linux/kernel.h>
  17 #include <asm/arch/pxa-regs.h>
  18 #include <linux/init.h>
  19 #include <linux/pm.h>
  20
  21 #include <asm/hardware.h>
  22
  23 #include "generic.h"
  24
  25 /* Crystal clock: 13MHz */
  26 #define BASE_CLK        13000000
  27
  28 /*
  29  * Get the clock frequency as reflected by CCSR and the turbo flag.
  30  * We assume these values have been applied via a fcs.
  31  * If info is not 0 we also display the current settings.
  32  */
  33 unsigned int get_clk_frequency_khz( int info)
  34 {
  35         unsigned long ccsr, clkcfg;
  36         unsigned int l, L, m, M, n2, N, S;
  37         int cccr_a, t, ht, b;
  38
  39         ccsr = CCSR;
  40         cccr_a = CCCR & (1 << 25);
  41
  42         /* Read clkcfg register: it has turbo, b, half-turbo (and f) */
  43         asm( "mrc\tp14, 0, %0, c6, c0, 0" : "=r" (clkcfg) );
  44         t  = clkcfg & (1 << 1);
  45         ht = clkcfg & (1 << 2);
  46         b  = clkcfg & (1 << 3);
  47
  48         l  = ccsr & 0x1f;
  49         n2 = (ccsr>>7) & 0xf;
  50         m  = (l <= 10) ? 1 : (l <= 20) ? 2 : 4;
  51
  52         L  = l * BASE_CLK;
  53         N  = (L * n2) / 2;
  54         M  = (!cccr_a) ? (L/m) : ((b) ? L : (L/2));
  55         S  = (b) ? L : (L/2);
  56
  57         if (info) {
  58                 printk( KERN_INFO "Run Mode clock: %d.%02dMHz (*%d)\n",
  59                         L / 1000000, (L % 1000000) / 10000, l );
  60                 printk( KERN_INFO "Turbo Mode clock: %d.%02dMHz (*%d.%d, %sactive)\n",
  61                         N / 1000000, (N % 1000000)/10000, n2 / 2, (n2 % 2)*5,
  62                         (t) ? "" : "in" );
  63                 printk( KERN_INFO "Memory clock: %d.%02dMHz (/%d)\n",
  64                         M / 1000000, (M % 1000000) / 10000, m );
  65                 printk( KERN_INFO "System bus clock: %d.%02dMHz \n",
  66                         S / 1000000, (S % 1000000) / 10000 );
  67         }
  68
  69         return (t) ? (N/1000) : (L/1000);
  70 }
  71
  72 /*
  73  * Return the current mem clock frequency in units of 10kHz as
  74  * reflected by CCCR[A], B, and L
  75  */
  76 unsigned int get_memclk_frequency_10khz(void)
  77 {
  78         unsigned long ccsr, clkcfg;
  79         unsigned int l, L, m, M;
  80         int cccr_a, b;
  81
  82         ccsr = CCSR;
  83         cccr_a = CCCR & (1 << 25);
  84
  85         /* Read clkcfg register: it has turbo, b, half-turbo (and f) */
  86         asm( "mrc\tp14, 0, %0, c6, c0, 0" : "=r" (clkcfg) );
  87         b = clkcfg & (1 << 3);
  88
  89         l = ccsr & 0x1f;
  90         m = (l <= 10) ? 1 : (l <= 20) ? 2 : 4;
  91
  92         L = l * BASE_CLK;
  93         M = (!cccr_a) ? (L/m) : ((b) ? L : (L/2));
  94
  95         return (M / 10000);
  96 }
  97
  98 /*
  99  * Return the current LCD clock frequency in units of 10kHz as
 100  */
 101 unsigned int get_lcdclk_frequency_10khz(void)
 102 {
 103         unsigned long ccsr;
 104         unsigned int l, L, k, K;
 105
 106         ccsr = CCSR;
 107
 108         l = ccsr & 0x1f;
 109         k = (l <= 7) ? 1 : (l <= 16) ? 2 : 4;
 110
 111         L = l * BASE_CLK;
 112         K = L / k;
 113
 114         return (K / 10000);
 115 }
 116
 117 EXPORT_SYMBOL(get_clk_frequency_khz);
 118 EXPORT_SYMBOL(get_memclk_frequency_10khz);
 119 EXPORT_SYMBOL(get_lcdclk_frequency_10khz);