arch/arm/mach-omap/mux.c

   1 /*
   2  * linux/arch/arm/mach-omap/mux.c
   3  *
   4  * Utility to set the Omap MUX and PULL_DWN registers from a table in mux.h
   5  *
   6  * Copyright (C) 2003 Nokia Corporation
   7  *
   8  * Written by Tony Lindgren <tony.lindgren@nokia.com>
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License as published by
  12  * the Free Software Foundation; either version 2 of the License, or
  13  * (at your option) any later version.
  14  *
  15  * This program is distributed in the hope that it will be useful,
  16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18  * GNU General Public License for more details.
  19  *
  20  * You should have received a copy of the GNU General Public License
  21  * along with this program; if not, write to the Free Software
  22  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  23  *
  24  */
  25 #include <linux/config.h>
  26 #include <linux/module.h>
  27 #include <linux/init.h>
  28 #include <asm/system.h>
  29 #include <asm/io.h>
  30 #include <linux/spinlock.h>
  31
  32 #define __MUX_C__
  33 #include <asm/arch/mux.h>
  34
  35 /*
  36  * Sets the Omap MUX and PULL_DWN registers based on the table
  37  */
  38 int omap_cfg_reg(const reg_cfg_t reg_cfg)
  39 {
  40 #ifdef CONFIG_OMAP_MUX
  41         static spinlock_t mux_spin_lock = SPIN_LOCK_UNLOCKED;
  42
  43         unsigned long flags;
  44         reg_cfg_set *cfg;
  45         unsigned int reg_orig = 0, reg = 0, pu_pd_orig = 0, pu_pd = 0,
  46                 pull_orig = 0, pull = 0;
  47
  48         cfg = &reg_cfg_table[reg_cfg];
  49
  50         /*
  51          * We do a pretty long section here with lock on, but pin muxing
  52          * should only happen on driver init for each driver, so it's not time
  53          * critical.
  54          */
  55         spin_lock_irqsave(&mux_spin_lock, flags);
  56
  57         /* Check the mux register in question */
  58         if (cfg->mux_reg) {
  59                 reg_orig = omap_readl(cfg->mux_reg);
  60
  61                 /* The mux registers always seem to be 3 bits long */
  62                 reg = reg_orig & ~(0x7 << cfg->mask_offset);
  63
  64                 reg |= (cfg->mask << cfg->mask_offset);
  65
  66                 omap_writel(reg, cfg->mux_reg);
  67         }
  68
  69         /* Check for pull up or pull down selection on 1610 */
  70         if (!cpu_is_omap1510()) {
  71                 if (cfg->pu_pd_reg && cfg->pull_val) {
  72                         pu_pd_orig = omap_readl(cfg->pu_pd_reg);
  73                         if (cfg->pu_pd_val) {
  74                                 /* Use pull up */
  75                                 pu_pd = pu_pd_orig | (1 << cfg->pull_bit);
  76                         } else {
  77                                 /* Use pull down */
  78                                 pu_pd = pu_pd_orig & ~(1 << cfg->pull_bit);
  79                         }
  80                         omap_writel(pu_pd, cfg->pu_pd_reg);
  81                 }
  82         }
  83
  84         /* Check for an associated pull down register */
  85         if (cfg->pull_reg) {
  86                 pull_orig = omap_readl(cfg->pull_reg);
  87
  88                 if (cfg->pull_val) {
  89                         /* Low bit = pull enabled */
  90                         pull = pull_orig & ~(1 << cfg->pull_bit);
  91                 } else {
  92                         /* High bit = pull disabled */
  93                         pull = pull_orig | (1 << cfg->pull_bit);
  94                 }
  95
  96                 omap_writel(pull, cfg->pull_reg);
  97         }
  98
  99 #ifdef CONFIG_OMAP_MUX_DEBUG
 100         if (cfg->debug) {
 101                 printk("Omap: Setting register %s\n", cfg->name);
 102                 printk("      %s (0x%08x) = 0x%08x -> 0x%08x\n",
 103                        cfg->mux_reg_name, cfg->mux_reg, reg_orig, reg);
 104
 105                 if (!cpu_is_omap1510()) {
 106                         if (cfg->pu_pd_reg && cfg->pull_val) {
 107                                 printk("      %s (0x%08x) = 0x%08x -> 0x%08x\n",
 108                                        cfg->pu_pd_name, cfg->pu_pd_reg,
 109                                        pu_pd_orig, pu_pd);
 110                         }
 111                 }
 112
 113                 if (cfg->pull_reg)
 114                         printk("      %s (0x%08x) = 0x%08x -> 0x%08x\n",
 115                                cfg->pull_name, cfg->pull_reg, pull_orig, pull);
 116         }
 117 #endif
 118
 119         spin_unlock_irqrestore(&mux_spin_lock, flags);
 120
 121 #endif
 122         return 0;
 123 }
 124
 125 EXPORT_SYMBOL(omap_cfg_reg);