MOXA linux-2.6.x / linux-2.6.9-uc0 from sdlinux-moxaart.tgz
[linux-2.6.9-moxart.git] / drivers / scsi / oktagon_esp.c
blobcd9e2c66a229fa7228af1c72ecb519dbebfa4a86
1 /*
2 * Oktagon_esp.c -- Driver for bsc Oktagon
4 * Written by Carsten Pluntke 1998
6 * Based on cyber_esp.c
7 */
9 #include <linux/config.h>
11 #if defined(CONFIG_AMIGA) || defined(CONFIG_APUS)
12 #define USE_BOTTOM_HALF
13 #endif
15 #include <linux/module.h>
17 #include <linux/kernel.h>
18 #include <linux/delay.h>
19 #include <linux/types.h>
20 #include <linux/string.h>
21 #include <linux/slab.h>
22 #include <linux/blkdev.h>
23 #include <linux/proc_fs.h>
24 #include <linux/stat.h>
25 #include <linux/reboot.h>
26 #include <asm/system.h>
27 #include <asm/ptrace.h>
28 #include <asm/pgtable.h>
31 #include "scsi.h"
32 #include <scsi/scsi_host.h>
33 #include "NCR53C9x.h"
35 #include <linux/zorro.h>
36 #include <asm/irq.h>
37 #include <asm/amigaints.h>
38 #include <asm/amigahw.h>
40 #ifdef USE_BOTTOM_HALF
41 #include <linux/workqueue.h>
42 #include <linux/interrupt.h>
43 #endif
45 /* The controller registers can be found in the Z2 config area at these
46 * offsets:
48 #define OKTAGON_ESP_ADDR 0x03000
49 #define OKTAGON_DMA_ADDR 0x01000
52 static int dma_bytes_sent(struct NCR_ESP *esp, int fifo_count);
53 static int dma_can_transfer(struct NCR_ESP *esp, Scsi_Cmnd *sp);
54 static void dma_dump_state(struct NCR_ESP *esp);
55 static void dma_init_read(struct NCR_ESP *esp, __u32 vaddress, int length);
56 static void dma_init_write(struct NCR_ESP *esp, __u32 vaddress, int length);
57 static void dma_ints_off(struct NCR_ESP *esp);
58 static void dma_ints_on(struct NCR_ESP *esp);
59 static int dma_irq_p(struct NCR_ESP *esp);
60 static void dma_led_off(struct NCR_ESP *esp);
61 static void dma_led_on(struct NCR_ESP *esp);
62 static int dma_ports_p(struct NCR_ESP *esp);
63 static void dma_setup(struct NCR_ESP *esp, __u32 addr, int count, int write);
65 static void dma_irq_exit(struct NCR_ESP *esp);
66 static void dma_invalidate(struct NCR_ESP *esp);
68 static void dma_mmu_get_scsi_one(struct NCR_ESP *,Scsi_Cmnd *);
69 static void dma_mmu_get_scsi_sgl(struct NCR_ESP *,Scsi_Cmnd *);
70 static void dma_mmu_release_scsi_one(struct NCR_ESP *,Scsi_Cmnd *);
71 static void dma_mmu_release_scsi_sgl(struct NCR_ESP *,Scsi_Cmnd *);
72 static void dma_advance_sg(Scsi_Cmnd *);
73 static int oktagon_notify_reboot(struct notifier_block *this, unsigned long code, void *x);
75 void esp_bootup_reset(struct NCR_ESP *esp,struct ESP_regs *eregs);
77 #ifdef USE_BOTTOM_HALF
78 static void dma_commit(void *opaque);
80 long oktag_to_io(long *paddr, long *addr, long len);
81 long oktag_from_io(long *addr, long *paddr, long len);
83 static DECLARE_WORK(tq_fake_dma, dma_commit, NULL);
85 #define DMA_MAXTRANSFER 0x8000
87 #else
90 * No bottom half. Use transfer directly from IRQ. Find a narrow path
91 * between too much IRQ overhead and clogging the IRQ for too long.
94 #define DMA_MAXTRANSFER 0x1000
96 #endif
98 static struct notifier_block oktagon_notifier = {
99 oktagon_notify_reboot,
100 NULL,
104 static long *paddress;
105 static long *address;
106 static long len;
107 static long dma_on;
108 static int direction;
109 static struct NCR_ESP *current_esp;
112 static volatile unsigned char cmd_buffer[16];
113 /* This is where all commands are put
114 * before they are trasfered to the ESP chip
115 * via PIO.
118 /***************************************************************** Detection */
119 int oktagon_esp_detect(Scsi_Host_Template *tpnt)
121 struct NCR_ESP *esp;
122 struct zorro_dev *z = NULL;
123 unsigned long address;
124 struct ESP_regs *eregs;
126 while ((z = zorro_find_device(ZORRO_PROD_BSC_OKTAGON_2008, z))) {
127 unsigned long board = z->resource.start;
128 if (request_mem_region(board+OKTAGON_ESP_ADDR,
129 sizeof(struct ESP_regs), "NCR53C9x")) {
131 * It is a SCSI controller.
132 * Hardwire Host adapter to SCSI ID 7
135 address = (unsigned long)ZTWO_VADDR(board);
136 eregs = (struct ESP_regs *)(address + OKTAGON_ESP_ADDR);
138 /* This line was 5 lines lower */
139 esp = esp_allocate(tpnt, (void *)board+OKTAGON_ESP_ADDR);
141 /* we have to shift the registers only one bit for oktagon */
142 esp->shift = 1;
144 esp_write(eregs->esp_cfg1, (ESP_CONFIG1_PENABLE | 7));
145 udelay(5);
146 if (esp_read(eregs->esp_cfg1) != (ESP_CONFIG1_PENABLE | 7))
147 return 0; /* Bail out if address did not hold data */
149 /* Do command transfer with programmed I/O */
150 esp->do_pio_cmds = 1;
152 /* Required functions */
153 esp->dma_bytes_sent = &dma_bytes_sent;
154 esp->dma_can_transfer = &dma_can_transfer;
155 esp->dma_dump_state = &dma_dump_state;
156 esp->dma_init_read = &dma_init_read;
157 esp->dma_init_write = &dma_init_write;
158 esp->dma_ints_off = &dma_ints_off;
159 esp->dma_ints_on = &dma_ints_on;
160 esp->dma_irq_p = &dma_irq_p;
161 esp->dma_ports_p = &dma_ports_p;
162 esp->dma_setup = &dma_setup;
164 /* Optional functions */
165 esp->dma_barrier = 0;
166 esp->dma_drain = 0;
167 esp->dma_invalidate = &dma_invalidate;
168 esp->dma_irq_entry = 0;
169 esp->dma_irq_exit = &dma_irq_exit;
170 esp->dma_led_on = &dma_led_on;
171 esp->dma_led_off = &dma_led_off;
172 esp->dma_poll = 0;
173 esp->dma_reset = 0;
175 esp->dma_mmu_get_scsi_one = &dma_mmu_get_scsi_one;
176 esp->dma_mmu_get_scsi_sgl = &dma_mmu_get_scsi_sgl;
177 esp->dma_mmu_release_scsi_one = &dma_mmu_release_scsi_one;
178 esp->dma_mmu_release_scsi_sgl = &dma_mmu_release_scsi_sgl;
179 esp->dma_advance_sg = &dma_advance_sg;
181 /* SCSI chip speed */
182 /* Looking at the quartz of the SCSI board... */
183 esp->cfreq = 25000000;
185 /* The DMA registers on the CyberStorm are mapped
186 * relative to the device (i.e. in the same Zorro
187 * I/O block).
189 esp->dregs = (void *)(address + OKTAGON_DMA_ADDR);
191 paddress = (long *) esp->dregs;
193 /* ESP register base */
194 esp->eregs = eregs;
196 /* Set the command buffer */
197 esp->esp_command = (volatile unsigned char*) cmd_buffer;
199 /* Yes, the virtual address. See below. */
200 esp->esp_command_dvma = (__u32) cmd_buffer;
202 esp->irq = IRQ_AMIGA_PORTS;
203 request_irq(IRQ_AMIGA_PORTS, esp_intr, SA_SHIRQ,
204 "BSC Oktagon SCSI", esp->ehost);
206 /* Figure out our scsi ID on the bus */
207 esp->scsi_id = 7;
209 /* We don't have a differential SCSI-bus. */
210 esp->diff = 0;
212 esp_initialize(esp);
214 printk("ESP_Oktagon Driver 1.1"
215 #ifdef USE_BOTTOM_HALF
216 " [BOTTOM_HALF]"
217 #else
218 " [IRQ]"
219 #endif
220 " registered.\n");
221 printk("ESP: Total of %d ESP hosts found, %d actually in use.\n", nesps,esps_in_use);
222 esps_running = esps_in_use;
223 current_esp = esp;
224 register_reboot_notifier(&oktagon_notifier);
225 return esps_in_use;
228 return 0;
233 * On certain configurations the SCSI equipment gets confused on reboot,
234 * so we have to reset it then.
237 static int
238 oktagon_notify_reboot(struct notifier_block *this, unsigned long code, void *x)
240 struct NCR_ESP *esp;
242 if((code == SYS_DOWN || code == SYS_HALT) && (esp = current_esp))
244 esp_bootup_reset(esp,esp->eregs);
245 udelay(500); /* Settle time. Maybe unnecessary. */
247 return NOTIFY_DONE;
252 #ifdef USE_BOTTOM_HALF
256 * The bsc Oktagon controller has no real DMA, so we have to do the 'DMA
257 * transfer' in the interrupt (Yikes!) or use a bottom half to not to clutter
258 * IRQ's for longer-than-good.
260 * FIXME
261 * BIG PROBLEM: 'len' is usually the buffer length, not the expected length
262 * of the data. So DMA may finish prematurely, further reads lead to
263 * 'machine check' on APUS systems (don't know about m68k systems, AmigaOS
264 * deliberately ignores the bus faults) and a normal copy-loop can't
265 * be exited prematurely just at the right moment by the dma_invalidate IRQ.
266 * So do it the hard way, write an own copier in assembler and
267 * catch the exception.
268 * -- Carsten
272 static void dma_commit(void *opaque)
274 long wait,len2,pos;
275 struct NCR_ESP *esp;
277 ESPDATA(("Transfer: %ld bytes, Address 0x%08lX, Direction: %d\n",
278 len,(long) address,direction));
279 dma_ints_off(current_esp);
281 pos = 0;
282 wait = 1;
283 if(direction) /* write? (memory to device) */
285 while(len > 0)
287 len2 = oktag_to_io(paddress, address+pos, len);
288 if(!len2)
290 if(wait > 1000)
292 printk("Expedited DMA exit (writing) %ld\n",len);
293 break;
295 mdelay(wait);
296 wait *= 2;
298 pos += len2;
299 len -= len2*sizeof(long);
301 } else {
302 while(len > 0)
304 len2 = oktag_from_io(address+pos, paddress, len);
305 if(!len2)
307 if(wait > 1000)
309 printk("Expedited DMA exit (reading) %ld\n",len);
310 break;
312 mdelay(wait);
313 wait *= 2;
315 pos += len2;
316 len -= len2*sizeof(long);
320 /* to make esp->shift work */
321 esp=current_esp;
323 #if 0
324 len2 = (esp_read(current_esp->eregs->esp_tclow) & 0xff) |
325 ((esp_read(current_esp->eregs->esp_tcmed) & 0xff) << 8);
328 * Uh uh. If you see this, len and transfer count registers were out of
329 * sync. That means really serious trouble.
332 if(len2)
333 printk("Eeeek!! Transfer count still %ld!\n",len2);
334 #endif
337 * Normally we just need to exit and wait for the interrupt to come.
338 * But at least one device (my Microtek ScanMaker 630) regularly mis-
339 * calculates the bytes it should send which is really ugly because
340 * it locks up the SCSI bus if not accounted for.
343 if(!(esp_read(current_esp->eregs->esp_status) & ESP_STAT_INTR))
345 long len = 100;
346 long trash[10];
349 * Interrupt bit was not set. Either the device is just plain lazy
350 * so we give it a 10 ms chance or...
352 while(len-- && (!(esp_read(current_esp->eregs->esp_status) & ESP_STAT_INTR)))
353 udelay(100);
356 if(!(esp_read(current_esp->eregs->esp_status) & ESP_STAT_INTR))
359 * So we think that the transfer count is out of sync. Since we
360 * have all we want we are happy and can ditch the trash.
363 len = DMA_MAXTRANSFER;
365 while(len-- && (!(esp_read(current_esp->eregs->esp_status) & ESP_STAT_INTR)))
366 oktag_from_io(trash,paddress,2);
368 if(!(esp_read(current_esp->eregs->esp_status) & ESP_STAT_INTR))
371 * Things really have gone wrong. If we leave the system in that
372 * state, the SCSI bus is locked forever. I hope that this will
373 * turn the system in a more or less running state.
375 printk("Device is bolixed, trying bus reset...\n");
376 esp_bootup_reset(current_esp,current_esp->eregs);
381 ESPDATA(("Transfer_finale: do_data_finale should come\n"));
383 len = 0;
384 dma_on = 0;
385 dma_ints_on(current_esp);
388 #endif
390 /************************************************************* DMA Functions */
391 static int dma_bytes_sent(struct NCR_ESP *esp, int fifo_count)
393 /* Since the CyberStorm DMA is fully dedicated to the ESP chip,
394 * the number of bytes sent (to the ESP chip) equals the number
395 * of bytes in the FIFO - there is no buffering in the DMA controller.
396 * XXXX Do I read this right? It is from host to ESP, right?
398 return fifo_count;
401 static int dma_can_transfer(struct NCR_ESP *esp, Scsi_Cmnd *sp)
403 unsigned long sz = sp->SCp.this_residual;
404 if(sz > DMA_MAXTRANSFER)
405 sz = DMA_MAXTRANSFER;
406 return sz;
409 static void dma_dump_state(struct NCR_ESP *esp)
414 * What the f$@& is this?
416 * Some SCSI devices (like my Microtek ScanMaker 630 scanner) want to transfer
417 * more data than requested. How much? Dunno. So ditch the bogus data into
418 * the sink, hoping the device will advance to the next phase sooner or later.
420 * -- Carsten
423 static long oktag_eva_buffer[16]; /* The data sink */
425 static void oktag_check_dma(void)
427 struct NCR_ESP *esp;
429 esp=current_esp;
430 if(!len)
432 address = oktag_eva_buffer;
433 len = 2;
434 /* esp_do_data sets them to zero like len */
435 esp_write(current_esp->eregs->esp_tclow,2);
436 esp_write(current_esp->eregs->esp_tcmed,0);
440 static void dma_init_read(struct NCR_ESP *esp, __u32 vaddress, int length)
442 /* Zorro is noncached, everything else done using processor. */
443 /* cache_clear(addr, length); */
445 if(dma_on)
446 panic("dma_init_read while dma process is initialized/running!\n");
447 direction = 0;
448 address = (long *) vaddress;
449 current_esp = esp;
450 len = length;
451 oktag_check_dma();
452 dma_on = 1;
455 static void dma_init_write(struct NCR_ESP *esp, __u32 vaddress, int length)
457 /* cache_push(addr, length); */
459 if(dma_on)
460 panic("dma_init_write while dma process is initialized/running!\n");
461 direction = 1;
462 address = (long *) vaddress;
463 current_esp = esp;
464 len = length;
465 oktag_check_dma();
466 dma_on = 1;
469 static void dma_ints_off(struct NCR_ESP *esp)
471 disable_irq(esp->irq);
474 static void dma_ints_on(struct NCR_ESP *esp)
476 enable_irq(esp->irq);
479 static int dma_irq_p(struct NCR_ESP *esp)
481 /* It's important to check the DMA IRQ bit in the correct way! */
482 return (esp_read(esp->eregs->esp_status) & ESP_STAT_INTR);
485 static void dma_led_off(struct NCR_ESP *esp)
489 static void dma_led_on(struct NCR_ESP *esp)
493 static int dma_ports_p(struct NCR_ESP *esp)
495 return ((custom.intenar) & IF_PORTS);
498 static void dma_setup(struct NCR_ESP *esp, __u32 addr, int count, int write)
500 /* On the Sparc, DMA_ST_WRITE means "move data from device to memory"
501 * so when (write) is true, it actually means READ!
503 if(write){
504 dma_init_read(esp, addr, count);
505 } else {
506 dma_init_write(esp, addr, count);
511 * IRQ entry when DMA transfer is ready to be started
514 static void dma_irq_exit(struct NCR_ESP *esp)
516 #ifdef USE_BOTTOM_HALF
517 if(dma_on)
519 schedule_work(&tq_fake_dma);
521 #else
522 while(len && !dma_irq_p(esp))
524 if(direction)
525 *paddress = *address++;
526 else
527 *address++ = *paddress;
528 len -= (sizeof(long));
530 len = 0;
531 dma_on = 0;
532 #endif
536 * IRQ entry when DMA has just finished
539 static void dma_invalidate(struct NCR_ESP *esp)
544 * Since the processor does the data transfer we have to use the custom
545 * mmu interface to pass the virtual address, not the physical.
548 void dma_mmu_get_scsi_one(struct NCR_ESP *esp, Scsi_Cmnd *sp)
550 sp->SCp.ptr =
551 sp->request_buffer;
554 void dma_mmu_get_scsi_sgl(struct NCR_ESP *esp, Scsi_Cmnd *sp)
556 sp->SCp.ptr = page_address(sp->SCp.buffer->page)+
557 sp->SCp.buffer->offset;
560 void dma_mmu_release_scsi_one(struct NCR_ESP *esp, Scsi_Cmnd *sp)
564 void dma_mmu_release_scsi_sgl(struct NCR_ESP *esp, Scsi_Cmnd *sp)
568 void dma_advance_sg(Scsi_Cmnd *sp)
570 sp->SCp.ptr = page_address(sp->SCp.buffer->page)+
571 sp->SCp.buffer->offset;
575 #define HOSTS_C
577 int oktagon_esp_release(struct Scsi_Host *instance)
579 #ifdef MODULE
580 unsigned long address = (unsigned long)((struct NCR_ESP *)instance->hostdata)->edev;
581 esp_release();
582 release_mem_region(address, sizeof(struct ESP_regs));
583 free_irq(IRQ_AMIGA_PORTS, esp_intr);
584 unregister_reboot_notifier(&oktagon_notifier);
585 #endif
586 return 1;
590 static Scsi_Host_Template driver_template = {
591 .proc_name = "esp-oktagon",
592 .proc_info = &esp_proc_info,
593 .name = "BSC Oktagon SCSI",
594 .detect = oktagon_esp_detect,
595 .slave_alloc = esp_slave_alloc,
596 .slave_destroy = esp_slave_destroy,
597 .release = oktagon_esp_release,
598 .queuecommand = esp_queue,
599 .eh_abort_handler = esp_abort,
600 .eh_bus_reset_handler = esp_reset,
601 .can_queue = 7,
602 .this_id = 7,
603 .sg_tablesize = SG_ALL,
604 .cmd_per_lun = 1,
605 .use_clustering = ENABLE_CLUSTERING
609 #include "scsi_module.c"
611 MODULE_LICENSE("GPL");