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MOXA linux-2.6.x / linux-2.6.9-uc0 from sdlinux-moxaart.tgz
[linux-2.6.9-moxart.git] / drivers / scsi / nsp32.c
blob9735d05ad5327e1879fd31b375588307a434cb67
1 /*
2 * NinjaSCSI-32Bi Cardbus, NinjaSCSI-32UDE PCI/CardBus SCSI driver
3 * Copyright (C) 2001, 2002, 2003
4 * YOKOTA Hiroshi <yokota@netlab.is.tsukuba.ac.jp>
5 * GOTO Masanori <gotom@debian.or.jp>, <gotom@debian.org>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2, or (at your option)
10 * any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 *
18 * Revision History:
19 * 1.0: Initial Release.
20 * 1.1: Add /proc SDTR status.
21 * Remove obsolete error handler nsp32_reset.
22 * Some clean up.
23 * 1.2: PowerPC (big endian) support.
24 */
25
26 #include <linux/version.h>
27 #include <linux/module.h>
28 #include <linux/init.h>
29 #include <linux/kernel.h>
30 #include <linux/sched.h>
31 #include <linux/slab.h>
32 #include <linux/string.h>
33 #include <linux/timer.h>
34 #include <linux/ioport.h>
35 #include <linux/major.h>
36 #include <linux/blkdev.h>
37 #include <linux/interrupt.h>
38 #include <linux/pci.h>
39 #include <linux/delay.h>
40 #include <linux/ctype.h>
41
42 #include <asm/dma.h>
43 #include <asm/system.h>
44 #include <asm/io.h>
45
46 #include "scsi.h"
47 #include <scsi/scsi_host.h>
48 #include <scsi/scsi_ioctl.h>
49 #include <scsi/scsi.h>
50
51 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0))
52 # include <linux/blk.h>
53 #endif
54
55 #include "nsp32.h"
56
57
58 /***********************************************************************
59 * Module parameters
60 */
61 static int trans_mode = 0; /* default: BIOS */
62 MODULE_PARM (trans_mode, "i");
63 MODULE_PARM_DESC(trans_mode, "transfer mode (0: BIOS(default) 1: Async 2: Ultra20M");
64 #define ASYNC_MODE 1
65 #define ULTRA20M_MODE 2
66
67 static int auto_param = 0; /* default: ON */
68 MODULE_PARM (auto_param, "i");
69 MODULE_PARM_DESC(auto_param, "AutoParameter mode (0: ON(default) 1: OFF)");
70
71 static int disc_priv = 1; /* default: OFF */
72 MODULE_PARM (disc_priv, "i");
73 MODULE_PARM_DESC(disc_priv, "disconnection privilege mode (0: ON 1: OFF(default))");
74
75 MODULE_AUTHOR("YOKOTA Hiroshi <yokota@netlab.is.tsukuba.ac.jp>, GOTO Masanori <gotom@debian.or.jp>");
76 MODULE_DESCRIPTION("Workbit NinjaSCSI-32Bi/UDE CardBus/PCI SCSI host bus adapter module");
77 MODULE_LICENSE("GPL");
78
79 static const char *nsp32_release_version = "1.2";
80
81
82 /****************************************************************************
83 * Supported hardware
84 */
85 static struct pci_device_id nsp32_pci_table[] __devinitdata = {
86 {
87 .vendor = PCI_VENDOR_ID_IODATA,
88 .device = PCI_DEVICE_ID_NINJASCSI_32BI_CBSC_II,
89 .subvendor = PCI_ANY_ID,
90 .subdevice = PCI_ANY_ID,
91 .driver_data = MODEL_IODATA,
92 },
93 {
94 .vendor = PCI_VENDOR_ID_WORKBIT,
95 .device = PCI_DEVICE_ID_NINJASCSI_32BI_KME,
96 .subvendor = PCI_ANY_ID,
97 .subdevice = PCI_ANY_ID,
98 .driver_data = MODEL_KME,
99 },
100 {
101 .vendor = PCI_VENDOR_ID_WORKBIT,
102 .device = PCI_DEVICE_ID_NINJASCSI_32BI_WBT,
103 .subvendor = PCI_ANY_ID,
104 .subdevice = PCI_ANY_ID,
105 .driver_data = MODEL_WORKBIT,
106 },
107 {
108 .vendor = PCI_VENDOR_ID_WORKBIT,
109 .device = PCI_DEVICE_ID_WORKBIT_STANDARD,
110 .subvendor = PCI_ANY_ID,
111 .subdevice = PCI_ANY_ID,
112 .driver_data = MODEL_PCI_WORKBIT,
113 },
114 {
115 .vendor = PCI_VENDOR_ID_WORKBIT,
116 .device = PCI_DEVICE_ID_NINJASCSI_32BI_LOGITEC,
117 .subvendor = PCI_ANY_ID,
118 .subdevice = PCI_ANY_ID,
119 .driver_data = MODEL_LOGITEC,
120 },
121 {
122 .vendor = PCI_VENDOR_ID_WORKBIT,
123 .device = PCI_DEVICE_ID_NINJASCSI_32BIB_LOGITEC,
124 .subvendor = PCI_ANY_ID,
125 .subdevice = PCI_ANY_ID,
126 .driver_data = MODEL_PCI_LOGITEC,
127 },
128 {
129 .vendor = PCI_VENDOR_ID_WORKBIT,
130 .device = PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO,
131 .subvendor = PCI_ANY_ID,
132 .subdevice = PCI_ANY_ID,
133 .driver_data = MODEL_PCI_MELCO,
134 },
135 {
136 .vendor = PCI_VENDOR_ID_WORKBIT,
137 .device = PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO_II,
138 .subvendor = PCI_ANY_ID,
139 .subdevice = PCI_ANY_ID,
140 .driver_data = MODEL_PCI_MELCO,
141 },
142 {0,0,},
143 };
144 MODULE_DEVICE_TABLE(pci, nsp32_pci_table);
145
146 static nsp32_hw_data nsp32_data_base; /* probe <-> detect glue */
147
148
149 /*
150 * Period/AckWidth speed conversion table
151 *
152 * Note: This period/ackwidth speed table must be in descending order.
153 */
154 static nsp32_sync_table nsp32_sync_table_40M[] = {
155 /* {PNo, AW, SP, EP, SREQ smpl} Speed(MB/s) Period AckWidth */
156 {0x1, 0, 0x0c, 0x0c, SMPL_40M}, /* 20.0 : 50ns, 25ns */
157 {0x2, 0, 0x0d, 0x18, SMPL_40M}, /* 13.3 : 75ns, 25ns */
158 {0x3, 1, 0x19, 0x19, SMPL_40M}, /* 10.0 : 100ns, 50ns */
159 {0x4, 1, 0x1a, 0x1f, SMPL_20M}, /* 8.0 : 125ns, 50ns */
160 {0x5, 2, 0x20, 0x25, SMPL_20M}, /* 6.7 : 150ns, 75ns */
161 {0x6, 2, 0x26, 0x31, SMPL_20M}, /* 5.7 : 175ns, 75ns */
162 {0x7, 3, 0x32, 0x32, SMPL_20M}, /* 5.0 : 200ns, 100ns */
163 {0x8, 3, 0x33, 0x38, SMPL_10M}, /* 4.4 : 225ns, 100ns */
164 {0x9, 3, 0x39, 0x3e, SMPL_10M}, /* 4.0 : 250ns, 100ns */
165 };
166
167 static nsp32_sync_table nsp32_sync_table_20M[] = {
168 {0x1, 0, 0x19, 0x19, SMPL_40M}, /* 10.0 : 100ns, 50ns */
169 {0x2, 0, 0x1a, 0x25, SMPL_20M}, /* 6.7 : 150ns, 50ns */
170 {0x3, 1, 0x26, 0x32, SMPL_20M}, /* 5.0 : 200ns, 100ns */
171 {0x4, 1, 0x33, 0x3e, SMPL_10M}, /* 4.0 : 250ns, 100ns */
172 {0x5, 2, 0x3f, 0x4b, SMPL_10M}, /* 3.3 : 300ns, 150ns */
173 {0x6, 2, 0x4c, 0x57, SMPL_10M}, /* 2.8 : 350ns, 150ns */
174 {0x7, 3, 0x58, 0x64, SMPL_10M}, /* 2.5 : 400ns, 200ns */
175 {0x8, 3, 0x65, 0x70, SMPL_10M}, /* 2.2 : 450ns, 200ns */
176 {0x9, 3, 0x71, 0x7d, SMPL_10M}, /* 2.0 : 500ns, 200ns */
177 };
178
179 static nsp32_sync_table nsp32_sync_table_pci[] = {
180 {0x1, 0, 0x0c, 0x0f, SMPL_40M}, /* 16.6 : 60ns, 30ns */
181 {0x2, 0, 0x10, 0x16, SMPL_40M}, /* 11.1 : 90ns, 30ns */
182 {0x3, 1, 0x17, 0x1e, SMPL_20M}, /* 8.3 : 120ns, 60ns */
183 {0x4, 1, 0x1f, 0x25, SMPL_20M}, /* 6.7 : 150ns, 60ns */
184 {0x5, 2, 0x26, 0x2d, SMPL_20M}, /* 5.6 : 180ns, 90ns */
185 {0x6, 2, 0x2e, 0x34, SMPL_10M}, /* 4.8 : 210ns, 90ns */
186 {0x7, 3, 0x35, 0x3c, SMPL_10M}, /* 4.2 : 240ns, 120ns */
187 {0x8, 3, 0x3d, 0x43, SMPL_10M}, /* 3.7 : 270ns, 120ns */
188 {0x9, 3, 0x44, 0x4b, SMPL_10M}, /* 3.3 : 300ns, 120ns */
189 };
190
191 /*
192 * function declaration
193 */
194 /* module entry point */
195 static int __devinit nsp32_probe (struct pci_dev *, const struct pci_device_id *);
196 static void __devexit nsp32_remove(struct pci_dev *);
197 static int __init init_nsp32 (void);
198 static void __exit exit_nsp32 (void);
199
200 /* struct Scsi_Host_Template */
201 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73))
202 static int nsp32_proc_info (struct Scsi_Host *, char *, char **, off_t, int, int);
203 #else
204 static int nsp32_proc_info (char *, char **, off_t, int, int, int);
205 #endif
206
207 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73))
208 static int nsp32_detect (struct pci_dev *pdev);
209 #else
210 static int nsp32_detect (Scsi_Host_Template *);
211 #endif
212 static int nsp32_queuecommand(Scsi_Cmnd *, void (*done)(Scsi_Cmnd *));
213 static const char *nsp32_info (struct Scsi_Host *);
214 static int nsp32_release (struct Scsi_Host *);
215
216 /* SCSI error handler */
217 static int nsp32_eh_abort (Scsi_Cmnd *);
218 static int nsp32_eh_bus_reset (Scsi_Cmnd *);
219 static int nsp32_eh_host_reset(Scsi_Cmnd *);
220
221 /* generate SCSI message */
222 static void nsp32_build_identify(Scsi_Cmnd *);
223 static void nsp32_build_nop (Scsi_Cmnd *);
224 static void nsp32_build_reject (Scsi_Cmnd *);
225 static void nsp32_build_sdtr (Scsi_Cmnd *, unsigned char, unsigned char);
226
227 /* SCSI message handler */
228 static int nsp32_busfree_occur(Scsi_Cmnd *, unsigned short);
229 static void nsp32_msgout_occur (Scsi_Cmnd *);
230 static void nsp32_msgin_occur (Scsi_Cmnd *, unsigned long, unsigned short);
231
232 static int nsp32_setup_sg_table (Scsi_Cmnd *);
233 static int nsp32_selection_autopara(Scsi_Cmnd *);
234 static int nsp32_selection_autoscsi(Scsi_Cmnd *);
235 static void nsp32_scsi_done (Scsi_Cmnd *);
236 static int nsp32_arbitration (Scsi_Cmnd *, unsigned int);
237 static int nsp32_reselection (Scsi_Cmnd *, unsigned char);
238 static void nsp32_adjust_busfree (Scsi_Cmnd *, unsigned int);
239 static void nsp32_restart_autoscsi (Scsi_Cmnd *, unsigned short);
240
241 /* SCSI SDTR */
242 static void nsp32_analyze_sdtr (Scsi_Cmnd *);
243 static int nsp32_search_period_entry(nsp32_hw_data *, nsp32_target *, unsigned char);
244 static void nsp32_set_async (nsp32_hw_data *, nsp32_target *);
245 static void nsp32_set_max_sync (nsp32_hw_data *, nsp32_target *, unsigned char *, unsigned char *);
246 static void nsp32_set_sync_entry (nsp32_hw_data *, nsp32_target *, int, unsigned char);
247
248 /* SCSI bus status handler */
249 static void nsp32_wait_req (nsp32_hw_data *, int);
250 static void nsp32_wait_sack (nsp32_hw_data *, int);
251 static void nsp32_sack_assert (nsp32_hw_data *);
252 static void nsp32_sack_negate (nsp32_hw_data *);
253 static void nsp32_do_bus_reset(nsp32_hw_data *);
254
255 /* hardware interrupt handler */
256 static irqreturn_t do_nsp32_isr(int, void *, struct pt_regs *);
257
258 /* initialize hardware */
259 static int nsp32hw_init(nsp32_hw_data *);
260
261 /* EEPROM handler */
262 static int nsp32_getprom_param (nsp32_hw_data *);
263 static int nsp32_getprom_at24 (nsp32_hw_data *);
264 static int nsp32_getprom_c16 (nsp32_hw_data *);
265 static void nsp32_prom_start (nsp32_hw_data *);
266 static void nsp32_prom_stop (nsp32_hw_data *);
267 static int nsp32_prom_read (nsp32_hw_data *, int);
268 static int nsp32_prom_read_bit (nsp32_hw_data *);
269 static void nsp32_prom_write_bit(nsp32_hw_data *, int);
270 static void nsp32_prom_set (nsp32_hw_data *, int, int);
271 static int nsp32_prom_get (nsp32_hw_data *, int);
272
273 /* debug/warning/info message */
274 static void nsp32_message (const char *, int, char *, char *, ...);
275 #ifdef NSP32_DEBUG
276 static void nsp32_dmessage(const char *, int, int, char *, ...);
277 #endif
278
279 /*
280 * max_sectors is currently limited up to 128.
281 */
282 static Scsi_Host_Template nsp32_template = {
283 .proc_name = "nsp32",
284 .name = "Workbit NinjaSCSI-32Bi/UDE",
285 .proc_info = nsp32_proc_info,
286 .info = nsp32_info,
287 .queuecommand = nsp32_queuecommand,
288 .can_queue = 1,
289 .sg_tablesize = NSP32_SG_SIZE,
290 .max_sectors = 128,
291 .cmd_per_lun = 1,
292 .this_id = NSP32_HOST_SCSIID,
293 .use_clustering = DISABLE_CLUSTERING,
294 .eh_abort_handler = nsp32_eh_abort,
295 /* .eh_device_reset_handler = NULL, */
296 .eh_bus_reset_handler = nsp32_eh_bus_reset,
297 .eh_host_reset_handler = nsp32_eh_host_reset,
298 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,74))
299 .detect = nsp32_detect,
300 .release = nsp32_release,
301 #endif
302 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,2))
303 .use_new_eh_code = 1,
304 #else
305 /* .highmem_io = 1, */
306 #endif
307 };
308
309 #include "nsp32_io.h"
310
311 /***********************************************************************
312 * debug, error print
313 */
314 #ifndef NSP32_DEBUG
315 # define NSP32_DEBUG_MASK 0x000000
316 # define nsp32_msg(type, args...) nsp32_message ("", 0, (type), args)
317 # define nsp32_dbg(mask, args...) /* */
318 #else
319 # define NSP32_DEBUG_MASK 0xffffff
320 # define nsp32_msg(type, args...) \
321 nsp32_message (__FUNCTION__, __LINE__, (type), args)
322 # define nsp32_dbg(mask, args...) \
323 nsp32_dmessage(__FUNCTION__, __LINE__, (mask), args)
324 #endif
325
326 #define NSP32_DEBUG_QUEUECOMMAND BIT(0)
327 #define NSP32_DEBUG_REGISTER BIT(1)
328 #define NSP32_DEBUG_AUTOSCSI BIT(2)
329 #define NSP32_DEBUG_INTR BIT(3)
330 #define NSP32_DEBUG_SGLIST BIT(4)
331 #define NSP32_DEBUG_BUSFREE BIT(5)
332 #define NSP32_DEBUG_CDB_CONTENTS BIT(6)
333 #define NSP32_DEBUG_RESELECTION BIT(7)
334 #define NSP32_DEBUG_MSGINOCCUR BIT(8)
335 #define NSP32_DEBUG_EEPROM BIT(9)
336 #define NSP32_DEBUG_MSGOUTOCCUR BIT(10)
337 #define NSP32_DEBUG_BUSRESET BIT(11)
338 #define NSP32_DEBUG_RESTART BIT(12)
339 #define NSP32_DEBUG_SYNC BIT(13)
340 #define NSP32_DEBUG_WAIT BIT(14)
341 #define NSP32_DEBUG_TARGETFLAG BIT(15)
342 #define NSP32_DEBUG_PROC BIT(16)
343 #define NSP32_DEBUG_INIT BIT(17)
344 #define NSP32_SPECIAL_PRINT_REGISTER BIT(20)
345
346 #define NSP32_DEBUG_BUF_LEN 100
347
348 static void nsp32_message(const char *func, int line, char *type, char *fmt, ...)
349 {
350 va_list args;
351 char buf[NSP32_DEBUG_BUF_LEN];
352
353 va_start(args, fmt);
354 vsnprintf(buf, sizeof(buf), fmt, args);
355 va_end(args);
356
357 #ifndef NSP32_DEBUG
358 printk("%snsp32: %s\n", type, buf);
359 #else
360 printk("%snsp32: %s (%d): %s\n", type, func, line, buf);
361 #endif
362 }
363
364 #ifdef NSP32_DEBUG
365 static void nsp32_dmessage(const char *func, int line, int mask, char *fmt, ...)
366 {
367 va_list args;
368 char buf[NSP32_DEBUG_BUF_LEN];
369
370 va_start(args, fmt);
371 vsnprintf(buf, sizeof(buf), fmt, args);
372 va_end(args);
373
374 if (mask & NSP32_DEBUG_MASK) {
375 printk("nsp32-debug: 0x%x %s (%d): %s\n", mask, func, line, buf);
376 }
377 }
378 #endif
379
380 #ifdef NSP32_DEBUG
381 # include "nsp32_debug.c"
382 #else
383 # define show_command(arg) /* */
384 # define show_busphase(arg) /* */
385 # define show_autophase(arg) /* */
386 #endif
387
388 /*
389 * IDENTIFY Message
390 */
391 static void nsp32_build_identify(Scsi_Cmnd *SCpnt)
392 {
393 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
394 int pos = data->msgout_len;
395 int mode = FALSE;
396
397 /* XXX: Auto DiscPriv detection is progressing... */
398 if (disc_priv == 0) {
399 /* mode = TRUE; */
400 }
401
402 data->msgoutbuf[pos] = IDENTIFY(mode, SCpnt->device->lun); pos++;
403
404 data->msgout_len = pos;
405 }
406
407 /*
408 * SDTR Message Routine
409 */
410 static void nsp32_build_sdtr(Scsi_Cmnd *SCpnt,
411 unsigned char period,
412 unsigned char offset)
413 {
414 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
415 int pos = data->msgout_len;
416
417 data->msgoutbuf[pos] = EXTENDED_MESSAGE; pos++;
418 data->msgoutbuf[pos] = EXTENDED_SDTR_LEN; pos++;
419 data->msgoutbuf[pos] = EXTENDED_SDTR; pos++;
420 data->msgoutbuf[pos] = period; pos++;
421 data->msgoutbuf[pos] = offset; pos++;
422
423 data->msgout_len = pos;
424 }
425
426 /*
427 * No Operation Message
428 */
429 static void nsp32_build_nop(Scsi_Cmnd *SCpnt)
430 {
431 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
432 int pos = data->msgout_len;
433
434 if (pos != 0) {
435 nsp32_msg(KERN_WARNING,
436 "Some messages are already contained!");
437 return;
438 }
439
440 data->msgoutbuf[pos] = NOP; pos++;
441 data->msgout_len = pos;
442 }
443
444 /*
445 * Reject Message
446 */
447 static void nsp32_build_reject(Scsi_Cmnd *SCpnt)
448 {
449 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
450 int pos = data->msgout_len;
451
452 data->msgoutbuf[pos] = MESSAGE_REJECT; pos++;
453 data->msgout_len = pos;
454 }
455
456 /*
457 * timer
458 */
459 #if 0
460 static void nsp32_start_timer(Scsi_Cmnd *SCpnt, int time)
461 {
462 unsigned int base = SCpnt->host->io_port;
463
464 nsp32_dbg(NSP32_DEBUG_INTR, "timer=%d", time);
465
466 if (time & (~TIMER_CNT_MASK)) {
467 nsp32_dbg(NSP32_DEBUG_INTR, "timer set overflow");
468 }
469
470 nsp32_write2(base, TIMER_SET, time & TIMER_CNT_MASK);
471 }
472 #endif
473
474
475 /*
476 * set SCSI command and other parameter to asic, and start selection phase
477 */
478 static int nsp32_selection_autopara(Scsi_Cmnd *SCpnt)
479 {
480 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
481 unsigned int base = SCpnt->device->host->io_port;
482 unsigned int host_id = SCpnt->device->host->this_id;
483 unsigned char target = SCpnt->device->id;
484 nsp32_autoparam *param = data->autoparam;
485 unsigned char phase;
486 int i, ret;
487 unsigned int msgout;
488 u16_le s;
489
490 nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "in");
491
492 /*
493 * check bus free
494 */
495 phase = nsp32_read1(base, SCSI_BUS_MONITOR);
496 if (phase != BUSMON_BUS_FREE) {
497 nsp32_msg(KERN_WARNING, "bus busy");
498 show_busphase(phase & BUSMON_PHASE_MASK);
499 SCpnt->result = DID_BUS_BUSY << 16;
500 return FALSE;
501 }
502
503 /*
504 * message out
505 *
506 * Note: If the range of msgout_len is 1 - 3, fill scsi_msgout.
507 * over 3 messages needs another routine.
508 */
509 if (data->msgout_len == 0) {
510 nsp32_msg(KERN_ERR, "SCSI MsgOut without any message!");
511 SCpnt->result = DID_ERROR << 16;
512 return FALSE;
513 } else if (data->msgout_len > 0 && data->msgout_len <= 3) {
514 msgout = 0;
515 for (i = 0; i < data->msgout_len; i++) {
516 /*
517 * the sending order of the message is:
518 * MCNT 3: MSG#0 -> MSG#1 -> MSG#2
519 * MCNT 2: MSG#1 -> MSG#2
520 * MCNT 1: MSG#2
521 */
522 msgout >>= 8;
523 msgout |= ((unsigned int)(data->msgoutbuf[i]) << 24);
524 }
525 msgout |= MV_VALID; /* MV valid */
526 msgout |= (unsigned int)data->msgout_len; /* len */
527 } else {
528 /* data->msgout_len > 3 */
529 msgout = 0;
530 }
531
532 // nsp_dbg(NSP32_DEBUG_AUTOSCSI, "sel time out=0x%x\n", nsp32_read2(base, SEL_TIME_OUT));
533 // nsp32_write2(base, SEL_TIME_OUT, SEL_TIMEOUT_TIME);
534
535 /*
536 * setup asic parameter
537 */
538 memset(param, 0, sizeof(nsp32_autoparam));
539
540 /* cdb */
541 for (i = 0; i < SCpnt->cmd_len; i++) {
542 param->cdb[4 * i] = SCpnt->cmnd[i];
543 }
544
545 /* outgoing messages */
546 param->msgout = cpu_to_le32(msgout);
547
548 /* syncreg, ackwidth, target id, SREQ sampling rate */
549 param->syncreg = data->cur_target->syncreg;
550 param->ackwidth = data->cur_target->ackwidth;
551 param->target_id = BIT(host_id) | BIT(target);
552 param->sample_reg = data->cur_target->sample_reg;
553
554 // nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "sample rate=0x%x\n", data->cur_target->sample_reg);
555
556 /* command control */
557 param->command_control = cpu_to_le16(CLEAR_CDB_FIFO_POINTER |
558 AUTOSCSI_START |
559 AUTO_MSGIN_00_OR_04 |
560 AUTO_MSGIN_02 |
561 AUTO_ATN );
562
563
564 /* transfer control */
565 s = 0;
566 switch (data->trans_method) {
567 case NSP32_TRANSFER_BUSMASTER:
568 s |= BM_START;
569 break;
570 case NSP32_TRANSFER_MMIO:
571 s |= CB_MMIO_MODE;
572 break;
573 case NSP32_TRANSFER_PIO:
574 s |= CB_IO_MODE;
575 break;
576 default:
577 nsp32_msg(KERN_ERR, "unknown trans_method");
578 break;
579 }
580 /*
581 * OR-ed BLIEND_MODE, FIFO intr is decreased, instead of PCI bus waits.
582 * For bus master transfer, it's taken off.
583 */
584 s |= (TRANSFER_GO | ALL_COUNTER_CLR);
585 param->transfer_control = cpu_to_le16(s);
586
587 /* sg table addr */
588 param->sgt_pointer = cpu_to_le32(data->cur_lunt->sglun_paddr);
589
590 /*
591 * transfer parameter to ASIC
592 */
593 nsp32_write4(base, SGT_ADR, data->auto_paddr);
594 nsp32_write2(base, COMMAND_CONTROL, CLEAR_CDB_FIFO_POINTER |
595 AUTO_PARAMETER );
596
597 /*
598 * Check arbitration
599 */
600 ret = nsp32_arbitration(SCpnt, base);
601
602 return ret;
603 }
604
605
606 /*
607 * Selection with AUTO SCSI (without AUTO PARAMETER)
608 */
609 static int nsp32_selection_autoscsi(Scsi_Cmnd *SCpnt)
610 {
611 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
612 unsigned int base = SCpnt->device->host->io_port;
613 unsigned int host_id = SCpnt->device->host->this_id;
614 unsigned char target = SCpnt->device->id;
615 unsigned char phase;
616 int status;
617 unsigned short command = 0;
618 unsigned int msgout = 0;
619 unsigned short execph;
620 int i;
621
622 nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "in");
623
624 /*
625 * IRQ disable
626 */
627 nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
628
629 /*
630 * check bus line
631 */
632 phase = nsp32_read1(base, SCSI_BUS_MONITOR);
633 if(((phase & BUSMON_BSY) == 1) || (phase & BUSMON_SEL) == 1) {
634 nsp32_msg(KERN_WARNING, "bus busy");
635 SCpnt->result = DID_BUS_BUSY << 16;
636 status = 1;
637 goto out;
638 }
639
640 /*
641 * clear execph
642 */
643 execph = nsp32_read2(base, SCSI_EXECUTE_PHASE);
644
645 /*
646 * clear FIFO counter to set CDBs
647 */
648 nsp32_write2(base, COMMAND_CONTROL, CLEAR_CDB_FIFO_POINTER);
649
650 /*
651 * set CDB0 - CDB15
652 */
653 for (i = 0; i < SCpnt->cmd_len; i++) {
654 nsp32_write1(base, COMMAND_DATA, SCpnt->cmnd[i]);
655 }
656 nsp32_dbg(NSP32_DEBUG_CDB_CONTENTS, "CDB[0]=[0x%x]", SCpnt->cmnd[0]);
657
658 /*
659 * set SCSIOUT LATCH(initiator)/TARGET(target) (OR-ed) ID
660 */
661 nsp32_write1(base, SCSI_OUT_LATCH_TARGET_ID, BIT(host_id) | BIT(target));
662
663 /*
664 * set SCSI MSGOUT REG
665 *
666 * Note: If the range of msgout_len is 1 - 3, fill scsi_msgout.
667 * over 3 messages needs another routine.
668 */
669 if (data->msgout_len == 0) {
670 nsp32_msg(KERN_ERR, "SCSI MsgOut without any message!");
671 SCpnt->result = DID_ERROR << 16;
672 status = 1;
673 goto out;
674 } else if (data->msgout_len > 0 && data->msgout_len <= 3) {
675 msgout = 0;
676 for (i = 0; i < data->msgout_len; i++) {
677 /*
678 * the sending order of the message is:
679 * MCNT 3: MSG#0 -> MSG#1 -> MSG#2
680 * MCNT 2: MSG#1 -> MSG#2
681 * MCNT 1: MSG#2
682 */
683 msgout >>= 8;
684 msgout |= ((unsigned int)(data->msgoutbuf[i]) << 24);
685 }
686 msgout |= MV_VALID; /* MV valid */
687 msgout |= (unsigned int)data->msgout_len; /* len */
688 nsp32_write4(base, SCSI_MSG_OUT, msgout);
689 } else {
690 /* data->msgout_len > 3 */
691 nsp32_write4(base, SCSI_MSG_OUT, 0);
692 }
693
694 /*
695 * set selection timeout(= 250ms)
696 */
697 nsp32_write2(base, SEL_TIME_OUT, SEL_TIMEOUT_TIME);
698
699 /*
700 * set SREQ hazard killer sampling rate
701 *
702 * TODO: sample_rate (BASE+0F) is 0 when internal clock = 40MHz.
703 * check other internal clock!
704 */
705 nsp32_write1(base, SREQ_SMPL_RATE, data->cur_target->sample_reg);
706
707 /*
708 * clear Arbit
709 */
710 nsp32_write1(base, SET_ARBIT, ARBIT_CLEAR);
711
712 /*
713 * set SYNCREG
714 * Don't set BM_START_ADR before setting this register.
715 */
716 nsp32_write1(base, SYNC_REG, data->cur_target->syncreg);
717
718 /*
719 * set ACKWIDTH
720 */
721 nsp32_write1(base, ACK_WIDTH, data->cur_target->ackwidth);
722
723 nsp32_dbg(NSP32_DEBUG_AUTOSCSI,
724 "syncreg=0x%x, ackwidth=0x%x, sgtpaddr=0x%x, id=0x%x",
725 nsp32_read1(base, SYNC_REG), nsp32_read1(base, ACK_WIDTH),
726 nsp32_read4(base, SGT_ADR), nsp32_read1(base, SCSI_OUT_LATCH_TARGET_ID));
727 nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "msgout_len=%d, msgout=0x%x",
728 data->msgout_len, msgout);
729
730 /*
731 * set SGT ADDR (physical address)
732 */
733 nsp32_write4(base, SGT_ADR, data->cur_lunt->sglun_paddr);
734
735 /*
736 * set TRANSFER CONTROL REG
737 */
738 command = 0;
739 command |= (TRANSFER_GO | ALL_COUNTER_CLR);
740 if (data->trans_method & NSP32_TRANSFER_BUSMASTER) {
741 if (SCpnt->request_bufflen > 0) {
742 command |= BM_START;
743 }
744 } else if (data->trans_method & NSP32_TRANSFER_MMIO) {
745 command |= CB_MMIO_MODE;
746 } else if (data->trans_method & NSP32_TRANSFER_PIO) {
747 command |= CB_IO_MODE;
748 }
749 nsp32_write2(base, TRANSFER_CONTROL, command);
750
751 /*
752 * start AUTO SCSI, kick off arbitration
753 */
754 command = (CLEAR_CDB_FIFO_POINTER |
755 AUTOSCSI_START |
756 AUTO_MSGIN_00_OR_04 |
757 AUTO_MSGIN_02 |
758 AUTO_ATN );
759 nsp32_write2(base, COMMAND_CONTROL, command);
760
761 /*
762 * Check arbitration
763 */
764 status = nsp32_arbitration(SCpnt, base);
765
766 out:
767 /*
768 * IRQ enable
769 */
770 nsp32_write2(base, IRQ_CONTROL, 0);
771
772 return status;
773 }
774
775
776 /*
777 * Arbitration Status Check
778 *
779 * Note: Arbitration counter is waited during ARBIT_GO is not lifting.
780 * Using udelay(1) consumes CPU time and system time, but
781 * arbitration delay time is defined minimal 2.4us in SCSI
782 * specification, thus udelay works as coarse grained wait timer.
783 */
784 static int nsp32_arbitration(Scsi_Cmnd *SCpnt, unsigned int base)
785 {
786 unsigned char arbit;
787 int status = TRUE;
788 int time = 0;
789
790 do {
791 arbit = nsp32_read1(base, ARBIT_STATUS);
792 time++;
793 } while ((arbit & (ARBIT_WIN | ARBIT_FAIL)) == 0 &&
794 (time <= ARBIT_TIMEOUT_TIME));
795
796 nsp32_dbg(NSP32_DEBUG_AUTOSCSI,
797 "arbit: 0x%x, delay time: %d", arbit, time);
798
799 if (arbit & ARBIT_WIN) {
800 /* Arbitration succeeded */
801 SCpnt->result = DID_OK << 16;
802 nsp32_index_write1(base, EXT_PORT, LED_ON); /* PCI LED on */
803 } else if (arbit & ARBIT_FAIL) {
804 /* Arbitration failed */
805 SCpnt->result = DID_BUS_BUSY << 16;
806 status = FALSE;
807 } else {
808 /*
809 * unknown error or ARBIT_GO timeout,
810 * something lock up! guess no connection.
811 */
812 nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "arbit timeout");
813 SCpnt->result = DID_NO_CONNECT << 16;
814 status = FALSE;
815 }
816
817 /*
818 * clear Arbit
819 */
820 nsp32_write1(base, SET_ARBIT, ARBIT_CLEAR);
821
822 return status;
823 }
824
825
826 /*
827 * reselection
828 *
829 * Note: This reselection routine is called from msgin_occur,
830 * reselection target id&lun must be already set.
831 * SCSI-2 says IDENTIFY implies RESTORE_POINTER operation.
832 */
833 static int nsp32_reselection(Scsi_Cmnd *SCpnt, unsigned char newlun)
834 {
835 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
836 unsigned int host_id = SCpnt->device->host->this_id;
837 unsigned int base = SCpnt->device->host->io_port;
838 unsigned char tmpid, newid;
839
840 nsp32_dbg(NSP32_DEBUG_RESELECTION, "enter");
841
842 /*
843 * calculate reselected SCSI ID
844 */
845 tmpid = nsp32_read1(base, RESELECT_ID);
846 tmpid &= (~BIT(host_id));
847 newid = 0;
848 while (tmpid) {
849 if (tmpid & 1) {
850 break;
851 }
852 tmpid >>= 1;
853 newid++;
854 }
855
856 /*
857 * If reselected New ID:LUN is not existed
858 * or current nexus is not existed, unexpected
859 * reselection is occurred. Send reject message.
860 */
861 if (newid >= ARRAY_SIZE(data->lunt) || newlun >= ARRAY_SIZE(data->lunt[0])) {
862 nsp32_msg(KERN_WARNING, "unknown id/lun");
863 return FALSE;
864 } else if(data->lunt[newid][newlun].SCpnt == NULL) {
865 nsp32_msg(KERN_WARNING, "no SCSI command is processing");
866 return FALSE;
867 }
868
869 data->cur_id = newid;
870 data->cur_lun = newlun;
871 data->cur_target = &(data->target[newid]);
872 data->cur_lunt = &(data->lunt[newid][newlun]);
873
874 /* reset SACK/SavedACK counter (or ALL clear?) */
875 nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK);
876
877 return TRUE;
878 }
879
880
881 /*
882 * nsp32_setup_sg_table - build scatter gather list for transfer data
883 * with bus master.
884 *
885 * Note: NinjaSCSI-32Bi/UDE bus master can not transfer over 64KB at a time.
886 */
887 static int nsp32_setup_sg_table(Scsi_Cmnd *SCpnt)
888 {
889 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
890 struct scatterlist *sgl;
891 nsp32_sgtable *sgt = data->cur_lunt->sglun->sgt;
892 int num, i;
893 u32_le l;
894
895 if (SCpnt->request_bufflen == 0) {
896 return TRUE;
897 }
898
899 if (sgt == NULL) {
900 nsp32_dbg(NSP32_DEBUG_SGLIST, "SGT == null");
901 return FALSE;
902 }
903
904 if (SCpnt->use_sg) {
905 sgl = (struct scatterlist *)SCpnt->request_buffer;
906 num = pci_map_sg(data->Pci, sgl, SCpnt->use_sg,
907 scsi_to_pci_dma_dir(SCpnt->sc_data_direction));
908 for (i = 0; i < num; i++) {
909 /*
910 * Build nsp32_sglist, substitute sg dma addresses.
911 */
912 sgt[i].addr = cpu_to_le32(sg_dma_address(sgl));
913 sgt[i].len = cpu_to_le32(sg_dma_len(sgl));
914 sgl++;
915
916 if (le32_to_cpu(sgt[i].len) > 0x10000) {
917 nsp32_msg(KERN_ERR,
918 "can't transfer over 64KB at a time, size=0x%lx", le32_to_cpu(sgt[i].len));
919 return FALSE;
920 }
921 nsp32_dbg(NSP32_DEBUG_SGLIST,
922 "num 0x%x : addr 0x%lx len 0x%lx",
923 i,
924 le32_to_cpu(sgt[i].addr),
925 le32_to_cpu(sgt[i].len ));
926 }
927
928 /* set end mark */
929 l = le32_to_cpu(sgt[num-1].len);
930 sgt[num-1].len = cpu_to_le32(l | SGTEND);
931
932 } else {
933 SCpnt->SCp.have_data_in = pci_map_single(data->Pci,
934 SCpnt->request_buffer, SCpnt->request_bufflen,
935 scsi_to_pci_dma_dir(SCpnt->sc_data_direction));
936
937 sgt[0].addr = cpu_to_le32(SCpnt->SCp.have_data_in);
938 sgt[0].len = cpu_to_le32(SCpnt->request_bufflen | SGTEND); /* set end mark */
939
940 if (SCpnt->request_bufflen > 0x10000) {
941 nsp32_msg(KERN_ERR,
942 "can't transfer over 64KB at a time, size=0x%lx", SCpnt->request_bufflen);
943 return FALSE;
944 }
945 nsp32_dbg(NSP32_DEBUG_SGLIST, "single : addr 0x%lx len=0x%lx",
946 le32_to_cpu(sgt[0].addr),
947 le32_to_cpu(sgt[0].len ));
948 }
949
950 return TRUE;
951 }
952
953 static int nsp32_queuecommand(Scsi_Cmnd *SCpnt, void (*done)(Scsi_Cmnd *))
954 {
955 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
956 nsp32_target *target;
957 nsp32_lunt *cur_lunt;
958 int ret;
959
960 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
961 "enter. target: 0x%x LUN: 0x%x cmnd: 0x%x cmndlen: 0x%x "
962 "use_sg: 0x%x reqbuf: 0x%lx reqlen: 0x%x",
963 SCpnt->device->id, SCpnt->device->lun, SCpnt->cmnd[0], SCpnt->cmd_len,
964 SCpnt->use_sg, SCpnt->request_buffer, SCpnt->request_bufflen);
965
966 if (data->CurrentSC != NULL) {
967 nsp32_msg(KERN_ERR, "Currentsc != NULL. Cancel this command request");
968 data->CurrentSC = NULL;
969 SCpnt->result = DID_NO_CONNECT << 16;
970 done(SCpnt);
971
972 return SCSI_MLQUEUE_HOST_BUSY;
973 }
974
975 /* check target ID is not same as this initiator ID */
976 if (SCpnt->device->id == SCpnt->device->host->this_id) {
977 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, "terget==host???");
978 SCpnt->result = DID_BAD_TARGET << 16;
979 done(SCpnt);
980 return SCSI_MLQUEUE_DEVICE_BUSY;
981 }
982
983 /* check target LUN is allowable value */
984 if (SCpnt->device->lun >= MAX_LUN) {
985 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, "no more lun");
986 SCpnt->result = DID_BAD_TARGET << 16;
987 done(SCpnt);
988 return SCSI_MLQUEUE_DEVICE_BUSY;
989 }
990
991 show_command(SCpnt);
992
993 SCpnt->scsi_done = done;
994 data->CurrentSC = SCpnt;
995 SCpnt->SCp.Status = CHECK_CONDITION;
996 SCpnt->SCp.Message = 0;
997 SCpnt->resid = SCpnt->request_bufflen;
998
999 SCpnt->SCp.ptr = (char *) SCpnt->request_buffer;
1000 SCpnt->SCp.this_residual = SCpnt->request_bufflen;
1001 SCpnt->SCp.buffer = NULL;
1002 SCpnt->SCp.buffers_residual = 0;
1003
1004 /* initialize data */
1005 data->msgout_len = 0;
1006 data->msgin_len = 0;
1007 cur_lunt = &(data->lunt[SCpnt->device->id][SCpnt->device->lun]);
1008 cur_lunt->SCpnt = SCpnt;
1009 cur_lunt->save_datp = 0;
1010 cur_lunt->msgin03 = FALSE;
1011 data->cur_lunt = cur_lunt;
1012 data->cur_id = SCpnt->device->id;
1013 data->cur_lun = SCpnt->device->lun;
1014
1015 ret = nsp32_setup_sg_table(SCpnt);
1016 if (ret == FALSE) {
1017 nsp32_msg(KERN_ERR, "SGT fail");
1018 SCpnt->result = DID_ERROR << 16;
1019 nsp32_scsi_done(SCpnt);
1020 return SCSI_MLQUEUE_HOST_BUSY;
1021 }
1022
1023 /* Build IDENTIFY */
1024 nsp32_build_identify(SCpnt);
1025
1026 /*
1027 * If target is the first time to transfer after the reset
1028 * (target don't have SDTR_DONE and SDTR_INITIATOR), sync
1029 * message SDTR is needed to do synchronous transfer.
1030 */
1031 target = &data->target[SCpnt->device->id];
1032 data->cur_target = target;
1033
1034 if (!(target->sync_flag & (SDTR_DONE | SDTR_INITIATOR | SDTR_TARGET))) {
1035 unsigned char period, offset;
1036
1037 if (trans_mode != ASYNC_MODE) {
1038 nsp32_set_max_sync(data, target, &period, &offset);
1039 nsp32_build_sdtr(SCpnt, period, offset);
1040 target->sync_flag |= SDTR_INITIATOR;
1041 } else {
1042 nsp32_set_async(data, target);
1043 target->sync_flag |= SDTR_DONE;
1044 }
1045
1046 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
1047 "SDTR: entry: %d start_period: 0x%x offset: 0x%x\n",
1048 target->limit_entry, period, offset);
1049 } else if (target->sync_flag & SDTR_INITIATOR) {
1050 /*
1051 * It was negotiating SDTR with target, sending from the
1052 * initiator, but there are no chance to remove this flag.
1053 * Set async because we don't get proper negotiation.
1054 */
1055 nsp32_set_async(data, target);
1056 target->sync_flag &= ~SDTR_INITIATOR;
1057 target->sync_flag |= SDTR_DONE;
1058
1059 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
1060 "SDTR_INITIATOR: fall back to async");
1061 } else if (target->sync_flag & SDTR_TARGET) {
1062 /*
1063 * It was negotiating SDTR with target, sending from target,
1064 * but there are no chance to remove this flag. Set async
1065 * because we don't get proper negotiation.
1066 */
1067 nsp32_set_async(data, target);
1068 target->sync_flag &= ~SDTR_TARGET;
1069 target->sync_flag |= SDTR_DONE;
1070
1071 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
1072 "Unknown SDTR from target is reached, fall back to async.");
1073 }
1074
1075 nsp32_dbg(NSP32_DEBUG_TARGETFLAG,
1076 "target: %d sync_flag: 0x%x syncreg: 0x%x ackwidth: 0x%x",
1077 SCpnt->device->id, target->sync_flag, target->syncreg,
1078 target->ackwidth);
1079
1080 /* Selection */
1081 if (auto_param == 0) {
1082 ret = nsp32_selection_autopara(SCpnt);
1083 } else {
1084 ret = nsp32_selection_autoscsi(SCpnt);
1085 }
1086
1087 if (ret != TRUE) {
1088 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, "selection fail");
1089 nsp32_scsi_done(SCpnt);
1090 return SCSI_MLQUEUE_DEVICE_BUSY;
1091 }
1092
1093 return 0;
1094 }
1095
1096 /* initialize asic */
1097 static int nsp32hw_init(nsp32_hw_data *data)
1098 {
1099 unsigned int base = data->BaseAddress;
1100 unsigned short irq_stat;
1101 unsigned long lc_reg;
1102 unsigned char power;
1103
1104 lc_reg = nsp32_index_read4(base, CFG_LATE_CACHE);
1105 if ((lc_reg & 0xff00) == 0) {
1106 lc_reg |= (0x20 << 8);
1107 nsp32_index_write2(base, CFG_LATE_CACHE, lc_reg & 0xffff);
1108 }
1109
1110 nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
1111 nsp32_write2(base, TRANSFER_CONTROL, 0);
1112 nsp32_write4(base, BM_CNT, 0);
1113 nsp32_write2(base, SCSI_EXECUTE_PHASE, 0);
1114
1115 do {
1116 irq_stat = nsp32_read2(base, IRQ_STATUS);
1117 nsp32_dbg(NSP32_DEBUG_INIT, "irq_stat 0x%x", irq_stat);
1118 } while (irq_stat & IRQSTATUS_ANY_IRQ);
1119
1120 /*
1121 * Fill FIFO_FULL_SHLD, FIFO_EMPTY_SHLD. Below parameter is
1122 * designated by specification.
1123 */
1124 if ((data->trans_method & NSP32_TRANSFER_PIO) ||
1125 (data->trans_method & NSP32_TRANSFER_MMIO)) {
1126 nsp32_index_write1(base, FIFO_FULL_SHLD_COUNT, 0x40);
1127 nsp32_index_write1(base, FIFO_EMPTY_SHLD_COUNT, 0x40);
1128 } else if (data->trans_method & NSP32_TRANSFER_BUSMASTER) {
1129 nsp32_index_write1(base, FIFO_FULL_SHLD_COUNT, 0x10);
1130 nsp32_index_write1(base, FIFO_EMPTY_SHLD_COUNT, 0x60);
1131 } else {
1132 nsp32_dbg(NSP32_DEBUG_INIT, "unknown transfer mode");
1133 }
1134
1135 nsp32_dbg(NSP32_DEBUG_INIT, "full 0x%x emp 0x%x",
1136 nsp32_index_read1(base, FIFO_FULL_SHLD_COUNT),
1137 nsp32_index_read1(base, FIFO_EMPTY_SHLD_COUNT));
1138
1139 nsp32_index_write1(base, CLOCK_DIV, data->clock);
1140 nsp32_index_write1(base, BM_CYCLE, MEMRD_CMD1 | SGT_AUTO_PARA_MEMED_CMD);
1141 nsp32_write1(base, PARITY_CONTROL, 0); /* parity check is disable */
1142
1143 /*
1144 * initialize MISC_WRRD register
1145 *
1146 * Note: Designated parameters is obeyed as following:
1147 * MISC_SCSI_DIRECTION_DETECTOR_SELECT: It must be set.
1148 * MISC_MASTER_TERMINATION_SELECT: It must be set.
1149 * MISC_BMREQ_NEGATE_TIMING_SEL: It should be set.
1150 * MISC_AUTOSEL_TIMING_SEL: It should be set.
1151 * MISC_BMSTOP_CHANGE2_NONDATA_PHASE: It should be set.
1152 * MISC_DELAYED_BMSTART: It's selected for safety.
1153 *
1154 * Note: If MISC_BMSTOP_CHANGE2_NONDATA_PHASE is set, then
1155 * we have to set TRANSFERCONTROL_BM_START as 0 and set
1156 * appropriate value before restarting bus master transfer.
1157 */
1158 nsp32_index_write2(base, MISC_WR,
1159 (SCSI_DIRECTION_DETECTOR_SELECT |
1160 DELAYED_BMSTART |
1161 MASTER_TERMINATION_SELECT |
1162 BMREQ_NEGATE_TIMING_SEL |
1163 AUTOSEL_TIMING_SEL |
1164 BMSTOP_CHANGE2_NONDATA_PHASE));
1165
1166 nsp32_index_write1(base, TERM_PWR_CONTROL, 0);
1167 power = nsp32_index_read1(base, TERM_PWR_CONTROL);
1168 if (!(power & SENSE)) {
1169 nsp32_msg(KERN_INFO, "term power on");
1170 nsp32_index_write1(base, TERM_PWR_CONTROL, BPWR);
1171 }
1172
1173 nsp32_write2(base, TIMER_SET, TIMER_STOP);
1174 nsp32_write2(base, TIMER_SET, TIMER_STOP); /* Required 2 times */
1175
1176 nsp32_write1(base, SYNC_REG, 0);
1177 nsp32_write1(base, ACK_WIDTH, 0);
1178 nsp32_write2(base, SEL_TIME_OUT, SEL_TIMEOUT_TIME);
1179
1180 /*
1181 * enable to select designated IRQ (except for
1182 * IRQSELECT_SERR, IRQSELECT_PERR, IRQSELECT_BMCNTERR)
1183 */
1184 nsp32_index_write2(base, IRQ_SELECT, IRQSELECT_TIMER_IRQ |
1185 IRQSELECT_SCSIRESET_IRQ |
1186 IRQSELECT_FIFO_SHLD_IRQ |
1187 IRQSELECT_RESELECT_IRQ |
1188 IRQSELECT_PHASE_CHANGE_IRQ |
1189 IRQSELECT_AUTO_SCSI_SEQ_IRQ |
1190 // IRQSELECT_BMCNTERR_IRQ |
1191 IRQSELECT_TARGET_ABORT_IRQ |
1192 IRQSELECT_MASTER_ABORT_IRQ );
1193 nsp32_write2(base, IRQ_CONTROL, 0);
1194
1195 /* PCI LED off */
1196 nsp32_index_write1(base, EXT_PORT_DDR, LED_OFF);
1197 nsp32_index_write1(base, EXT_PORT, LED_OFF);
1198
1199 return TRUE;
1200 }
1201
1202
1203 /* interrupt routine */
1204 static irqreturn_t do_nsp32_isr(int irq, void *dev_id, struct pt_regs *regs)
1205 {
1206 nsp32_hw_data *data = dev_id;
1207 unsigned int base = data->BaseAddress;
1208 Scsi_Cmnd *SCpnt = data->CurrentSC;
1209 unsigned short auto_stat, irq_stat, trans_stat;
1210 unsigned char busmon, busphase;
1211 unsigned long flags;
1212 int ret;
1213 int handled = 0;
1214
1215 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
1216 struct Scsi_Host *host = data->Host;
1217 spin_lock_irqsave(host->host_lock, flags);
1218 #else
1219 spin_lock_irqsave(&io_request_lock, flags);
1220 #endif
1221
1222 /*
1223 * IRQ check, then enable IRQ mask
1224 */
1225 irq_stat = nsp32_read2(base, IRQ_STATUS);
1226 nsp32_dbg(NSP32_DEBUG_INTR,
1227 "enter IRQ: %d, IRQstatus: 0x%x", irq, irq_stat);
1228 /* is this interrupt comes from Ninja asic? */
1229 if ((irq_stat & IRQSTATUS_ANY_IRQ) == 0) {
1230 nsp32_dbg(NSP32_DEBUG_INTR, "shared interrupt: irq other 0x%x", irq_stat);
1231 goto out2;
1232 }
1233 handled = 1;
1234 nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
1235
1236 busmon = nsp32_read1(base, SCSI_BUS_MONITOR);
1237 busphase = busmon & BUSMON_PHASE_MASK;
1238
1239 trans_stat = nsp32_read2(base, TRANSFER_STATUS);
1240 if ((irq_stat == 0xffff) && (trans_stat == 0xffff)) {
1241 nsp32_msg(KERN_INFO, "card disconnect");
1242 if (data->CurrentSC != NULL) {
1243 nsp32_msg(KERN_INFO, "clean up current SCSI command");
1244 SCpnt->result = DID_BAD_TARGET << 16;
1245 nsp32_scsi_done(SCpnt);
1246 }
1247 goto out;
1248 }
1249
1250 /* Timer IRQ */
1251 if (irq_stat & IRQSTATUS_TIMER_IRQ) {
1252 nsp32_dbg(NSP32_DEBUG_INTR, "timer stop");
1253 nsp32_write2(base, TIMER_SET, TIMER_STOP);
1254 goto out;
1255 }
1256
1257 /* SCSI reset */
1258 if (irq_stat & IRQSTATUS_SCSIRESET_IRQ) {
1259 nsp32_msg(KERN_INFO, "detected someone do bus reset");
1260 nsp32_do_bus_reset(data);
1261 if (SCpnt != NULL) {
1262 SCpnt->result = DID_RESET << 16;
1263 nsp32_scsi_done(SCpnt);
1264 }
1265 goto out;
1266 }
1267
1268 if (SCpnt == NULL) {
1269 nsp32_msg(KERN_WARNING, "SCpnt==NULL this can't be happened");
1270 nsp32_msg(KERN_WARNING, "irq_stat=0x%x trans_stat=0x%x", irq_stat, trans_stat);
1271 goto out;
1272 }
1273
1274 /*
1275 * AutoSCSI Interrupt.
1276 * Note: This interrupt is occurred when AutoSCSI is finished. Then
1277 * check SCSIEXECUTEPHASE, and do appropriate action. Each phases are
1278 * recorded when AutoSCSI sequencer has been processed.
1279 */
1280 if(irq_stat & IRQSTATUS_AUTOSCSI_IRQ) {
1281 /* getting SCSI executed phase */
1282 auto_stat = nsp32_read2(base, SCSI_EXECUTE_PHASE);
1283 nsp32_write2(base, SCSI_EXECUTE_PHASE, 0);
1284
1285 /* Selection Timeout, go busfree phase. */
1286 if (auto_stat & SELECTION_TIMEOUT) {
1287 nsp32_dbg(NSP32_DEBUG_INTR,
1288 "selection timeout occurred");
1289
1290 SCpnt->result = DID_TIME_OUT << 16;
1291 nsp32_scsi_done(SCpnt);
1292 goto out;
1293 }
1294
1295 if (auto_stat & MSGOUT_PHASE) {
1296 /*
1297 * MsgOut phase was processed.
1298 * If MSG_IN_OCCUER is not set, then MsgOut phase is
1299 * completed. Thus, msgout_len must reset. Otherwise,
1300 * nothing to do here. If MSG_OUT_OCCUER is occurred,
1301 * then we will encounter the condition and check.
1302 */
1303 if (!(auto_stat & MSG_IN_OCCUER) &&
1304 (data->msgout_len <= 3)) {
1305 /*
1306 * !MSG_IN_OCCUER && msgout_len <=3
1307 * ---> AutoSCSI with MSGOUTreg is processed.
1308 */
1309 data->msgout_len = 0;
1310 };
1311
1312 nsp32_dbg(NSP32_DEBUG_INTR, "MsgOut phase processed");
1313 }
1314
1315 if ((auto_stat & DATA_IN_PHASE) &&
1316 (SCpnt->resid > 0) &&
1317 ((nsp32_read2(base, FIFO_REST_CNT) & FIFO_REST_MASK) != 0)) {
1318 printk( "auto+fifo\n");
1319 //nsp32_pio_read(SCpnt);
1320 }
1321
1322 if (auto_stat & (DATA_IN_PHASE | DATA_OUT_PHASE)) {
1323 /* DATA_IN_PHASE/DATA_OUT_PHASE was processed. */
1324 nsp32_dbg(NSP32_DEBUG_INTR,
1325 "Data in/out phase processed");
1326
1327 /* read BMCNT, SGT pointer addr */
1328 nsp32_dbg(NSP32_DEBUG_INTR, "BMCNT=0x%lx",
1329 nsp32_read4(base, BM_CNT));
1330 nsp32_dbg(NSP32_DEBUG_INTR, "addr=0x%lx",
1331 nsp32_read4(base, SGT_ADR));
1332 nsp32_dbg(NSP32_DEBUG_INTR, "SACK=0x%lx",
1333 nsp32_read4(base, SACK_CNT));
1334 nsp32_dbg(NSP32_DEBUG_INTR, "SSACK=0x%lx",
1335 nsp32_read4(base, SAVED_SACK_CNT));
1336
1337 SCpnt->resid = 0; /* all data transfered! */
1338 }
1339
1340 /*
1341 * MsgIn Occur
1342 */
1343 if (auto_stat & MSG_IN_OCCUER) {
1344 nsp32_msgin_occur(SCpnt, irq_stat, auto_stat);
1345 }
1346
1347 /*
1348 * MsgOut Occur
1349 */
1350 if (auto_stat & MSG_OUT_OCCUER) {
1351 nsp32_msgout_occur(SCpnt);
1352 }
1353
1354 /*
1355 * Bus Free Occur
1356 */
1357 if (auto_stat & BUS_FREE_OCCUER) {
1358 ret = nsp32_busfree_occur(SCpnt, auto_stat);
1359 if (ret == TRUE) {
1360 goto out;
1361 }
1362 }
1363
1364 if (auto_stat & STATUS_PHASE) {
1365 /*
1366 * Read CSB and substitute CSB for SCpnt->result
1367 * to save status phase stutas byte.
1368 * scsi error handler checks host_byte (DID_*:
1369 * low level driver to indicate status), then checks
1370 * status_byte (SCSI status byte).
1371 */
1372 SCpnt->result = (int)nsp32_read1(base, SCSI_CSB_IN);
1373 }
1374
1375 if (auto_stat & ILLEGAL_PHASE) {
1376 /* Illegal phase is detected. SACK is not back. */
1377 nsp32_msg(KERN_WARNING,
1378 "AUTO SCSI ILLEGAL PHASE OCCUR!!!!");
1379
1380 /* TODO: currently we don't have any action... bus reset? */
1381
1382 /*
1383 * To send back SACK, assert, wait, and negate.
1384 */
1385 nsp32_sack_assert(data);
1386 nsp32_wait_req(data, NEGATE);
1387 nsp32_sack_negate(data);
1388
1389 }
1390
1391 if (auto_stat & COMMAND_PHASE) {
1392 /* nothing to do */
1393 nsp32_dbg(NSP32_DEBUG_INTR, "Command phase processed");
1394 }
1395
1396 if (auto_stat & AUTOSCSI_BUSY) {
1397 /* AutoSCSI is running */
1398 }
1399
1400 show_autophase(auto_stat);
1401 }
1402
1403 /* FIFO_SHLD_IRQ */
1404 if (irq_stat & IRQSTATUS_FIFO_SHLD_IRQ) {
1405 nsp32_dbg(NSP32_DEBUG_INTR, "FIFO IRQ");
1406
1407 switch(busphase) {
1408 case BUSPHASE_DATA_OUT:
1409 nsp32_dbg(NSP32_DEBUG_INTR, "fifo/write");
1410
1411 //nsp32_pio_write(SCpnt);
1412
1413 break;
1414
1415 case BUSPHASE_DATA_IN:
1416 nsp32_dbg(NSP32_DEBUG_INTR, "fifo/read");
1417
1418 //nsp32_pio_read(SCpnt);
1419
1420 break;
1421
1422 case BUSPHASE_STATUS:
1423 nsp32_dbg(NSP32_DEBUG_INTR, "fifo/status");
1424
1425 SCpnt->SCp.Status = nsp32_read1(base, SCSI_CSB_IN);
1426
1427 break;
1428 default:
1429 nsp32_dbg(NSP32_DEBUG_INTR, "fifo/other phase");
1430 nsp32_dbg(NSP32_DEBUG_INTR, "irq_stat=0x%x trans_stat=0x%x", irq_stat, trans_stat);
1431 show_busphase(busphase);
1432 break;
1433 }
1434
1435 goto out;
1436 }
1437
1438 /* Phase Change IRQ */
1439 if (irq_stat & IRQSTATUS_PHASE_CHANGE_IRQ) {
1440 nsp32_dbg(NSP32_DEBUG_INTR, "phase change IRQ");
1441
1442 switch(busphase) {
1443 case BUSPHASE_MESSAGE_IN:
1444 nsp32_dbg(NSP32_DEBUG_INTR, "phase chg/msg in");
1445 nsp32_msgin_occur(SCpnt, irq_stat, 0);
1446 break;
1447 default:
1448 nsp32_msg(KERN_WARNING, "phase chg/other phase?");
1449 nsp32_msg(KERN_WARNING, "irq_stat=0x%x trans_stat=0x%x\n",
1450 irq_stat, trans_stat);
1451 show_busphase(busphase);
1452 break;
1453 }
1454 goto out;
1455 }
1456
1457 /* PCI_IRQ */
1458 if (irq_stat & IRQSTATUS_PCI_IRQ) {
1459 nsp32_dbg(NSP32_DEBUG_INTR, "PCI IRQ occurred");
1460 /* Do nothing */
1461 }
1462
1463 /* BMCNTERR_IRQ */
1464 if (irq_stat & IRQSTATUS_BMCNTERR_IRQ) {
1465 nsp32_msg(KERN_ERR, "Received unexpected BMCNTERR IRQ! ");
1466 /*
1467 * TODO: To be implemented improving bus master
1468 * transfer reliablity when BMCNTERR is occurred in
1469 * AutoSCSI phase described in specification.
1470 */
1471 }
1472
1473 #if 0
1474 nsp32_dbg(NSP32_DEBUG_INTR,
1475 "irq_stat=0x%x trans_stat=0x%x", irq_stat, trans_stat);
1476 show_busphase(busphase);
1477 #endif
1478
1479 out:
1480 /* disable IRQ mask */
1481 nsp32_write2(base, IRQ_CONTROL, 0);
1482
1483 out2:
1484 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
1485 spin_unlock_irqrestore(host->host_lock, flags);
1486 #else
1487 spin_unlock_irqrestore(&io_request_lock, flags);
1488 #endif
1489
1490 nsp32_dbg(NSP32_DEBUG_INTR, "exit");
1491
1492 return IRQ_RETVAL(handled);
1493 }
1494
1495 #undef SPRINTF
1496 #define SPRINTF(args...) \
1497 do { \
1498 if(length > (pos - buffer)) { \
1499 pos += snprintf(pos, length - (pos - buffer) + 1, ## args); \
1500 nsp32_dbg(NSP32_DEBUG_PROC, "buffer=0x%p pos=0x%p length=%d %d\n", buffer, pos, length, length - (pos - buffer));\
1501 } \
1502 } while(0)
1503 static int nsp32_proc_info(
1504 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73))
1505 struct Scsi_Host *host,
1506 #endif
1507 char *buffer,
1508 char **start,
1509 off_t offset,
1510 int length,
1511 #if !(LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73))
1512 int hostno,
1513 #endif
1514 int inout)
1515 {
1516 char *pos = buffer;
1517 int thislength;
1518 unsigned long flags;
1519 nsp32_hw_data *data;
1520 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73))
1521 int hostno;
1522 #else
1523 struct Scsi_Host *host;
1524 #endif
1525 unsigned int base;
1526 unsigned char mode_reg;
1527 int id, speed;
1528 long model;
1529
1530 /* Write is not supported, just return. */
1531 if (inout == TRUE) {
1532 return -EINVAL;
1533 }
1534
1535 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73))
1536 hostno = host->host_no;
1537 #else
1538 /* search this HBA host */
1539 host = scsi_host_hn_get(hostno);
1540 if (host == NULL) {
1541 return -ESRCH;
1542 }
1543 #endif
1544 data = (nsp32_hw_data *)host->hostdata;
1545 base = host->io_port;
1546
1547 SPRINTF("NinjaSCSI-32 status\n\n");
1548 SPRINTF("Driver version: %s, $Revision: 1.33 $\n", nsp32_release_version);
1549 SPRINTF("SCSI host No.: %d\n", hostno);
1550 SPRINTF("IRQ: %d\n", host->irq);
1551 SPRINTF("IO: 0x%lx-0x%lx\n", host->io_port, host->io_port + host->n_io_port - 1);
1552 SPRINTF("MMIO(virtual address): 0x%lx-0x%lx\n", host->base, host->base + data->MmioLength - 1);
1553 SPRINTF("sg_tablesize: %d\n", host->sg_tablesize);
1554 SPRINTF("Chip revision: 0x%x\n", (nsp32_read2(base, INDEX_REG) >> 8) & 0xff);
1555
1556 mode_reg = nsp32_index_read1(base, CHIP_MODE);
1557 model = data->pci_devid->driver_data;
1558
1559 #ifdef CONFIG_PM
1560 SPRINTF("Power Management: %s\n", (mode_reg & OPTF) ? "yes" : "no");
1561 #endif
1562 SPRINTF("OEM: %ld, %s\n", (mode_reg & (OEM0|OEM1)), nsp32_model[model]);
1563
1564 spin_lock_irqsave(&(data->Lock), flags);
1565 SPRINTF("CurrentSC: 0x%p\n\n", data->CurrentSC);
1566 spin_unlock_irqrestore(&(data->Lock), flags);
1567
1568
1569 SPRINTF("SDTR status\n");
1570 for (id = 0; id < ARRAY_SIZE(data->target); id++) {
1571
1572 SPRINTF("id %d: ", id);
1573
1574 if (id == host->this_id) {
1575 SPRINTF("----- NinjaSCSI-32 host adapter\n");
1576 continue;
1577 }
1578
1579 if (data->target[id].sync_flag == SDTR_DONE) {
1580 if (data->target[id].period == 0 &&
1581 data->target[id].offset == ASYNC_OFFSET ) {
1582 SPRINTF("async");
1583 } else {
1584 SPRINTF(" sync");
1585 }
1586 } else {
1587 SPRINTF(" none");
1588 }
1589
1590 if (data->target[id].period != 0) {
1591
1592 speed = 1000000 / (data->target[id].period * 4);
1593
1594 SPRINTF(" transfer %d.%dMB/s, offset %d",
1595 speed / 1000,
1596 speed % 1000,
1597 data->target[id].offset
1598 );
1599 }
1600 SPRINTF("\n");
1601 }
1602
1603
1604 thislength = pos - (buffer + offset);
1605
1606 if(thislength < 0) {
1607 *start = NULL;
1608 return 0;
1609 }
1610
1611
1612 thislength = min(thislength, length);
1613 *start = buffer + offset;
1614
1615 return thislength;
1616 }
1617 #undef SPRINTF
1618
1619
1620
1621 /*
1622 * Reset parameters and call scsi_done for data->cur_lunt.
1623 * Be careful setting SCpnt->result = DID_* before calling this function.
1624 */
1625 static void nsp32_scsi_done(Scsi_Cmnd *SCpnt)
1626 {
1627 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
1628 unsigned int base = SCpnt->device->host->io_port;
1629
1630 /*
1631 * unmap pci
1632 */
1633 if (SCpnt->request_bufflen == 0) {
1634 goto skip;
1635 }
1636
1637 if (SCpnt->use_sg) {
1638 pci_unmap_sg(data->Pci,
1639 (struct scatterlist *)SCpnt->buffer,
1640 SCpnt->use_sg,
1641 scsi_to_pci_dma_dir(SCpnt->sc_data_direction));
1642 } else {
1643 pci_unmap_single(data->Pci,
1644 (u32)SCpnt->SCp.have_data_in,
1645 SCpnt->request_bufflen,
1646 scsi_to_pci_dma_dir(SCpnt->sc_data_direction));
1647 }
1648
1649 skip:
1650 /*
1651 * clear TRANSFERCONTROL_BM_START
1652 */
1653 nsp32_write2(base, TRANSFER_CONTROL, 0);
1654 nsp32_write4(base, BM_CNT, 0);
1655
1656 /*
1657 * call scsi_done
1658 */
1659 (*SCpnt->scsi_done)(SCpnt);
1660
1661 /*
1662 * reset parameters
1663 */
1664 data->cur_lunt->SCpnt = NULL;
1665 data->cur_lunt = NULL;
1666 data->cur_target = NULL;
1667 data->CurrentSC = NULL;
1668 }
1669
1670
1671 /*
1672 * Bus Free Occur
1673 *
1674 * Current Phase is BUSFREE. AutoSCSI is automatically execute BUSFREE phase
1675 * with ACK reply when below condition is matched:
1676 * MsgIn 00: Command Complete.
1677 * MsgIn 02: Save Data Pointer.
1678 * MsgIn 04: Diconnect.
1679 * In other case, unexpected BUSFREE is detected.
1680 */
1681 static int nsp32_busfree_occur(Scsi_Cmnd *SCpnt, unsigned short execph)
1682 {
1683 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
1684 unsigned int base = SCpnt->device->host->io_port;
1685
1686 nsp32_dbg(NSP32_DEBUG_BUSFREE, "enter execph=0x%x", execph);
1687 show_autophase(execph);
1688
1689 nsp32_write4(base, BM_CNT, 0);
1690 nsp32_write2(base, TRANSFER_CONTROL, 0);
1691
1692 /*
1693 * MsgIn 02: Save Data Pointer
1694 *
1695 * VALID:
1696 * Save Data Pointer is received. Adjust pointer.
1697 *
1698 * NO-VALID:
1699 * SCSI-3 says if Save Data Pointer is not received, then we restart
1700 * processing and we can't adjust any SCSI data pointer in next data
1701 * phase.
1702 */
1703 if (execph & MSGIN_02_VALID) {
1704 nsp32_dbg(NSP32_DEBUG_BUSFREE, "MsgIn02_Valid");
1705
1706 /*
1707 * Check sack_cnt/saved_sack_cnt, then adjust sg table if
1708 * needed.
1709 */
1710 if (!(execph & MSGIN_00_VALID) &&
1711 ((execph & DATA_IN_PHASE) || (execph & DATA_OUT_PHASE))) {
1712 unsigned int sacklen, s_sacklen;
1713
1714 /*
1715 * Read SACK count and SAVEDSACK count, then compare.
1716 */
1717 sacklen = nsp32_read4(base, SACK_CNT );
1718 s_sacklen = nsp32_read4(base, SAVED_SACK_CNT);
1719
1720 /*
1721 * If SAVEDSACKCNT == 0, it means SavedDataPointer is
1722 * come after data transfering.
1723 */
1724 if (s_sacklen > 0) {
1725 /*
1726 * Comparing between sack and savedsack to
1727 * check the condition of AutoMsgIn03.
1728 *
1729 * If they are same, set msgin03 == TRUE,
1730 * COMMANDCONTROL_AUTO_MSGIN_03 is enabled at
1731 * reselection. On the other hand, if they
1732 * aren't same, set msgin03 == FALSE, and
1733 * COMMANDCONTROL_AUTO_MSGIN_03 is disabled at
1734 * reselection.
1735 */
1736 if (sacklen != s_sacklen) {
1737 data->cur_lunt->msgin03 = FALSE;
1738 } else {
1739 data->cur_lunt->msgin03 = TRUE;
1740 }
1741
1742 nsp32_adjust_busfree(SCpnt, s_sacklen);
1743 }
1744 }
1745
1746 /* This value has not substitude with valid value yet... */
1747 //data->cur_lunt->save_datp = data->cur_datp;
1748 } else {
1749 /*
1750 * no processing.
1751 */
1752 }
1753
1754 if (execph & MSGIN_03_VALID) {
1755 /* MsgIn03 was valid to be processed. No need processing. */
1756 }
1757
1758 /*
1759 * target SDTR check
1760 */
1761 if (data->cur_target->sync_flag & SDTR_INITIATOR) {
1762 /*
1763 * SDTR negotiation pulled by the initiator has not
1764 * finished yet. Fall back to ASYNC mode.
1765 */
1766 nsp32_set_async(data, data->cur_target);
1767 data->cur_target->sync_flag &= ~SDTR_INITIATOR;
1768 data->cur_target->sync_flag |= SDTR_DONE;
1769 } else if (data->cur_target->sync_flag & SDTR_TARGET) {
1770 /*
1771 * SDTR negotiation pulled by the target has been
1772 * negotiating.
1773 */
1774 if (execph & (MSGIN_00_VALID | MSGIN_04_VALID)) {
1775 /*
1776 * If valid message is received, then
1777 * negotiation is succeeded.
1778 */
1779 } else {
1780 /*
1781 * On the contrary, if unexpected bus free is
1782 * occurred, then negotiation is failed. Fall
1783 * back to ASYNC mode.
1784 */
1785 nsp32_set_async(data, data->cur_target);
1786 }
1787 data->cur_target->sync_flag &= ~SDTR_TARGET;
1788 data->cur_target->sync_flag |= SDTR_DONE;
1789 }
1790
1791 /*
1792 * It is always ensured by SCSI standard that initiator
1793 * switches into Bus Free Phase after
1794 * receiving message 00 (Command Complete), 04 (Disconnect).
1795 * It's the reason that processing here is valid.
1796 */
1797 if (execph & MSGIN_00_VALID) {
1798 /* MsgIn 00: Command Complete */
1799 nsp32_dbg(NSP32_DEBUG_BUSFREE, "command complete");
1800
1801 SCpnt->SCp.Status = nsp32_read1(base, SCSI_CSB_IN);
1802 SCpnt->SCp.Message = 0;
1803 nsp32_dbg(NSP32_DEBUG_BUSFREE,
1804 "normal end stat=0x%x resid=0x%x\n",
1805 SCpnt->SCp.Status, SCpnt->resid);
1806 SCpnt->result = (DID_OK << 16) |
1807 (SCpnt->SCp.Message << 8) |
1808 (SCpnt->SCp.Status << 0);
1809 nsp32_scsi_done(SCpnt);
1810 /* All operation is done */
1811 return TRUE;
1812 } else if (execph & MSGIN_04_VALID) {
1813 /* MsgIn 04: Disconnect */
1814 SCpnt->SCp.Status = nsp32_read1(base, SCSI_CSB_IN);
1815 SCpnt->SCp.Message = 4;
1816
1817 nsp32_dbg(NSP32_DEBUG_BUSFREE, "disconnect");
1818 return TRUE;
1819 } else {
1820 /* Unexpected bus free */
1821 nsp32_msg(KERN_WARNING, "unexpected bus free occurred");
1822
1823 /* DID_ERROR? */
1824 //SCpnt->result = (DID_OK << 16) | (SCpnt->SCp.Message << 8) | (SCpnt->SCp.Status << 0);
1825 SCpnt->result = DID_ERROR << 16;
1826 nsp32_scsi_done(SCpnt);
1827 return TRUE;
1828 }
1829 return FALSE;
1830 }
1831
1832
1833 /*
1834 * nsp32_adjust_busfree - adjusting SG table
1835 *
1836 * Note: This driver adjust the SG table using SCSI ACK
1837 * counter instead of BMCNT counter!
1838 */
1839 static void nsp32_adjust_busfree(Scsi_Cmnd *SCpnt, unsigned int s_sacklen)
1840 {
1841 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
1842 int old_entry = data->cur_entry;
1843 int new_entry;
1844 int sg_num = data->cur_lunt->sg_num;
1845 nsp32_sgtable *sgt = data->cur_lunt->sglun->sgt;
1846 unsigned int restlen, sentlen;
1847 u32_le len, addr;
1848
1849 nsp32_dbg(NSP32_DEBUG_SGLIST, "old resid=0x%x", SCpnt->resid);
1850
1851 /* adjust saved SACK count with 4 byte start address boundary */
1852 s_sacklen -= le32_to_cpu(sgt[old_entry].addr) & 3;
1853
1854 /*
1855 * calculate new_entry from sack count and each sgt[].len
1856 * calculate the byte which is intent to send
1857 */
1858 sentlen = 0;
1859 for (new_entry = old_entry; new_entry < sg_num; new_entry++) {
1860 sentlen += (le32_to_cpu(sgt[new_entry].len) & ~SGTEND);
1861 if (sentlen > s_sacklen) {
1862 break;
1863 }
1864 }
1865
1866 /* all sgt is processed */
1867 if (new_entry == sg_num) {
1868 goto last;
1869 }
1870
1871 if (sentlen == s_sacklen) {
1872 /* XXX: confirm it's ok or not */
1873 /* In this case, it's ok because we are at
1874 the head element of the sg. restlen is correctly calculated. */
1875 }
1876
1877 /* calculate the rest length for transfering */
1878 restlen = sentlen - s_sacklen;
1879
1880 /* update adjusting current SG table entry */
1881 len = le32_to_cpu(sgt[new_entry].len);
1882 addr = le32_to_cpu(sgt[new_entry].addr);
1883 addr += (len - restlen);
1884 sgt[new_entry].addr = cpu_to_le32(addr);
1885 sgt[new_entry].len = cpu_to_le32(restlen);
1886
1887 /* set cur_entry with new_entry */
1888 data->cur_entry = new_entry;
1889
1890 return;
1891
1892 last:
1893 if (SCpnt->resid < sentlen) {
1894 nsp32_msg(KERN_ERR, "resid underflow");
1895 }
1896
1897 SCpnt->resid -= sentlen;
1898 nsp32_dbg(NSP32_DEBUG_SGLIST, "new resid=0x%x", SCpnt->resid);
1899
1900 /* update hostdata and lun */
1901
1902 return;
1903 }
1904
1905
1906 /*
1907 * It's called MsgOut phase occur.
1908 * NinjaSCSI-32Bi/UDE automatically processes up to 3 messages in
1909 * message out phase. It, however, has more than 3 messages,
1910 * HBA creates the interrupt and we have to process by hand.
1911 */
1912 static void nsp32_msgout_occur(Scsi_Cmnd *SCpnt)
1913 {
1914 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
1915 unsigned int base = SCpnt->device->host->io_port;
1916 //unsigned short command;
1917 long new_sgtp;
1918 int i;
1919
1920 nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR,
1921 "enter: msgout_len: 0x%x", data->msgout_len);
1922
1923 /*
1924 * If MsgOut phase is occurred without having any
1925 * message, then No_Operation is sent (SCSI-2).
1926 */
1927 if (data->msgout_len == 0) {
1928 nsp32_build_nop(SCpnt);
1929 }
1930
1931 /*
1932 * Set SGTP ADDR current entry for restarting AUTOSCSI,
1933 * because SGTP is incremented next point.
1934 * There is few statement in the specification...
1935 */
1936 new_sgtp = data->cur_lunt->sglun_paddr +
1937 (data->cur_lunt->cur_entry * sizeof(nsp32_sgtable));
1938
1939 /*
1940 * send messages
1941 */
1942 for (i = 0; i < data->msgout_len; i++) {
1943 nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR,
1944 "%d : 0x%x", i, data->msgoutbuf[i]);
1945
1946 /*
1947 * Check REQ is asserted.
1948 */
1949 nsp32_wait_req(data, ASSERT);
1950
1951 if (i == (data->msgout_len - 1)) {
1952 /*
1953 * If the last message, set the AutoSCSI restart
1954 * before send back the ack message. AutoSCSI
1955 * restart automatically negate ATN signal.
1956 */
1957 //command = (AUTO_MSGIN_00_OR_04 | AUTO_MSGIN_02);
1958 //nsp32_restart_autoscsi(SCpnt, command);
1959 nsp32_write2(base, COMMAND_CONTROL,
1960 (CLEAR_CDB_FIFO_POINTER |
1961 AUTO_COMMAND_PHASE |
1962 AUTOSCSI_RESTART |
1963 AUTO_MSGIN_00_OR_04 |
1964 AUTO_MSGIN_02 ));
1965 }
1966 /*
1967 * Write data with SACK, then wait sack is
1968 * automatically negated.
1969 */
1970 nsp32_write1(base, SCSI_DATA_WITH_ACK, data->msgoutbuf[i]);
1971 nsp32_wait_sack(data, NEGATE);
1972
1973 nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR, "bus: 0x%x\n",
1974 nsp32_read1(base, SCSI_BUS_MONITOR));
1975 };
1976
1977 data->msgout_len = 0;
1978
1979 nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR, "exit");
1980 }
1981
1982 /*
1983 * Restart AutoSCSI
1984 *
1985 * Note: Restarting AutoSCSI needs set:
1986 * SYNC_REG, ACK_WIDTH, SGT_ADR, TRANSFER_CONTROL
1987 */
1988 static void nsp32_restart_autoscsi(Scsi_Cmnd *SCpnt, unsigned short command)
1989 {
1990 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
1991 unsigned int base = data->BaseAddress;
1992 unsigned short transfer = 0;
1993
1994 nsp32_dbg(NSP32_DEBUG_RESTART, "enter");
1995
1996 if (data->cur_target == NULL || data->cur_lunt == NULL) {
1997 nsp32_msg(KERN_ERR, "Target or Lun is invalid");
1998 }
1999
2000 /*
2001 * set SYNC_REG
2002 * Don't set BM_START_ADR before setting this register.
2003 */
2004 nsp32_write1(base, SYNC_REG, data->cur_target->syncreg);
2005
2006 /*
2007 * set ACKWIDTH
2008 */
2009 nsp32_write1(base, ACK_WIDTH, data->cur_target->ackwidth);
2010
2011 /*
2012 * set SREQ hazard killer sampling rate
2013 */
2014 nsp32_write1(base, SREQ_SMPL_RATE, data->cur_target->sample_reg);
2015
2016 /*
2017 * set SGT ADDR (physical address)
2018 */
2019 nsp32_write4(base, SGT_ADR, data->cur_lunt->sglun_paddr);
2020
2021 /*
2022 * set TRANSFER CONTROL REG
2023 */
2024 transfer = 0;
2025 transfer |= (TRANSFER_GO | ALL_COUNTER_CLR);
2026 if (data->trans_method & NSP32_TRANSFER_BUSMASTER) {
2027 if (SCpnt->request_bufflen > 0) {
2028 transfer |= BM_START;
2029 }
2030 } else if (data->trans_method & NSP32_TRANSFER_MMIO) {
2031 transfer |= CB_MMIO_MODE;
2032 } else if (data->trans_method & NSP32_TRANSFER_PIO) {
2033 transfer |= CB_IO_MODE;
2034 }
2035 nsp32_write2(base, TRANSFER_CONTROL, transfer);
2036
2037 /*
2038 * restart AutoSCSI
2039 *
2040 * TODO: COMMANDCONTROL_AUTO_COMMAND_PHASE is needed ?
2041 */
2042 command |= (CLEAR_CDB_FIFO_POINTER |
2043 AUTO_COMMAND_PHASE |
2044 AUTOSCSI_RESTART );
2045 nsp32_write2(base, COMMAND_CONTROL, command);
2046
2047 nsp32_dbg(NSP32_DEBUG_RESTART, "exit");
2048 }
2049
2050
2051 /*
2052 * cannot run automatically message in occur
2053 */
2054 static void nsp32_msgin_occur(Scsi_Cmnd *SCpnt,
2055 unsigned long irq_status,
2056 unsigned short execph)
2057 {
2058 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
2059 unsigned int base = SCpnt->device->host->io_port;
2060 unsigned char msg;
2061 unsigned char msgtype;
2062 unsigned char newlun;
2063 unsigned short command = 0;
2064 int msgclear = TRUE;
2065 long new_sgtp;
2066 int ret;
2067
2068 /*
2069 * read first message
2070 * Use SCSIDATA_W_ACK instead of SCSIDATAIN, because the procedure
2071 * of Message-In have to be processed before sending back SCSI ACK.
2072 */
2073 msg = nsp32_read1(base, SCSI_DATA_IN);
2074 data->msginbuf[(unsigned char)data->msgin_len] = msg;
2075 msgtype = data->msginbuf[0];
2076 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR,
2077 "enter: msglen: 0x%x msgin: 0x%x msgtype: 0x%x",
2078 data->msgin_len, msg, msgtype);
2079
2080 /*
2081 * TODO: We need checking whether bus phase is message in?
2082 */
2083
2084 /*
2085 * assert SCSI ACK
2086 */
2087 nsp32_sack_assert(data);
2088
2089 /*
2090 * processing IDENTIFY
2091 */
2092 if (msgtype & 0x80) {
2093 if (!(irq_status & IRQSTATUS_RESELECT_OCCUER)) {
2094 /* Invalid (non reselect) phase */
2095 goto reject;
2096 }
2097
2098 newlun = msgtype & 0x1f; /* TODO: SPI-3 compliant? */
2099 ret = nsp32_reselection(SCpnt, newlun);
2100 if (ret == TRUE) {
2101 goto restart;
2102 } else {
2103 goto reject;
2104 }
2105 }
2106
2107 /*
2108 * processing messages except for IDENTIFY
2109 *
2110 * TODO: Messages are all SCSI-2 terminology. SCSI-3 compliance is TODO.
2111 */
2112 switch (msgtype) {
2113 /*
2114 * 1-byte message
2115 */
2116 case COMMAND_COMPLETE:
2117 case DISCONNECT:
2118 /*
2119 * These messages should not be occurred.
2120 * They should be processed on AutoSCSI sequencer.
2121 */
2122 nsp32_msg(KERN_WARNING,
2123 "unexpected message of AutoSCSI MsgIn: 0x%x", msg);
2124 break;
2125
2126 case RESTORE_POINTERS:
2127 /*
2128 * AutoMsgIn03 is disabled, and HBA gets this message.
2129 */
2130
2131 if ((execph & DATA_IN_PHASE) || (execph & DATA_OUT_PHASE)) {
2132 unsigned int s_sacklen;
2133
2134 s_sacklen = nsp32_read4(base, SAVED_SACK_CNT);
2135 if ((execph & MSGIN_02_VALID) && (s_sacklen > 0)) {
2136 nsp32_adjust_busfree(SCpnt, s_sacklen);
2137 } else {
2138 /* No need to rewrite SGT */
2139 }
2140 }
2141 data->cur_lunt->msgin03 = FALSE;
2142
2143 /* Update with the new value */
2144
2145 /* reset SACK/SavedACK counter (or ALL clear?) */
2146 nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK);
2147
2148 /*
2149 * set new sg pointer
2150 */
2151 new_sgtp = data->cur_lunt->sglun_paddr +
2152 (data->cur_lunt->cur_entry * sizeof(nsp32_sgtable));
2153 nsp32_write4(base, SGT_ADR, new_sgtp);
2154
2155 break;
2156
2157 case SAVE_POINTERS:
2158 /*
2159 * These messages should not be occurred.
2160 * They should be processed on AutoSCSI sequencer.
2161 */
2162 nsp32_msg (KERN_WARNING,
2163 "unexpected message of AutoSCSI MsgIn: SAVE_POINTERS");
2164
2165 break;
2166
2167 case MESSAGE_REJECT:
2168 /* If previous message_out is sending SDTR, and get
2169 message_reject from target, SDTR negotiation is failed */
2170 if (data->cur_target->sync_flag &
2171 (SDTR_INITIATOR | SDTR_TARGET)) {
2172 /*
2173 * Current target is negotiating SDTR, but it's
2174 * failed. Fall back to async transfer mode, and set
2175 * SDTR_DONE.
2176 */
2177 nsp32_set_async(data, data->cur_target);
2178 data->cur_target->sync_flag &= ~SDTR_INITIATOR;
2179 data->cur_target->sync_flag |= SDTR_DONE;
2180
2181 }
2182 break;
2183
2184 case LINKED_CMD_COMPLETE:
2185 case LINKED_FLG_CMD_COMPLETE:
2186 /* queue tag is not supported currently */
2187 nsp32_msg (KERN_WARNING,
2188 "unsupported message: 0x%x", msgtype);
2189 break;
2190
2191 case INITIATE_RECOVERY:
2192 /* staring ECA (Extended Contingent Allegiance) state. */
2193 /* This message is declined in SPI2 or later. */
2194
2195 goto reject;
2196
2197 /*
2198 * 2-byte message
2199 */
2200 case SIMPLE_QUEUE_TAG:
2201 case 0x23:
2202 /*
2203 * 0x23: Ignore_Wide_Residue is not declared in scsi.h.
2204 * No support is needed.
2205 */
2206 if (data->msgin_len >= 1) {
2207 goto reject;
2208 }
2209
2210 /* current position is 1-byte of 2 byte */
2211 msgclear = FALSE;
2212
2213 break;
2214
2215 /*
2216 * extended message
2217 */
2218 case EXTENDED_MESSAGE:
2219 if (data->msgin_len < 1) {
2220 /*
2221 * Current position does not reach 2-byte
2222 * (2-byte is extended message length).
2223 */
2224 msgclear = FALSE;
2225 break;
2226 }
2227
2228 if ((data->msginbuf[1] + 1) > data->msgin_len) {
2229 /*
2230 * Current extended message has msginbuf[1] + 2
2231 * (msgin_len starts counting from 0, so buf[1] + 1).
2232 * If current message position is not finished,
2233 * continue receiving message.
2234 */
2235 msgclear = FALSE;
2236 break;
2237 }
2238
2239 /*
2240 * Reach here means regular length of each type of
2241 * extended messages.
2242 */
2243 switch (data->msginbuf[2]) {
2244 case EXTENDED_MODIFY_DATA_POINTER:
2245 /* TODO */
2246 goto reject; /* not implemented yet */
2247 break;
2248
2249 case EXTENDED_SDTR:
2250 /*
2251 * Exchange this message between initiator and target.
2252 */
2253 if (data->msgin_len != EXTENDED_SDTR_LEN + 1) {
2254 /*
2255 * received inappropriate message.
2256 */
2257 goto reject;
2258 break;
2259 }
2260
2261 nsp32_analyze_sdtr(SCpnt);
2262
2263 break;
2264
2265 case EXTENDED_EXTENDED_IDENTIFY:
2266 /* SCSI-I only, not supported. */
2267 goto reject; /* not implemented yet */
2268
2269 break;
2270
2271 case EXTENDED_WDTR:
2272 goto reject; /* not implemented yet */
2273
2274 break;
2275
2276 default:
2277 goto reject;
2278 }
2279 break;
2280
2281 default:
2282 goto reject;
2283 }
2284
2285 restart:
2286 if (msgclear == TRUE) {
2287 data->msgin_len = 0;
2288
2289 /*
2290 * If restarting AutoSCSI, but there are some message to out
2291 * (msgout_len > 0), set AutoATN, and set SCSIMSGOUT as 0
2292 * (MV_VALID = 0). When commandcontrol is written with
2293 * AutoSCSI restart, at the same time MsgOutOccur should be
2294 * happened (however, such situation is really possible...?).
2295 */
2296 if (data->msgout_len > 0) {
2297 nsp32_write4(base, SCSI_MSG_OUT, 0);
2298 command |= AUTO_ATN;
2299 }
2300
2301 /*
2302 * restart AutoSCSI
2303 * If it's failed, COMMANDCONTROL_AUTO_COMMAND_PHASE is needed.
2304 */
2305 command |= (AUTO_MSGIN_00_OR_04 | AUTO_MSGIN_02);
2306
2307 /*
2308 * If current msgin03 is TRUE, then flag on.
2309 */
2310 if (data->cur_lunt->msgin03 == TRUE) {
2311 command |= AUTO_MSGIN_03;
2312 }
2313 data->cur_lunt->msgin03 = FALSE;
2314 } else {
2315 data->msgin_len++;
2316 }
2317
2318 /*
2319 * restart AutoSCSI
2320 */
2321 nsp32_restart_autoscsi(SCpnt, command);
2322
2323 /*
2324 * wait SCSI REQ negate for REQ-ACK handshake
2325 */
2326 nsp32_wait_req(data, NEGATE);
2327
2328 /*
2329 * negate SCSI ACK
2330 */
2331 nsp32_sack_negate(data);
2332
2333 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "exit");
2334
2335 return;
2336
2337 reject:
2338 nsp32_msg(KERN_WARNING,
2339 "invalid or unsupported MessageIn, rejected. "
2340 "current msg: 0x%x (len: 0x%x), processing msg: 0x%x",
2341 msg, data->msgin_len, msgtype);
2342 nsp32_build_reject(SCpnt);
2343 data->msgin_len = 0;
2344
2345 goto restart;
2346 }
2347
2348 /*
2349 *
2350 */
2351 static void nsp32_analyze_sdtr(Scsi_Cmnd *SCpnt)
2352 {
2353 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
2354 nsp32_target *target = data->cur_target;
2355 nsp32_sync_table *synct;
2356 unsigned char get_period = data->msginbuf[3];
2357 unsigned char get_offset = data->msginbuf[4];
2358 int entry;
2359 int syncnum;
2360
2361 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "enter");
2362
2363 synct = data->synct;
2364 syncnum = data->syncnum;
2365
2366 /*
2367 * If this inititor sent the SDTR message, then target responds SDTR,
2368 * initiator SYNCREG, ACKWIDTH from SDTR parameter.
2369 * Messages are not appropriate, then send back reject message.
2370 * If initiator did not send the SDTR, but target sends SDTR,
2371 * initiator calculator the appropriate parameter and send back SDTR.
2372 */
2373 if (target->sync_flag & SDTR_INITIATOR) {
2374 /*
2375 * Initiator sent SDTR, the target responds and
2376 * send back negotiation SDTR.
2377 */
2378 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "target responds SDTR");
2379
2380 target->sync_flag &= ~SDTR_INITIATOR;
2381 target->sync_flag |= SDTR_DONE;
2382
2383 /*
2384 * offset:
2385 */
2386 if (get_offset > SYNC_OFFSET) {
2387 /*
2388 * Negotiation is failed, the target send back
2389 * unexpected offset value.
2390 */
2391 goto reject;
2392 }
2393
2394 if (get_offset == ASYNC_OFFSET) {
2395 /*
2396 * Negotiation is succeeded, the target want
2397 * to fall back into asynchronous transfer mode.
2398 */
2399 goto async;
2400 }
2401
2402 /*
2403 * period:
2404 * Check whether sync period is too short. If too short,
2405 * fall back to async mode. If it's ok, then investigate
2406 * the received sync period. If sync period is acceptable
2407 * between sync table start_period and end_period, then
2408 * set this I_T nexus as sent offset and period.
2409 * If it's not acceptable, send back reject and fall back
2410 * to async mode.
2411 */
2412 if (get_period < data->synct[0].period_num) {
2413 /*
2414 * Negotiation is failed, the target send back
2415 * unexpected period value.
2416 */
2417 goto reject;
2418 }
2419
2420 entry = nsp32_search_period_entry(data, target, get_period);
2421
2422 if (entry < 0) {
2423 /*
2424 * Target want to use long period which is not
2425 * acceptable NinjaSCSI-32Bi/UDE.
2426 */
2427 goto reject;
2428 }
2429
2430 /*
2431 * Set new sync table and offset in this I_T nexus.
2432 */
2433 nsp32_set_sync_entry(data, target, entry, get_offset);
2434 } else {
2435 /* Target send SDTR to initiator. */
2436 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "target send SDTR");
2437
2438 target->sync_flag |= SDTR_INITIATOR;
2439
2440 /* offset: */
2441 if (get_offset > SYNC_OFFSET) {
2442 /* send back as SYNC_OFFSET */
2443 get_offset = SYNC_OFFSET;
2444 }
2445
2446 /* period: */
2447 if (get_period < data->synct[0].period_num) {
2448 get_period = data->synct[0].period_num;
2449 }
2450
2451 entry = nsp32_search_period_entry(data, target, get_period);
2452
2453 if (get_offset == ASYNC_OFFSET || entry < 0) {
2454 nsp32_set_async(data, target);
2455 nsp32_build_sdtr(SCpnt, 0, ASYNC_OFFSET);
2456 } else {
2457 nsp32_set_sync_entry(data, target, entry, get_offset);
2458 nsp32_build_sdtr(SCpnt, get_period, get_offset);
2459 }
2460 }
2461
2462 target->period = get_period;
2463 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "exit");
2464 return;
2465
2466 reject:
2467 /*
2468 * If the current message is unacceptable, send back to the target
2469 * with reject message.
2470 */
2471 nsp32_build_reject(SCpnt);
2472
2473 async:
2474 nsp32_set_async(data, target); /* set as ASYNC transfer mode */
2475
2476 target->period = 0;
2477 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "exit: set async");
2478 return;
2479 }
2480
2481
2482 /*
2483 * Search config entry number matched in sync_table from given
2484 * target and speed period value. If failed to search, return negative value.
2485 */
2486 static int nsp32_search_period_entry(nsp32_hw_data *data,
2487 nsp32_target *target,
2488 unsigned char period)
2489 {
2490 int i;
2491
2492 if (target->limit_entry >= data->syncnum) {
2493 nsp32_msg(KERN_ERR, "limit_entry exceeds syncnum!");
2494 target->limit_entry = 0;
2495 }
2496
2497 for (i = target->limit_entry; i < data->syncnum; i++) {
2498 if (period >= data->synct[i].start_period &&
2499 period <= data->synct[i].end_period) {
2500 break;
2501 }
2502 }
2503
2504 /*
2505 * Check given period value is over the sync_table value.
2506 * If so, return max value.
2507 */
2508 if (i == data->syncnum) {
2509 i = -1;
2510 }
2511
2512 return i;
2513 }
2514
2515
2516 /*
2517 * target <-> initiator use ASYNC transfer
2518 */
2519 static void nsp32_set_async(nsp32_hw_data *data, nsp32_target *target)
2520 {
2521 unsigned char period = data->synct[target->limit_entry].period_num;
2522
2523 target->offset = ASYNC_OFFSET;
2524 target->period = 0;
2525 target->syncreg = TO_SYNCREG(period, ASYNC_OFFSET);
2526 target->ackwidth = 0;
2527 target->sample_reg = 0;
2528
2529 nsp32_dbg(NSP32_DEBUG_SYNC, "set async");
2530 }
2531
2532
2533 /*
2534 * target <-> initiator use maximum SYNC transfer
2535 */
2536 static void nsp32_set_max_sync(nsp32_hw_data *data,
2537 nsp32_target *target,
2538 unsigned char *period,
2539 unsigned char *offset)
2540 {
2541 unsigned char period_num, ackwidth;
2542
2543 period_num = data->synct[target->limit_entry].period_num;
2544 *period = data->synct[target->limit_entry].start_period;
2545 ackwidth = data->synct[target->limit_entry].ackwidth;
2546 *offset = SYNC_OFFSET;
2547
2548 target->syncreg = TO_SYNCREG(period_num, *offset);
2549 target->ackwidth = ackwidth;
2550 target->offset = *offset;
2551 target->sample_reg = 0; /* disable SREQ sampling */
2552 }
2553
2554
2555 /*
2556 * target <-> initiator use entry number speed
2557 */
2558 static void nsp32_set_sync_entry(nsp32_hw_data *data,
2559 nsp32_target *target,
2560 int entry,
2561 unsigned char offset)
2562 {
2563 unsigned char period, ackwidth, sample_rate;
2564
2565 period = data->synct[entry].period_num;
2566 ackwidth = data->synct[entry].ackwidth;
2567 offset = offset;
2568 sample_rate = data->synct[entry].sample_rate;
2569
2570 target->syncreg = TO_SYNCREG(period, offset);
2571 target->ackwidth = ackwidth;
2572 target->offset = offset;
2573 target->sample_reg = sample_rate | SAMPLING_ENABLE;
2574
2575 nsp32_dbg(NSP32_DEBUG_SYNC, "set sync");
2576 }
2577
2578
2579 /*
2580 * It waits until SCSI REQ becomes assertion or negation state.
2581 *
2582 * Note: If nsp32_msgin_occur is called, we asserts SCSI ACK. Then
2583 * connected target responds SCSI REQ negation. We have to wait
2584 * SCSI REQ becomes negation in order to negate SCSI ACK signal for
2585 * REQ-ACK handshake.
2586 */
2587 static void nsp32_wait_req(nsp32_hw_data *data, int state)
2588 {
2589 unsigned int base = data->BaseAddress;
2590 int wait_time = 0;
2591 unsigned char bus, req_bit;
2592
2593 if (!((state == ASSERT) || (state == NEGATE))) {
2594 nsp32_msg(KERN_ERR, "unknown state designation");
2595 }
2596 /* REQ is BIT(5) */
2597 req_bit = (state == ASSERT ? BUSMON_REQ : 0);
2598
2599 do {
2600 bus = nsp32_read1(base, SCSI_BUS_MONITOR);
2601 if ((bus & BUSMON_REQ) == req_bit) {
2602 nsp32_dbg(NSP32_DEBUG_WAIT,
2603 "wait_time: %d", wait_time);
2604 return;
2605 }
2606 udelay(1);
2607 wait_time++;
2608 } while (wait_time < REQSACK_TIMEOUT_TIME);
2609
2610 nsp32_msg(KERN_WARNING, "wait REQ timeout, req_bit: 0x%x", req_bit);
2611 }
2612
2613 /*
2614 * It waits until SCSI SACK becomes assertion or negation state.
2615 */
2616 static void nsp32_wait_sack(nsp32_hw_data *data, int state)
2617 {
2618 unsigned int base = data->BaseAddress;
2619 int wait_time = 0;
2620 unsigned char bus, ack_bit;
2621
2622 if (!((state == ASSERT) || (state == NEGATE))) {
2623 nsp32_msg(KERN_ERR, "unknown state designation");
2624 }
2625 /* ACK is BIT(4) */
2626 ack_bit = (state == ASSERT ? BUSMON_ACK : 0);
2627
2628 do {
2629 bus = nsp32_read1(base, SCSI_BUS_MONITOR);
2630 if ((bus & BUSMON_ACK) == ack_bit) {
2631 nsp32_dbg(NSP32_DEBUG_WAIT,
2632 "wait_time: %d", wait_time);
2633 return;
2634 }
2635 udelay(1);
2636 wait_time++;
2637 } while (wait_time < REQSACK_TIMEOUT_TIME);
2638
2639 nsp32_msg(KERN_WARNING, "wait SACK timeout, ack_bit: 0x%x", ack_bit);
2640 }
2641
2642 /*
2643 * assert SCSI ACK
2644 *
2645 * Note: SCSI ACK assertion needs with ACKENB=1, AUTODIRECTION=1.
2646 */
2647 static void nsp32_sack_assert(nsp32_hw_data *data)
2648 {
2649 unsigned int base = data->BaseAddress;
2650 unsigned char busctrl;
2651
2652 busctrl = nsp32_read1(base, SCSI_BUS_CONTROL);
2653 busctrl |= (BUSCTL_ACK | AUTODIRECTION | ACKENB);
2654 nsp32_write1(base, SCSI_BUS_CONTROL, busctrl);
2655 }
2656
2657 /*
2658 * negate SCSI ACK
2659 */
2660 static void nsp32_sack_negate(nsp32_hw_data *data)
2661 {
2662 unsigned int base = data->BaseAddress;
2663 unsigned char busctrl;
2664
2665 busctrl = nsp32_read1(base, SCSI_BUS_CONTROL);
2666 busctrl &= ~BUSCTL_ACK;
2667 nsp32_write1(base, SCSI_BUS_CONTROL, busctrl);
2668 }
2669
2670
2671
2672 /*
2673 * Note: n_io_port is defined as 0x7f because I/O register port is
2674 * assigned as:
2675 * 0x800-0x8ff: memory mapped I/O port
2676 * 0x900-0xbff: (map same 0x800-0x8ff I/O port image repeatedly)
2677 * 0xc00-0xfff: CardBus status registers
2678 */
2679 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73))
2680 #define DETECT_OK 0
2681 #define DETECT_NG 1
2682 #define PCIDEV pdev
2683 static int nsp32_detect(struct pci_dev *pdev)
2684 #else
2685 #define DETECT_OK 1
2686 #define DETECT_NG 0
2687 #define PCIDEV (data->Pci)
2688 static int nsp32_detect(Scsi_Host_Template *sht)
2689 #endif
2690 {
2691 struct Scsi_Host *host; /* registered host structure */
2692 struct resource *res;
2693 nsp32_hw_data *data;
2694 int ret;
2695 int i, j;
2696
2697 nsp32_dbg(NSP32_DEBUG_REGISTER, "enter");
2698
2699 /*
2700 * register this HBA as SCSI device
2701 */
2702 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73))
2703 host = scsi_host_alloc(&nsp32_template, sizeof(nsp32_hw_data));
2704 #else
2705 host = scsi_register(sht, sizeof(nsp32_hw_data));
2706 #endif
2707 if (host == NULL) {
2708 nsp32_msg (KERN_ERR, "failed to scsi register");
2709 goto err;
2710 }
2711
2712 /*
2713 * set nsp32_hw_data
2714 */
2715 data = (nsp32_hw_data *)host->hostdata;
2716
2717 memcpy(data, &nsp32_data_base, sizeof(nsp32_hw_data));
2718
2719 host->irq = data->IrqNumber;
2720 host->io_port = data->BaseAddress;
2721 host->unique_id = data->BaseAddress;
2722 host->n_io_port = data->NumAddress;
2723 host->base = data->MmioAddress;
2724 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,63))
2725 scsi_set_device(host, &PCIDEV->dev);
2726 #else
2727 scsi_set_pci_device(host, PCIDEV);
2728 #endif
2729
2730 data->Host = host;
2731 spin_lock_init(&(data->Lock));
2732
2733 data->cur_lunt = NULL;
2734 data->cur_target = NULL;
2735
2736 /*
2737 * Bus master transfer mode is supported currently.
2738 */
2739 data->trans_method = NSP32_TRANSFER_BUSMASTER;
2740
2741 /*
2742 * Set clock div, CLOCK_4 (HBA has own external clock, and
2743 * dividing * 100ns/4).
2744 * Currently CLOCK_4 has only tested, not for CLOCK_2/PCICLK yet.
2745 */
2746 data->clock = CLOCK_4;
2747
2748 /*
2749 * Select appropriate nsp32_sync_table and set I_CLOCKDIV.
2750 */
2751 switch (data->clock) {
2752 case CLOCK_4:
2753 /* If data->clock is CLOCK_4, then select 40M sync table. */
2754 data->synct = nsp32_sync_table_40M;
2755 data->syncnum = ARRAY_SIZE(nsp32_sync_table_40M);
2756 break;
2757 case CLOCK_2:
2758 /* If data->clock is CLOCK_2, then select 20M sync table. */
2759 data->synct = nsp32_sync_table_20M;
2760 data->syncnum = ARRAY_SIZE(nsp32_sync_table_20M);
2761 break;
2762 case PCICLK:
2763 /* If data->clock is PCICLK, then select pci sync table. */
2764 data->synct = nsp32_sync_table_pci;
2765 data->syncnum = ARRAY_SIZE(nsp32_sync_table_pci);
2766 break;
2767 default:
2768 nsp32_msg(KERN_WARNING,
2769 "Invalid clock div is selected, set CLOCK_4.");
2770 /* Use default value CLOCK_4 */
2771 data->clock = CLOCK_4;
2772 data->synct = nsp32_sync_table_40M;
2773 data->syncnum = ARRAY_SIZE(nsp32_sync_table_40M);
2774 }
2775
2776 /*
2777 * setup nsp32_lunt
2778 */
2779
2780 /*
2781 * setup DMA
2782 */
2783 if (pci_set_dma_mask(PCIDEV, 0xffffffffUL) != 0) {
2784 nsp32_msg (KERN_ERR, "failed to set PCI DMA mask");
2785 goto scsi_unregister;
2786 }
2787
2788 /*
2789 * allocate autoparam DMA resource.
2790 */
2791 data->autoparam = pci_alloc_consistent(PCIDEV, sizeof(nsp32_autoparam), &(data->auto_paddr));
2792 if (data->autoparam == NULL) {
2793 nsp32_msg(KERN_ERR, "failed to allocate DMA memory");
2794 goto scsi_unregister;
2795 }
2796
2797 /*
2798 * allocate scatter-gather DMA resource.
2799 */
2800 data->sg_list = pci_alloc_consistent(PCIDEV, NSP32_SG_TABLE_SIZE,
2801 &(data->sg_paddr));
2802 if (data->sg_list == NULL) {
2803 nsp32_msg(KERN_ERR, "failed to allocate DMA memory");
2804 goto free_autoparam;
2805 }
2806
2807 for (i = 0; i < ARRAY_SIZE(data->lunt); i++) {
2808 for (j = 0; j < ARRAY_SIZE(data->lunt[0]); j++) {
2809 int offset = i * ARRAY_SIZE(data->lunt[0]) + j;
2810 nsp32_lunt tmp = {
2811 .SCpnt = NULL,
2812 .save_datp = 0,
2813 .msgin03 = FALSE,
2814 .sg_num = 0,
2815 .cur_entry = 0,
2816 .sglun = &(data->sg_list[offset]),
2817 .sglun_paddr = data->sg_paddr + (offset * sizeof(nsp32_sglun)),
2818 };
2819
2820 data->lunt[i][j] = tmp;
2821 }
2822 }
2823
2824 /*
2825 * setup target
2826 */
2827 for (i = 0; i < ARRAY_SIZE(data->target); i++) {
2828 nsp32_target *target = &(data->target[i]);
2829
2830 target->limit_entry = 0;
2831 target->sync_flag = 0;
2832 nsp32_set_async(data, target);
2833 }
2834
2835 /*
2836 * EEPROM check
2837 */
2838 ret = nsp32_getprom_param(data);
2839 if (ret == FALSE) {
2840 data->resettime = 3; /* default 3 */
2841 }
2842
2843 /*
2844 * setup HBA
2845 */
2846 nsp32hw_init(data);
2847
2848 snprintf(data->info_str, sizeof(data->info_str),
2849 "NinjaSCSI-32Bi/UDE: irq %d, io 0x%lx+0x%x",
2850 host->irq, host->io_port, host->n_io_port);
2851
2852 /*
2853 * SCSI bus reset
2854 *
2855 * Note: It's important to reset SCSI bus in initialization phase.
2856 * NinjaSCSI-32Bi/UDE HBA EEPROM seems to exchange SDTR when
2857 * system is coming up, so SCSI devices connected to HBA is set as
2858 * un-asynchronous mode. It brings the merit that this HBA is
2859 * ready to start synchronous transfer without any preparation,
2860 * but we are difficult to control transfer speed. In addition,
2861 * it prevents device transfer speed from effecting EEPROM start-up
2862 * SDTR. NinjaSCSI-32Bi/UDE has the feature if EEPROM is set as
2863 * Auto Mode, then FAST-10M is selected when SCSI devices are
2864 * connected same or more than 4 devices. It should be avoided
2865 * depending on this specification. Thus, resetting the SCSI bus
2866 * restores all connected SCSI devices to asynchronous mode, then
2867 * this driver set SDTR safely later, and we can control all SCSI
2868 * device transfer mode.
2869 */
2870 nsp32_do_bus_reset(data);
2871
2872 ret = request_irq(host->irq, do_nsp32_isr,
2873 SA_SHIRQ | SA_SAMPLE_RANDOM, "nsp32", data);
2874 if (ret < 0) {
2875 nsp32_msg(KERN_ERR, "Unable to allocate IRQ for NinjaSCSI32 "
2876 "SCSI PCI controller. Interrupt: %d", host->irq);
2877 goto free_sg_list;
2878 }
2879
2880 /*
2881 * PCI IO register
2882 */
2883 res = request_region(host->io_port, host->n_io_port, "nsp32");
2884 if (res == NULL) {
2885 nsp32_msg(KERN_ERR,
2886 "I/O region 0x%lx+0x%lx is already used",
2887 data->BaseAddress, data->NumAddress);
2888 goto free_irq;
2889 }
2890
2891 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73))
2892 scsi_add_host (host, &PCIDEV->dev);
2893 scsi_scan_host(host);
2894 #endif
2895 pci_set_drvdata(PCIDEV, host);
2896 return DETECT_OK;
2897
2898 free_irq:
2899 free_irq(host->irq, data);
2900
2901 free_sg_list:
2902 pci_free_consistent(PCIDEV, NSP32_SG_TABLE_SIZE,
2903 data->sg_list, data->sg_paddr);
2904
2905 free_autoparam:
2906 pci_free_consistent(PCIDEV, sizeof(nsp32_autoparam),
2907 data->autoparam, data->auto_paddr);
2908
2909 scsi_unregister:
2910 scsi_host_put(host);
2911
2912 err:
2913 return DETECT_NG;
2914 }
2915 #undef DETECT_OK
2916 #undef DETECT_NG
2917 #undef PCIDEV
2918
2919 static int nsp32_release(struct Scsi_Host *host)
2920 {
2921 nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata;
2922
2923 if (data->autoparam) {
2924 pci_free_consistent(data->Pci, sizeof(nsp32_autoparam),
2925 data->autoparam, data->auto_paddr);
2926 }
2927
2928 if (data->sg_list) {
2929 pci_free_consistent(data->Pci, NSP32_SG_TABLE_SIZE,
2930 data->sg_list, data->sg_paddr);
2931 }
2932
2933 if (host->irq) {
2934 free_irq(host->irq, data);
2935 }
2936
2937 if (host->io_port && host->n_io_port) {
2938 release_region(host->io_port, host->n_io_port);
2939 }
2940
2941 if (data->MmioAddress != 0) {
2942 iounmap((void *)(data->MmioAddress));
2943 }
2944
2945 return 0;
2946 }
2947
2948 static const char *nsp32_info(struct Scsi_Host *shpnt)
2949 {
2950 nsp32_hw_data *data = (nsp32_hw_data *)shpnt->hostdata;
2951
2952 return data->info_str;
2953 }
2954
2955
2956 /****************************************************************************
2957 * error handler
2958 */
2959 static int nsp32_eh_abort(Scsi_Cmnd *SCpnt)
2960 {
2961 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
2962 unsigned int base = SCpnt->device->host->io_port;
2963
2964 nsp32_msg(KERN_WARNING, "abort");
2965
2966 if (data->cur_lunt->SCpnt == NULL) {
2967 nsp32_dbg(NSP32_DEBUG_BUSRESET, "abort failed");
2968 return FAILED;
2969 }
2970
2971 if (data->cur_target->sync_flag & (SDTR_INITIATOR | SDTR_TARGET)) {
2972 /* reset SDTR negotiation */
2973 data->cur_target->sync_flag = 0;
2974 nsp32_set_async(data, data->cur_target);
2975 }
2976
2977 nsp32_write2(base, TRANSFER_CONTROL, 0);
2978 nsp32_write2(base, BM_CNT, 0);
2979
2980 SCpnt->result = DID_ABORT << 16;
2981 nsp32_scsi_done(SCpnt);
2982
2983 nsp32_dbg(NSP32_DEBUG_BUSRESET, "abort success");
2984 return SUCCESS;
2985 }
2986
2987 static int nsp32_eh_bus_reset(Scsi_Cmnd *SCpnt)
2988 {
2989 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
2990 unsigned int base = SCpnt->device->host->io_port;
2991
2992 nsp32_msg(KERN_INFO, "Bus Reset");
2993 nsp32_dbg(NSP32_DEBUG_BUSRESET, "SCpnt=0x%x", SCpnt);
2994
2995 nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
2996 nsp32_do_bus_reset(data);
2997 nsp32_write2(base, IRQ_CONTROL, 0);
2998
2999 return SUCCESS; /* SCSI bus reset is succeeded at any time. */
3000 }
3001
3002 static void nsp32_do_bus_reset(nsp32_hw_data *data)
3003 {
3004 unsigned int base = data->BaseAddress;
3005 unsigned short intrdat;
3006 int i;
3007
3008 nsp32_dbg(NSP32_DEBUG_BUSRESET, "in");
3009
3010 /*
3011 * stop all transfer
3012 * clear TRANSFERCONTROL_BM_START
3013 * clear counter
3014 */
3015 nsp32_write2(base, TRANSFER_CONTROL, 0);
3016 nsp32_write4(base, BM_CNT, 0);
3017 nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK);
3018
3019 /*
3020 * fall back to asynchronous transfer mode
3021 * initialize SDTR negotiation flag
3022 */
3023 for (i = 0; i < ARRAY_SIZE(data->target); i++) {
3024 nsp32_target *target = &data->target[i];
3025
3026 target->sync_flag = 0;
3027 nsp32_set_async(data, target);
3028 }
3029
3030 /*
3031 * reset SCSI bus
3032 */
3033 nsp32_write1(base, SCSI_BUS_CONTROL, BUSCTL_RST);
3034 udelay(RESET_HOLD_TIME);
3035 nsp32_write1(base, SCSI_BUS_CONTROL, 0);
3036 for(i = 0; i < 5; i++) {
3037 intrdat = nsp32_read2(base, IRQ_STATUS); /* dummy read */
3038 nsp32_dbg(NSP32_DEBUG_BUSRESET, "irq:1: 0x%x", intrdat);
3039 }
3040
3041 data->CurrentSC = NULL;
3042 }
3043
3044 static int nsp32_eh_host_reset(Scsi_Cmnd *SCpnt)
3045 {
3046 struct Scsi_Host *host = SCpnt->device->host;
3047 unsigned int base = SCpnt->device->host->io_port;
3048 nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata;
3049
3050 nsp32_msg(KERN_INFO, "Host Reset");
3051 nsp32_dbg(NSP32_DEBUG_BUSRESET, "SCpnt=0x%x", SCpnt);
3052
3053 nsp32hw_init(data);
3054 nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
3055 nsp32_do_bus_reset(data);
3056 nsp32_write2(base, IRQ_CONTROL, 0);
3057
3058 return SUCCESS; /* Host reset is succeeded at any time. */
3059 }
3060
3061
3062 /**************************************************************************
3063 * EEPROM handler
3064 */
3065
3066 /*
3067 * getting EEPROM parameter
3068 */
3069 static int nsp32_getprom_param(nsp32_hw_data *data)
3070 {
3071 int vendor = data->pci_devid->vendor;
3072 int device = data->pci_devid->device;
3073 int ret, val, i;
3074
3075 /*
3076 * EEPROM checking.
3077 */
3078 ret = nsp32_prom_read(data, 0x7e);
3079 if (ret != 0x55) {
3080 nsp32_msg(KERN_INFO, "No EEPROM detected: 0x%x", ret);
3081 return FALSE;
3082 }
3083 ret = nsp32_prom_read(data, 0x7f);
3084 if (ret != 0xaa) {
3085 nsp32_msg(KERN_INFO, "Invalid number: 0x%x", ret);
3086 return FALSE;
3087 }
3088
3089 /*
3090 * check EEPROM type
3091 */
3092 if (vendor == PCI_VENDOR_ID_WORKBIT &&
3093 device == PCI_DEVICE_ID_WORKBIT_STANDARD) {
3094 ret = nsp32_getprom_c16(data);
3095 } else if (vendor == PCI_VENDOR_ID_WORKBIT &&
3096 device == PCI_DEVICE_ID_NINJASCSI_32BIB_LOGITEC) {
3097 ret = nsp32_getprom_at24(data);
3098 } else if (vendor == PCI_VENDOR_ID_WORKBIT &&
3099 device == PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO ) {
3100 ret = nsp32_getprom_at24(data);
3101 } else {
3102 nsp32_msg(KERN_WARNING, "Unknown EEPROM");
3103 ret = FALSE;
3104 }
3105
3106 /* for debug : SPROM data full checking */
3107 for (i = 0; i <= 0x1f; i++) {
3108 val = nsp32_prom_read(data, i);
3109 nsp32_dbg(NSP32_DEBUG_EEPROM,
3110 "rom address 0x%x : 0x%x", i, val);
3111 }
3112
3113 return ret;
3114 }
3115
3116
3117 /*
3118 * AT24C01A (Logitec: LHA-600S), AT24C02 (Melco Buffalo: IFC-USLP) data map:
3119 *
3120 * ROMADDR
3121 * 0x00 - 0x06 : Device Synchronous Transfer Period (SCSI ID 0 - 6)
3122 * Value 0x0: ASYNC, 0x0c: Ultra-20M, 0x19: Fast-10M
3123 * 0x07 : HBA Synchronous Transfer Period
3124 * Value 0: AutoSync, 1: Manual Setting
3125 * 0x08 - 0x0f : Not Used? (0x0)
3126 * 0x10 : Bus Termination
3127 * Value 0: Auto[ON], 1: ON, 2: OFF
3128 * 0x11 : Not Used? (0)
3129 * 0x12 : Bus Reset Delay Time (0x03)
3130 * 0x13 : Bootable CD Support
3131 * Value 0: Disable, 1: Enable
3132 * 0x14 : Device Scan
3133 * Bit 7 6 5 4 3 2 1 0
3134 * | <----------------->
3135 * | SCSI ID: Value 0: Skip, 1: YES
3136 * |-> Value 0: ALL scan, Value 1: Manual
3137 * 0x15 - 0x1b : Not Used? (0)
3138 * 0x1c : Constant? (0x01) (clock div?)
3139 * 0x1d - 0x7c : Not Used (0xff)
3140 * 0x7d : Not Used? (0xff)
3141 * 0x7e : Constant (0x55), Validity signature
3142 * 0x7f : Constant (0xaa), Validity signature
3143 */
3144 static int nsp32_getprom_at24(nsp32_hw_data *data)
3145 {
3146 int ret, i;
3147 int auto_sync;
3148 nsp32_target *target;
3149 int entry;
3150
3151 /*
3152 * Reset time which is designated by EEPROM.
3153 *
3154 * TODO: Not used yet.
3155 */
3156 data->resettime = nsp32_prom_read(data, 0x12);
3157
3158 /*
3159 * HBA Synchronous Transfer Period
3160 *
3161 * Note: auto_sync = 0: auto, 1: manual. Ninja SCSI HBA spec says
3162 * that if auto_sync is 0 (auto), and connected SCSI devices are
3163 * same or lower than 3, then transfer speed is set as ULTRA-20M.
3164 * On the contrary if connected SCSI devices are same or higher
3165 * than 4, then transfer speed is set as FAST-10M.
3166 *
3167 * I break this rule. The number of connected SCSI devices are
3168 * only ignored. If auto_sync is 0 (auto), then transfer speed is
3169 * forced as ULTRA-20M.
3170 */
3171 ret = nsp32_prom_read(data, 0x07);
3172 switch (ret) {
3173 case 0:
3174 auto_sync = TRUE;
3175 break;
3176 case 1:
3177 auto_sync = FALSE;
3178 break;
3179 default:
3180 nsp32_msg(KERN_WARNING,
3181 "Unsupported Auto Sync mode. Fall back to manual mode.");
3182 auto_sync = TRUE;
3183 }
3184
3185 if (trans_mode == ULTRA20M_MODE) {
3186 auto_sync = TRUE;
3187 }
3188
3189 /*
3190 * each device Synchronous Transfer Period
3191 */
3192 for (i = 0; i < NSP32_HOST_SCSIID; i++) {
3193 target = &data->target[i];
3194 if (auto_sync == TRUE) {
3195 target->limit_entry = 0; /* set as ULTRA20M */
3196 } else {
3197 ret = nsp32_prom_read(data, i);
3198 entry = nsp32_search_period_entry(data, target, ret);
3199 if (entry < 0) {
3200 /* search failed... set maximum speed */
3201 entry = 0;
3202 }
3203 target->limit_entry = entry;
3204 }
3205 }
3206
3207 return TRUE;
3208 }
3209
3210
3211 /*
3212 * C16 110 (I-O Data: SC-NBD) data map:
3213 *
3214 * ROMADDR
3215 * 0x00 - 0x06 : Device Synchronous Transfer Period (SCSI ID 0 - 6)
3216 * Value 0x0: 20MB/S, 0x1: 10MB/S, 0x2: 5MB/S, 0x3: ASYNC
3217 * 0x07 : 0 (HBA Synchronous Transfer Period: Auto Sync)
3218 * 0x08 - 0x0f : Not Used? (0x0)
3219 * 0x10 : Transfer Mode
3220 * Value 0: PIO, 1: Busmater
3221 * 0x11 : Bus Reset Delay Time (0x00-0x20)
3222 * 0x12 : Bus Termination
3223 * Value 0: Disable, 1: Enable
3224 * 0x13 - 0x19 : Disconnection
3225 * Value 0: Disable, 1: Enable
3226 * 0x1a - 0x7c : Not Used? (0)
3227 * 0x7d : Not Used? (0xf8)
3228 * 0x7e : Constant (0x55), Validity signature
3229 * 0x7f : Constant (0xaa), Validity signature
3230 */
3231 static int nsp32_getprom_c16(nsp32_hw_data *data)
3232 {
3233 int ret, i;
3234 nsp32_target *target;
3235 int entry, val;
3236
3237 /*
3238 * Reset time which is designated by EEPROM.
3239 *
3240 * TODO: Not used yet.
3241 */
3242 data->resettime = nsp32_prom_read(data, 0x11);
3243
3244 /*
3245 * each device Synchronous Transfer Period
3246 */
3247 for (i = 0; i < NSP32_HOST_SCSIID; i++) {
3248 target = &data->target[i];
3249 ret = nsp32_prom_read(data, i);
3250 switch (ret) {
3251 case 0: /* 20MB/s */
3252 val = 0x0c;
3253 break;
3254 case 1: /* 10MB/s */
3255 val = 0x19;
3256 break;
3257 case 2: /* 5MB/s */
3258 val = 0x32;
3259 break;
3260 case 3: /* ASYNC */
3261 val = 0x00;
3262 break;
3263 default: /* default 20MB/s */
3264 val = 0x0c;
3265 break;
3266 }
3267 entry = nsp32_search_period_entry(data, target, val);
3268 if (entry < 0 || trans_mode == ULTRA20M_MODE) {
3269 /* search failed... set maximum speed */
3270 entry = 0;
3271 }
3272 target->limit_entry = entry;
3273 }
3274
3275 return TRUE;
3276 }
3277
3278
3279 /*
3280 * Atmel AT24C01A (drived in 5V) serial EEPROM routines
3281 */
3282 static int nsp32_prom_read(nsp32_hw_data *data, int romaddr)
3283 {
3284 int i, val;
3285
3286 /* start condition */
3287 nsp32_prom_start(data);
3288
3289 /* device address */
3290 nsp32_prom_write_bit(data, 1); /* 1 */
3291 nsp32_prom_write_bit(data, 0); /* 0 */
3292 nsp32_prom_write_bit(data, 1); /* 1 */
3293 nsp32_prom_write_bit(data, 0); /* 0 */
3294 nsp32_prom_write_bit(data, 0); /* A2: 0 (GND) */
3295 nsp32_prom_write_bit(data, 0); /* A1: 0 (GND) */
3296 nsp32_prom_write_bit(data, 0); /* A0: 0 (GND) */
3297
3298 /* R/W: W for dummy write */
3299 nsp32_prom_write_bit(data, 0);
3300
3301 /* ack */
3302 nsp32_prom_write_bit(data, 0);
3303
3304 /* word address */
3305 for (i = 7; i >= 0; i--) {
3306 nsp32_prom_write_bit(data, ((romaddr >> i) & 1));
3307 }
3308
3309 /* ack */
3310 nsp32_prom_write_bit(data, 0);
3311
3312 /* start condition */
3313 nsp32_prom_start(data);
3314
3315 /* device address */
3316 nsp32_prom_write_bit(data, 1); /* 1 */
3317 nsp32_prom_write_bit(data, 0); /* 0 */
3318 nsp32_prom_write_bit(data, 1); /* 1 */
3319 nsp32_prom_write_bit(data, 0); /* 0 */
3320 nsp32_prom_write_bit(data, 0); /* A2: 0 (GND) */
3321 nsp32_prom_write_bit(data, 0); /* A1: 0 (GND) */
3322 nsp32_prom_write_bit(data, 0); /* A0: 0 (GND) */
3323
3324 /* R/W: R */
3325 nsp32_prom_write_bit(data, 1);
3326
3327 /* ack */
3328 nsp32_prom_write_bit(data, 0);
3329
3330 /* data... */
3331 val = 0;
3332 for (i = 7; i >= 0; i--) {
3333 val += (nsp32_prom_read_bit(data) << i);
3334 }
3335
3336 /* no ack */
3337 nsp32_prom_write_bit(data, 1);
3338
3339 /* stop condition */
3340 nsp32_prom_stop(data);
3341
3342 return val;
3343 }
3344
3345 static void nsp32_prom_set(nsp32_hw_data *data, int bit, int val)
3346 {
3347 int base = data->BaseAddress;
3348 int tmp;
3349
3350 tmp = nsp32_index_read1(base, SERIAL_ROM_CTL);
3351
3352 if (val == 0) {
3353 tmp &= ~bit;
3354 } else {
3355 tmp |= bit;
3356 }
3357
3358 nsp32_index_write1(base, SERIAL_ROM_CTL, tmp);
3359
3360 udelay(10);
3361 }
3362
3363 static int nsp32_prom_get(nsp32_hw_data *data, int bit)
3364 {
3365 int base = data->BaseAddress;
3366 int tmp, ret;
3367
3368 if (bit != SDA) {
3369 nsp32_msg(KERN_ERR, "return value is not appropriate");
3370 return 0;
3371 }
3372
3373
3374 tmp = nsp32_index_read1(base, SERIAL_ROM_CTL) & bit;
3375
3376 if (tmp == 0) {
3377 ret = 0;
3378 } else {
3379 ret = 1;
3380 }
3381
3382 udelay(10);
3383
3384 return ret;
3385 }
3386
3387 static void nsp32_prom_start (nsp32_hw_data *data)
3388 {
3389 /* start condition */
3390 nsp32_prom_set(data, SCL, 1);
3391 nsp32_prom_set(data, SDA, 1);
3392 nsp32_prom_set(data, ENA, 1); /* output mode */
3393 nsp32_prom_set(data, SDA, 0); /* keeping SCL=1 and transiting
3394 * SDA 1->0 is start condition */
3395 nsp32_prom_set(data, SCL, 0);
3396 }
3397
3398 static void nsp32_prom_stop (nsp32_hw_data *data)
3399 {
3400 /* stop condition */
3401 nsp32_prom_set(data, SCL, 1);
3402 nsp32_prom_set(data, SDA, 0);
3403 nsp32_prom_set(data, ENA, 1); /* output mode */
3404 nsp32_prom_set(data, SDA, 1);
3405 nsp32_prom_set(data, SCL, 0);
3406 }
3407
3408 static void nsp32_prom_write_bit(nsp32_hw_data *data, int val)
3409 {
3410 /* write */
3411 nsp32_prom_set(data, SDA, val);
3412 nsp32_prom_set(data, SCL, 1 );
3413 nsp32_prom_set(data, SCL, 0 );
3414 }
3415
3416 static int nsp32_prom_read_bit(nsp32_hw_data *data)
3417 {
3418 int val;
3419
3420 /* read */
3421 nsp32_prom_set(data, ENA, 0); /* input mode */
3422 nsp32_prom_set(data, SCL, 1);
3423
3424 val = nsp32_prom_get(data, SDA);
3425
3426 nsp32_prom_set(data, SCL, 0);
3427 nsp32_prom_set(data, ENA, 1); /* output mode */
3428
3429 return val;
3430 }
3431
3432
3433 /**************************************************************************
3434 * Power Management
3435 */
3436 #ifdef CONFIG_PM
3437
3438 /* Device suspended */
3439 static int nsp32_suspend(struct pci_dev *pdev, u32 state)
3440 {
3441 struct Scsi_Host *host = pci_get_drvdata(pdev);
3442 nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata;
3443
3444 nsp32_msg(KERN_INFO, "pci-suspend: pdev=0x%p, state=%ld, slot=%s, host=0x%p", pdev, state, pci_name(pdev), host);
3445
3446 pci_save_state (pdev, data->PciState);
3447 pci_disable_device (pdev);
3448 pci_set_power_state(pdev, state);
3449
3450 return 0;
3451 }
3452
3453 /* Device woken up */
3454 static int nsp32_resume(struct pci_dev *pdev)
3455 {
3456 struct Scsi_Host *host = pci_get_drvdata(pdev);
3457 nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata;
3458 unsigned short reg;
3459
3460 nsp32_msg(KERN_INFO, "pci-resume: pdev=0x%p, slot=%s, host=0x%p", pdev, pci_name(pdev), host);
3461
3462 pci_set_power_state(pdev, 0);
3463 pci_enable_wake (pdev, 0, 0);
3464 pci_restore_state (pdev, data->PciState);
3465
3466 reg = nsp32_read2(data->BaseAddress, INDEX_REG);
3467
3468 nsp32_msg(KERN_INFO, "io=0x%x reg=0x%x", data->BaseAddress, reg);
3469
3470 if (reg == 0xffff) {
3471 nsp32_msg(KERN_INFO, "missing device. abort resume.");
3472 return 0;
3473 }
3474
3475 nsp32hw_init (data);
3476 nsp32_do_bus_reset(data);
3477
3478 nsp32_msg(KERN_INFO, "resume success");
3479
3480 return 0;
3481 }
3482
3483 /* Enable wake event */
3484 static int nsp32_enable_wake(struct pci_dev *pdev, u32 state, int enable)
3485 {
3486 struct Scsi_Host *host = pci_get_drvdata(pdev);
3487
3488 nsp32_msg(KERN_INFO, "pci-enable_wake: stub, pdev=0x%p, enable=%d, slot=%s, host=0x%p", pdev, enable, pci_name(pdev), host);
3489
3490 return 0;
3491 }
3492 #endif
3493
3494 /************************************************************************
3495 * PCI/Cardbus probe/remove routine
3496 */
3497 static int __devinit nsp32_probe(struct pci_dev *pdev, const struct pci_device_id *id)
3498 {
3499 int ret;
3500 nsp32_hw_data *data = &nsp32_data_base;
3501
3502 nsp32_dbg(NSP32_DEBUG_REGISTER, "enter");
3503
3504 ret = pci_enable_device(pdev);
3505 if (ret) {
3506 nsp32_msg(KERN_ERR, "failed to enable pci device");
3507 return ret;
3508 }
3509
3510 data->Pci = pdev;
3511 data->pci_devid = id;
3512 data->IrqNumber = pdev->irq;
3513 data->BaseAddress = pci_resource_start(pdev, 0);
3514 data->NumAddress = pci_resource_len (pdev, 0);
3515 data->MmioAddress =
3516 (unsigned long)ioremap_nocache(pci_resource_start(pdev, 1),
3517 pci_resource_len (pdev, 1));
3518 data->MmioLength = pci_resource_len (pdev, 1);
3519
3520 pci_set_master(pdev);
3521
3522 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73))
3523 ret = nsp32_detect(pdev);
3524 #else
3525 ret = scsi_register_host(&nsp32_template);
3526 #endif
3527
3528 nsp32_msg(KERN_INFO, "irq: %i mmio: 0x%lx+0x%lx slot: %s model: %s",
3529 pdev->irq,
3530 data->MmioAddress, data->MmioLength,
3531 pci_name(pdev),
3532 nsp32_model[id->driver_data]);
3533
3534 nsp32_dbg(NSP32_DEBUG_REGISTER, "exit %d", ret);
3535
3536 return ret;
3537 }
3538
3539 static void __devexit nsp32_remove(struct pci_dev *pdev)
3540 {
3541 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73))
3542 struct Scsi_Host *host = pci_get_drvdata(pdev);
3543 #endif
3544
3545 nsp32_dbg(NSP32_DEBUG_REGISTER, "enter");
3546
3547 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73))
3548 scsi_remove_host(host);
3549
3550 nsp32_release(host);
3551
3552 scsi_host_put(host);
3553 #else
3554 scsi_unregister_host(&nsp32_template);
3555 #endif
3556 }
3557
3558
3559
3560 static struct pci_driver nsp32_driver = {
3561 .name = "nsp32",
3562 .id_table = nsp32_pci_table,
3563 .probe = nsp32_probe,
3564 .remove = __devexit_p(nsp32_remove),
3565 #ifdef CONFIG_PM
3566 .suspend = nsp32_suspend,
3567 .resume = nsp32_resume,
3568 .enable_wake = nsp32_enable_wake,
3569 #endif
3570 };
3571
3572 /*********************************************************************
3573 * Moule entry point
3574 */
3575 static int __init init_nsp32(void) {
3576 nsp32_msg(KERN_INFO, "loading...");
3577 return pci_module_init(&nsp32_driver);
3578 }
3579
3580 static void __exit exit_nsp32(void) {
3581 nsp32_msg(KERN_INFO, "unloading...");
3582 pci_unregister_driver(&nsp32_driver);
3583 }
3584
3585 module_init(init_nsp32);
3586 module_exit(exit_nsp32);
3587
3588 /* end */
MOXA 2.6.9 from sdlinux-moxaart.tgz