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MOXA linux-2.6.x / linux-2.6.9-uc0 from sdlinux-moxaart.tgz
[linux-2.6.9-moxart.git] / drivers / scsi / ipr.h
blobe91afc446a04f151c2726140c883379c03934898
1 /*
2 * ipr.h -- driver for IBM Power Linux RAID adapters
3 *
4 * Written By: Brian King <brking@us.ibm.com>, IBM Corporation
5 *
6 * Copyright (C) 2003, 2004 IBM Corporation
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 *
22 * Alan Cox <alan@redhat.com> - Removed several careless u32/dma_addr_t errors
23 * that broke 64bit platforms.
24 */
25
26 #ifndef _IPR_H
27 #define _IPR_H
28
29 #include <linux/types.h>
30 #include <linux/completion.h>
31 #include <linux/list.h>
32 #include <linux/kref.h>
33 #include <scsi/scsi.h>
34 #include <scsi/scsi_cmnd.h>
35 #ifdef CONFIG_KDB
36 #include <linux/kdb.h>
37 #endif
38
39 /*
40 * Literals
41 */
42 #define IPR_DRIVER_VERSION "2.0.11"
43 #define IPR_DRIVER_DATE "(August 3, 2004)"
44
45 /*
46 * IPR_DBG_TRACE: Setting this to 1 will turn on some general function tracing
47 * resulting in a bunch of extra debugging printks to the console
48 *
49 * IPR_DEBUG: Setting this to 1 will turn on some error path tracing.
50 * Enables the ipr_trace macro.
51 */
52 #ifdef IPR_DEBUG_ALL
53 #define IPR_DEBUG 1
54 #define IPR_DBG_TRACE 1
55 #else
56 #define IPR_DEBUG 0
57 #define IPR_DBG_TRACE 0
58 #endif
59
60 /*
61 * IPR_MAX_CMD_PER_LUN: This defines the maximum number of outstanding
62 * ops per device for devices not running tagged command queuing.
63 * This can be adjusted at runtime through sysfs device attributes.
64 */
65 #define IPR_MAX_CMD_PER_LUN 6
66
67 /*
68 * IPR_NUM_BASE_CMD_BLKS: This defines the maximum number of
69 * ops the mid-layer can send to the adapter.
70 */
71 #define IPR_NUM_BASE_CMD_BLKS 100
72
73 #define IPR_SUBS_DEV_ID_2780 0x0264
74 #define IPR_SUBS_DEV_ID_5702 0x0266
75 #define IPR_SUBS_DEV_ID_5703 0x0278
76 #define IPR_SUBS_DEV_ID_572E 0x02D3
77 #define IPR_SUBS_DEV_ID_573D 0x02D4
78 #define IPR_SUBS_DEV_ID_570F 0x02BD
79 #define IPR_SUBS_DEV_ID_571B 0x02BE
80
81 #define IPR_NAME "ipr"
82
83 /*
84 * Return codes
85 */
86 #define IPR_RC_JOB_CONTINUE 1
87 #define IPR_RC_JOB_RETURN 2
88
89 /*
90 * IOASCs
91 */
92 #define IPR_IOASC_NR_INIT_CMD_REQUIRED 0x02040200
93 #define IPR_IOASC_SYNC_REQUIRED 0x023f0000
94 #define IPR_IOASC_MED_DO_NOT_REALLOC 0x03110C00
95 #define IPR_IOASC_HW_SEL_TIMEOUT 0x04050000
96 #define IPR_IOASC_HW_DEV_BUS_STATUS 0x04448500
97 #define IPR_IOASC_IOASC_MASK 0xFFFFFF00
98 #define IPR_IOASC_SCSI_STATUS_MASK 0x000000FF
99 #define IPR_IOASC_IR_RESOURCE_HANDLE 0x05250000
100 #define IPR_IOASC_BUS_WAS_RESET 0x06290000
101 #define IPR_IOASC_BUS_WAS_RESET_BY_OTHER 0x06298000
102 #define IPR_IOASC_ABORTED_CMD_TERM_BY_HOST 0x0B5A0000
103
104 #define IPR_FIRST_DRIVER_IOASC 0x10000000
105 #define IPR_IOASC_IOA_WAS_RESET 0x10000001
106 #define IPR_IOASC_PCI_ACCESS_ERROR 0x10000002
107
108 #define IPR_NUM_LOG_HCAMS 2
109 #define IPR_NUM_CFG_CHG_HCAMS 2
110 #define IPR_NUM_HCAMS (IPR_NUM_LOG_HCAMS + IPR_NUM_CFG_CHG_HCAMS)
111 #define IPR_MAX_NUM_TARGETS_PER_BUS 0x10
112 #define IPR_MAX_NUM_LUNS_PER_TARGET 256
113 #define IPR_MAX_NUM_VSET_LUNS_PER_TARGET 8
114 #define IPR_VSET_BUS 0xff
115 #define IPR_IOA_BUS 0xff
116 #define IPR_IOA_TARGET 0xff
117 #define IPR_IOA_LUN 0xff
118 #define IPR_MAX_NUM_BUSES 4
119 #define IPR_MAX_BUS_TO_SCAN IPR_MAX_NUM_BUSES
120
121 #define IPR_NUM_RESET_RELOAD_RETRIES 3
122
123 /* We need resources for HCAMS, IOA reset, IOA bringdown, and ERP */
124 #define IPR_NUM_INTERNAL_CMD_BLKS (IPR_NUM_HCAMS + \
125 ((IPR_NUM_RESET_RELOAD_RETRIES + 1) * 2) + 3)
126
127 #define IPR_MAX_COMMANDS IPR_NUM_BASE_CMD_BLKS
128 #define IPR_NUM_CMD_BLKS (IPR_NUM_BASE_CMD_BLKS + \
129 IPR_NUM_INTERNAL_CMD_BLKS)
130
131 #define IPR_MAX_PHYSICAL_DEVS 192
132
133 #define IPR_MAX_SGLIST 64
134 #define IPR_MAX_SECTORS 512
135 #define IPR_MAX_CDB_LEN 16
136
137 #define IPR_DEFAULT_BUS_WIDTH 16
138 #define IPR_80MBs_SCSI_RATE ((80 * 10) / (IPR_DEFAULT_BUS_WIDTH / 8))
139 #define IPR_U160_SCSI_RATE ((160 * 10) / (IPR_DEFAULT_BUS_WIDTH / 8))
140 #define IPR_U320_SCSI_RATE ((320 * 10) / (IPR_DEFAULT_BUS_WIDTH / 8))
141 #define IPR_MAX_SCSI_RATE(width) ((320 * 10) / ((width) / 8))
142
143 #define IPR_IOA_RES_HANDLE 0xffffffff
144 #define IPR_IOA_RES_ADDR 0x00ffffff
145
146 /*
147 * Adapter Commands
148 */
149 #define IPR_RESET_DEVICE 0xC3
150 #define IPR_RESET_TYPE_SELECT 0x80
151 #define IPR_LUN_RESET 0x40
152 #define IPR_TARGET_RESET 0x20
153 #define IPR_BUS_RESET 0x10
154 #define IPR_ID_HOST_RR_Q 0xC4
155 #define IPR_QUERY_IOA_CONFIG 0xC5
156 #define IPR_CANCEL_ALL_REQUESTS 0xCE
157 #define IPR_HOST_CONTROLLED_ASYNC 0xCF
158 #define IPR_HCAM_CDB_OP_CODE_CONFIG_CHANGE 0x01
159 #define IPR_HCAM_CDB_OP_CODE_LOG_DATA 0x02
160 #define IPR_SET_SUPPORTED_DEVICES 0xFB
161 #define IPR_IOA_SHUTDOWN 0xF7
162 #define IPR_WR_BUF_DOWNLOAD_AND_SAVE 0x05
163
164 /*
165 * Timeouts
166 */
167 #define IPR_SHUTDOWN_TIMEOUT (10 * 60 * HZ)
168 #define IPR_VSET_RW_TIMEOUT (2 * 60 * HZ)
169 #define IPR_ABBREV_SHUTDOWN_TIMEOUT (10 * HZ)
170 #define IPR_DEVICE_RESET_TIMEOUT (30 * HZ)
171 #define IPR_CANCEL_ALL_TIMEOUT (30 * HZ)
172 #define IPR_ABORT_TASK_TIMEOUT (30 * HZ)
173 #define IPR_INTERNAL_TIMEOUT (30 * HZ)
174 #define IPR_WRITE_BUFFER_TIMEOUT (10 * 60 * HZ)
175 #define IPR_SET_SUP_DEVICE_TIMEOUT (2 * 60 * HZ)
176 #define IPR_REQUEST_SENSE_TIMEOUT (10 * HZ)
177 #define IPR_OPERATIONAL_TIMEOUT (5 * 60 * HZ)
178 #define IPR_WAIT_FOR_RESET_TIMEOUT (2 * HZ)
179 #define IPR_CHECK_FOR_RESET_TIMEOUT (HZ / 10)
180 #define IPR_WAIT_FOR_BIST_TIMEOUT (2 * HZ)
181 #define IPR_DUMP_TIMEOUT (15 * HZ)
182
183 /*
184 * SCSI Literals
185 */
186 #define IPR_VENDOR_ID_LEN 8
187 #define IPR_PROD_ID_LEN 16
188 #define IPR_SERIAL_NUM_LEN 8
189
190 /*
191 * Hardware literals
192 */
193 #define IPR_FMT2_MBX_ADDR_MASK 0x0fffffff
194 #define IPR_FMT2_MBX_BAR_SEL_MASK 0xf0000000
195 #define IPR_FMT2_MKR_BAR_SEL_SHIFT 28
196 #define IPR_GET_FMT2_BAR_SEL(mbx) \
197 (((mbx) & IPR_FMT2_MBX_BAR_SEL_MASK) >> IPR_FMT2_MKR_BAR_SEL_SHIFT)
198 #define IPR_SDT_FMT2_BAR0_SEL 0x0
199 #define IPR_SDT_FMT2_BAR1_SEL 0x1
200 #define IPR_SDT_FMT2_BAR2_SEL 0x2
201 #define IPR_SDT_FMT2_BAR3_SEL 0x3
202 #define IPR_SDT_FMT2_BAR4_SEL 0x4
203 #define IPR_SDT_FMT2_BAR5_SEL 0x5
204 #define IPR_SDT_FMT2_EXP_ROM_SEL 0x8
205 #define IPR_FMT2_SDT_READY_TO_USE 0xC4D4E3F2
206 #define IPR_DOORBELL 0x82800000
207
208 #define IPR_PCII_IOA_TRANS_TO_OPER (0x80000000 >> 0)
209 #define IPR_PCII_IOARCB_XFER_FAILED (0x80000000 >> 3)
210 #define IPR_PCII_IOA_UNIT_CHECKED (0x80000000 >> 4)
211 #define IPR_PCII_NO_HOST_RRQ (0x80000000 >> 5)
212 #define IPR_PCII_CRITICAL_OPERATION (0x80000000 >> 6)
213 #define IPR_PCII_IO_DEBUG_ACKNOWLEDGE (0x80000000 >> 7)
214 #define IPR_PCII_IOARRIN_LOST (0x80000000 >> 27)
215 #define IPR_PCII_MMIO_ERROR (0x80000000 >> 28)
216 #define IPR_PCII_PROC_ERR_STATE (0x80000000 >> 29)
217 #define IPR_PCII_HRRQ_UPDATED (0x80000000 >> 30)
218 #define IPR_PCII_CORE_ISSUED_RST_REQ (0x80000000 >> 31)
219
220 #define IPR_PCII_ERROR_INTERRUPTS \
221 (IPR_PCII_IOARCB_XFER_FAILED | IPR_PCII_IOA_UNIT_CHECKED | \
222 IPR_PCII_NO_HOST_RRQ | IPR_PCII_IOARRIN_LOST | IPR_PCII_MMIO_ERROR)
223
224 #define IPR_PCII_OPER_INTERRUPTS \
225 (IPR_PCII_ERROR_INTERRUPTS | IPR_PCII_HRRQ_UPDATED | IPR_PCII_IOA_TRANS_TO_OPER)
226
227 #define IPR_UPROCI_RESET_ALERT (0x80000000 >> 7)
228 #define IPR_UPROCI_IO_DEBUG_ALERT (0x80000000 >> 9)
229
230 #define IPR_LDUMP_MAX_LONG_ACK_DELAY_IN_USEC 200000 /* 200 ms */
231 #define IPR_LDUMP_MAX_SHORT_ACK_DELAY_IN_USEC 200000 /* 200 ms */
232
233 /*
234 * Dump literals
235 */
236 #define IPR_MAX_IOA_DUMP_SIZE (4 * 1024 * 1024)
237 #define IPR_NUM_SDT_ENTRIES 511
238 #define IPR_MAX_NUM_DUMP_PAGES ((IPR_MAX_IOA_DUMP_SIZE / PAGE_SIZE) + 1)
239
240 /*
241 * Misc literals
242 */
243 #define IPR_NUM_IOADL_ENTRIES IPR_MAX_SGLIST
244
245 /*
246 * Adapter interface types
247 */
248
249 struct ipr_res_addr {
250 u8 reserved;
251 u8 bus;
252 u8 target;
253 u8 lun;
254 #define IPR_GET_PHYS_LOC(res_addr) \
255 (((res_addr).bus << 16) | ((res_addr).target << 8) | (res_addr).lun)
256 }__attribute__((packed, aligned (4)));
257
258 struct ipr_std_inq_vpids {
259 u8 vendor_id[IPR_VENDOR_ID_LEN];
260 u8 product_id[IPR_PROD_ID_LEN];
261 }__attribute__((packed));
262
263 struct ipr_std_inq_data {
264 u8 peri_qual_dev_type;
265 #define IPR_STD_INQ_PERI_QUAL(peri) ((peri) >> 5)
266 #define IPR_STD_INQ_PERI_DEV_TYPE(peri) ((peri) & 0x1F)
267
268 u8 removeable_medium_rsvd;
269 #define IPR_STD_INQ_REMOVEABLE_MEDIUM 0x80
270
271 #define IPR_IS_DASD_DEVICE(std_inq) \
272 ((IPR_STD_INQ_PERI_DEV_TYPE((std_inq).peri_qual_dev_type) == TYPE_DISK) && \
273 !(((std_inq).removeable_medium_rsvd) & IPR_STD_INQ_REMOVEABLE_MEDIUM))
274
275 #define IPR_IS_SES_DEVICE(std_inq) \
276 (IPR_STD_INQ_PERI_DEV_TYPE((std_inq).peri_qual_dev_type) == TYPE_ENCLOSURE)
277
278 u8 version;
279 u8 aen_naca_fmt;
280 u8 additional_len;
281 u8 sccs_rsvd;
282 u8 bq_enc_multi;
283 u8 sync_cmdq_flags;
284
285 struct ipr_std_inq_vpids vpids;
286
287 u8 ros_rsvd_ram_rsvd[4];
288
289 u8 serial_num[IPR_SERIAL_NUM_LEN];
290 }__attribute__ ((packed));
291
292 struct ipr_config_table_entry {
293 u8 service_level;
294 u8 array_id;
295 u8 flags;
296 #define IPR_IS_IOA_RESOURCE 0x80
297 #define IPR_IS_ARRAY_MEMBER 0x20
298 #define IPR_IS_HOT_SPARE 0x10
299
300 u8 rsvd_subtype;
301 #define IPR_RES_SUBTYPE(res) (((res)->cfgte.rsvd_subtype) & 0x0f)
302 #define IPR_SUBTYPE_AF_DASD 0
303 #define IPR_SUBTYPE_GENERIC_SCSI 1
304 #define IPR_SUBTYPE_VOLUME_SET 2
305
306 struct ipr_res_addr res_addr;
307 u32 res_handle;
308 u32 reserved4[2];
309 struct ipr_std_inq_data std_inq_data;
310 }__attribute__ ((packed, aligned (4)));
311
312 struct ipr_config_table_hdr {
313 u8 num_entries;
314 u8 flags;
315 #define IPR_UCODE_DOWNLOAD_REQ 0x10
316 u16 reserved;
317 }__attribute__((packed, aligned (4)));
318
319 struct ipr_config_table {
320 struct ipr_config_table_hdr hdr;
321 struct ipr_config_table_entry dev[IPR_MAX_PHYSICAL_DEVS];
322 }__attribute__((packed, aligned (4)));
323
324 struct ipr_hostrcb_cfg_ch_not {
325 struct ipr_config_table_entry cfgte;
326 u8 reserved[936];
327 }__attribute__((packed, aligned (4)));
328
329 struct ipr_supported_device {
330 u16 data_length;
331 u8 reserved;
332 u8 num_records;
333 struct ipr_std_inq_vpids vpids;
334 u8 reserved2[16];
335 }__attribute__((packed, aligned (4)));
336
337 /* Command packet structure */
338 struct ipr_cmd_pkt {
339 u16 reserved; /* Reserved by IOA */
340 u8 request_type;
341 #define IPR_RQTYPE_SCSICDB 0x00
342 #define IPR_RQTYPE_IOACMD 0x01
343 #define IPR_RQTYPE_HCAM 0x02
344
345 u8 luntar_luntrn;
346
347 u8 flags_hi;
348 #define IPR_FLAGS_HI_WRITE_NOT_READ 0x80
349 #define IPR_FLAGS_HI_NO_ULEN_CHK 0x20
350 #define IPR_FLAGS_HI_SYNC_OVERRIDE 0x10
351 #define IPR_FLAGS_HI_SYNC_COMPLETE 0x08
352 #define IPR_FLAGS_HI_NO_LINK_DESC 0x04
353
354 u8 flags_lo;
355 #define IPR_FLAGS_LO_ALIGNED_BFR 0x20
356 #define IPR_FLAGS_LO_DELAY_AFTER_RST 0x10
357 #define IPR_FLAGS_LO_UNTAGGED_TASK 0x00
358 #define IPR_FLAGS_LO_SIMPLE_TASK 0x02
359 #define IPR_FLAGS_LO_ORDERED_TASK 0x04
360 #define IPR_FLAGS_LO_HEAD_OF_Q_TASK 0x06
361 #define IPR_FLAGS_LO_ACA_TASK 0x08
362
363 u8 cdb[16];
364 u16 timeout;
365 }__attribute__ ((packed, aligned(4)));
366
367 /* IOA Request Control Block 128 bytes */
368 struct ipr_ioarcb {
369 u32 ioarcb_host_pci_addr;
370 u32 reserved;
371 u32 res_handle;
372 u32 host_response_handle;
373 u32 reserved1;
374 u32 reserved2;
375 u32 reserved3;
376
377 u32 write_data_transfer_length;
378 u32 read_data_transfer_length;
379 u32 write_ioadl_addr;
380 u32 write_ioadl_len;
381 u32 read_ioadl_addr;
382 u32 read_ioadl_len;
383
384 u32 ioasa_host_pci_addr;
385 u16 ioasa_len;
386 u16 reserved4;
387
388 struct ipr_cmd_pkt cmd_pkt;
389
390 u32 add_cmd_parms_len;
391 u32 add_cmd_parms[10];
392 }__attribute__((packed, aligned (4)));
393
394 struct ipr_ioadl_desc {
395 u32 flags_and_data_len;
396 #define IPR_IOADL_FLAGS_MASK 0xff000000
397 #define IPR_IOADL_GET_FLAGS(x) (be32_to_cpu(x) & IPR_IOADL_FLAGS_MASK)
398 #define IPR_IOADL_DATA_LEN_MASK 0x00ffffff
399 #define IPR_IOADL_GET_DATA_LEN(x) (be32_to_cpu(x) & IPR_IOADL_DATA_LEN_MASK)
400 #define IPR_IOADL_FLAGS_READ 0x48000000
401 #define IPR_IOADL_FLAGS_READ_LAST 0x49000000
402 #define IPR_IOADL_FLAGS_WRITE 0x68000000
403 #define IPR_IOADL_FLAGS_WRITE_LAST 0x69000000
404 #define IPR_IOADL_FLAGS_LAST 0x01000000
405
406 u32 address;
407 }__attribute__((packed, aligned (8)));
408
409 struct ipr_ioasa_vset {
410 u32 failing_lba_hi;
411 u32 failing_lba_lo;
412 u32 ioa_data[22];
413 }__attribute__((packed, aligned (4)));
414
415 struct ipr_ioasa_af_dasd {
416 u32 failing_lba;
417 }__attribute__((packed, aligned (4)));
418
419 struct ipr_ioasa_gpdd {
420 u8 end_state;
421 u8 bus_phase;
422 u16 reserved;
423 u32 ioa_data[23];
424 }__attribute__((packed, aligned (4)));
425
426 struct ipr_ioasa_raw {
427 u32 ioa_data[24];
428 }__attribute__((packed, aligned (4)));
429
430 struct ipr_ioasa {
431 u32 ioasc;
432 #define IPR_IOASC_SENSE_KEY(ioasc) ((ioasc) >> 24)
433 #define IPR_IOASC_SENSE_CODE(ioasc) (((ioasc) & 0x00ff0000) >> 16)
434 #define IPR_IOASC_SENSE_QUAL(ioasc) (((ioasc) & 0x0000ff00) >> 8)
435 #define IPR_IOASC_SENSE_STATUS(ioasc) ((ioasc) & 0x000000ff)
436
437 u16 ret_stat_len; /* Length of the returned IOASA */
438
439 u16 avail_stat_len; /* Total Length of status available. */
440
441 u32 residual_data_len; /* number of bytes in the host data */
442 /* buffers that were not used by the IOARCB command. */
443
444 u32 ilid;
445 #define IPR_NO_ILID 0
446 #define IPR_DRIVER_ILID 0xffffffff
447
448 u32 fd_ioasc;
449
450 u32 fd_phys_locator;
451
452 u32 fd_res_handle;
453
454 u32 ioasc_specific; /* status code specific field */
455 #define IPR_IOASC_SPECIFIC_MASK 0x00ffffff
456 #define IPR_FIELD_POINTER_VALID (0x80000000 >> 8)
457 #define IPR_FIELD_POINTER_MASK 0x0000ffff
458
459 union {
460 struct ipr_ioasa_vset vset;
461 struct ipr_ioasa_af_dasd dasd;
462 struct ipr_ioasa_gpdd gpdd;
463 struct ipr_ioasa_raw raw;
464 } u;
465 }__attribute__((packed, aligned (4)));
466
467 struct ipr_mode_parm_hdr {
468 u8 length;
469 u8 medium_type;
470 u8 device_spec_parms;
471 u8 block_desc_len;
472 }__attribute__((packed));
473
474 struct ipr_mode_pages {
475 struct ipr_mode_parm_hdr hdr;
476 u8 data[255 - sizeof(struct ipr_mode_parm_hdr)];
477 }__attribute__((packed));
478
479 struct ipr_mode_page_hdr {
480 u8 ps_page_code;
481 #define IPR_MODE_PAGE_PS 0x80
482 #define IPR_GET_MODE_PAGE_CODE(hdr) ((hdr)->ps_page_code & 0x3F)
483 u8 page_length;
484 }__attribute__ ((packed));
485
486 struct ipr_dev_bus_entry {
487 struct ipr_res_addr res_addr;
488 u8 flags;
489 #define IPR_SCSI_ATTR_ENABLE_QAS 0x80
490 #define IPR_SCSI_ATTR_DISABLE_QAS 0x40
491 #define IPR_SCSI_ATTR_QAS_MASK 0xC0
492 #define IPR_SCSI_ATTR_ENABLE_TM 0x20
493 #define IPR_SCSI_ATTR_NO_TERM_PWR 0x10
494 #define IPR_SCSI_ATTR_TM_SUPPORTED 0x08
495 #define IPR_SCSI_ATTR_LVD_TO_SE_NOT_ALLOWED 0x04
496
497 u8 scsi_id;
498 u8 bus_width;
499 u8 extended_reset_delay;
500 #define IPR_EXTENDED_RESET_DELAY 7
501
502 u32 max_xfer_rate;
503
504 u8 spinup_delay;
505 u8 reserved3;
506 u16 reserved4;
507 }__attribute__((packed, aligned (4)));
508
509 struct ipr_mode_page28 {
510 struct ipr_mode_page_hdr hdr;
511 u8 num_entries;
512 u8 entry_length;
513 struct ipr_dev_bus_entry bus[0];
514 }__attribute__((packed));
515
516 struct ipr_ioa_vpd {
517 struct ipr_std_inq_data std_inq_data;
518 u8 ascii_part_num[12];
519 u8 reserved[40];
520 u8 ascii_plant_code[4];
521 }__attribute__((packed));
522
523 struct ipr_inquiry_page3 {
524 u8 peri_qual_dev_type;
525 u8 page_code;
526 u8 reserved1;
527 u8 page_length;
528 u8 ascii_len;
529 u8 reserved2[3];
530 u8 load_id[4];
531 u8 major_release;
532 u8 card_type;
533 u8 minor_release[2];
534 u8 ptf_number[4];
535 u8 patch_number[4];
536 }__attribute__((packed));
537
538 struct ipr_hostrcb_device_data_entry {
539 struct ipr_std_inq_vpids dev_vpids;
540 u8 dev_sn[IPR_SERIAL_NUM_LEN];
541 struct ipr_res_addr dev_res_addr;
542 struct ipr_std_inq_vpids new_dev_vpids;
543 u8 new_dev_sn[IPR_SERIAL_NUM_LEN];
544 struct ipr_std_inq_vpids ioa_last_with_dev_vpids;
545 u8 ioa_last_with_dev_sn[IPR_SERIAL_NUM_LEN];
546 struct ipr_std_inq_vpids cfc_last_with_dev_vpids;
547 u8 cfc_last_with_dev_sn[IPR_SERIAL_NUM_LEN];
548 u32 ioa_data[5];
549 }__attribute__((packed, aligned (4)));
550
551 struct ipr_hostrcb_array_data_entry {
552 struct ipr_std_inq_vpids vpids;
553 u8 serial_num[IPR_SERIAL_NUM_LEN];
554 struct ipr_res_addr expected_dev_res_addr;
555 struct ipr_res_addr dev_res_addr;
556 }__attribute__((packed, aligned (4)));
557
558 struct ipr_hostrcb_type_ff_error {
559 u32 ioa_data[246];
560 }__attribute__((packed, aligned (4)));
561
562 struct ipr_hostrcb_type_01_error {
563 u32 seek_counter;
564 u32 read_counter;
565 u8 sense_data[32];
566 u32 ioa_data[236];
567 }__attribute__((packed, aligned (4)));
568
569 struct ipr_hostrcb_type_02_error {
570 struct ipr_std_inq_vpids ioa_vpids;
571 u8 ioa_sn[IPR_SERIAL_NUM_LEN];
572 struct ipr_std_inq_vpids cfc_vpids;
573 u8 cfc_sn[IPR_SERIAL_NUM_LEN];
574 struct ipr_std_inq_vpids ioa_last_attached_to_cfc_vpids;
575 u8 ioa_last_attached_to_cfc_sn[IPR_SERIAL_NUM_LEN];
576 struct ipr_std_inq_vpids cfc_last_attached_to_ioa_vpids;
577 u8 cfc_last_attached_to_ioa_sn[IPR_SERIAL_NUM_LEN];
578 u32 ioa_data[3];
579 u8 reserved[844];
580 }__attribute__((packed, aligned (4)));
581
582 struct ipr_hostrcb_type_03_error {
583 struct ipr_std_inq_vpids ioa_vpids;
584 u8 ioa_sn[IPR_SERIAL_NUM_LEN];
585 struct ipr_std_inq_vpids cfc_vpids;
586 u8 cfc_sn[IPR_SERIAL_NUM_LEN];
587 u32 errors_detected;
588 u32 errors_logged;
589 u8 ioa_data[12];
590 struct ipr_hostrcb_device_data_entry dev_entry[3];
591 u8 reserved[444];
592 }__attribute__((packed, aligned (4)));
593
594 struct ipr_hostrcb_type_04_error {
595 struct ipr_std_inq_vpids ioa_vpids;
596 u8 ioa_sn[IPR_SERIAL_NUM_LEN];
597 struct ipr_std_inq_vpids cfc_vpids;
598 u8 cfc_sn[IPR_SERIAL_NUM_LEN];
599 u8 ioa_data[12];
600 struct ipr_hostrcb_array_data_entry array_member[10];
601 u32 exposed_mode_adn;
602 u32 array_id;
603 struct ipr_std_inq_vpids incomp_dev_vpids;
604 u8 incomp_dev_sn[IPR_SERIAL_NUM_LEN];
605 u32 ioa_data2;
606 struct ipr_hostrcb_array_data_entry array_member2[8];
607 struct ipr_res_addr last_func_vset_res_addr;
608 u8 vset_serial_num[IPR_SERIAL_NUM_LEN];
609 u8 protection_level[8];
610 u8 reserved[124];
611 }__attribute__((packed, aligned (4)));
612
613 struct ipr_hostrcb_error {
614 u32 failing_dev_ioasc;
615 struct ipr_res_addr failing_dev_res_addr;
616 u32 failing_dev_res_handle;
617 u32 prc;
618 union {
619 struct ipr_hostrcb_type_ff_error type_ff_error;
620 struct ipr_hostrcb_type_01_error type_01_error;
621 struct ipr_hostrcb_type_02_error type_02_error;
622 struct ipr_hostrcb_type_03_error type_03_error;
623 struct ipr_hostrcb_type_04_error type_04_error;
624 } u;
625 }__attribute__((packed, aligned (4)));
626
627 struct ipr_hostrcb_raw {
628 u32 data[sizeof(struct ipr_hostrcb_error)/sizeof(u32)];
629 }__attribute__((packed, aligned (4)));
630
631 struct ipr_hcam {
632 u8 op_code;
633 #define IPR_HOST_RCB_OP_CODE_CONFIG_CHANGE 0xE1
634 #define IPR_HOST_RCB_OP_CODE_LOG_DATA 0xE2
635
636 u8 notify_type;
637 #define IPR_HOST_RCB_NOTIF_TYPE_EXISTING_CHANGED 0x00
638 #define IPR_HOST_RCB_NOTIF_TYPE_NEW_ENTRY 0x01
639 #define IPR_HOST_RCB_NOTIF_TYPE_REM_ENTRY 0x02
640 #define IPR_HOST_RCB_NOTIF_TYPE_ERROR_LOG_ENTRY 0x10
641 #define IPR_HOST_RCB_NOTIF_TYPE_INFORMATION_ENTRY 0x11
642
643 u8 notifications_lost;
644 #define IPR_HOST_RCB_NO_NOTIFICATIONS_LOST 0
645 #define IPR_HOST_RCB_NOTIFICATIONS_LOST 0x80
646
647 u8 flags;
648 #define IPR_HOSTRCB_INTERNAL_OPER 0x80
649 #define IPR_HOSTRCB_ERR_RESP_SENT 0x40
650
651 u8 overlay_id;
652 #define IPR_HOST_RCB_OVERLAY_ID_1 0x01
653 #define IPR_HOST_RCB_OVERLAY_ID_2 0x02
654 #define IPR_HOST_RCB_OVERLAY_ID_3 0x03
655 #define IPR_HOST_RCB_OVERLAY_ID_4 0x04
656 #define IPR_HOST_RCB_OVERLAY_ID_6 0x06
657 #define IPR_HOST_RCB_OVERLAY_ID_DEFAULT 0xFF
658
659 u8 reserved1[3];
660 u32 ilid;
661 u32 time_since_last_ioa_reset;
662 u32 reserved2;
663 u32 length;
664
665 union {
666 struct ipr_hostrcb_error error;
667 struct ipr_hostrcb_cfg_ch_not ccn;
668 struct ipr_hostrcb_raw raw;
669 } u;
670 }__attribute__((packed, aligned (4)));
671
672 struct ipr_hostrcb {
673 struct ipr_hcam hcam;
674 dma_addr_t hostrcb_dma;
675 struct list_head queue;
676 };
677
678 /* IPR smart dump table structures */
679 struct ipr_sdt_entry {
680 u32 bar_str_offset;
681 u32 end_offset;
682 u8 entry_byte;
683 u8 reserved[3];
684
685 u8 flags;
686 #define IPR_SDT_ENDIAN 0x80
687 #define IPR_SDT_VALID_ENTRY 0x20
688
689 u8 resv;
690 u16 priority;
691 }__attribute__((packed, aligned (4)));
692
693 struct ipr_sdt_header {
694 u32 state;
695 u32 num_entries;
696 u32 num_entries_used;
697 u32 dump_size;
698 }__attribute__((packed, aligned (4)));
699
700 struct ipr_sdt {
701 struct ipr_sdt_header hdr;
702 struct ipr_sdt_entry entry[IPR_NUM_SDT_ENTRIES];
703 }__attribute__((packed, aligned (4)));
704
705 struct ipr_uc_sdt {
706 struct ipr_sdt_header hdr;
707 struct ipr_sdt_entry entry[1];
708 }__attribute__((packed, aligned (4)));
709
710 /*
711 * Driver types
712 */
713 struct ipr_bus_attributes {
714 u8 bus;
715 u8 qas_enabled;
716 u8 bus_width;
717 u8 reserved;
718 u32 max_xfer_rate;
719 };
720
721 struct ipr_resource_entry {
722 struct ipr_config_table_entry cfgte;
723 u8 needs_sync_complete:1;
724 u8 in_erp:1;
725 u8 add_to_ml:1;
726 u8 del_from_ml:1;
727 u8 resetting_device:1;
728 u8 tcq_active:1;
729
730 int qdepth;
731 struct scsi_device *sdev;
732 struct list_head queue;
733 };
734
735 struct ipr_resource_hdr {
736 u16 num_entries;
737 u16 reserved;
738 };
739
740 struct ipr_resource_table {
741 struct ipr_resource_hdr hdr;
742 struct ipr_resource_entry dev[IPR_MAX_PHYSICAL_DEVS];
743 };
744
745 struct ipr_misc_cbs {
746 struct ipr_ioa_vpd ioa_vpd;
747 struct ipr_inquiry_page3 page3_data;
748 struct ipr_mode_pages mode_pages;
749 struct ipr_supported_device supp_dev;
750 };
751
752 struct ipr_interrupts {
753 unsigned long set_interrupt_mask_reg;
754 unsigned long clr_interrupt_mask_reg;
755 unsigned long sense_interrupt_mask_reg;
756 unsigned long clr_interrupt_reg;
757
758 unsigned long sense_interrupt_reg;
759 unsigned long ioarrin_reg;
760 unsigned long sense_uproc_interrupt_reg;
761 unsigned long set_uproc_interrupt_reg;
762 unsigned long clr_uproc_interrupt_reg;
763 };
764
765 struct ipr_chip_cfg_t {
766 u32 mailbox;
767 u8 cache_line_size;
768 struct ipr_interrupts regs;
769 };
770
771 enum ipr_shutdown_type {
772 IPR_SHUTDOWN_NORMAL = 0x00,
773 IPR_SHUTDOWN_PREPARE_FOR_NORMAL = 0x40,
774 IPR_SHUTDOWN_ABBREV = 0x80,
775 IPR_SHUTDOWN_NONE = 0x100
776 };
777
778 struct ipr_trace_entry {
779 u32 time;
780
781 u8 op_code;
782 u8 type;
783 #define IPR_TRACE_START 0x00
784 #define IPR_TRACE_FINISH 0xff
785 u16 cmd_index;
786
787 u32 res_handle;
788 union {
789 u32 ioasc;
790 u32 add_data;
791 u32 res_addr;
792 } u;
793 };
794
795 struct ipr_sglist {
796 u32 order;
797 u32 num_sg;
798 u32 buffer_len;
799 struct scatterlist scatterlist[1];
800 };
801
802 enum ipr_sdt_state {
803 INACTIVE,
804 WAIT_FOR_DUMP,
805 GET_DUMP,
806 ABORT_DUMP,
807 DUMP_OBTAINED
808 };
809
810 /* Per-controller data */
811 struct ipr_ioa_cfg {
812 char eye_catcher[8];
813 #define IPR_EYECATCHER "iprcfg"
814
815 struct list_head queue;
816
817 u8 allow_interrupts:1;
818 u8 in_reset_reload:1;
819 u8 in_ioa_bringdown:1;
820 u8 ioa_unit_checked:1;
821 u8 ioa_is_dead:1;
822 u8 dump_taken:1;
823 u8 allow_cmds:1;
824 u8 allow_ml_add_del:1;
825
826 u16 type; /* CCIN of the card */
827
828 u8 log_level;
829 #define IPR_MAX_LOG_LEVEL 4
830 #define IPR_DEFAULT_LOG_LEVEL 2
831
832 #define IPR_NUM_TRACE_INDEX_BITS 8
833 #define IPR_NUM_TRACE_ENTRIES (1 << IPR_NUM_TRACE_INDEX_BITS)
834 #define IPR_TRACE_SIZE (sizeof(struct ipr_trace_entry) * IPR_NUM_TRACE_ENTRIES)
835 char trace_start[8];
836 #define IPR_TRACE_START_LABEL "trace"
837 struct ipr_trace_entry *trace;
838 u32 trace_index:IPR_NUM_TRACE_INDEX_BITS;
839
840 /*
841 * Queue for free command blocks
842 */
843 char ipr_free_label[8];
844 #define IPR_FREEQ_LABEL "free-q"
845 struct list_head free_q;
846
847 /*
848 * Queue for command blocks outstanding to the adapter
849 */
850 char ipr_pending_label[8];
851 #define IPR_PENDQ_LABEL "pend-q"
852 struct list_head pending_q;
853
854 char cfg_table_start[8];
855 #define IPR_CFG_TBL_START "cfg"
856 struct ipr_config_table *cfg_table;
857 dma_addr_t cfg_table_dma;
858
859 char resource_table_label[8];
860 #define IPR_RES_TABLE_LABEL "res_tbl"
861 struct ipr_resource_entry *res_entries;
862 struct list_head free_res_q;
863 struct list_head used_res_q;
864
865 char ipr_hcam_label[8];
866 #define IPR_HCAM_LABEL "hcams"
867 struct ipr_hostrcb *hostrcb[IPR_NUM_HCAMS];
868 dma_addr_t hostrcb_dma[IPR_NUM_HCAMS];
869 struct list_head hostrcb_free_q;
870 struct list_head hostrcb_pending_q;
871
872 u32 *host_rrq;
873 dma_addr_t host_rrq_dma;
874 #define IPR_HRRQ_REQ_RESP_HANDLE_MASK 0xfffffffc
875 #define IPR_HRRQ_RESP_BIT_SET 0x00000002
876 #define IPR_HRRQ_TOGGLE_BIT 0x00000001
877 #define IPR_HRRQ_REQ_RESP_HANDLE_SHIFT 2
878 volatile u32 *hrrq_start;
879 volatile u32 *hrrq_end;
880 volatile u32 *hrrq_curr;
881 volatile u32 toggle_bit;
882
883 struct ipr_bus_attributes bus_attr[IPR_MAX_NUM_BUSES];
884
885 const struct ipr_chip_cfg_t *chip_cfg;
886
887 unsigned long hdw_dma_regs; /* iomapped PCI memory space */
888 unsigned long hdw_dma_regs_pci; /* raw PCI memory space */
889 unsigned long ioa_mailbox;
890 struct ipr_interrupts regs;
891
892 u32 pci_cfg_buf[64];
893 u16 saved_pcix_cmd_reg;
894 u16 reset_retries;
895
896 u32 errors_logged;
897
898 struct Scsi_Host *host;
899 struct pci_dev *pdev;
900 struct ipr_sglist *ucode_sglist;
901 struct ipr_mode_pages *saved_mode_pages;
902 u8 saved_mode_page_len;
903
904 struct work_struct work_q;
905
906 wait_queue_head_t reset_wait_q;
907
908 struct ipr_dump *dump;
909 enum ipr_sdt_state sdt_state;
910
911 struct ipr_misc_cbs *vpd_cbs;
912 dma_addr_t vpd_cbs_dma;
913
914 struct pci_pool *ipr_cmd_pool;
915
916 struct ipr_cmnd *reset_cmd;
917
918 char ipr_cmd_label[8];
919 #define IPR_CMD_LABEL "ipr_cmnd"
920 struct ipr_cmnd *ipr_cmnd_list[IPR_NUM_CMD_BLKS];
921 u32 ipr_cmnd_list_dma[IPR_NUM_CMD_BLKS];
922 };
923
924 struct ipr_cmnd {
925 struct ipr_ioarcb ioarcb;
926 struct ipr_ioasa ioasa;
927 struct ipr_ioadl_desc ioadl[IPR_NUM_IOADL_ENTRIES];
928 struct list_head queue;
929 struct scsi_cmnd *scsi_cmd;
930 struct completion completion;
931 struct timer_list timer;
932 void (*done) (struct ipr_cmnd *);
933 int (*job_step) (struct ipr_cmnd *);
934 u16 cmd_index;
935 u8 sense_buffer[SCSI_SENSE_BUFFERSIZE];
936 dma_addr_t sense_buffer_dma;
937 unsigned short dma_use_sg;
938 dma_addr_t dma_handle;
939 struct ipr_cmnd *sibling;
940 union {
941 enum ipr_shutdown_type shutdown_type;
942 struct ipr_hostrcb *hostrcb;
943 unsigned long time_left;
944 unsigned long scratch;
945 struct ipr_resource_entry *res;
946 struct scsi_device *sdev;
947 } u;
948
949 struct ipr_ioa_cfg *ioa_cfg;
950 };
951
952 struct ipr_ses_table_entry {
953 char product_id[17];
954 char compare_product_id_byte[17];
955 u32 max_bus_speed_limit; /* MB/sec limit for this backplane */
956 };
957
958 struct ipr_dump_header {
959 u32 eye_catcher;
960 #define IPR_DUMP_EYE_CATCHER 0xC5D4E3F2
961 u32 len;
962 u32 num_entries;
963 u32 first_entry_offset;
964 u32 status;
965 #define IPR_DUMP_STATUS_SUCCESS 0
966 #define IPR_DUMP_STATUS_QUAL_SUCCESS 2
967 #define IPR_DUMP_STATUS_FAILED 0xffffffff
968 u32 os;
969 #define IPR_DUMP_OS_LINUX 0x4C4E5558
970 u32 driver_name;
971 #define IPR_DUMP_DRIVER_NAME 0x49505232
972 }__attribute__((packed, aligned (4)));
973
974 struct ipr_dump_entry_header {
975 u32 eye_catcher;
976 #define IPR_DUMP_EYE_CATCHER 0xC5D4E3F2
977 u32 len;
978 u32 num_elems;
979 u32 offset;
980 u32 data_type;
981 #define IPR_DUMP_DATA_TYPE_ASCII 0x41534349
982 #define IPR_DUMP_DATA_TYPE_BINARY 0x42494E41
983 u32 id;
984 #define IPR_DUMP_IOA_DUMP_ID 0x494F4131
985 #define IPR_DUMP_LOCATION_ID 0x4C4F4341
986 #define IPR_DUMP_TRACE_ID 0x54524143
987 #define IPR_DUMP_DRIVER_VERSION_ID 0x44525652
988 #define IPR_DUMP_DRIVER_TYPE_ID 0x54595045
989 #define IPR_DUMP_IOA_CTRL_BLK 0x494F4342
990 #define IPR_DUMP_PEND_OPS 0x414F5053
991 u32 status;
992 }__attribute__((packed, aligned (4)));
993
994 struct ipr_dump_location_entry {
995 struct ipr_dump_entry_header hdr;
996 u8 location[BUS_ID_SIZE];
997 }__attribute__((packed));
998
999 struct ipr_dump_trace_entry {
1000 struct ipr_dump_entry_header hdr;
1001 u32 trace[IPR_TRACE_SIZE / sizeof(u32)];
1002 }__attribute__((packed, aligned (4)));
1003
1004 struct ipr_dump_version_entry {
1005 struct ipr_dump_entry_header hdr;
1006 u8 version[sizeof(IPR_DRIVER_VERSION)];
1007 };
1008
1009 struct ipr_dump_ioa_type_entry {
1010 struct ipr_dump_entry_header hdr;
1011 u32 type;
1012 u32 fw_version;
1013 };
1014
1015 struct ipr_driver_dump {
1016 struct ipr_dump_header hdr;
1017 struct ipr_dump_version_entry version_entry;
1018 struct ipr_dump_location_entry location_entry;
1019 struct ipr_dump_ioa_type_entry ioa_type_entry;
1020 struct ipr_dump_trace_entry trace_entry;
1021 }__attribute__((packed));
1022
1023 struct ipr_ioa_dump {
1024 struct ipr_dump_entry_header hdr;
1025 struct ipr_sdt sdt;
1026 u32 *ioa_data[IPR_MAX_NUM_DUMP_PAGES];
1027 u32 reserved;
1028 u32 next_page_index;
1029 u32 page_offset;
1030 u32 format;
1031 #define IPR_SDT_FMT2 2
1032 #define IPR_SDT_UNKNOWN 3
1033 }__attribute__((packed, aligned (4)));
1034
1035 struct ipr_dump {
1036 struct kref kref;
1037 struct ipr_ioa_cfg *ioa_cfg;
1038 struct ipr_driver_dump driver_dump;
1039 struct ipr_ioa_dump ioa_dump;
1040 };
1041
1042 struct ipr_error_table_t {
1043 u32 ioasc;
1044 int log_ioasa;
1045 int log_hcam;
1046 char *error;
1047 };
1048
1049 struct ipr_software_inq_lid_info {
1050 u32 load_id;
1051 u32 timestamp[3];
1052 }__attribute__((packed, aligned (4)));
1053
1054 struct ipr_ucode_image_header {
1055 u32 header_length;
1056 u32 lid_table_offset;
1057 u8 major_release;
1058 u8 card_type;
1059 u8 minor_release[2];
1060 u8 reserved[20];
1061 char eyecatcher[16];
1062 u32 num_lids;
1063 struct ipr_software_inq_lid_info lid[1];
1064 }__attribute__((packed, aligned (4)));
1065
1066 /*
1067 * Macros
1068 */
1069 #if IPR_DEBUG
1070 #define IPR_DBG_CMD(CMD) do { CMD; } while (0)
1071 #else
1072 #define IPR_DBG_CMD(CMD)
1073 #endif
1074
1075 #define ipr_breakpoint_data KERN_ERR IPR_NAME\
1076 ": %s: %s: Line: %d ioa_cfg: %p\n", __FILE__, \
1077 __FUNCTION__, __LINE__, ioa_cfg
1078
1079 #if defined(CONFIG_KDB) && !defined(CONFIG_PPC_ISERIES)
1080 #define ipr_breakpoint {printk(ipr_breakpoint_data); KDB_ENTER();}
1081 #define ipr_breakpoint_or_die {printk(ipr_breakpoint_data); KDB_ENTER();}
1082 #else
1083 #define ipr_breakpoint
1084 #define ipr_breakpoint_or_die panic(ipr_breakpoint_data)
1085 #endif
1086
1087 #ifdef CONFIG_SCSI_IPR_TRACE
1088 #define ipr_create_trace_file(kobj, attr) sysfs_create_bin_file(kobj, attr)
1089 #define ipr_remove_trace_file(kobj, attr) sysfs_remove_bin_file(kobj, attr)
1090 #else
1091 #define ipr_create_trace_file(kobj, attr) 0
1092 #define ipr_remove_trace_file(kobj, attr) do { } while(0)
1093 #endif
1094
1095 #ifdef CONFIG_SCSI_IPR_DUMP
1096 #define ipr_create_dump_file(kobj, attr) sysfs_create_bin_file(kobj, attr)
1097 #define ipr_remove_dump_file(kobj, attr) sysfs_remove_bin_file(kobj, attr)
1098 #else
1099 #define ipr_create_dump_file(kobj, attr) 0
1100 #define ipr_remove_dump_file(kobj, attr) do { } while(0)
1101 #endif
1102
1103 /*
1104 * Error logging macros
1105 */
1106 #define ipr_err(...) printk(KERN_ERR IPR_NAME ": "__VA_ARGS__)
1107 #define ipr_info(...) printk(KERN_INFO IPR_NAME ": "__VA_ARGS__)
1108 #define ipr_crit(...) printk(KERN_CRIT IPR_NAME ": "__VA_ARGS__)
1109 #define ipr_warn(...) printk(KERN_WARNING IPR_NAME": "__VA_ARGS__)
1110 #define ipr_dbg(...) IPR_DBG_CMD(printk(KERN_INFO IPR_NAME ": "__VA_ARGS__))
1111
1112 #define ipr_sdev_printk(level, sdev, fmt, ...) \
1113 printk(level IPR_NAME ": %d:%d:%d:%d: " fmt, sdev->host->host_no, \
1114 sdev->channel, sdev->id, sdev->lun, ##__VA_ARGS__)
1115
1116 #define ipr_sdev_err(sdev, fmt, ...) \
1117 ipr_sdev_printk(KERN_ERR, sdev, fmt, ##__VA_ARGS__)
1118
1119 #define ipr_sdev_info(sdev, fmt, ...) \
1120 ipr_sdev_printk(KERN_INFO, sdev, fmt, ##__VA_ARGS__)
1121
1122 #define ipr_sdev_dbg(sdev, fmt, ...) \
1123 IPR_DBG_CMD(ipr_sdev_printk(KERN_INFO, sdev, fmt, ##__VA_ARGS__))
1124
1125 #define ipr_res_printk(level, ioa_cfg, res, fmt, ...) \
1126 printk(level IPR_NAME ": %d:%d:%d:%d: " fmt, ioa_cfg->host->host_no, \
1127 res.bus, res.target, res.lun, ##__VA_ARGS__)
1128
1129 #define ipr_res_err(ioa_cfg, res, fmt, ...) \
1130 ipr_res_printk(KERN_ERR, ioa_cfg, res, fmt, ##__VA_ARGS__)
1131 #define ipr_res_dbg(ioa_cfg, res, fmt, ...) \
1132 IPR_DBG_CMD(ipr_res_printk(KERN_INFO, ioa_cfg, res, fmt, ##__VA_ARGS__))
1133
1134 #define ipr_trace ipr_dbg("%s: %s: Line: %d\n",\
1135 __FILE__, __FUNCTION__, __LINE__)
1136
1137 #if IPR_DBG_TRACE
1138 #define ENTER printk(KERN_INFO IPR_NAME": Entering %s\n", __FUNCTION__)
1139 #define LEAVE printk(KERN_INFO IPR_NAME": Leaving %s\n", __FUNCTION__)
1140 #else
1141 #define ENTER
1142 #define LEAVE
1143 #endif
1144
1145 #define ipr_err_separator \
1146 ipr_err("----------------------------------------------------------\n")
1147
1148
1149 /*
1150 * Inlines
1151 */
1152
1153 /**
1154 * ipr_is_ioa_resource - Determine if a resource is the IOA
1155 * @res: resource entry struct
1156 *
1157 * Return value:
1158 * 1 if IOA / 0 if not IOA
1159 **/
1160 static inline int ipr_is_ioa_resource(struct ipr_resource_entry *res)
1161 {
1162 return (res->cfgte.flags & IPR_IS_IOA_RESOURCE) ? 1 : 0;
1163 }
1164
1165 /**
1166 * ipr_is_af_dasd_device - Determine if a resource is an AF DASD
1167 * @res: resource entry struct
1168 *
1169 * Return value:
1170 * 1 if AF DASD / 0 if not AF DASD
1171 **/
1172 static inline int ipr_is_af_dasd_device(struct ipr_resource_entry *res)
1173 {
1174 if (IPR_IS_DASD_DEVICE(res->cfgte.std_inq_data) &&
1175 !ipr_is_ioa_resource(res) &&
1176 IPR_RES_SUBTYPE(res) == IPR_SUBTYPE_AF_DASD)
1177 return 1;
1178 else
1179 return 0;
1180 }
1181
1182 /**
1183 * ipr_is_vset_device - Determine if a resource is a VSET
1184 * @res: resource entry struct
1185 *
1186 * Return value:
1187 * 1 if VSET / 0 if not VSET
1188 **/
1189 static inline int ipr_is_vset_device(struct ipr_resource_entry *res)
1190 {
1191 if (IPR_IS_DASD_DEVICE(res->cfgte.std_inq_data) &&
1192 !ipr_is_ioa_resource(res) &&
1193 IPR_RES_SUBTYPE(res) == IPR_SUBTYPE_VOLUME_SET)
1194 return 1;
1195 else
1196 return 0;
1197 }
1198
1199 /**
1200 * ipr_is_gscsi - Determine if a resource is a generic scsi resource
1201 * @res: resource entry struct
1202 *
1203 * Return value:
1204 * 1 if GSCSI / 0 if not GSCSI
1205 **/
1206 static inline int ipr_is_gscsi(struct ipr_resource_entry *res)
1207 {
1208 if (!ipr_is_ioa_resource(res) &&
1209 IPR_RES_SUBTYPE(res) == IPR_SUBTYPE_GENERIC_SCSI)
1210 return 1;
1211 else
1212 return 0;
1213 }
1214
1215 /**
1216 * ipr_is_device - Determine if resource address is that of a device
1217 * @res_addr: resource address struct
1218 *
1219 * Return value:
1220 * 1 if AF / 0 if not AF
1221 **/
1222 static inline int ipr_is_device(struct ipr_res_addr *res_addr)
1223 {
1224 if ((res_addr->bus < IPR_MAX_NUM_BUSES) &&
1225 (res_addr->target < IPR_MAX_NUM_TARGETS_PER_BUS))
1226 return 1;
1227
1228 return 0;
1229 }
1230
1231 /**
1232 * ipr_sdt_is_fmt2 - Determine if a SDT address is in format 2
1233 * @sdt_word: SDT address
1234 *
1235 * Return value:
1236 * 1 if format 2 / 0 if not
1237 **/
1238 static inline int ipr_sdt_is_fmt2(u32 sdt_word)
1239 {
1240 u32 bar_sel = IPR_GET_FMT2_BAR_SEL(sdt_word);
1241
1242 switch (bar_sel) {
1243 case IPR_SDT_FMT2_BAR0_SEL:
1244 case IPR_SDT_FMT2_BAR1_SEL:
1245 case IPR_SDT_FMT2_BAR2_SEL:
1246 case IPR_SDT_FMT2_BAR3_SEL:
1247 case IPR_SDT_FMT2_BAR4_SEL:
1248 case IPR_SDT_FMT2_BAR5_SEL:
1249 case IPR_SDT_FMT2_EXP_ROM_SEL:
1250 return 1;
1251 };
1252
1253 return 0;
1254 }
1255
1256 #endif
MOXA 2.6.9 from sdlinux-moxaart.tgz