MOXA linux-2.6.x / linux-2.6.9-uc0 from sdlinux-moxaart.tgz
[linux-2.6.9-moxart.git] / drivers / pcmcia / au1000_pb1x00.c
blob40d5037278c642cfff14ba7f75dd8f4323e5970e
1 /*
3 * Alchemy Semi Pb1x00 boards specific pcmcia routines.
5 * Copyright 2002 MontaVista Software Inc.
6 * Author: MontaVista Software, Inc.
7 * ppopov@mvista.com or source@mvista.com
9 * ########################################################################
11 * This program is free software; you can distribute it and/or modify it
12 * under the terms of the GNU General Public License (Version 2) as
13 * published by the Free Software Foundation.
15 * This program is distributed in the hope it will be useful, but WITHOUT
16 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
17 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 * for more details.
20 * You should have received a copy of the GNU General Public License along
21 * with this program; if not, write to the Free Software Foundation, Inc.,
22 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
24 #include <linux/module.h>
25 #include <linux/init.h>
26 #include <linux/delay.h>
27 #include <linux/ioport.h>
28 #include <linux/kernel.h>
29 #include <linux/tqueue.h>
30 #include <linux/timer.h>
31 #include <linux/mm.h>
32 #include <linux/proc_fs.h>
33 #include <linux/types.h>
35 #include <pcmcia/version.h>
36 #include <pcmcia/cs_types.h>
37 #include <pcmcia/cs.h>
38 #include <pcmcia/ss.h>
39 #include <pcmcia/bulkmem.h>
40 #include <pcmcia/cistpl.h>
41 #include <pcmcia/bus_ops.h>
42 #include "cs_internal.h"
44 #include <asm/io.h>
45 #include <asm/irq.h>
46 #include <asm/system.h>
48 #include <asm/au1000.h>
49 #include <asm/au1000_pcmcia.h>
51 #define debug(fmt, arg...) do { } while (0)
53 #ifdef CONFIG_MIPS_PB1000
54 #include <asm/pb1000.h>
55 #define PCMCIA_IRQ AU1000_GPIO_15
56 #elif defined (CONFIG_MIPS_PB1500)
57 #include <asm/pb1500.h>
58 #define PCMCIA_IRQ AU1000_GPIO_11 /* fixme */
59 #elif defined (CONFIG_MIPS_PB1100)
60 #include <asm/pb1100.h>
61 #define PCMCIA_IRQ AU1000_GPIO_11
62 #endif
64 static int pb1x00_pcmcia_init(struct pcmcia_init *init)
66 #ifdef CONFIG_MIPS_PB1000
67 u16 pcr;
68 pcr = PCR_SLOT_0_RST | PCR_SLOT_1_RST;
70 au_writel(0x8000, PB1000_MDR); /* clear pcmcia interrupt */
71 au_sync_delay(100);
72 au_writel(0x4000, PB1000_MDR); /* enable pcmcia interrupt */
73 au_sync();
75 pcr |= SET_VCC_VPP(VCC_HIZ,VPP_HIZ,0);
76 pcr |= SET_VCC_VPP(VCC_HIZ,VPP_HIZ,1);
77 au_writel(pcr, PB1000_PCR);
78 au_sync_delay(20);
80 return PCMCIA_NUM_SOCKS;
82 #else /* fixme -- take care of the Pb1500 at some point */
84 u16 pcr;
85 pcr = au_readw(PB1100_MEM_PCMCIA) & ~0xf; /* turn off power */
86 pcr &= ~(PB1100_PC_DEASSERT_RST | PB1100_PC_DRV_EN);
87 au_writew(pcr, PB1100_MEM_PCMCIA);
88 au_sync_delay(500);
89 return PCMCIA_NUM_SOCKS;
90 #endif
93 static int pb1x00_pcmcia_shutdown(void)
95 #ifdef CONFIG_MIPS_PB1000
96 u16 pcr;
97 pcr = PCR_SLOT_0_RST | PCR_SLOT_1_RST;
98 pcr |= SET_VCC_VPP(VCC_HIZ,VPP_HIZ,0);
99 pcr |= SET_VCC_VPP(VCC_HIZ,VPP_HIZ,1);
100 au_writel(pcr, PB1000_PCR);
101 au_sync_delay(20);
102 return 0;
103 #else
104 u16 pcr;
105 pcr = au_readw(PB1100_MEM_PCMCIA) & ~0xf; /* turn off power */
106 pcr &= ~(PB1100_PC_DEASSERT_RST | PB1100_PC_DRV_EN);
107 au_writew(pcr, PB1100_MEM_PCMCIA);
108 au_sync_delay(2);
109 return 0;
110 #endif
113 static int
114 pb1x00_pcmcia_socket_state(unsigned sock, struct pcmcia_state *state)
116 u32 inserted0, inserted1;
117 u16 vs0, vs1;
119 #ifdef CONFIG_MIPS_PB1000
120 vs0 = vs1 = (u16)au_readl(PB1000_ACR1);
121 inserted0 = !(vs0 & (ACR1_SLOT_0_CD1 | ACR1_SLOT_0_CD2));
122 inserted1 = !(vs1 & (ACR1_SLOT_1_CD1 | ACR1_SLOT_1_CD2));
123 vs0 = (vs0 >> 4) & 0x3;
124 vs1 = (vs1 >> 12) & 0x3;
125 #else
126 vs0 = (au_readw(PB1100_BOARD_STATUS) >> 4) & 0x3;
127 inserted0 = !((au_readl(SYS_PINSTATERD) >> 9) & 0x1); /* gpio 9 */
128 #endif
130 state->ready = 0;
131 state->vs_Xv = 0;
132 state->vs_3v = 0;
133 state->detect = 0;
135 if (sock == 0) {
136 if (inserted0) {
137 switch (vs0) {
138 case 0:
139 case 2:
140 state->vs_3v=1;
141 break;
142 case 3: /* 5V */
143 break;
144 default:
145 /* return without setting 'detect' */
146 printk(KERN_ERR "pb1x00 bad VS (%d)\n",
147 vs0);
148 return;
150 state->detect = 1;
153 else {
154 if (inserted1) {
155 switch (vs1) {
156 case 0:
157 case 2:
158 state->vs_3v=1;
159 break;
160 case 3: /* 5V */
161 break;
162 default:
163 /* return without setting 'detect' */
164 printk(KERN_ERR "pb1x00 bad VS (%d)\n",
165 vs1);
166 return;
168 state->detect = 1;
172 if (state->detect) {
173 state->ready = 1;
176 state->bvd1=1;
177 state->bvd2=1;
178 state->wrprot=0;
179 return 1;
183 static int pb1x00_pcmcia_get_irq_info(struct pcmcia_irq_info *info)
186 if(info->sock > PCMCIA_MAX_SOCK) return -1;
189 * Even in the case of the Pb1000, both sockets are connected
190 * to the same irq line.
192 info->irq = PCMCIA_IRQ;
194 return 0;
198 static int
199 pb1x00_pcmcia_configure_socket(const struct pcmcia_configure *configure)
201 u16 pcr;
203 if(configure->sock > PCMCIA_MAX_SOCK) return -1;
205 #ifdef CONFIG_MIPS_PB1000
206 pcr = au_readl(PB1000_PCR);
208 if (configure->sock == 0) {
209 pcr &= ~(PCR_SLOT_0_VCC0 | PCR_SLOT_0_VCC1 |
210 PCR_SLOT_0_VPP0 | PCR_SLOT_0_VPP1);
212 else {
213 pcr &= ~(PCR_SLOT_1_VCC0 | PCR_SLOT_1_VCC1 |
214 PCR_SLOT_1_VPP0 | PCR_SLOT_1_VPP1);
217 pcr &= ~PCR_SLOT_0_RST;
218 debug("Vcc %dV Vpp %dV, pcr %x\n",
219 configure->vcc, configure->vpp, pcr);
220 switch(configure->vcc){
221 case 0: /* Vcc 0 */
222 switch(configure->vpp) {
223 case 0:
224 pcr |= SET_VCC_VPP(VCC_HIZ,VPP_GND,
225 configure->sock);
226 break;
227 case 12:
228 pcr |= SET_VCC_VPP(VCC_HIZ,VPP_12V,
229 configure->sock);
230 break;
231 case 50:
232 pcr |= SET_VCC_VPP(VCC_HIZ,VPP_5V,
233 configure->sock);
234 break;
235 case 33:
236 pcr |= SET_VCC_VPP(VCC_HIZ,VPP_3V,
237 configure->sock);
238 break;
239 default:
240 pcr |= SET_VCC_VPP(VCC_HIZ,VPP_HIZ,
241 configure->sock);
242 printk("%s: bad Vcc/Vpp (%d:%d)\n",
243 __FUNCTION__,
244 configure->vcc,
245 configure->vpp);
246 break;
248 break;
249 case 50: /* Vcc 5V */
250 switch(configure->vpp) {
251 case 0:
252 pcr |= SET_VCC_VPP(VCC_5V,VPP_GND,
253 configure->sock);
254 break;
255 case 50:
256 pcr |= SET_VCC_VPP(VCC_5V,VPP_5V,
257 configure->sock);
258 break;
259 case 12:
260 pcr |= SET_VCC_VPP(VCC_5V,VPP_12V,
261 configure->sock);
262 break;
263 case 33:
264 pcr |= SET_VCC_VPP(VCC_5V,VPP_3V,
265 configure->sock);
266 break;
267 default:
268 pcr |= SET_VCC_VPP(VCC_HIZ,VPP_HIZ,
269 configure->sock);
270 printk("%s: bad Vcc/Vpp (%d:%d)\n",
271 __FUNCTION__,
272 configure->vcc,
273 configure->vpp);
274 break;
276 break;
277 case 33: /* Vcc 3.3V */
278 switch(configure->vpp) {
279 case 0:
280 pcr |= SET_VCC_VPP(VCC_3V,VPP_GND,
281 configure->sock);
282 break;
283 case 50:
284 pcr |= SET_VCC_VPP(VCC_3V,VPP_5V,
285 configure->sock);
286 break;
287 case 12:
288 pcr |= SET_VCC_VPP(VCC_3V,VPP_12V,
289 configure->sock);
290 break;
291 case 33:
292 pcr |= SET_VCC_VPP(VCC_3V,VPP_3V,
293 configure->sock);
294 break;
295 default:
296 pcr |= SET_VCC_VPP(VCC_HIZ,VPP_HIZ,
297 configure->sock);
298 printk("%s: bad Vcc/Vpp (%d:%d)\n",
299 __FUNCTION__,
300 configure->vcc,
301 configure->vpp);
302 break;
304 break;
305 default: /* what's this ? */
306 pcr |= SET_VCC_VPP(VCC_HIZ,VPP_HIZ,configure->sock);
307 printk(KERN_ERR "%s: bad Vcc %d\n",
308 __FUNCTION__, configure->vcc);
309 break;
312 if (configure->sock == 0) {
313 pcr &= ~(PCR_SLOT_0_RST);
314 if (configure->reset)
315 pcr |= PCR_SLOT_0_RST;
317 else {
318 pcr &= ~(PCR_SLOT_1_RST);
319 if (configure->reset)
320 pcr |= PCR_SLOT_1_RST;
322 au_writel(pcr, PB1000_PCR);
323 au_sync_delay(300);
325 #else
327 pcr = au_readw(PB1100_MEM_PCMCIA) & ~0xf;
329 debug("Vcc %dV Vpp %dV, pcr %x, reset %d\n",
330 configure->vcc, configure->vpp, pcr, configure->reset);
333 switch(configure->vcc){
334 case 0: /* Vcc 0 */
335 pcr |= SET_VCC_VPP(0,0);
336 break;
337 case 50: /* Vcc 5V */
338 switch(configure->vpp) {
339 case 0:
340 pcr |= SET_VCC_VPP(2,0);
341 break;
342 case 50:
343 pcr |= SET_VCC_VPP(2,1);
344 break;
345 case 12:
346 pcr |= SET_VCC_VPP(2,2);
347 break;
348 case 33:
349 default:
350 pcr |= SET_VCC_VPP(0,0);
351 printk("%s: bad Vcc/Vpp (%d:%d)\n",
352 __FUNCTION__,
353 configure->vcc,
354 configure->vpp);
355 break;
357 break;
358 case 33: /* Vcc 3.3V */
359 switch(configure->vpp) {
360 case 0:
361 pcr |= SET_VCC_VPP(1,0);
362 break;
363 case 12:
364 pcr |= SET_VCC_VPP(1,2);
365 break;
366 case 33:
367 pcr |= SET_VCC_VPP(1,1);
368 break;
369 case 50:
370 default:
371 pcr |= SET_VCC_VPP(0,0);
372 printk("%s: bad Vcc/Vpp (%d:%d)\n",
373 __FUNCTION__,
374 configure->vcc,
375 configure->vpp);
376 break;
378 break;
379 default: /* what's this ? */
380 pcr |= SET_VCC_VPP(0,0);
381 printk(KERN_ERR "%s: bad Vcc %d\n",
382 __FUNCTION__, configure->vcc);
383 break;
386 au_writew(pcr, PB1100_MEM_PCMCIA);
387 au_sync_delay(300);
389 if (!configure->reset) {
390 pcr |= PB1100_PC_DRV_EN;
391 au_writew(pcr, PB1100_MEM_PCMCIA);
392 au_sync_delay(100);
393 pcr |= PB1100_PC_DEASSERT_RST;
394 au_writew(pcr, PB1100_MEM_PCMCIA);
395 au_sync_delay(100);
397 else {
398 pcr &= ~(PB1100_PC_DEASSERT_RST | PB1100_PC_DRV_EN);
399 au_writew(pcr, PB1100_MEM_PCMCIA);
400 au_sync_delay(100);
402 #endif
403 return 0;
406 struct pcmcia_low_level pb1x00_pcmcia_ops = {
407 pb1x00_pcmcia_init,
408 pb1x00_pcmcia_shutdown,
409 pb1x00_pcmcia_socket_state,
410 pb1x00_pcmcia_get_irq_info,
411 pb1x00_pcmcia_configure_socket