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code style scripts/checkpatch.pl (linux-3.9-rc1) formatting
[linux-2.6.34.14-moxart.git] / drivers / char / mxser.c
blob06e6799b5e141de44318e69a5d6d052c69c561b9
1 /*
2 * mxser.c -- MOXA Smartio/Industio family multiport serial driver.
3 *
4 * Copyright (C) 1999-2006 Moxa Technologies (support@moxa.com).
5 * Copyright (C) 2006-2008 Jiri Slaby <jirislaby@gmail.com>
6 *
7 * This code is loosely based on the 1.8 moxa driver which is based on
8 * Linux serial driver, written by Linus Torvalds, Theodore T'so and
9 * others.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * Fed through a cleanup, indent and remove of non 2.6 code by Alan Cox
17 * <alan@lxorguk.ukuu.org.uk>. The original 1.8 code is available on
18 * www.moxa.com.
19 * - Fixed x86_64 cleanness
20 */
21
22 #include <linux/module.h>
23 #include <linux/errno.h>
24 #include <linux/signal.h>
25 #include <linux/sched.h>
26 #include <linux/timer.h>
27 #include <linux/interrupt.h>
28 #include <linux/tty.h>
29 #include <linux/tty_flip.h>
30 #include <linux/serial.h>
31 #include <linux/serial_reg.h>
32 #include <linux/major.h>
33 #include <linux/string.h>
34 #include <linux/fcntl.h>
35 #include <linux/ptrace.h>
36 #include <linux/ioport.h>
37 #include <linux/mm.h>
38 #include <linux/delay.h>
39 #include <linux/pci.h>
40 #include <linux/bitops.h>
41 #include <linux/slab.h>
42
43 #include <asm/system.h>
44 #include <asm/io.h>
45 #include <asm/irq.h>
46 #include <asm/uaccess.h>
47
48 #include "mxser.h"
49
50 #define MXSER_VERSION "2.0.5" /* 1.14 */
51 #define MXSERMAJOR 174
52
53 #ifdef CONFIG_ARCH_MOXART
54 #define MXSER_BOARDS 1 /* Max. boards */
55 #else
56 #define MXSER_BOARDS 4 /* Max. boards */
57 #endif
58
59 #define MXSER_PORTS_PER_BOARD 8 /* Max. ports per board */
60 #define MXSER_PORTS (MXSER_BOARDS * MXSER_PORTS_PER_BOARD)
61 #define MXSER_ISR_PASS_LIMIT 100
62
63 /*CheckIsMoxaMust return value*/
64 #define MOXA_OTHER_UART 0x00
65 #define MOXA_MUST_MU150_HWID 0x01
66 #define MOXA_MUST_MU860_HWID 0x02
67
68 #define WAKEUP_CHARS 256
69
70 #define UART_MCR_AFE 0x20
71 #define UART_LSR_SPECIAL 0x1E
72
73 #define PCI_DEVICE_ID_POS104UL 0x1044
74 #define PCI_DEVICE_ID_CB108 0x1080
75 #define PCI_DEVICE_ID_CP102UF 0x1023
76 #define PCI_DEVICE_ID_CP112UL 0x1120
77 #define PCI_DEVICE_ID_CB114 0x1142
78 #define PCI_DEVICE_ID_CP114UL 0x1143
79 #define PCI_DEVICE_ID_CB134I 0x1341
80 #define PCI_DEVICE_ID_CP138U 0x1380
81
82
83 #define C168_ASIC_ID 1
84 #define C104_ASIC_ID 2
85 #define C102_ASIC_ID 0xB
86 #define CI132_ASIC_ID 4
87 #define CI134_ASIC_ID 3
88 #define CI104J_ASIC_ID 5
89
90 #define MXSER_HIGHBAUD 1
91 #define MXSER_HAS2 2
92
93 /* This is only for PCI */
94 static const struct {
95 int type;
96 int tx_fifo;
97 int rx_fifo;
98 int xmit_fifo_size;
99 int rx_high_water;
100 int rx_trigger;
101 int rx_low_water;
102 long max_baud;
103 } Gpci_uart_info[] = {
104 {MOXA_OTHER_UART, 16, 16, 16, 14, 14, 1, 921600L},
105 {MOXA_MUST_MU150_HWID, 64, 64, 64, 48, 48, 16, 230400L},
106 {MOXA_MUST_MU860_HWID, 128, 128, 128, 96, 96, 32, 921600L}
107 };
108 #define UART_INFO_NUM ARRAY_SIZE(Gpci_uart_info)
109
110 struct mxser_cardinfo {
111 char *name;
112 unsigned int nports;
113 unsigned int flags;
114 };
115
116 static const struct mxser_cardinfo mxser_cards[] = {
117 /* 0*/ { "C168 series", 8, },
118 { "C104 series", 4, },
119 { "CI-104J series", 4, },
120 { "C168H/PCI series", 8, },
121 { "C104H/PCI series", 4, },
122 /* 5*/ { "C102 series", 4, MXSER_HAS2 }, /* C102-ISA */
123 { "CI-132 series", 4, MXSER_HAS2 },
124 { "CI-134 series", 4, },
125 { "CP-132 series", 2, },
126 { "CP-114 series", 4, },
127 /*10*/ { "CT-114 series", 4, },
128 { "CP-102 series", 2, MXSER_HIGHBAUD },
129 { "CP-104U series", 4, },
130 { "CP-168U series", 8, },
131 { "CP-132U series", 2, },
132 /*15*/ { "CP-134U series", 4, },
133 { "CP-104JU series", 4, },
134 { "Moxa UC7000 Serial", 8, }, /* RC7000 */
135 { "CP-118U series", 8, },
136 { "CP-102UL series", 2, },
137 /*20*/ { "CP-102U series", 2, },
138 { "CP-118EL series", 8, },
139 { "CP-168EL series", 8, },
140 { "CP-104EL series", 4, },
141 { "CB-108 series", 8, },
142 /*25*/ { "CB-114 series", 4, },
143 { "CB-134I series", 4, },
144 { "CP-138U series", 8, },
145 { "POS-104UL series", 4, },
146 { "CP-114UL series", 4, },
147 /*30*/ { "CP-102UF series", 2, },
148 { "CP-112UL series", 2, },
149 { "UC-7112-LX Serial", 2, },
150 };
151
152 /* driver_data correspond to the lines in the structure above
153 see also ISA probe function before you change something */
154 static struct pci_device_id mxser_pcibrds[] = {
155 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C168), .driver_data = 3 },
156 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C104), .driver_data = 4 },
157 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132), .driver_data = 8 },
158 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP114), .driver_data = 9 },
159 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CT114), .driver_data = 10 },
160 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102), .driver_data = 11 },
161 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104U), .driver_data = 12 },
162 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168U), .driver_data = 13 },
163 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132U), .driver_data = 14 },
164 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP134U), .driver_data = 15 },
165 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104JU),.driver_data = 16 },
166 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_RC7000), .driver_data = 17 },
167 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118U), .driver_data = 18 },
168 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102UL),.driver_data = 19 },
169 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102U), .driver_data = 20 },
170 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118EL),.driver_data = 21 },
171 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168EL),.driver_data = 22 },
172 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104EL),.driver_data = 23 },
173 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB108), .driver_data = 24 },
174 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB114), .driver_data = 25 },
175 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB134I), .driver_data = 26 },
176 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP138U), .driver_data = 27 },
177 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_POS104UL), .driver_data = 28 },
178 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP114UL), .driver_data = 29 },
179 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP102UF), .driver_data = 30 },
180 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP112UL), .driver_data = 31 },
181 { }
182 };
183 MODULE_DEVICE_TABLE(pci, mxser_pcibrds);
184
185 static unsigned long ioaddr[MXSER_BOARDS];
186 static int ttymajor = MXSERMAJOR;
187
188 /* Variables for insmod */
189
190 MODULE_AUTHOR("Casper Yang");
191 MODULE_DESCRIPTION("MOXA Smartio/Industio Family Multiport Board Device Driver");
192 module_param_array(ioaddr, ulong, NULL, 0);
193 MODULE_PARM_DESC(ioaddr, "ISA io addresses to look for a moxa board");
194 module_param(ttymajor, int, 0);
195 MODULE_LICENSE("GPL");
196
197 struct mxser_log {
198 int tick;
199 unsigned long rxcnt[MXSER_PORTS];
200 unsigned long txcnt[MXSER_PORTS];
201 };
202
203 struct mxser_mon {
204 unsigned long rxcnt;
205 unsigned long txcnt;
206 unsigned long up_rxcnt;
207 unsigned long up_txcnt;
208 int modem_status;
209 unsigned char hold_reason;
210 };
211
212 struct mxser_mon_ext {
213 unsigned long rx_cnt[32];
214 unsigned long tx_cnt[32];
215 unsigned long up_rxcnt[32];
216 unsigned long up_txcnt[32];
217 int modem_status[32];
218
219 long baudrate[32];
220 int databits[32];
221 int stopbits[32];
222 int parity[32];
223 int flowctrl[32];
224 int fifo[32];
225 int iftype[32];
226 };
227
228 struct mxser_board;
229
230 struct mxser_port {
231 struct tty_port port;
232 struct mxser_board *board;
233
234 unsigned long ioaddr;
235 unsigned long opmode_ioaddr;
236 int max_baud;
237
238 int rx_high_water;
239 int rx_trigger; /* Rx fifo trigger level */
240 int rx_low_water;
241 int baud_base; /* max. speed */
242 int type; /* UART type */
243
244 int x_char; /* xon/xoff character */
245 int IER; /* Interrupt Enable Register */
246 int MCR; /* Modem control register */
247
248 unsigned char stop_rx;
249 unsigned char ldisc_stop_rx;
250
251 int custom_divisor;
252 unsigned char err_shadow;
253
254 struct async_icount icount; /* kernel counters for 4 input interrupts */
255 int timeout;
256
257 int read_status_mask;
258 int ignore_status_mask;
259 int xmit_fifo_size;
260 int xmit_head;
261 int xmit_tail;
262 int xmit_cnt;
263
264 struct ktermios normal_termios;
265
266 struct mxser_mon mon_data;
267
268 spinlock_t slock;
269 };
270
271 struct mxser_board {
272 unsigned int idx;
273 int irq;
274 const struct mxser_cardinfo *info;
275 unsigned long vector;
276 unsigned long vector_mask;
277
278 int chip_flag;
279 int uart_type;
280
281 struct mxser_port ports[MXSER_PORTS_PER_BOARD];
282 };
283
284 struct mxser_mstatus {
285 tcflag_t cflag;
286 int cts;
287 int dsr;
288 int ri;
289 int dcd;
290 };
291
292 static struct mxser_board mxser_boards[MXSER_BOARDS];
293 static struct tty_driver *mxvar_sdriver;
294 static struct mxser_log mxvar_log;
295 static int mxser_set_baud_method[MXSER_PORTS + 1];
296
297 static void mxser_enable_must_enchance_mode(unsigned long baseio)
298 {
299 u8 oldlcr;
300 u8 efr;
301
302 oldlcr = inb(baseio + UART_LCR);
303 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
304
305 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
306 efr |= MOXA_MUST_EFR_EFRB_ENABLE;
307
308 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
309 outb(oldlcr, baseio + UART_LCR);
310 }
311
312 static void mxser_disable_must_enchance_mode(unsigned long baseio)
313 {
314 u8 oldlcr;
315 u8 efr;
316
317 oldlcr = inb(baseio + UART_LCR);
318 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
319
320 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
321 efr &= ~MOXA_MUST_EFR_EFRB_ENABLE;
322
323 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
324 outb(oldlcr, baseio + UART_LCR);
325 }
326
327 static void mxser_set_must_xon1_value(unsigned long baseio, u8 value)
328 {
329 u8 oldlcr;
330 u8 efr;
331
332 oldlcr = inb(baseio + UART_LCR);
333 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
334
335 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
336 efr &= ~MOXA_MUST_EFR_BANK_MASK;
337 efr |= MOXA_MUST_EFR_BANK0;
338
339 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
340 outb(value, baseio + MOXA_MUST_XON1_REGISTER);
341 outb(oldlcr, baseio + UART_LCR);
342 }
343
344 static void mxser_set_must_xoff1_value(unsigned long baseio, u8 value)
345 {
346 u8 oldlcr;
347 u8 efr;
348
349 oldlcr = inb(baseio + UART_LCR);
350 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
351
352 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
353 efr &= ~MOXA_MUST_EFR_BANK_MASK;
354 efr |= MOXA_MUST_EFR_BANK0;
355
356 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
357 outb(value, baseio + MOXA_MUST_XOFF1_REGISTER);
358 outb(oldlcr, baseio + UART_LCR);
359 }
360
361 static void mxser_set_must_fifo_value(struct mxser_port *info)
362 {
363 u8 oldlcr;
364 u8 efr;
365
366 oldlcr = inb(info->ioaddr + UART_LCR);
367 outb(MOXA_MUST_ENTER_ENCHANCE, info->ioaddr + UART_LCR);
368
369 efr = inb(info->ioaddr + MOXA_MUST_EFR_REGISTER);
370 efr &= ~MOXA_MUST_EFR_BANK_MASK;
371 efr |= MOXA_MUST_EFR_BANK1;
372
373 outb(efr, info->ioaddr + MOXA_MUST_EFR_REGISTER);
374 outb((u8)info->rx_high_water, info->ioaddr + MOXA_MUST_RBRTH_REGISTER);
375 outb((u8)info->rx_trigger, info->ioaddr + MOXA_MUST_RBRTI_REGISTER);
376 outb((u8)info->rx_low_water, info->ioaddr + MOXA_MUST_RBRTL_REGISTER);
377 outb(oldlcr, info->ioaddr + UART_LCR);
378 }
379
380 static void mxser_set_must_enum_value(unsigned long baseio, u8 value)
381 {
382 u8 oldlcr;
383 u8 efr;
384
385 oldlcr = inb(baseio + UART_LCR);
386 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
387
388 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
389 efr &= ~MOXA_MUST_EFR_BANK_MASK;
390 efr |= MOXA_MUST_EFR_BANK2;
391
392 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
393 outb(value, baseio + MOXA_MUST_ENUM_REGISTER);
394 outb(oldlcr, baseio + UART_LCR);
395 }
396
397 static void mxser_get_must_hardware_id(unsigned long baseio, u8 *pId)
398 {
399 u8 oldlcr;
400 u8 efr;
401
402 oldlcr = inb(baseio + UART_LCR);
403 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
404
405 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
406 efr &= ~MOXA_MUST_EFR_BANK_MASK;
407 efr |= MOXA_MUST_EFR_BANK2;
408
409 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
410 *pId = inb(baseio + MOXA_MUST_HWID_REGISTER);
411 outb(oldlcr, baseio + UART_LCR);
412 }
413
414 static void SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(unsigned long baseio)
415 {
416 u8 oldlcr;
417 u8 efr;
418
419 oldlcr = inb(baseio + UART_LCR);
420 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
421
422 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
423 efr &= ~MOXA_MUST_EFR_SF_MASK;
424
425 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
426 outb(oldlcr, baseio + UART_LCR);
427 }
428
429 static void mxser_enable_must_tx_software_flow_control(unsigned long baseio)
430 {
431 u8 oldlcr;
432 u8 efr;
433
434 oldlcr = inb(baseio + UART_LCR);
435 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
436
437 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
438 efr &= ~MOXA_MUST_EFR_SF_TX_MASK;
439 efr |= MOXA_MUST_EFR_SF_TX1;
440
441 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
442 outb(oldlcr, baseio + UART_LCR);
443 }
444
445 static void mxser_disable_must_tx_software_flow_control(unsigned long baseio)
446 {
447 u8 oldlcr;
448 u8 efr;
449
450 oldlcr = inb(baseio + UART_LCR);
451 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
452
453 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
454 efr &= ~MOXA_MUST_EFR_SF_TX_MASK;
455
456 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
457 outb(oldlcr, baseio + UART_LCR);
458 }
459
460 static void mxser_enable_must_rx_software_flow_control(unsigned long baseio)
461 {
462 u8 oldlcr;
463 u8 efr;
464
465 oldlcr = inb(baseio + UART_LCR);
466 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
467
468 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
469 efr &= ~MOXA_MUST_EFR_SF_RX_MASK;
470 efr |= MOXA_MUST_EFR_SF_RX1;
471
472 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
473 outb(oldlcr, baseio + UART_LCR);
474 }
475
476 static void mxser_disable_must_rx_software_flow_control(unsigned long baseio)
477 {
478 u8 oldlcr;
479 u8 efr;
480
481 oldlcr = inb(baseio + UART_LCR);
482 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
483
484 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
485 efr &= ~MOXA_MUST_EFR_SF_RX_MASK;
486
487 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
488 outb(oldlcr, baseio + UART_LCR);
489 }
490
491 #ifdef CONFIG_PCI
492 static int __devinit CheckIsMoxaMust(unsigned long io)
493 {
494 u8 oldmcr, hwid;
495 int i;
496
497 outb(0, io + UART_LCR);
498 mxser_disable_must_enchance_mode(io);
499 oldmcr = inb(io + UART_MCR);
500 outb(0, io + UART_MCR);
501 mxser_set_must_xon1_value(io, 0x11);
502 if ((hwid = inb(io + UART_MCR)) != 0) {
503 outb(oldmcr, io + UART_MCR);
504 return MOXA_OTHER_UART;
505 }
506
507 mxser_get_must_hardware_id(io, &hwid);
508 for (i = 1; i < UART_INFO_NUM; i++) { /* 0 = OTHER_UART */
509 if (hwid == Gpci_uart_info[i].type)
510 return (int)hwid;
511 }
512 return MOXA_OTHER_UART;
513 }
514 #endif
515
516 static void process_txrx_fifo(struct mxser_port *info)
517 {
518 int i;
519
520 if ((info->type == PORT_16450) || (info->type == PORT_8250)) {
521 info->rx_trigger = 1;
522 info->rx_high_water = 1;
523 info->rx_low_water = 1;
524 info->xmit_fifo_size = 1;
525 } else
526 for (i = 0; i < UART_INFO_NUM; i++)
527 if (info->board->chip_flag == Gpci_uart_info[i].type) {
528 info->rx_trigger = Gpci_uart_info[i].rx_trigger;
529 info->rx_low_water = Gpci_uart_info[i].rx_low_water;
530 info->rx_high_water = Gpci_uart_info[i].rx_high_water;
531 info->xmit_fifo_size = Gpci_uart_info[i].xmit_fifo_size;
532 break;
533 }
534 }
535
536 static unsigned char mxser_get_msr(int baseaddr, int mode, int port)
537 {
538 static unsigned char mxser_msr[MXSER_PORTS + 1];
539 unsigned char status = 0;
540
541 status = inb(baseaddr + UART_MSR);
542
543 mxser_msr[port] &= 0x0F;
544 mxser_msr[port] |= status;
545 status = mxser_msr[port];
546 if (mode)
547 mxser_msr[port] = 0;
548
549 return status;
550 }
551
552 static int mxser_carrier_raised(struct tty_port *port)
553 {
554 struct mxser_port *mp = container_of(port, struct mxser_port, port);
555 return (inb(mp->ioaddr + UART_MSR) & UART_MSR_DCD)?1:0;
556 }
557
558 static void mxser_dtr_rts(struct tty_port *port, int on)
559 {
560 struct mxser_port *mp = container_of(port, struct mxser_port, port);
561 unsigned long flags;
562
563 spin_lock_irqsave(&mp->slock, flags);
564 if (on)
565 outb(inb(mp->ioaddr + UART_MCR) |
566 UART_MCR_DTR | UART_MCR_RTS, mp->ioaddr + UART_MCR);
567 else
568 outb(inb(mp->ioaddr + UART_MCR)&~(UART_MCR_DTR | UART_MCR_RTS),
569 mp->ioaddr + UART_MCR);
570 spin_unlock_irqrestore(&mp->slock, flags);
571 }
572
573 static int mxser_set_baud(struct tty_struct *tty, long newspd)
574 {
575 struct mxser_port *info = tty->driver_data;
576 int quot = 0, baud;
577 unsigned char cval;
578
579 if (!info->ioaddr)
580 return -1;
581
582 if (newspd > info->max_baud)
583 return -1;
584
585 if (newspd == 134) {
586 quot = 2 * info->baud_base / 269;
587 tty_encode_baud_rate(tty, 134, 134);
588 } else if (newspd) {
589 quot = info->baud_base / newspd;
590 if (quot == 0)
591 quot = 1;
592 baud = info->baud_base/quot;
593 tty_encode_baud_rate(tty, baud, baud);
594 } else {
595 quot = 0;
596 }
597
598 info->timeout = ((info->xmit_fifo_size * HZ * 10 * quot) / info->baud_base);
599 info->timeout += HZ / 50; /* Add .02 seconds of slop */
600
601 if (quot) {
602 info->MCR |= UART_MCR_DTR;
603 outb(info->MCR, info->ioaddr + UART_MCR);
604 } else {
605 info->MCR &= ~UART_MCR_DTR;
606 outb(info->MCR, info->ioaddr + UART_MCR);
607 return 0;
608 }
609
610 cval = inb(info->ioaddr + UART_LCR);
611
612 outb(cval | UART_LCR_DLAB, info->ioaddr + UART_LCR); /* set DLAB */
613
614 outb(quot & 0xff, info->ioaddr + UART_DLL); /* LS of divisor */
615 outb(quot >> 8, info->ioaddr + UART_DLM); /* MS of divisor */
616 outb(cval, info->ioaddr + UART_LCR); /* reset DLAB */
617
618 #ifdef BOTHER
619 if (C_BAUD(tty) == BOTHER) {
620 quot = info->baud_base % newspd;
621 quot *= 8;
622 if (quot % newspd > newspd / 2) {
623 quot /= newspd;
624 quot++;
625 } else
626 quot /= newspd;
627
628 mxser_set_must_enum_value(info->ioaddr, quot);
629 } else
630 #endif
631 mxser_set_must_enum_value(info->ioaddr, 0);
632
633 return 0;
634 }
635
636 /*
637 * This routine is called to set the UART divisor registers to match
638 * the specified baud rate for a serial port.
639 */
640 static int mxser_change_speed(struct tty_struct *tty,
641 struct ktermios *old_termios)
642 {
643 struct mxser_port *info = tty->driver_data;
644 unsigned cflag, cval, fcr;
645 int ret = 0;
646 unsigned char status;
647
648 cflag = tty->termios->c_cflag;
649 if (!info->ioaddr)
650 return ret;
651
652 if (mxser_set_baud_method[tty->index] == 0)
653 mxser_set_baud(tty, tty_get_baud_rate(tty));
654
655 /* byte size and parity */
656 switch (cflag & CSIZE) {
657 case CS5:
658 cval = 0x00;
659 break;
660 case CS6:
661 cval = 0x01;
662 break;
663 case CS7:
664 cval = 0x02;
665 break;
666 case CS8:
667 cval = 0x03;
668 break;
669 default:
670 cval = 0x00;
671 break; /* too keep GCC shut... */
672 }
673 if (cflag & CSTOPB)
674 cval |= 0x04;
675 if (cflag & PARENB)
676 cval |= UART_LCR_PARITY;
677 if (!(cflag & PARODD))
678 cval |= UART_LCR_EPAR;
679 if (cflag & CMSPAR)
680 cval |= UART_LCR_SPAR;
681
682 if ((info->type == PORT_8250) || (info->type == PORT_16450)) {
683 if (info->board->chip_flag) {
684 fcr = UART_FCR_ENABLE_FIFO;
685 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
686 mxser_set_must_fifo_value(info);
687 } else
688 fcr = 0;
689 } else {
690 fcr = UART_FCR_ENABLE_FIFO;
691 if (info->board->chip_flag) {
692 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
693 mxser_set_must_fifo_value(info);
694 } else {
695 switch (info->rx_trigger) {
696 case 1:
697 fcr |= UART_FCR_TRIGGER_1;
698 break;
699 case 4:
700 fcr |= UART_FCR_TRIGGER_4;
701 break;
702 case 8:
703 fcr |= UART_FCR_TRIGGER_8;
704 break;
705 default:
706 fcr |= UART_FCR_TRIGGER_14;
707 break;
708 }
709 }
710 }
711
712 /* CTS flow control flag and modem status interrupts */
713 info->IER &= ~UART_IER_MSI;
714 info->MCR &= ~UART_MCR_AFE;
715 if (cflag & CRTSCTS) {
716 info->port.flags |= ASYNC_CTS_FLOW;
717 info->IER |= UART_IER_MSI;
718 if ((info->type == PORT_16550A) || (info->board->chip_flag)) {
719 info->MCR |= UART_MCR_AFE;
720 } else {
721 status = inb(info->ioaddr + UART_MSR);
722 if (tty->hw_stopped) {
723 if (status & UART_MSR_CTS) {
724 tty->hw_stopped = 0;
725 if (info->type != PORT_16550A &&
726 !info->board->chip_flag) {
727 outb(info->IER & ~UART_IER_THRI,
728 info->ioaddr +
729 UART_IER);
730 info->IER |= UART_IER_THRI;
731 outb(info->IER, info->ioaddr +
732 UART_IER);
733 }
734 tty_wakeup(tty);
735 }
736 } else {
737 if (!(status & UART_MSR_CTS)) {
738 tty->hw_stopped = 1;
739 if ((info->type != PORT_16550A) &&
740 (!info->board->chip_flag)) {
741 info->IER &= ~UART_IER_THRI;
742 outb(info->IER, info->ioaddr +
743 UART_IER);
744 }
745 }
746 }
747 }
748 } else {
749 info->port.flags &= ~ASYNC_CTS_FLOW;
750 }
751 outb(info->MCR, info->ioaddr + UART_MCR);
752 if (cflag & CLOCAL) {
753 info->port.flags &= ~ASYNC_CHECK_CD;
754 } else {
755 info->port.flags |= ASYNC_CHECK_CD;
756 info->IER |= UART_IER_MSI;
757 }
758 outb(info->IER, info->ioaddr + UART_IER);
759
760 /*
761 * Set up parity check flag
762 */
763 info->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
764 if (I_INPCK(tty))
765 info->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
766 if (I_BRKINT(tty) || I_PARMRK(tty))
767 info->read_status_mask |= UART_LSR_BI;
768
769 info->ignore_status_mask = 0;
770
771 if (I_IGNBRK(tty)) {
772 info->ignore_status_mask |= UART_LSR_BI;
773 info->read_status_mask |= UART_LSR_BI;
774 /*
775 * If we're ignore parity and break indicators, ignore
776 * overruns too. (For real raw support).
777 */
778 if (I_IGNPAR(tty)) {
779 info->ignore_status_mask |=
780 UART_LSR_OE |
781 UART_LSR_PE |
782 UART_LSR_FE;
783 info->read_status_mask |=
784 UART_LSR_OE |
785 UART_LSR_PE |
786 UART_LSR_FE;
787 }
788 }
789 if (info->board->chip_flag) {
790 mxser_set_must_xon1_value(info->ioaddr, START_CHAR(tty));
791 mxser_set_must_xoff1_value(info->ioaddr, STOP_CHAR(tty));
792 if (I_IXON(tty)) {
793 mxser_enable_must_rx_software_flow_control(
794 info->ioaddr);
795 } else {
796 mxser_disable_must_rx_software_flow_control(
797 info->ioaddr);
798 }
799 if (I_IXOFF(tty)) {
800 mxser_enable_must_tx_software_flow_control(
801 info->ioaddr);
802 } else {
803 mxser_disable_must_tx_software_flow_control(
804 info->ioaddr);
805 }
806 }
807
808
809 outb(fcr, info->ioaddr + UART_FCR); /* set fcr */
810 outb(cval, info->ioaddr + UART_LCR);
811
812 return ret;
813 }
814
815 static void mxser_check_modem_status(struct tty_struct *tty,
816 struct mxser_port *port, int status)
817 {
818 /* update input line counters */
819 if (status & UART_MSR_TERI)
820 port->icount.rng++;
821 if (status & UART_MSR_DDSR)
822 port->icount.dsr++;
823 if (status & UART_MSR_DDCD)
824 port->icount.dcd++;
825 if (status & UART_MSR_DCTS)
826 port->icount.cts++;
827 port->mon_data.modem_status = status;
828 wake_up_interruptible(&port->port.delta_msr_wait);
829
830 if ((port->port.flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) {
831 if (status & UART_MSR_DCD)
832 wake_up_interruptible(&port->port.open_wait);
833 }
834
835 if (port->port.flags & ASYNC_CTS_FLOW) {
836 if (tty->hw_stopped) {
837 if (status & UART_MSR_CTS) {
838 tty->hw_stopped = 0;
839
840 if ((port->type != PORT_16550A) &&
841 (!port->board->chip_flag)) {
842 outb(port->IER & ~UART_IER_THRI,
843 port->ioaddr + UART_IER);
844 port->IER |= UART_IER_THRI;
845 outb(port->IER, port->ioaddr +
846 UART_IER);
847 }
848 tty_wakeup(tty);
849 }
850 } else {
851 if (!(status & UART_MSR_CTS)) {
852 tty->hw_stopped = 1;
853 if (port->type != PORT_16550A &&
854 !port->board->chip_flag) {
855 port->IER &= ~UART_IER_THRI;
856 outb(port->IER, port->ioaddr +
857 UART_IER);
858 }
859 }
860 }
861 }
862 }
863
864 static int mxser_activate(struct tty_port *port, struct tty_struct *tty)
865 {
866 struct mxser_port *info = container_of(port, struct mxser_port, port);
867 unsigned long page;
868 unsigned long flags;
869
870 page = __get_free_page(GFP_KERNEL);
871 if (!page)
872 return -ENOMEM;
873
874 spin_lock_irqsave(&info->slock, flags);
875
876 if (!info->ioaddr || !info->type) {
877 set_bit(TTY_IO_ERROR, &tty->flags);
878 free_page(page);
879 spin_unlock_irqrestore(&info->slock, flags);
880 return 0;
881 }
882 info->port.xmit_buf = (unsigned char *) page;
883
884 /*
885 * Clear the FIFO buffers and disable them
886 * (they will be reenabled in mxser_change_speed())
887 */
888 if (info->board->chip_flag)
889 outb((UART_FCR_CLEAR_RCVR |
890 UART_FCR_CLEAR_XMIT |
891 MOXA_MUST_FCR_GDA_MODE_ENABLE), info->ioaddr + UART_FCR);
892 else
893 outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
894 info->ioaddr + UART_FCR);
895
896 /*
897 * At this point there's no way the LSR could still be 0xFF;
898 * if it is, then bail out, because there's likely no UART
899 * here.
900 */
901 if (inb(info->ioaddr + UART_LSR) == 0xff) {
902 spin_unlock_irqrestore(&info->slock, flags);
903 if (capable(CAP_SYS_ADMIN)) {
904 set_bit(TTY_IO_ERROR, &tty->flags);
905 return 0;
906 } else
907 return -ENODEV;
908 }
909
910 /*
911 * Clear the interrupt registers.
912 */
913 (void) inb(info->ioaddr + UART_LSR);
914 (void) inb(info->ioaddr + UART_RX);
915 (void) inb(info->ioaddr + UART_IIR);
916 (void) inb(info->ioaddr + UART_MSR);
917
918 /*
919 * Now, initialize the UART
920 */
921 outb(UART_LCR_WLEN8, info->ioaddr + UART_LCR); /* reset DLAB */
922 info->MCR = UART_MCR_DTR | UART_MCR_RTS;
923 outb(info->MCR, info->ioaddr + UART_MCR);
924
925 /*
926 * Finally, enable interrupts
927 */
928 info->IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI;
929
930 if (info->board->chip_flag)
931 info->IER |= MOXA_MUST_IER_EGDAI;
932 outb(info->IER, info->ioaddr + UART_IER); /* enable interrupts */
933
934 /*
935 * And clear the interrupt registers again for luck.
936 */
937 (void) inb(info->ioaddr + UART_LSR);
938 (void) inb(info->ioaddr + UART_RX);
939 (void) inb(info->ioaddr + UART_IIR);
940 (void) inb(info->ioaddr + UART_MSR);
941
942 clear_bit(TTY_IO_ERROR, &tty->flags);
943 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
944
945 /*
946 * and set the speed of the serial port
947 */
948 mxser_change_speed(tty, NULL);
949 spin_unlock_irqrestore(&info->slock, flags);
950
951 return 0;
952 }
953
954 /*
955 * This routine will shutdown a serial port
956 */
957 static void mxser_shutdown_port(struct tty_port *port)
958 {
959 struct mxser_port *info = container_of(port, struct mxser_port, port);
960 unsigned long flags;
961
962 spin_lock_irqsave(&info->slock, flags);
963
964 /*
965 * clear delta_msr_wait queue to avoid mem leaks: we may free the irq
966 * here so the queue might never be waken up
967 */
968 wake_up_interruptible(&info->port.delta_msr_wait);
969
970 /*
971 * Free the xmit buffer, if necessary
972 */
973 if (info->port.xmit_buf) {
974 free_page((unsigned long) info->port.xmit_buf);
975 info->port.xmit_buf = NULL;
976 }
977
978 info->IER = 0;
979 outb(0x00, info->ioaddr + UART_IER);
980
981 /* clear Rx/Tx FIFO's */
982 if (info->board->chip_flag)
983 outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT |
984 MOXA_MUST_FCR_GDA_MODE_ENABLE,
985 info->ioaddr + UART_FCR);
986 else
987 outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT,
988 info->ioaddr + UART_FCR);
989
990 /* read data port to reset things */
991 (void) inb(info->ioaddr + UART_RX);
992
993
994 if (info->board->chip_flag)
995 SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(info->ioaddr);
996
997 spin_unlock_irqrestore(&info->slock, flags);
998 }
999
1000 /*
1001 * This routine is called whenever a serial port is opened. It
1002 * enables interrupts for a serial port, linking in its async structure into
1003 * the IRQ chain. It also performs the serial-specific
1004 * initialization for the tty structure.
1005 */
1006 static int mxser_open(struct tty_struct *tty, struct file *filp)
1007 {
1008 struct mxser_port *info;
1009 int line;
1010
1011 line = tty->index;
1012 if (line == MXSER_PORTS)
1013 return 0;
1014 if (line < 0 || line > MXSER_PORTS)
1015 return -ENODEV;
1016 info = &mxser_boards[line / MXSER_PORTS_PER_BOARD].ports[line % MXSER_PORTS_PER_BOARD];
1017 if (!info->ioaddr)
1018 return -ENODEV;
1019
1020 tty->driver_data = info;
1021 return tty_port_open(&info->port, tty, filp);
1022 }
1023
1024 static void mxser_flush_buffer(struct tty_struct *tty)
1025 {
1026 struct mxser_port *info = tty->driver_data;
1027 char fcr;
1028 unsigned long flags;
1029
1030
1031 spin_lock_irqsave(&info->slock, flags);
1032 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
1033
1034 fcr = inb(info->ioaddr + UART_FCR);
1035 outb((fcr | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
1036 info->ioaddr + UART_FCR);
1037 outb(fcr, info->ioaddr + UART_FCR);
1038
1039 spin_unlock_irqrestore(&info->slock, flags);
1040
1041 tty_wakeup(tty);
1042 }
1043
1044
1045 static void mxser_close_port(struct tty_port *port)
1046 {
1047 struct mxser_port *info = container_of(port, struct mxser_port, port);
1048 unsigned long timeout;
1049 /*
1050 * At this point we stop accepting input. To do this, we
1051 * disable the receive line status interrupts, and tell the
1052 * interrupt driver to stop checking the data ready bit in the
1053 * line status register.
1054 */
1055 info->IER &= ~UART_IER_RLSI;
1056 if (info->board->chip_flag)
1057 info->IER &= ~MOXA_MUST_RECV_ISR;
1058
1059 outb(info->IER, info->ioaddr + UART_IER);
1060 /*
1061 * Before we drop DTR, make sure the UART transmitter
1062 * has completely drained; this is especially
1063 * important if there is a transmit FIFO!
1064 */
1065 timeout = jiffies + HZ;
1066 while (!(inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT)) {
1067 schedule_timeout_interruptible(5);
1068 if (time_after(jiffies, timeout))
1069 break;
1070 }
1071 }
1072
1073 /*
1074 * Direct copy of drivers/char/tty_port.c with one key difference:
1075 * ASYNC_CLOSING is avoided because this causes a soft lock in
1076 * tty_wait_until_sent.
1077 * Why this happens is unknown (to me, hoping someone can shed light).
1078 * Maybe because the console tty shares the same IRQ?
1079 * Adding printk for each transmitted character (mxser_transmit_chars)
1080 * also "fixes" the bug.
1081 * Console "sh" process gets stuck in schedule from:
1082 * mxser_close -> tty_port_close_start -> tty_wait_until_sent
1083 * -> schedule_timeout -> schedule
1084 * Kernel printout: http://ideone.com/e845mr
1085 */
1086 int mxser_tty_port_close_start(struct tty_port *port,
1087 struct tty_struct *tty, struct file *filp)
1088 {
1089 unsigned long flags;
1090
1091 spin_lock_irqsave(&port->lock, flags);
1092 if (tty_hung_up_p(filp)) {
1093 spin_unlock_irqrestore(&port->lock, flags);
1094 return 0;
1095 }
1096
1097 if (tty->count == 1 && port->count != 1) {
1098 pr_warn(
1099 "tty_port_close_start: tty->count = 1 port"
1100 " count = %d.\n", port->count);
1101 port->count = 1;
1102 }
1103 if (--port->count < 0) {
1104 pr_warn("tty_port_close_start: count = %d\n",
1105 port->count);
1106 port->count = 0;
1107 }
1108
1109 if (port->count) {
1110 spin_unlock_irqrestore(&port->lock, flags);
1111 if (port->ops->drop)
1112 port->ops->drop(port);
1113 return 0;
1114 }
1115 /* set_bit(ASYNCB_CLOSING, &port->flags); */
1116 tty->closing = 1;
1117 spin_unlock_irqrestore(&port->lock, flags);
1118
1119 /* Don't block on a stalled port, just pull the chain */
1120 if (tty->flow_stopped)
1121 tty_driver_flush_buffer(tty);
1122
1123 if (test_bit(ASYNCB_INITIALIZED, &port->flags) &&
1124 port->closing_wait != ASYNC_CLOSING_WAIT_NONE)
1125 tty_wait_until_sent(tty, port->closing_wait);
1126
1127 if (port->drain_delay) {
1128 unsigned int bps = tty_get_baud_rate(tty);
1129 long timeout;
1130
1131 if (bps > 1200)
1132 timeout = max_t(long, (HZ * 10 * port->drain_delay)
1133 / bps, HZ / 10);
1134 else
1135 timeout = 2 * HZ;
1136 schedule_timeout_interruptible(timeout);
1137 }
1138 /* Flush the ldisc buffering */
1139 tty_ldisc_flush(tty);
1140
1141 /* Drop DTR/RTS if HUPCL is set. This causes any attached modem to
1142 hang up the line */
1143 if (tty->termios->c_cflag & HUPCL)
1144 tty_port_lower_dtr_rts(port);
1145
1146 /* Don't call port->drop for the last reference. Callers will want
1147 to drop the last active reference in ->shutdown() or the tty
1148 shutdown path */
1149 return 1;
1150 }
1151
1152
1153 /*
1154 * This routine is called when the serial port gets closed. First, we
1155 * wait for the last remaining data to be sent. Then, we unlink its
1156 * async structure from the interrupt chain if necessary, and we free
1157 * that IRQ if nothing is left in the chain.
1158 */
1159 static void mxser_close(struct tty_struct *tty, struct file *filp)
1160 {
1161 struct mxser_port *info = tty->driver_data;
1162 struct tty_port *port = &info->port;
1163
1164 if (tty->index == MXSER_PORTS || info == NULL)
1165 return;
1166
1167 #ifdef CONFIG_ARCH_MOXART
1168 if (mxser_tty_port_close_start(port, tty, filp) == 0)
1169 #else
1170 if (tty_port_close_start(port, tty, filp) == 0)
1171 #endif
1172 return;
1173 mutex_lock(&port->mutex);
1174 mxser_close_port(port);
1175 mxser_flush_buffer(tty);
1176 mxser_shutdown_port(port);
1177 clear_bit(ASYNCB_INITIALIZED, &port->flags);
1178 mutex_unlock(&port->mutex);
1179 /* Right now the tty_port set is done outside of the close_end helper
1180 as we don't yet have everyone using refcounts */
1181 tty_port_close_end(port, tty);
1182 tty_port_tty_set(port, NULL);
1183 }
1184
1185 static int mxser_write(struct tty_struct *tty, const unsigned char *buf, int count)
1186 {
1187 int c, total = 0;
1188 struct mxser_port *info = tty->driver_data;
1189 unsigned long flags;
1190
1191 if (!info->port.xmit_buf)
1192 return 0;
1193
1194 while (1) {
1195 c = min_t(int, count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
1196 SERIAL_XMIT_SIZE - info->xmit_head));
1197 if (c <= 0)
1198 break;
1199
1200 memcpy(info->port.xmit_buf + info->xmit_head, buf, c);
1201 spin_lock_irqsave(&info->slock, flags);
1202 info->xmit_head = (info->xmit_head + c) &
1203 (SERIAL_XMIT_SIZE - 1);
1204 info->xmit_cnt += c;
1205 spin_unlock_irqrestore(&info->slock, flags);
1206
1207 buf += c;
1208 count -= c;
1209 total += c;
1210 }
1211
1212 if (info->xmit_cnt && !tty->stopped) {
1213 if (!tty->hw_stopped ||
1214 (info->type == PORT_16550A) ||
1215 (info->board->chip_flag)) {
1216 spin_lock_irqsave(&info->slock, flags);
1217 outb(info->IER & ~UART_IER_THRI, info->ioaddr +
1218 UART_IER);
1219 info->IER |= UART_IER_THRI;
1220 outb(info->IER, info->ioaddr + UART_IER);
1221 spin_unlock_irqrestore(&info->slock, flags);
1222 }
1223 }
1224 return total;
1225 }
1226
1227 static int mxser_put_char(struct tty_struct *tty, unsigned char ch)
1228 {
1229 struct mxser_port *info = tty->driver_data;
1230 unsigned long flags;
1231
1232 if (!info->port.xmit_buf)
1233 return 0;
1234
1235 if (info->xmit_cnt >= SERIAL_XMIT_SIZE - 1)
1236 return 0;
1237
1238 spin_lock_irqsave(&info->slock, flags);
1239 info->port.xmit_buf[info->xmit_head++] = ch;
1240 info->xmit_head &= SERIAL_XMIT_SIZE - 1;
1241 info->xmit_cnt++;
1242 spin_unlock_irqrestore(&info->slock, flags);
1243 if (!tty->stopped) {
1244 if (!tty->hw_stopped ||
1245 (info->type == PORT_16550A) ||
1246 info->board->chip_flag) {
1247 spin_lock_irqsave(&info->slock, flags);
1248 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
1249 info->IER |= UART_IER_THRI;
1250 outb(info->IER, info->ioaddr + UART_IER);
1251 spin_unlock_irqrestore(&info->slock, flags);
1252 }
1253 }
1254 return 1;
1255 }
1256
1257
1258 static void mxser_flush_chars(struct tty_struct *tty)
1259 {
1260 struct mxser_port *info = tty->driver_data;
1261 unsigned long flags;
1262
1263 if (info->xmit_cnt <= 0 || tty->stopped || !info->port.xmit_buf ||
1264 (tty->hw_stopped && info->type != PORT_16550A &&
1265 !info->board->chip_flag))
1266 return;
1267
1268 spin_lock_irqsave(&info->slock, flags);
1269
1270 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
1271 info->IER |= UART_IER_THRI;
1272 outb(info->IER, info->ioaddr + UART_IER);
1273
1274 spin_unlock_irqrestore(&info->slock, flags);
1275 }
1276
1277 static int mxser_write_room(struct tty_struct *tty)
1278 {
1279 struct mxser_port *info = tty->driver_data;
1280 int ret;
1281
1282 ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1;
1283 return ret < 0 ? 0 : ret;
1284 }
1285
1286 static int mxser_chars_in_buffer(struct tty_struct *tty)
1287 {
1288 struct mxser_port *info = tty->driver_data;
1289 return info->xmit_cnt;
1290 }
1291
1292 /*
1293 * ------------------------------------------------------------
1294 * friends of mxser_ioctl()
1295 * ------------------------------------------------------------
1296 */
1297 static int mxser_get_serial_info(struct tty_struct *tty,
1298 struct serial_struct __user *retinfo)
1299 {
1300 struct mxser_port *info = tty->driver_data;
1301 struct serial_struct tmp = {
1302 .type = info->type,
1303 .line = tty->index,
1304 .port = info->ioaddr,
1305 .irq = info->board->irq,
1306 .flags = info->port.flags,
1307 .baud_base = info->baud_base,
1308 .close_delay = info->port.close_delay,
1309 .closing_wait = info->port.closing_wait,
1310 .custom_divisor = info->custom_divisor,
1311 .hub6 = 0
1312 };
1313 if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
1314 return -EFAULT;
1315 return 0;
1316 }
1317
1318 static int mxser_set_serial_info(struct tty_struct *tty,
1319 struct serial_struct __user *new_info)
1320 {
1321 struct mxser_port *info = tty->driver_data;
1322 struct tty_port *port = &info->port;
1323 struct serial_struct new_serial;
1324 speed_t baud;
1325 unsigned long sl_flags;
1326 unsigned int flags;
1327 int retval = 0;
1328
1329 if (!new_info || !info->ioaddr)
1330 return -ENODEV;
1331 if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
1332 return -EFAULT;
1333
1334 if (new_serial.irq != info->board->irq ||
1335 new_serial.port != info->ioaddr)
1336 return -EINVAL;
1337
1338 flags = port->flags & ASYNC_SPD_MASK;
1339
1340 if (!capable(CAP_SYS_ADMIN)) {
1341 if ((new_serial.baud_base != info->baud_base) ||
1342 (new_serial.close_delay != info->port.close_delay) ||
1343 ((new_serial.flags & ~ASYNC_USR_MASK) != (info->port.flags & ~ASYNC_USR_MASK)))
1344 return -EPERM;
1345 info->port.flags = ((info->port.flags & ~ASYNC_USR_MASK) |
1346 (new_serial.flags & ASYNC_USR_MASK));
1347 } else {
1348 /*
1349 * OK, past this point, all the error checking has been done.
1350 * At this point, we start making changes.....
1351 */
1352 port->flags = ((port->flags & ~ASYNC_FLAGS) |
1353 (new_serial.flags & ASYNC_FLAGS));
1354 port->close_delay = new_serial.close_delay * HZ / 100;
1355 port->closing_wait = new_serial.closing_wait * HZ / 100;
1356 tty->low_latency = (port->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
1357 if ((port->flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST &&
1358 (new_serial.baud_base != info->baud_base ||
1359 new_serial.custom_divisor !=
1360 info->custom_divisor)) {
1361 if (new_serial.custom_divisor == 0)
1362 return -EINVAL;
1363 baud = new_serial.baud_base / new_serial.custom_divisor;
1364 tty_encode_baud_rate(tty, baud, baud);
1365 }
1366 }
1367
1368 info->type = new_serial.type;
1369
1370 process_txrx_fifo(info);
1371
1372 if (test_bit(ASYNCB_INITIALIZED, &port->flags)) {
1373 if (flags != (port->flags & ASYNC_SPD_MASK)) {
1374 spin_lock_irqsave(&info->slock, sl_flags);
1375 mxser_change_speed(tty, NULL);
1376 spin_unlock_irqrestore(&info->slock, sl_flags);
1377 }
1378 } else {
1379 retval = mxser_activate(port, tty);
1380 if (retval == 0)
1381 set_bit(ASYNCB_INITIALIZED, &port->flags);
1382 }
1383 return retval;
1384 }
1385
1386 /*
1387 * mxser_get_lsr_info - get line status register info
1388 *
1389 * Purpose: Let user call ioctl() to get info when the UART physically
1390 * is emptied. On bus types like RS485, the transmitter must
1391 * release the bus after transmitting. This must be done when
1392 * the transmit shift register is empty, not be done when the
1393 * transmit holding register is empty. This functionality
1394 * allows an RS485 driver to be written in user space.
1395 */
1396 static int mxser_get_lsr_info(struct mxser_port *info,
1397 unsigned int __user *value)
1398 {
1399 unsigned char status;
1400 unsigned int result;
1401 unsigned long flags;
1402
1403 spin_lock_irqsave(&info->slock, flags);
1404 status = inb(info->ioaddr + UART_LSR);
1405 spin_unlock_irqrestore(&info->slock, flags);
1406 result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0);
1407 return put_user(result, value);
1408 }
1409
1410 static int mxser_tiocmget(struct tty_struct *tty, struct file *file)
1411 {
1412 struct mxser_port *info = tty->driver_data;
1413 unsigned char control, status;
1414 unsigned long flags;
1415
1416
1417 if (tty->index == MXSER_PORTS)
1418 return -ENOIOCTLCMD;
1419 if (test_bit(TTY_IO_ERROR, &tty->flags))
1420 return -EIO;
1421
1422 control = info->MCR;
1423
1424 spin_lock_irqsave(&info->slock, flags);
1425 status = inb(info->ioaddr + UART_MSR);
1426 if (status & UART_MSR_ANY_DELTA)
1427 mxser_check_modem_status(tty, info, status);
1428 spin_unlock_irqrestore(&info->slock, flags);
1429 return ((control & UART_MCR_RTS) ? TIOCM_RTS : 0) |
1430 ((control & UART_MCR_DTR) ? TIOCM_DTR : 0) |
1431 ((status & UART_MSR_DCD) ? TIOCM_CAR : 0) |
1432 ((status & UART_MSR_RI) ? TIOCM_RNG : 0) |
1433 ((status & UART_MSR_DSR) ? TIOCM_DSR : 0) |
1434 ((status & UART_MSR_CTS) ? TIOCM_CTS : 0);
1435 }
1436
1437 static int mxser_tiocmset(struct tty_struct *tty, struct file *file,
1438 unsigned int set, unsigned int clear)
1439 {
1440 struct mxser_port *info = tty->driver_data;
1441 unsigned long flags;
1442
1443
1444 if (tty->index == MXSER_PORTS)
1445 return -ENOIOCTLCMD;
1446 if (test_bit(TTY_IO_ERROR, &tty->flags))
1447 return -EIO;
1448
1449 spin_lock_irqsave(&info->slock, flags);
1450
1451 if (set & TIOCM_RTS)
1452 info->MCR |= UART_MCR_RTS;
1453 if (set & TIOCM_DTR)
1454 info->MCR |= UART_MCR_DTR;
1455
1456 if (clear & TIOCM_RTS)
1457 info->MCR &= ~UART_MCR_RTS;
1458 if (clear & TIOCM_DTR)
1459 info->MCR &= ~UART_MCR_DTR;
1460
1461 outb(info->MCR, info->ioaddr + UART_MCR);
1462 spin_unlock_irqrestore(&info->slock, flags);
1463 return 0;
1464 }
1465
1466 static int __init mxser_program_mode(int port)
1467 {
1468 int id, i, j, n;
1469
1470 outb(0, port);
1471 outb(0, port);
1472 outb(0, port);
1473 (void)inb(port);
1474 (void)inb(port);
1475 outb(0, port);
1476 (void)inb(port);
1477
1478 id = inb(port + 1) & 0x1F;
1479 if ((id != C168_ASIC_ID) &&
1480 (id != C104_ASIC_ID) &&
1481 (id != C102_ASIC_ID) &&
1482 (id != CI132_ASIC_ID) &&
1483 (id != CI134_ASIC_ID) &&
1484 (id != CI104J_ASIC_ID))
1485 return -1;
1486 for (i = 0, j = 0; i < 4; i++) {
1487 n = inb(port + 2);
1488 if (n == 'M') {
1489 j = 1;
1490 } else if ((j == 1) && (n == 1)) {
1491 j = 2;
1492 break;
1493 } else
1494 j = 0;
1495 }
1496 if (j != 2)
1497 id = -2;
1498 return id;
1499 }
1500
1501 static void __init mxser_normal_mode(int port)
1502 {
1503 int i, n;
1504
1505 outb(0xA5, port + 1);
1506 outb(0x80, port + 3);
1507 outb(12, port + 0); /* 9600 bps */
1508 outb(0, port + 1);
1509 outb(0x03, port + 3); /* 8 data bits */
1510 outb(0x13, port + 4); /* loop back mode */
1511 for (i = 0; i < 16; i++) {
1512 n = inb(port + 5);
1513 if ((n & 0x61) == 0x60)
1514 break;
1515 if ((n & 1) == 1)
1516 (void)inb(port);
1517 }
1518 outb(0x00, port + 4);
1519 }
1520
1521 #define CHIP_SK 0x01 /* Serial Data Clock in Eprom */
1522 #define CHIP_DO 0x02 /* Serial Data Output in Eprom */
1523 #define CHIP_CS 0x04 /* Serial Chip Select in Eprom */
1524 #define CHIP_DI 0x08 /* Serial Data Input in Eprom */
1525 #define EN_CCMD 0x000 /* Chip's command register */
1526 #define EN0_RSARLO 0x008 /* Remote start address reg 0 */
1527 #define EN0_RSARHI 0x009 /* Remote start address reg 1 */
1528 #define EN0_RCNTLO 0x00A /* Remote byte count reg WR */
1529 #define EN0_RCNTHI 0x00B /* Remote byte count reg WR */
1530 #define EN0_DCFG 0x00E /* Data configuration reg WR */
1531 #define EN0_PORT 0x010 /* Rcv missed frame error counter RD */
1532 #define ENC_PAGE0 0x000 /* Select page 0 of chip registers */
1533 #define ENC_PAGE3 0x0C0 /* Select page 3 of chip registers */
1534 static int __init mxser_read_register(int port, unsigned short *regs)
1535 {
1536 int i, k, value, id;
1537 unsigned int j;
1538
1539 id = mxser_program_mode(port);
1540 if (id < 0)
1541 return id;
1542 for (i = 0; i < 14; i++) {
1543 k = (i & 0x3F) | 0x180;
1544 for (j = 0x100; j > 0; j >>= 1) {
1545 outb(CHIP_CS, port);
1546 if (k & j) {
1547 outb(CHIP_CS | CHIP_DO, port);
1548 outb(CHIP_CS | CHIP_DO | CHIP_SK, port); /* A? bit of read */
1549 } else {
1550 outb(CHIP_CS, port);
1551 outb(CHIP_CS | CHIP_SK, port); /* A? bit of read */
1552 }
1553 }
1554 (void)inb(port);
1555 value = 0;
1556 for (k = 0, j = 0x8000; k < 16; k++, j >>= 1) {
1557 outb(CHIP_CS, port);
1558 outb(CHIP_CS | CHIP_SK, port);
1559 if (inb(port) & CHIP_DI)
1560 value |= j;
1561 }
1562 regs[i] = value;
1563 outb(0, port);
1564 }
1565 mxser_normal_mode(port);
1566 return id;
1567 }
1568
1569 static int mxser_ioctl_special(unsigned int cmd, void __user *argp)
1570 {
1571 struct mxser_port *ip;
1572 struct tty_port *port;
1573 struct tty_struct *tty;
1574 int result, status;
1575 unsigned int i, j;
1576 int ret = 0;
1577
1578 switch (cmd) {
1579 case MOXA_GET_MAJOR:
1580 if (printk_ratelimit())
1581 printk(KERN_WARNING "mxser: '%s' uses deprecated ioctl "
1582 "%x (GET_MAJOR), fix your userspace\n",
1583 current->comm, cmd);
1584 return put_user(ttymajor, (int __user *)argp);
1585
1586 case MOXA_CHKPORTENABLE:
1587 result = 0;
1588 for (i = 0; i < MXSER_BOARDS; i++)
1589 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++)
1590 if (mxser_boards[i].ports[j].ioaddr)
1591 result |= (1 << i);
1592 return put_user(result, (unsigned long __user *)argp);
1593 case MOXA_GETDATACOUNT:
1594 /* The receive side is locked by port->slock but it isn't
1595 clear that an exact snapshot is worth copying here */
1596 if (copy_to_user(argp, &mxvar_log, sizeof(mxvar_log)))
1597 ret = -EFAULT;
1598 return ret;
1599 case MOXA_GETMSTATUS: {
1600 struct mxser_mstatus ms, __user *msu = argp;
1601 for (i = 0; i < MXSER_BOARDS; i++)
1602 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) {
1603 ip = &mxser_boards[i].ports[j];
1604 port = &ip->port;
1605 memset(&ms, 0, sizeof(ms));
1606
1607 mutex_lock(&port->mutex);
1608 if (!ip->ioaddr)
1609 goto copy;
1610
1611 tty = tty_port_tty_get(port);
1612
1613 if (!tty || !tty->termios)
1614 ms.cflag = ip->normal_termios.c_cflag;
1615 else
1616 ms.cflag = tty->termios->c_cflag;
1617 tty_kref_put(tty);
1618 spin_lock_irq(&ip->slock);
1619 status = inb(ip->ioaddr + UART_MSR);
1620 spin_unlock_irq(&ip->slock);
1621 if (status & UART_MSR_DCD)
1622 ms.dcd = 1;
1623 if (status & UART_MSR_DSR)
1624 ms.dsr = 1;
1625 if (status & UART_MSR_CTS)
1626 ms.cts = 1;
1627 copy:
1628 mutex_unlock(&port->mutex);
1629 if (copy_to_user(msu, &ms, sizeof(ms)))
1630 return -EFAULT;
1631 msu++;
1632 }
1633 return 0;
1634 }
1635 case MOXA_ASPP_MON_EXT: {
1636 struct mxser_mon_ext *me; /* it's 2k, stack unfriendly */
1637 unsigned int cflag, iflag, p;
1638 u8 opmode;
1639
1640 me = kzalloc(sizeof(*me), GFP_KERNEL);
1641 if (!me)
1642 return -ENOMEM;
1643
1644 for (i = 0, p = 0; i < MXSER_BOARDS; i++) {
1645 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++, p++) {
1646 if (p >= ARRAY_SIZE(me->rx_cnt)) {
1647 i = MXSER_BOARDS;
1648 break;
1649 }
1650 ip = &mxser_boards[i].ports[j];
1651 port = &ip->port;
1652
1653 mutex_lock(&port->mutex);
1654 if (!ip->ioaddr) {
1655 mutex_unlock(&port->mutex);
1656 continue;
1657 }
1658
1659 spin_lock_irq(&ip->slock);
1660 status = mxser_get_msr(ip->ioaddr, 0, p);
1661
1662 if (status & UART_MSR_TERI)
1663 ip->icount.rng++;
1664 if (status & UART_MSR_DDSR)
1665 ip->icount.dsr++;
1666 if (status & UART_MSR_DDCD)
1667 ip->icount.dcd++;
1668 if (status & UART_MSR_DCTS)
1669 ip->icount.cts++;
1670
1671 ip->mon_data.modem_status = status;
1672 me->rx_cnt[p] = ip->mon_data.rxcnt;
1673 me->tx_cnt[p] = ip->mon_data.txcnt;
1674 me->up_rxcnt[p] = ip->mon_data.up_rxcnt;
1675 me->up_txcnt[p] = ip->mon_data.up_txcnt;
1676 me->modem_status[p] =
1677 ip->mon_data.modem_status;
1678 spin_unlock_irq(&ip->slock);
1679
1680 tty = tty_port_tty_get(&ip->port);
1681
1682 if (!tty || !tty->termios) {
1683 cflag = ip->normal_termios.c_cflag;
1684 iflag = ip->normal_termios.c_iflag;
1685 me->baudrate[p] = tty_termios_baud_rate(&ip->normal_termios);
1686 } else {
1687 cflag = tty->termios->c_cflag;
1688 iflag = tty->termios->c_iflag;
1689 me->baudrate[p] = tty_get_baud_rate(tty);
1690 }
1691 tty_kref_put(tty);
1692
1693 me->databits[p] = cflag & CSIZE;
1694 me->stopbits[p] = cflag & CSTOPB;
1695 me->parity[p] = cflag & (PARENB | PARODD |
1696 CMSPAR);
1697
1698 if (cflag & CRTSCTS)
1699 me->flowctrl[p] |= 0x03;
1700
1701 if (iflag & (IXON | IXOFF))
1702 me->flowctrl[p] |= 0x0C;
1703
1704 if (ip->type == PORT_16550A)
1705 me->fifo[p] = 1;
1706
1707 opmode = inb(ip->opmode_ioaddr)>>((p % 4) * 2);
1708 opmode &= OP_MODE_MASK;
1709 me->iftype[p] = opmode;
1710 mutex_unlock(&port->mutex);
1711 }
1712 }
1713 if (copy_to_user(argp, me, sizeof(*me)))
1714 ret = -EFAULT;
1715 kfree(me);
1716 return ret;
1717 }
1718 default:
1719 return -ENOIOCTLCMD;
1720 }
1721 return 0;
1722 }
1723
1724 static int mxser_cflags_changed(struct mxser_port *info, unsigned long arg,
1725 struct async_icount *cprev)
1726 {
1727 struct async_icount cnow;
1728 unsigned long flags;
1729 int ret;
1730
1731 spin_lock_irqsave(&info->slock, flags);
1732 cnow = info->icount; /* atomic copy */
1733 spin_unlock_irqrestore(&info->slock, flags);
1734
1735 ret = ((arg & TIOCM_RNG) && (cnow.rng != cprev->rng)) ||
1736 ((arg & TIOCM_DSR) && (cnow.dsr != cprev->dsr)) ||
1737 ((arg & TIOCM_CD) && (cnow.dcd != cprev->dcd)) ||
1738 ((arg & TIOCM_CTS) && (cnow.cts != cprev->cts));
1739
1740 *cprev = cnow;
1741
1742 return ret;
1743 }
1744
1745 static int mxser_ioctl(struct tty_struct *tty, struct file *file,
1746 unsigned int cmd, unsigned long arg)
1747 {
1748 struct mxser_port *info = tty->driver_data;
1749 struct tty_port *port = &info->port;
1750 struct async_icount cnow;
1751 unsigned long flags;
1752 void __user *argp = (void __user *)arg;
1753 int retval;
1754
1755 if (tty->index == MXSER_PORTS)
1756 return mxser_ioctl_special(cmd, argp);
1757
1758 if (cmd == MOXA_SET_OP_MODE || cmd == MOXA_GET_OP_MODE) {
1759 int p;
1760 unsigned long opmode;
1761 static unsigned char ModeMask[] = { 0xfc, 0xf3, 0xcf, 0x3f };
1762 int shiftbit;
1763 unsigned char val, mask;
1764
1765 p = tty->index % 4;
1766 if (cmd == MOXA_SET_OP_MODE) {
1767 if (get_user(opmode, (int __user *) argp))
1768 return -EFAULT;
1769 if (opmode != RS232_MODE &&
1770 opmode != RS485_2WIRE_MODE &&
1771 opmode != RS422_MODE &&
1772 opmode != RS485_4WIRE_MODE)
1773 return -EFAULT;
1774 mask = ModeMask[p];
1775 shiftbit = p * 2;
1776 spin_lock_irq(&info->slock);
1777 val = inb(info->opmode_ioaddr);
1778 val &= mask;
1779 val |= (opmode << shiftbit);
1780 outb(val, info->opmode_ioaddr);
1781 spin_unlock_irq(&info->slock);
1782 } else {
1783 shiftbit = p * 2;
1784 spin_lock_irq(&info->slock);
1785 opmode = inb(info->opmode_ioaddr) >> shiftbit;
1786 spin_unlock_irq(&info->slock);
1787 opmode &= OP_MODE_MASK;
1788 if (put_user(opmode, (int __user *)argp))
1789 return -EFAULT;
1790 }
1791 return 0;
1792 }
1793
1794 if (cmd != TIOCGSERIAL && cmd != TIOCMIWAIT &&
1795 test_bit(TTY_IO_ERROR, &tty->flags))
1796 return -EIO;
1797
1798 switch (cmd) {
1799 case TIOCGSERIAL:
1800 mutex_lock(&port->mutex);
1801 retval = mxser_get_serial_info(tty, argp);
1802 mutex_unlock(&port->mutex);
1803 return retval;
1804 case TIOCSSERIAL:
1805 mutex_lock(&port->mutex);
1806 retval = mxser_set_serial_info(tty, argp);
1807 mutex_unlock(&port->mutex);
1808 return retval;
1809 case TIOCSERGETLSR: /* Get line status register */
1810 return mxser_get_lsr_info(info, argp);
1811 /*
1812 * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
1813 * - mask passed in arg for lines of interest
1814 * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
1815 * Caller should use TIOCGICOUNT to see which one it was
1816 */
1817 case TIOCMIWAIT:
1818 spin_lock_irqsave(&info->slock, flags);
1819 cnow = info->icount; /* note the counters on entry */
1820 spin_unlock_irqrestore(&info->slock, flags);
1821
1822 return wait_event_interruptible(info->port.delta_msr_wait,
1823 mxser_cflags_changed(info, arg, &cnow));
1824 case MOXA_HighSpeedOn:
1825 return put_user(info->baud_base != 115200 ? 1 : 0, (int __user *)argp);
1826 case MOXA_SDS_RSTICOUNTER:
1827 spin_lock_irq(&info->slock);
1828 info->mon_data.rxcnt = 0;
1829 info->mon_data.txcnt = 0;
1830 spin_unlock_irq(&info->slock);
1831 return 0;
1832
1833 case MOXA_ASPP_OQUEUE:{
1834 int len, lsr;
1835
1836 len = mxser_chars_in_buffer(tty);
1837 spin_lock_irq(&info->slock);
1838 lsr = inb(info->ioaddr + UART_LSR) & UART_LSR_THRE;
1839 spin_unlock_irq(&info->slock);
1840 len += (lsr ? 0 : 1);
1841
1842 return put_user(len, (int __user *)argp);
1843 }
1844 case MOXA_ASPP_MON: {
1845 int mcr, status;
1846
1847 spin_lock_irq(&info->slock);
1848 status = mxser_get_msr(info->ioaddr, 1, tty->index);
1849 mxser_check_modem_status(tty, info, status);
1850
1851 mcr = inb(info->ioaddr + UART_MCR);
1852 spin_unlock_irq(&info->slock);
1853
1854 if (mcr & MOXA_MUST_MCR_XON_FLAG)
1855 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFHOLD;
1856 else
1857 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFHOLD;
1858
1859 if (mcr & MOXA_MUST_MCR_TX_XON)
1860 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFXENT;
1861 else
1862 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFXENT;
1863
1864 if (tty->hw_stopped)
1865 info->mon_data.hold_reason |= NPPI_NOTIFY_CTSHOLD;
1866 else
1867 info->mon_data.hold_reason &= ~NPPI_NOTIFY_CTSHOLD;
1868
1869 if (copy_to_user(argp, &info->mon_data,
1870 sizeof(struct mxser_mon)))
1871 return -EFAULT;
1872
1873 return 0;
1874 }
1875 case MOXA_ASPP_LSTATUS: {
1876 if (put_user(info->err_shadow, (unsigned char __user *)argp))
1877 return -EFAULT;
1878
1879 info->err_shadow = 0;
1880 return 0;
1881 }
1882 case MOXA_SET_BAUD_METHOD: {
1883 int method;
1884
1885 if (get_user(method, (int __user *)argp))
1886 return -EFAULT;
1887 mxser_set_baud_method[tty->index] = method;
1888 return put_user(method, (int __user *)argp);
1889 }
1890 default:
1891 return -ENOIOCTLCMD;
1892 }
1893 return 0;
1894 }
1895
1896 /*
1897 * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
1898 * Return: write counters to the user passed counter struct
1899 * NB: both 1->0 and 0->1 transitions are counted except for
1900 * RI where only 0->1 is counted.
1901 */
1902
1903 static int mxser_get_icount(struct tty_struct *tty,
1904 struct serial_icounter_struct *icount)
1905
1906 {
1907 struct mxser_port *info = tty->driver_data;
1908 struct async_icount cnow;
1909 unsigned long flags;
1910
1911 spin_lock_irqsave(&info->slock, flags);
1912 cnow = info->icount;
1913 spin_unlock_irqrestore(&info->slock, flags);
1914
1915 icount->frame = cnow.frame;
1916 icount->brk = cnow.brk;
1917 icount->overrun = cnow.overrun;
1918 icount->buf_overrun = cnow.buf_overrun;
1919 icount->parity = cnow.parity;
1920 icount->rx = cnow.rx;
1921 icount->tx = cnow.tx;
1922 icount->cts = cnow.cts;
1923 icount->dsr = cnow.dsr;
1924 icount->rng = cnow.rng;
1925 icount->dcd = cnow.dcd;
1926 return 0;
1927 }
1928
1929 static void mxser_stoprx(struct tty_struct *tty)
1930 {
1931 struct mxser_port *info = tty->driver_data;
1932
1933 info->ldisc_stop_rx = 1;
1934 if (I_IXOFF(tty)) {
1935 if (info->board->chip_flag) {
1936 info->IER &= ~MOXA_MUST_RECV_ISR;
1937 outb(info->IER, info->ioaddr + UART_IER);
1938 } else {
1939 info->x_char = STOP_CHAR(tty);
1940 outb(0, info->ioaddr + UART_IER);
1941 info->IER |= UART_IER_THRI;
1942 outb(info->IER, info->ioaddr + UART_IER);
1943 }
1944 }
1945
1946 if (tty->termios->c_cflag & CRTSCTS) {
1947 info->MCR &= ~UART_MCR_RTS;
1948 outb(info->MCR, info->ioaddr + UART_MCR);
1949 }
1950 }
1951
1952 /*
1953 * This routine is called by the upper-layer tty layer to signal that
1954 * incoming characters should be throttled.
1955 */
1956 static void mxser_throttle(struct tty_struct *tty)
1957 {
1958 mxser_stoprx(tty);
1959 }
1960
1961 static void mxser_unthrottle(struct tty_struct *tty)
1962 {
1963 struct mxser_port *info = tty->driver_data;
1964
1965 /* startrx */
1966 info->ldisc_stop_rx = 0;
1967 if (I_IXOFF(tty)) {
1968 if (info->x_char)
1969 info->x_char = 0;
1970 else {
1971 if (info->board->chip_flag) {
1972 info->IER |= MOXA_MUST_RECV_ISR;
1973 outb(info->IER, info->ioaddr + UART_IER);
1974 } else {
1975 info->x_char = START_CHAR(tty);
1976 outb(0, info->ioaddr + UART_IER);
1977 info->IER |= UART_IER_THRI;
1978 outb(info->IER, info->ioaddr + UART_IER);
1979 }
1980 }
1981 }
1982
1983 if (tty->termios->c_cflag & CRTSCTS) {
1984 info->MCR |= UART_MCR_RTS;
1985 outb(info->MCR, info->ioaddr + UART_MCR);
1986 }
1987 }
1988
1989 /*
1990 * mxser_stop() and mxser_start()
1991 *
1992 * This routines are called before setting or resetting tty->stopped.
1993 * They enable or disable transmitter interrupts, as necessary.
1994 */
1995 static void mxser_stop(struct tty_struct *tty)
1996 {
1997 struct mxser_port *info = tty->driver_data;
1998 unsigned long flags;
1999
2000 spin_lock_irqsave(&info->slock, flags);
2001 if (info->IER & UART_IER_THRI) {
2002 info->IER &= ~UART_IER_THRI;
2003 outb(info->IER, info->ioaddr + UART_IER);
2004 }
2005 spin_unlock_irqrestore(&info->slock, flags);
2006 }
2007
2008 static void mxser_start(struct tty_struct *tty)
2009 {
2010 struct mxser_port *info = tty->driver_data;
2011 unsigned long flags;
2012
2013 spin_lock_irqsave(&info->slock, flags);
2014 if (info->xmit_cnt && info->port.xmit_buf) {
2015 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
2016 info->IER |= UART_IER_THRI;
2017 outb(info->IER, info->ioaddr + UART_IER);
2018 }
2019 spin_unlock_irqrestore(&info->slock, flags);
2020 }
2021
2022 static void mxser_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
2023 {
2024 struct mxser_port *info = tty->driver_data;
2025 unsigned long flags;
2026
2027 spin_lock_irqsave(&info->slock, flags);
2028 mxser_change_speed(tty, old_termios);
2029 spin_unlock_irqrestore(&info->slock, flags);
2030
2031 if ((old_termios->c_cflag & CRTSCTS) &&
2032 !(tty->termios->c_cflag & CRTSCTS)) {
2033 tty->hw_stopped = 0;
2034 mxser_start(tty);
2035 }
2036
2037 /* Handle sw stopped */
2038 if ((old_termios->c_iflag & IXON) &&
2039 !(tty->termios->c_iflag & IXON)) {
2040 tty->stopped = 0;
2041
2042 if (info->board->chip_flag) {
2043 spin_lock_irqsave(&info->slock, flags);
2044 mxser_disable_must_rx_software_flow_control(
2045 info->ioaddr);
2046 spin_unlock_irqrestore(&info->slock, flags);
2047 }
2048
2049 mxser_start(tty);
2050 }
2051 }
2052
2053 /*
2054 * mxser_wait_until_sent() --- wait until the transmitter is empty
2055 */
2056 static void mxser_wait_until_sent(struct tty_struct *tty, int timeout)
2057 {
2058 struct mxser_port *info = tty->driver_data;
2059 unsigned long orig_jiffies, char_time;
2060 unsigned long flags;
2061 int lsr;
2062
2063 if (info->type == PORT_UNKNOWN)
2064 return;
2065
2066 if (info->xmit_fifo_size == 0)
2067 return; /* Just in case.... */
2068
2069 orig_jiffies = jiffies;
2070 /*
2071 * Set the check interval to be 1/5 of the estimated time to
2072 * send a single character, and make it at least 1. The check
2073 * interval should also be less than the timeout.
2074 *
2075 * Note: we have to use pretty tight timings here to satisfy
2076 * the NIST-PCTS.
2077 */
2078 char_time = (info->timeout - HZ / 50) / info->xmit_fifo_size;
2079 char_time = char_time / 5;
2080 if (char_time == 0)
2081 char_time = 1;
2082 if (timeout && timeout < char_time)
2083 char_time = timeout;
2084 /*
2085 * If the transmitter hasn't cleared in twice the approximate
2086 * amount of time to send the entire FIFO, it probably won't
2087 * ever clear. This assumes the UART isn't doing flow
2088 * control, which is currently the case. Hence, if it ever
2089 * takes longer than info->timeout, this is probably due to a
2090 * UART bug of some kind. So, we clamp the timeout parameter at
2091 * 2*info->timeout.
2092 */
2093 if (!timeout || timeout > 2 * info->timeout)
2094 timeout = 2 * info->timeout;
2095 #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
2096 printk(KERN_DEBUG "In rs_wait_until_sent(%d) check=%lu...",
2097 timeout, char_time);
2098 printk("jiff=%lu...", jiffies);
2099 #endif
2100 spin_lock_irqsave(&info->slock, flags);
2101 while (!((lsr = inb(info->ioaddr + UART_LSR)) & UART_LSR_TEMT)) {
2102 #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
2103 printk("lsr = %d (jiff=%lu)...", lsr, jiffies);
2104 #endif
2105 spin_unlock_irqrestore(&info->slock, flags);
2106 schedule_timeout_interruptible(char_time);
2107 spin_lock_irqsave(&info->slock, flags);
2108 if (signal_pending(current))
2109 break;
2110 if (timeout && time_after(jiffies, orig_jiffies + timeout))
2111 break;
2112 }
2113 spin_unlock_irqrestore(&info->slock, flags);
2114 set_current_state(TASK_RUNNING);
2115
2116 #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
2117 printk("lsr = %d (jiff=%lu)...done\n", lsr, jiffies);
2118 #endif
2119 }
2120
2121 /*
2122 * This routine is called by tty_hangup() when a hangup is signaled.
2123 */
2124 static void mxser_hangup(struct tty_struct *tty)
2125 {
2126 struct mxser_port *info = tty->driver_data;
2127
2128 mxser_flush_buffer(tty);
2129 tty_port_hangup(&info->port);
2130 }
2131
2132 /*
2133 * mxser_rs_break() --- routine which turns the break handling on or off
2134 */
2135 static int mxser_rs_break(struct tty_struct *tty, int break_state)
2136 {
2137 struct mxser_port *info = tty->driver_data;
2138 unsigned long flags;
2139
2140 spin_lock_irqsave(&info->slock, flags);
2141 if (break_state == -1)
2142 outb(inb(info->ioaddr + UART_LCR) | UART_LCR_SBC,
2143 info->ioaddr + UART_LCR);
2144 else
2145 outb(inb(info->ioaddr + UART_LCR) & ~UART_LCR_SBC,
2146 info->ioaddr + UART_LCR);
2147 spin_unlock_irqrestore(&info->slock, flags);
2148 return 0;
2149 }
2150
2151 static void mxser_receive_chars(struct tty_struct *tty,
2152 struct mxser_port *port, int *status)
2153 {
2154 unsigned char ch, gdl;
2155 int ignored = 0;
2156 int cnt = 0;
2157 int recv_room;
2158 int max = 256;
2159
2160 recv_room = tty->receive_room;
2161 if (recv_room == 0 && !port->ldisc_stop_rx)
2162 mxser_stoprx(tty);
2163 if (port->board->chip_flag != MOXA_OTHER_UART) {
2164
2165 if (*status & UART_LSR_SPECIAL)
2166 goto intr_old;
2167 if (port->board->chip_flag == MOXA_MUST_MU860_HWID &&
2168 (*status & MOXA_MUST_LSR_RERR))
2169 goto intr_old;
2170 if (*status & MOXA_MUST_LSR_RERR)
2171 goto intr_old;
2172
2173 gdl = inb(port->ioaddr + MOXA_MUST_GDL_REGISTER);
2174
2175 if (port->board->chip_flag == MOXA_MUST_MU150_HWID)
2176 gdl &= MOXA_MUST_GDL_MASK;
2177 if (gdl >= recv_room) {
2178 if (!port->ldisc_stop_rx)
2179 mxser_stoprx(tty);
2180 }
2181 while (gdl--) {
2182 ch = inb(port->ioaddr + UART_RX);
2183 tty_insert_flip_char(tty, ch, 0);
2184 cnt++;
2185 }
2186 goto end_intr;
2187 }
2188 intr_old:
2189
2190 do {
2191 if (max-- < 0)
2192 break;
2193
2194 ch = inb(port->ioaddr + UART_RX);
2195 if (port->board->chip_flag && (*status & UART_LSR_OE))
2196 outb(0x23, port->ioaddr + UART_FCR);
2197 *status &= port->read_status_mask;
2198 if (*status & port->ignore_status_mask) {
2199 if (++ignored > 100)
2200 break;
2201 } else {
2202 char flag = 0;
2203 if (*status & UART_LSR_SPECIAL) {
2204 if (*status & UART_LSR_BI) {
2205 flag = TTY_BREAK;
2206 port->icount.brk++;
2207
2208 if (port->port.flags & ASYNC_SAK)
2209 do_SAK(tty);
2210 } else if (*status & UART_LSR_PE) {
2211 flag = TTY_PARITY;
2212 port->icount.parity++;
2213 } else if (*status & UART_LSR_FE) {
2214 flag = TTY_FRAME;
2215 port->icount.frame++;
2216 } else if (*status & UART_LSR_OE) {
2217 flag = TTY_OVERRUN;
2218 port->icount.overrun++;
2219 } else
2220 flag = TTY_BREAK;
2221 }
2222 tty_insert_flip_char(tty, ch, flag);
2223 cnt++;
2224 if (cnt >= recv_room) {
2225 if (!port->ldisc_stop_rx)
2226 mxser_stoprx(tty);
2227 break;
2228 }
2229
2230 }
2231
2232 if (port->board->chip_flag)
2233 break;
2234
2235 *status = inb(port->ioaddr + UART_LSR);
2236 } while (*status & UART_LSR_DR);
2237
2238 end_intr:
2239 mxvar_log.rxcnt[tty->index] += cnt;
2240 port->mon_data.rxcnt += cnt;
2241 port->mon_data.up_rxcnt += cnt;
2242
2243 /*
2244 * We are called from an interrupt context with &port->slock
2245 * being held. Drop it temporarily in order to prevent
2246 * recursive locking.
2247 */
2248 spin_unlock(&port->slock);
2249 tty_flip_buffer_push(tty);
2250 spin_lock(&port->slock);
2251 }
2252
2253 static void mxser_transmit_chars(struct tty_struct *tty, struct mxser_port *port)
2254 {
2255 int count, cnt;
2256
2257 if (port->x_char) {
2258 outb(port->x_char, port->ioaddr + UART_TX);
2259 port->x_char = 0;
2260 mxvar_log.txcnt[tty->index]++;
2261 port->mon_data.txcnt++;
2262 port->mon_data.up_txcnt++;
2263 port->icount.tx++;
2264 return;
2265 }
2266
2267 if (port->port.xmit_buf == NULL)
2268 return;
2269
2270 if (port->xmit_cnt <= 0 || tty->stopped ||
2271 (tty->hw_stopped &&
2272 (port->type != PORT_16550A) &&
2273 (!port->board->chip_flag))) {
2274 port->IER &= ~UART_IER_THRI;
2275 outb(port->IER, port->ioaddr + UART_IER);
2276 return;
2277 }
2278
2279 cnt = port->xmit_cnt;
2280 count = port->xmit_fifo_size;
2281 do {
2282 outb(port->port.xmit_buf[port->xmit_tail++],
2283 port->ioaddr + UART_TX);
2284 port->xmit_tail = port->xmit_tail & (SERIAL_XMIT_SIZE - 1);
2285 if (--port->xmit_cnt <= 0)
2286 break;
2287 } while (--count > 0);
2288 mxvar_log.txcnt[tty->index] += (cnt - port->xmit_cnt);
2289
2290 port->mon_data.txcnt += (cnt - port->xmit_cnt);
2291 port->mon_data.up_txcnt += (cnt - port->xmit_cnt);
2292 port->icount.tx += (cnt - port->xmit_cnt);
2293
2294 if (port->xmit_cnt < WAKEUP_CHARS && tty)
2295 tty_wakeup(tty);
2296
2297 if (port->xmit_cnt <= 0) {
2298 port->IER &= ~UART_IER_THRI;
2299 outb(port->IER, port->ioaddr + UART_IER);
2300 }
2301 }
2302
2303 /*
2304 * This is the serial driver's generic interrupt routine
2305 */
2306 static irqreturn_t mxser_interrupt(int irq, void *dev_id)
2307 {
2308 int status, iir, i;
2309 struct mxser_board *brd = NULL;
2310 struct mxser_port *port;
2311 int max, irqbits, bits, msr;
2312 unsigned int int_cnt, pass_counter = 0;
2313 int handled = IRQ_NONE;
2314 struct tty_struct *tty;
2315
2316 for (i = 0; i < MXSER_BOARDS; i++)
2317 if (dev_id == &mxser_boards[i]) {
2318 brd = dev_id;
2319 break;
2320 }
2321
2322 if (i == MXSER_BOARDS)
2323 goto irq_stop;
2324 if (brd == NULL)
2325 goto irq_stop;
2326 max = brd->info->nports;
2327 while (pass_counter++ < MXSER_ISR_PASS_LIMIT) {
2328 irqbits = inb(brd->vector) & brd->vector_mask;
2329 if (irqbits == brd->vector_mask)
2330 break;
2331
2332 handled = IRQ_HANDLED;
2333 for (i = 0, bits = 1; i < max; i++, irqbits |= bits, bits <<= 1) {
2334 if (irqbits == brd->vector_mask)
2335 break;
2336 if (bits & irqbits)
2337 continue;
2338 port = &brd->ports[i];
2339
2340 int_cnt = 0;
2341 spin_lock(&port->slock);
2342 do {
2343 iir = inb(port->ioaddr + UART_IIR);
2344 if (iir & UART_IIR_NO_INT)
2345 break;
2346 iir &= MOXA_MUST_IIR_MASK;
2347 tty = tty_port_tty_get(&port->port);
2348 if (!tty ||
2349 (port->port.flags & ASYNC_CLOSING) ||
2350 !(port->port.flags &
2351 ASYNC_INITIALIZED)) {
2352 status = inb(port->ioaddr + UART_LSR);
2353 outb(0x27, port->ioaddr + UART_FCR);
2354 inb(port->ioaddr + UART_MSR);
2355 tty_kref_put(tty);
2356 break;
2357 }
2358
2359 status = inb(port->ioaddr + UART_LSR);
2360
2361 if (status & UART_LSR_PE)
2362 port->err_shadow |= NPPI_NOTIFY_PARITY;
2363 if (status & UART_LSR_FE)
2364 port->err_shadow |= NPPI_NOTIFY_FRAMING;
2365 if (status & UART_LSR_OE)
2366 port->err_shadow |=
2367 NPPI_NOTIFY_HW_OVERRUN;
2368 if (status & UART_LSR_BI)
2369 port->err_shadow |= NPPI_NOTIFY_BREAK;
2370
2371 if (port->board->chip_flag) {
2372 if (iir == MOXA_MUST_IIR_GDA ||
2373 iir == MOXA_MUST_IIR_RDA ||
2374 iir == MOXA_MUST_IIR_RTO ||
2375 iir == MOXA_MUST_IIR_LSR)
2376 mxser_receive_chars(tty, port,
2377 &status);
2378
2379 } else {
2380 status &= port->read_status_mask;
2381 if (status & UART_LSR_DR)
2382 mxser_receive_chars(tty, port,
2383 &status);
2384 }
2385 msr = inb(port->ioaddr + UART_MSR);
2386 if (msr & UART_MSR_ANY_DELTA)
2387 mxser_check_modem_status(tty, port, msr);
2388
2389 if (port->board->chip_flag) {
2390 if (iir == 0x02 && (status &
2391 UART_LSR_THRE))
2392 mxser_transmit_chars(tty, port);
2393 } else {
2394 if (status & UART_LSR_THRE)
2395 mxser_transmit_chars(tty, port);
2396 }
2397 tty_kref_put(tty);
2398 } while (int_cnt++ < MXSER_ISR_PASS_LIMIT);
2399 spin_unlock(&port->slock);
2400 }
2401 }
2402
2403 irq_stop:
2404 return handled;
2405 }
2406
2407 static const struct tty_operations mxser_ops = {
2408 .open = mxser_open,
2409 .close = mxser_close,
2410 .write = mxser_write,
2411 .put_char = mxser_put_char,
2412 .flush_chars = mxser_flush_chars,
2413 .write_room = mxser_write_room,
2414 .chars_in_buffer = mxser_chars_in_buffer,
2415 .flush_buffer = mxser_flush_buffer,
2416 .ioctl = mxser_ioctl,
2417 .throttle = mxser_throttle,
2418 .unthrottle = mxser_unthrottle,
2419 .set_termios = mxser_set_termios,
2420 .stop = mxser_stop,
2421 .start = mxser_start,
2422 .hangup = mxser_hangup,
2423 .break_ctl = mxser_rs_break,
2424 .wait_until_sent = mxser_wait_until_sent,
2425 .tiocmget = mxser_tiocmget,
2426 .tiocmset = mxser_tiocmset,
2427 .get_icount = mxser_get_icount,
2428 };
2429
2430 struct tty_port_operations mxser_port_ops = {
2431 .carrier_raised = mxser_carrier_raised,
2432 .dtr_rts = mxser_dtr_rts,
2433 .activate = mxser_activate,
2434 .shutdown = mxser_shutdown_port,
2435 };
2436
2437 /*
2438 * The MOXA Smartio/Industio serial driver boot-time initialization code!
2439 */
2440
2441 static void mxser_release_res(struct mxser_board *brd, struct pci_dev *pdev,
2442 unsigned int irq)
2443 {
2444 if (irq)
2445 free_irq(brd->irq, brd);
2446 if (pdev != NULL) { /* PCI */
2447 #ifdef CONFIG_PCI
2448 pci_release_region(pdev, 2);
2449 pci_release_region(pdev, 3);
2450 #endif
2451 } else {
2452 release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
2453 release_region(brd->vector, 1);
2454 }
2455 }
2456
2457 static int __devinit mxser_initbrd(struct mxser_board *brd,
2458 struct pci_dev *pdev)
2459 {
2460 struct mxser_port *info;
2461 unsigned int i;
2462 int retval;
2463
2464 printk(KERN_INFO "mxser: max. baud rate = %d bps\n",
2465 brd->ports[0].max_baud);
2466
2467 for (i = 0; i < brd->info->nports; i++) {
2468 info = &brd->ports[i];
2469 tty_port_init(&info->port);
2470 info->port.ops = &mxser_port_ops;
2471 info->board = brd;
2472 info->stop_rx = 0;
2473 info->ldisc_stop_rx = 0;
2474
2475 /* Enhance mode enabled here */
2476 if (brd->chip_flag != MOXA_OTHER_UART)
2477 mxser_enable_must_enchance_mode(info->ioaddr);
2478
2479 info->port.flags = ASYNC_SHARE_IRQ;
2480 info->type = brd->uart_type;
2481
2482 process_txrx_fifo(info);
2483
2484 info->custom_divisor = info->baud_base * 16;
2485 info->port.close_delay = 5 * HZ / 10;
2486 info->port.closing_wait = 30 * HZ;
2487 info->normal_termios = mxvar_sdriver->init_termios;
2488 memset(&info->mon_data, 0, sizeof(struct mxser_mon));
2489 info->err_shadow = 0;
2490 spin_lock_init(&info->slock);
2491
2492 /* before set INT ISR, disable all int */
2493 outb(inb(info->ioaddr + UART_IER) & 0xf0,
2494 info->ioaddr + UART_IER);
2495 }
2496
2497 retval = request_irq(brd->irq, mxser_interrupt, IRQF_SHARED, "mxser",
2498 brd);
2499 if (retval) {
2500 printk(KERN_ERR "Board %s: Request irq failed, IRQ (%d) may "
2501 "conflict with another device.\n",
2502 brd->info->name, brd->irq);
2503 /* We hold resources, we need to release them. */
2504 mxser_release_res(brd, pdev, 0);
2505 }
2506 return retval;
2507 }
2508
2509 static int __init mxser_get_ISA_conf(int cap, struct mxser_board *brd)
2510 {
2511 int id, i, bits;
2512 unsigned short regs[16], irq;
2513 unsigned char scratch, scratch2;
2514
2515 #ifdef CONFIG_ARCH_MOXART
2516 brd->chip_flag = MOXA_MUST_MU860_HWID;
2517 brd->info = &mxser_cards[32];
2518 brd->vector_mask = 0x0c;
2519 brd->irq = IRQ_UART;
2520 brd->vector = IO_ADDRESS(MOXART_UART_INT_VEC_BASE);
2521 brd->uart_type = PORT_16550A;
2522 for (i = 0; i < 2; i++) {
2523 brd->ports[i].ioaddr = IO_ADDRESS(MOXART_UART3_BASE) + i * 32;
2524 brd->ports[i].baud_base = 921600;
2525 brd->ports[i].max_baud = 921600;
2526 brd->ports[i].opmode_ioaddr = IO_ADDRESS(MOXART_UART_MODE_BASE);
2527 }
2528
2529 #else
2530
2531 brd->chip_flag = MOXA_OTHER_UART;
2532
2533 id = mxser_read_register(cap, regs);
2534 switch (id) {
2535 case C168_ASIC_ID:
2536 brd->info = &mxser_cards[0];
2537 break;
2538 case C104_ASIC_ID:
2539 brd->info = &mxser_cards[1];
2540 break;
2541 case CI104J_ASIC_ID:
2542 brd->info = &mxser_cards[2];
2543 break;
2544 case C102_ASIC_ID:
2545 brd->info = &mxser_cards[5];
2546 break;
2547 case CI132_ASIC_ID:
2548 brd->info = &mxser_cards[6];
2549 break;
2550 case CI134_ASIC_ID:
2551 brd->info = &mxser_cards[7];
2552 break;
2553 default:
2554 return 0;
2555 }
2556
2557 irq = 0;
2558 /* some ISA cards have 2 ports, but we want to see them as 4-port (why?)
2559 Flag-hack checks if configuration should be read as 2-port here. */
2560 if (brd->info->nports == 2 || (brd->info->flags & MXSER_HAS2)) {
2561 irq = regs[9] & 0xF000;
2562 irq = irq | (irq >> 4);
2563 if (irq != (regs[9] & 0xFF00))
2564 goto err_irqconflict;
2565 } else if (brd->info->nports == 4) {
2566 irq = regs[9] & 0xF000;
2567 irq = irq | (irq >> 4);
2568 irq = irq | (irq >> 8);
2569 if (irq != regs[9])
2570 goto err_irqconflict;
2571 } else if (brd->info->nports == 8) {
2572 irq = regs[9] & 0xF000;
2573 irq = irq | (irq >> 4);
2574 irq = irq | (irq >> 8);
2575 if ((irq != regs[9]) || (irq != regs[10]))
2576 goto err_irqconflict;
2577 }
2578
2579 if (!irq) {
2580 printk(KERN_ERR "mxser: interrupt number unset\n");
2581 return -EIO;
2582 }
2583 brd->irq = ((int)(irq & 0xF000) >> 12);
2584 for (i = 0; i < 8; i++)
2585 brd->ports[i].ioaddr = (int) regs[i + 1] & 0xFFF8;
2586 if ((regs[12] & 0x80) == 0) {
2587 printk(KERN_ERR "mxser: invalid interrupt vector\n");
2588 return -EIO;
2589 }
2590 brd->vector = (int)regs[11]; /* interrupt vector */
2591 if (id == 1)
2592 brd->vector_mask = 0x00FF;
2593 else
2594 brd->vector_mask = 0x000F;
2595 for (i = 7, bits = 0x0100; i >= 0; i--, bits <<= 1) {
2596 if (regs[12] & bits) {
2597 brd->ports[i].baud_base = 921600;
2598 brd->ports[i].max_baud = 921600;
2599 } else {
2600 brd->ports[i].baud_base = 115200;
2601 brd->ports[i].max_baud = 115200;
2602 }
2603 }
2604 scratch2 = inb(cap + UART_LCR) & (~UART_LCR_DLAB);
2605 outb(scratch2 | UART_LCR_DLAB, cap + UART_LCR);
2606 outb(0, cap + UART_EFR); /* EFR is the same as FCR */
2607 outb(scratch2, cap + UART_LCR);
2608 outb(UART_FCR_ENABLE_FIFO, cap + UART_FCR);
2609 scratch = inb(cap + UART_IIR);
2610
2611 if (scratch & 0xC0)
2612 brd->uart_type = PORT_16550A;
2613 else
2614 brd->uart_type = PORT_16450;
2615
2616 #endif
2617
2618 if (!request_region(brd->ports[0].ioaddr, 8 * brd->info->nports,
2619 "mxser(IO)")) {
2620 printk(KERN_ERR "mxser: can't request ports I/O region: "
2621 "0x%.8lx-0x%.8lx\n",
2622 brd->ports[0].ioaddr, brd->ports[0].ioaddr +
2623 8 * brd->info->nports - 1);
2624 return -EIO;
2625 }
2626 if (!request_region(brd->vector, 1, "mxser(vector)")) {
2627 release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
2628 printk(KERN_ERR "mxser: can't request interrupt vector region: "
2629 "0x%.8lx-0x%.8lx\n",
2630 brd->ports[0].ioaddr, brd->ports[0].ioaddr +
2631 8 * brd->info->nports - 1);
2632 return -EIO;
2633 }
2634 return brd->info->nports;
2635
2636 err_irqconflict:
2637 printk(KERN_ERR "mxser: invalid interrupt number\n");
2638 return -EIO;
2639 }
2640
2641 static int __devinit mxser_probe(struct pci_dev *pdev,
2642 const struct pci_device_id *ent)
2643 {
2644 #ifdef CONFIG_PCI
2645 struct mxser_board *brd;
2646 unsigned int i, j;
2647 unsigned long ioaddress;
2648 int retval = -EINVAL;
2649
2650 for (i = 0; i < MXSER_BOARDS; i++)
2651 if (mxser_boards[i].info == NULL)
2652 break;
2653
2654 if (i >= MXSER_BOARDS) {
2655 dev_err(&pdev->dev, "too many boards found (maximum %d), board "
2656 "not configured\n", MXSER_BOARDS);
2657 goto err;
2658 }
2659
2660 brd = &mxser_boards[i];
2661 brd->idx = i * MXSER_PORTS_PER_BOARD;
2662 dev_info(&pdev->dev, "found MOXA %s board (BusNo=%d, DevNo=%d)\n",
2663 mxser_cards[ent->driver_data].name,
2664 pdev->bus->number, PCI_SLOT(pdev->devfn));
2665
2666 retval = pci_enable_device(pdev);
2667 if (retval) {
2668 dev_err(&pdev->dev, "PCI enable failed\n");
2669 goto err;
2670 }
2671
2672 /* io address */
2673 ioaddress = pci_resource_start(pdev, 2);
2674 retval = pci_request_region(pdev, 2, "mxser(IO)");
2675 if (retval)
2676 goto err;
2677
2678 brd->info = &mxser_cards[ent->driver_data];
2679 for (i = 0; i < brd->info->nports; i++)
2680 brd->ports[i].ioaddr = ioaddress + 8 * i;
2681
2682 /* vector */
2683 ioaddress = pci_resource_start(pdev, 3);
2684 retval = pci_request_region(pdev, 3, "mxser(vector)");
2685 if (retval)
2686 goto err_relio;
2687 brd->vector = ioaddress;
2688
2689 /* irq */
2690 brd->irq = pdev->irq;
2691
2692 brd->chip_flag = CheckIsMoxaMust(brd->ports[0].ioaddr);
2693 brd->uart_type = PORT_16550A;
2694 brd->vector_mask = 0;
2695
2696 for (i = 0; i < brd->info->nports; i++) {
2697 for (j = 0; j < UART_INFO_NUM; j++) {
2698 if (Gpci_uart_info[j].type == brd->chip_flag) {
2699 brd->ports[i].max_baud =
2700 Gpci_uart_info[j].max_baud;
2701
2702 /* exception....CP-102 */
2703 if (brd->info->flags & MXSER_HIGHBAUD)
2704 brd->ports[i].max_baud = 921600;
2705 break;
2706 }
2707 }
2708 }
2709
2710 if (brd->chip_flag == MOXA_MUST_MU860_HWID) {
2711 for (i = 0; i < brd->info->nports; i++) {
2712 if (i < 4)
2713 brd->ports[i].opmode_ioaddr = ioaddress + 4;
2714 else
2715 brd->ports[i].opmode_ioaddr = ioaddress + 0x0c;
2716 }
2717 outb(0, ioaddress + 4); /* default set to RS232 mode */
2718 outb(0, ioaddress + 0x0c); /* default set to RS232 mode */
2719 }
2720
2721 for (i = 0; i < brd->info->nports; i++) {
2722 brd->vector_mask |= (1 << i);
2723 brd->ports[i].baud_base = 921600;
2724 }
2725
2726 /* mxser_initbrd will hook ISR. */
2727 retval = mxser_initbrd(brd, pdev);
2728 if (retval)
2729 goto err_null;
2730
2731 for (i = 0; i < brd->info->nports; i++)
2732 tty_register_device(mxvar_sdriver, brd->idx + i, &pdev->dev);
2733
2734 pci_set_drvdata(pdev, brd);
2735
2736 return 0;
2737 err_relio:
2738 pci_release_region(pdev, 2);
2739 err_null:
2740 brd->info = NULL;
2741 err:
2742 return retval;
2743 #else
2744 return -ENODEV;
2745 #endif
2746 }
2747
2748 static void __devexit mxser_remove(struct pci_dev *pdev)
2749 {
2750 struct mxser_board *brd = pci_get_drvdata(pdev);
2751 unsigned int i;
2752
2753 for (i = 0; i < brd->info->nports; i++)
2754 tty_unregister_device(mxvar_sdriver, brd->idx + i);
2755
2756 mxser_release_res(brd, pdev, 1);
2757 brd->info = NULL;
2758 }
2759
2760 static struct pci_driver mxser_driver = {
2761 .name = "mxser",
2762 .id_table = mxser_pcibrds,
2763 .probe = mxser_probe,
2764 .remove = __devexit_p(mxser_remove)
2765 };
2766
2767 static int __init mxser_module_init(void)
2768 {
2769 struct mxser_board *brd;
2770 unsigned int b, i, m;
2771 int retval;
2772
2773 mxvar_sdriver = alloc_tty_driver(MXSER_PORTS + 1);
2774 if (!mxvar_sdriver)
2775 return -ENOMEM;
2776
2777 printk(KERN_INFO "MOXA Smartio/Industio family driver version %s\n",
2778 MXSER_VERSION);
2779
2780 /* Initialize the tty_driver structure */
2781 mxvar_sdriver->owner = THIS_MODULE;
2782 mxvar_sdriver->magic = TTY_DRIVER_MAGIC;
2783 #ifdef CONFIG_ARCH_MOXART
2784 mxvar_sdriver->name = "ttyM";
2785 #else
2786 mxvar_sdriver->name = "ttyMI";
2787 #endif
2788 mxvar_sdriver->major = ttymajor;
2789 mxvar_sdriver->minor_start = 0;
2790 mxvar_sdriver->num = MXSER_PORTS + 1;
2791 mxvar_sdriver->type = TTY_DRIVER_TYPE_SERIAL;
2792 mxvar_sdriver->subtype = SERIAL_TYPE_NORMAL;
2793 mxvar_sdriver->init_termios = tty_std_termios;
2794 mxvar_sdriver->init_termios.c_cflag = B9600|CS8|CREAD|HUPCL|CLOCAL;
2795 mxvar_sdriver->flags = TTY_DRIVER_REAL_RAW|TTY_DRIVER_DYNAMIC_DEV;
2796 tty_set_operations(mxvar_sdriver, &mxser_ops);
2797
2798 retval = tty_register_driver(mxvar_sdriver);
2799 if (retval) {
2800 printk(KERN_ERR "Couldn't install MOXA Smartio/Industio family "
2801 "tty driver !\n");
2802 goto err_put;
2803 }
2804
2805 /* Start finding ISA boards here */
2806 for (m = 0, b = 0; b < MXSER_BOARDS; b++) {
2807 #ifndef CONFIG_ARCH_MOXART
2808 /* no continue if no ioaddr param fed to module
2809 (force past for UC-7112-LX) */
2810 if (!ioaddr[b])
2811 continue;
2812 #endif
2813
2814 brd = &mxser_boards[m];
2815 retval = mxser_get_ISA_conf(ioaddr[b], brd);
2816 if (retval <= 0) {
2817 brd->info = NULL;
2818 continue;
2819 }
2820
2821 printk(KERN_INFO "mxser: found MOXA %s board (CAP=0x%lx)\n",
2822 brd->info->name, ioaddr[b]);
2823
2824 /* mxser_initbrd will hook ISR. */
2825 if (mxser_initbrd(brd, NULL) < 0) {
2826 brd->info = NULL;
2827 continue;
2828 }
2829
2830 brd->idx = m * MXSER_PORTS_PER_BOARD;
2831 for (i = 0; i < brd->info->nports; i++)
2832 tty_register_device(mxvar_sdriver, brd->idx + i, NULL);
2833
2834 m++;
2835 }
2836
2837 retval = pci_register_driver(&mxser_driver);
2838 if (retval) {
2839 printk(KERN_ERR "mxser: can't register pci driver\n");
2840 if (!m) {
2841 retval = -ENODEV;
2842 goto err_unr;
2843 } /* else: we have some ISA cards under control */
2844 }
2845
2846 return 0;
2847 err_unr:
2848 tty_unregister_driver(mxvar_sdriver);
2849 err_put:
2850 put_tty_driver(mxvar_sdriver);
2851 return retval;
2852 }
2853
2854 static void __exit mxser_module_exit(void)
2855 {
2856 unsigned int i, j;
2857
2858 pci_unregister_driver(&mxser_driver);
2859
2860 for (i = 0; i < MXSER_BOARDS; i++) /* ISA remains */
2861 if (mxser_boards[i].info != NULL)
2862 for (j = 0; j < mxser_boards[i].info->nports; j++)
2863 tty_unregister_device(mxvar_sdriver,
2864 mxser_boards[i].idx + j);
2865 tty_unregister_driver(mxvar_sdriver);
2866 put_tty_driver(mxvar_sdriver);
2867
2868 for (i = 0; i < MXSER_BOARDS; i++)
2869 if (mxser_boards[i].info != NULL)
2870 mxser_release_res(&mxser_boards[i], NULL, 1);
2871 }
2872
2873 module_init(mxser_module_init);
2874 module_exit(mxser_module_exit);
Linux ARM platform port for MOXA ART SoC