arch/arm/plat-omap/timer32k.c

   1 /*
   2  * linux/arch/arm/plat-omap/timer32k.c
   3  *
   4  * OMAP 32K Timer
   5  *
   6  * Copyright (C) 2004 - 2005 Nokia Corporation
   7  * Partial timer rewrite and additional dynamic tick timer support by
   8  * Tony Lindgen <tony@atomide.com> and
   9  * Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>
  10  *
  11  * MPU timer code based on the older MPU timer code for OMAP
  12  * Copyright (C) 2000 RidgeRun, Inc.
  13  * Author: Greg Lonnon <glonnon@ridgerun.com>
  14  *
  15  * This program is free software; you can redistribute it and/or modify it
  16  * under the terms of the GNU General Public License as published by the
  17  * Free Software Foundation; either version 2 of the License, or (at your
  18  * option) any later version.
  19  *
  20  * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  21  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  22  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
  23  * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  24  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  25  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
  26  * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  27  * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  28  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  29  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  30  *
  31  * You should have received a copy of the  GNU General Public License along
  32  * with this program; if not, write  to the Free Software Foundation, Inc.,
  33  * 675 Mass Ave, Cambridge, MA 02139, USA.
  34  */
  35
  36 #include <linux/config.h>
  37 #include <linux/kernel.h>
  38 #include <linux/init.h>
  39 #include <linux/delay.h>
  40 #include <linux/interrupt.h>
  41 #include <linux/sched.h>
  42 #include <linux/spinlock.h>
  43 #include <linux/err.h>
  44 #include <linux/clk.h>
  45
  46 #include <asm/system.h>
  47 #include <asm/hardware.h>
  48 #include <asm/io.h>
  49 #include <asm/leds.h>
  50 #include <asm/irq.h>
  51 #include <asm/mach/irq.h>
  52 #include <asm/mach/time.h>
  53
  54 struct sys_timer omap_timer;
  55
  56 /*
  57  * ---------------------------------------------------------------------------
  58  * 32KHz OS timer
  59  *
  60  * This currently works only on 16xx, as 1510 does not have the continuous
  61  * 32KHz synchronous timer. The 32KHz synchronous timer is used to keep track
  62  * of time in addition to the 32KHz OS timer. Using only the 32KHz OS timer
  63  * on 1510 would be possible, but the timer would not be as accurate as
  64  * with the 32KHz synchronized timer.
  65  * ---------------------------------------------------------------------------
  66  */
  67
  68 #if defined(CONFIG_ARCH_OMAP16XX)
  69 #define TIMER_32K_SYNCHRONIZED          0xfffbc410
  70 #elif defined(CONFIG_ARCH_OMAP24XX)
  71 #define TIMER_32K_SYNCHRONIZED          0x48004010
  72 #else
  73 #error OMAP 32KHz timer does not currently work on 15XX!
  74 #endif
  75
  76 /* 16xx specific defines */
  77 #define OMAP1_32K_TIMER_BASE            0xfffb9000
  78 #define OMAP1_32K_TIMER_CR              0x08
  79 #define OMAP1_32K_TIMER_TVR             0x00
  80 #define OMAP1_32K_TIMER_TCR             0x04
  81
  82 /* 24xx specific defines */
  83 #define OMAP2_GP_TIMER_BASE             0x48028000
  84 #define CM_CLKSEL_WKUP                  0x48008440
  85 #define GP_TIMER_TIDR                   0x00
  86 #define GP_TIMER_TISR                   0x18
  87 #define GP_TIMER_TIER                   0x1c
  88 #define GP_TIMER_TCLR                   0x24
  89 #define GP_TIMER_TCRR                   0x28
  90 #define GP_TIMER_TLDR                   0x2c
  91 #define GP_TIMER_TTGR                   0x30
  92 #define GP_TIMER_TSICR                  0x40
  93
  94 #define OMAP_32K_TICKS_PER_HZ           (32768 / HZ)
  95
  96 /*
  97  * TRM says 1 / HZ = ( TVR + 1) / 32768, so TRV = (32768 / HZ) - 1
  98  * so with HZ = 128, TVR = 255.
  99  */
 100 #define OMAP_32K_TIMER_TICK_PERIOD      ((32768 / HZ) - 1)
 101
 102 #define JIFFIES_TO_HW_TICKS(nr_jiffies, clock_rate)                     \
 103                                 (((nr_jiffies) * (clock_rate)) / HZ)
 104
 105 static inline void omap_32k_timer_write(int val, int reg)
 106 {
 107         if (cpu_class_is_omap1())
 108                 omap_writew(val, OMAP1_32K_TIMER_BASE + reg);
 109
 110         if (cpu_is_omap24xx())
 111                 omap_writel(val, OMAP2_GP_TIMER_BASE + reg);
 112 }
 113
 114 static inline unsigned long omap_32k_timer_read(int reg)
 115 {
 116         if (cpu_class_is_omap1())
 117                 return omap_readl(OMAP1_32K_TIMER_BASE + reg) & 0xffffff;
 118
 119         if (cpu_is_omap24xx())
 120                 return omap_readl(OMAP2_GP_TIMER_BASE + reg);
 121 }
 122
 123 /*
 124  * The 32KHz synchronized timer is an additional timer on 16xx.
 125  * It is always running.
 126  */
 127 static inline unsigned long omap_32k_sync_timer_read(void)
 128 {
 129         return omap_readl(TIMER_32K_SYNCHRONIZED);
 130 }
 131
 132 static inline void omap_32k_timer_start(unsigned long load_val)
 133 {
 134         if (cpu_class_is_omap1()) {
 135                 omap_32k_timer_write(load_val, OMAP1_32K_TIMER_TVR);
 136                 omap_32k_timer_write(0x0f, OMAP1_32K_TIMER_CR);
 137         }
 138
 139         if (cpu_is_omap24xx()) {
 140                 omap_32k_timer_write(0xffffffff - load_val, GP_TIMER_TCRR);
 141                 omap_32k_timer_write((1 << 1), GP_TIMER_TIER);
 142                 omap_32k_timer_write((1 << 1) | 1, GP_TIMER_TCLR);
 143         }
 144 }
 145
 146 static inline void omap_32k_timer_stop(void)
 147 {
 148         if (cpu_class_is_omap1())
 149                 omap_32k_timer_write(0x0, OMAP1_32K_TIMER_CR);
 150
 151         if (cpu_is_omap24xx())
 152                 omap_32k_timer_write(0x0, GP_TIMER_TCLR);
 153 }
 154
 155 /*
 156  * Rounds down to nearest usec. Note that this will overflow for larger values.
 157  */
 158 static inline unsigned long omap_32k_ticks_to_usecs(unsigned long ticks_32k)
 159 {
 160         return (ticks_32k * 5*5*5*5*5*5) >> 9;
 161 }
 162
 163 /*
 164  * Rounds down to nearest nsec.
 165  */
 166 static inline unsigned long long
 167 omap_32k_ticks_to_nsecs(unsigned long ticks_32k)
 168 {
 169         return (unsigned long long) ticks_32k * 1000 * 5*5*5*5*5*5 >> 9;
 170 }
 171
 172 static unsigned long omap_32k_last_tick = 0;
 173
 174 /*
 175  * Returns elapsed usecs since last 32k timer interrupt
 176  */
 177 static unsigned long omap_32k_timer_gettimeoffset(void)
 178 {
 179         unsigned long now = omap_32k_sync_timer_read();
 180         return omap_32k_ticks_to_usecs(now - omap_32k_last_tick);
 181 }
 182
 183 /*
 184  * Returns current time from boot in nsecs. It's OK for this to wrap
 185  * around for now, as it's just a relative time stamp.
 186  */
 187 unsigned long long sched_clock(void)
 188 {
 189         return omap_32k_ticks_to_nsecs(omap_32k_sync_timer_read());
 190 }
 191
 192 /*
 193  * Timer interrupt for 32KHz timer. When dynamic tick is enabled, this
 194  * function is also called from other interrupts to remove latency
 195  * issues with dynamic tick. In the dynamic tick case, we need to lock
 196  * with irqsave.
 197  */
 198 static irqreturn_t omap_32k_timer_interrupt(int irq, void *dev_id,
 199                                             struct pt_regs *regs)
 200 {
 201         unsigned long flags;
 202         unsigned long now;
 203
 204         write_seqlock_irqsave(&xtime_lock, flags);
 205
 206         if (cpu_is_omap24xx()) {
 207                 u32 status = omap_32k_timer_read(GP_TIMER_TISR);
 208                 omap_32k_timer_write(status, GP_TIMER_TISR);
 209         }
 210
 211         now = omap_32k_sync_timer_read();
 212
 213         while ((signed long)(now - omap_32k_last_tick)
 214                                                 >= OMAP_32K_TICKS_PER_HZ) {
 215                 omap_32k_last_tick += OMAP_32K_TICKS_PER_HZ;
 216                 timer_tick(regs);
 217         }
 218
 219         /* Restart timer so we don't drift off due to modulo or dynamic tick.
 220          * By default we program the next timer to be continuous to avoid
 221          * latencies during high system load. During dynamic tick operation the
 222          * continuous timer can be overridden from pm_idle to be longer.
 223          */
 224         omap_32k_timer_start(omap_32k_last_tick + OMAP_32K_TICKS_PER_HZ - now);
 225         write_sequnlock_irqrestore(&xtime_lock, flags);
 226
 227         return IRQ_HANDLED;
 228 }
 229
 230 #ifdef CONFIG_NO_IDLE_HZ
 231 /*
 232  * Programs the next timer interrupt needed. Called when dynamic tick is
 233  * enabled, and to reprogram the ticks to skip from pm_idle. Note that
 234  * we can keep the timer continuous, and don't need to set it to run in
 235  * one-shot mode. This is because the timer will get reprogrammed again
 236  * after next interrupt.
 237  */
 238 void omap_32k_timer_reprogram(unsigned long next_tick)
 239 {
 240         omap_32k_timer_start(JIFFIES_TO_HW_TICKS(next_tick, 32768) + 1);
 241 }
 242
 243 static struct irqaction omap_32k_timer_irq;
 244 extern struct timer_update_handler timer_update;
 245
 246 static int omap_32k_timer_enable_dyn_tick(void)
 247 {
 248         /* No need to reprogram timer, just use the next interrupt */
 249         return 0;
 250 }
 251
 252 static int omap_32k_timer_disable_dyn_tick(void)
 253 {
 254         omap_32k_timer_start(OMAP_32K_TIMER_TICK_PERIOD);
 255         return 0;
 256 }
 257
 258 static struct dyn_tick_timer omap_dyn_tick_timer = {
 259         .enable         = omap_32k_timer_enable_dyn_tick,
 260         .disable        = omap_32k_timer_disable_dyn_tick,
 261         .reprogram      = omap_32k_timer_reprogram,
 262         .handler        = omap_32k_timer_interrupt,
 263 };
 264 #endif  /* CONFIG_NO_IDLE_HZ */
 265
 266 static struct irqaction omap_32k_timer_irq = {
 267         .name           = "32KHz timer",
 268         .flags          = SA_INTERRUPT | SA_TIMER,
 269         .handler        = omap_32k_timer_interrupt,
 270 };
 271
 272 static struct clk * gpt1_ick;
 273 static struct clk * gpt1_fck;
 274
 275 static __init void omap_init_32k_timer(void)
 276 {
 277 #ifdef CONFIG_NO_IDLE_HZ
 278         omap_timer.dyn_tick = &omap_dyn_tick_timer;
 279 #endif
 280
 281         if (cpu_class_is_omap1())
 282                 setup_irq(INT_OS_TIMER, &omap_32k_timer_irq);
 283         if (cpu_is_omap24xx())
 284                 setup_irq(37, &omap_32k_timer_irq);
 285         omap_timer.offset  = omap_32k_timer_gettimeoffset;
 286         omap_32k_last_tick = omap_32k_sync_timer_read();
 287
 288         /* REVISIT: Check 24xx TIOCP_CFG settings after idle works */
 289         if (cpu_is_omap24xx()) {
 290                 omap_32k_timer_write(0, GP_TIMER_TCLR);
 291                 omap_writel(0, CM_CLKSEL_WKUP);         /* 32KHz clock source */
 292
 293                 gpt1_ick = clk_get(NULL, "gpt1_ick");
 294                 if (IS_ERR(gpt1_ick))
 295                         printk(KERN_ERR "Could not get gpt1_ick\n");
 296                 else
 297                         clk_enable(gpt1_ick);
 298
 299                 gpt1_fck = clk_get(NULL, "gpt1_fck");
 300                 if (IS_ERR(gpt1_fck))
 301                         printk(KERN_ERR "Could not get gpt1_fck\n");
 302                 else
 303                         clk_enable(gpt1_fck);
 304
 305                 mdelay(100);            /* Wait for clocks to stabilize */
 306
 307                 omap_32k_timer_write(0x7, GP_TIMER_TISR);
 308         }
 309
 310         omap_32k_timer_start(OMAP_32K_TIMER_TICK_PERIOD);
 311 }
 312
 313 /*
 314  * ---------------------------------------------------------------------------
 315  * Timer initialization
 316  * ---------------------------------------------------------------------------
 317  */
 318 static void __init omap_timer_init(void)
 319 {
 320         omap_init_32k_timer();
 321 }
 322
 323 struct sys_timer omap_timer = {
 324         .init           = omap_timer_init,
 325         .offset         = NULL,         /* Initialized later */
 326 };