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[PATCH] unpaged: fix sound Bad page states
[linux-2.6.22.y-op.git] / drivers / scsi / sata_nv.c
blob4954896dfdb9bb5026fa7401fd436f5d74014e81
1 /*
2 * sata_nv.c - NVIDIA nForce SATA
3 *
4 * Copyright 2004 NVIDIA Corp. All rights reserved.
5 * Copyright 2004 Andrew Chew
6 *
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2, or (at your option)
11 * any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; see the file COPYING. If not, write to
20 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
21 *
22 *
23 * libata documentation is available via 'make {ps|pdf}docs',
24 * as Documentation/DocBook/libata.*
25 *
26 * No hardware documentation available outside of NVIDIA.
27 * This driver programs the NVIDIA SATA controller in a similar
28 * fashion as with other PCI IDE BMDMA controllers, with a few
29 * NV-specific details such as register offsets, SATA phy location,
30 * hotplug info, etc.
31 *
32 * 0.09
33 * - Fixed bug introduced by 0.08's MCP51 and MCP55 support.
34 *
35 * 0.08
36 * - Added support for MCP51 and MCP55.
37 *
38 * 0.07
39 * - Added support for RAID class code.
40 *
41 * 0.06
42 * - Added generic SATA support by using a pci_device_id that filters on
43 * the IDE storage class code.
44 *
45 * 0.03
46 * - Fixed a bug where the hotplug handlers for non-CK804/MCP04 were using
47 * mmio_base, which is only set for the CK804/MCP04 case.
48 *
49 * 0.02
50 * - Added support for CK804 SATA controller.
51 *
52 * 0.01
53 * - Initial revision.
54 */
55
56 #include <linux/config.h>
57 #include <linux/kernel.h>
58 #include <linux/module.h>
59 #include <linux/pci.h>
60 #include <linux/init.h>
61 #include <linux/blkdev.h>
62 #include <linux/delay.h>
63 #include <linux/interrupt.h>
64 #include <linux/device.h>
65 #include <scsi/scsi_host.h>
66 #include <linux/libata.h>
67
68 #define DRV_NAME "sata_nv"
69 #define DRV_VERSION "0.8"
70
71 #define NV_PORTS 2
72 #define NV_PIO_MASK 0x1f
73 #define NV_MWDMA_MASK 0x07
74 #define NV_UDMA_MASK 0x7f
75 #define NV_PORT0_SCR_REG_OFFSET 0x00
76 #define NV_PORT1_SCR_REG_OFFSET 0x40
77
78 #define NV_INT_STATUS 0x10
79 #define NV_INT_STATUS_CK804 0x440
80 #define NV_INT_STATUS_PDEV_INT 0x01
81 #define NV_INT_STATUS_PDEV_PM 0x02
82 #define NV_INT_STATUS_PDEV_ADDED 0x04
83 #define NV_INT_STATUS_PDEV_REMOVED 0x08
84 #define NV_INT_STATUS_SDEV_INT 0x10
85 #define NV_INT_STATUS_SDEV_PM 0x20
86 #define NV_INT_STATUS_SDEV_ADDED 0x40
87 #define NV_INT_STATUS_SDEV_REMOVED 0x80
88 #define NV_INT_STATUS_PDEV_HOTPLUG (NV_INT_STATUS_PDEV_ADDED | \
89 NV_INT_STATUS_PDEV_REMOVED)
90 #define NV_INT_STATUS_SDEV_HOTPLUG (NV_INT_STATUS_SDEV_ADDED | \
91 NV_INT_STATUS_SDEV_REMOVED)
92 #define NV_INT_STATUS_HOTPLUG (NV_INT_STATUS_PDEV_HOTPLUG | \
93 NV_INT_STATUS_SDEV_HOTPLUG)
94
95 #define NV_INT_ENABLE 0x11
96 #define NV_INT_ENABLE_CK804 0x441
97 #define NV_INT_ENABLE_PDEV_MASK 0x01
98 #define NV_INT_ENABLE_PDEV_PM 0x02
99 #define NV_INT_ENABLE_PDEV_ADDED 0x04
100 #define NV_INT_ENABLE_PDEV_REMOVED 0x08
101 #define NV_INT_ENABLE_SDEV_MASK 0x10
102 #define NV_INT_ENABLE_SDEV_PM 0x20
103 #define NV_INT_ENABLE_SDEV_ADDED 0x40
104 #define NV_INT_ENABLE_SDEV_REMOVED 0x80
105 #define NV_INT_ENABLE_PDEV_HOTPLUG (NV_INT_ENABLE_PDEV_ADDED | \
106 NV_INT_ENABLE_PDEV_REMOVED)
107 #define NV_INT_ENABLE_SDEV_HOTPLUG (NV_INT_ENABLE_SDEV_ADDED | \
108 NV_INT_ENABLE_SDEV_REMOVED)
109 #define NV_INT_ENABLE_HOTPLUG (NV_INT_ENABLE_PDEV_HOTPLUG | \
110 NV_INT_ENABLE_SDEV_HOTPLUG)
111
112 #define NV_INT_CONFIG 0x12
113 #define NV_INT_CONFIG_METHD 0x01 // 0 = INT, 1 = SMI
114
115 // For PCI config register 20
116 #define NV_MCP_SATA_CFG_20 0x50
117 #define NV_MCP_SATA_CFG_20_SATA_SPACE_EN 0x04
118
119 static int nv_init_one (struct pci_dev *pdev, const struct pci_device_id *ent);
120 static irqreturn_t nv_interrupt (int irq, void *dev_instance,
121 struct pt_regs *regs);
122 static u32 nv_scr_read (struct ata_port *ap, unsigned int sc_reg);
123 static void nv_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val);
124 static void nv_host_stop (struct ata_host_set *host_set);
125 static void nv_enable_hotplug(struct ata_probe_ent *probe_ent);
126 static void nv_disable_hotplug(struct ata_host_set *host_set);
127 static void nv_check_hotplug(struct ata_host_set *host_set);
128 static void nv_enable_hotplug_ck804(struct ata_probe_ent *probe_ent);
129 static void nv_disable_hotplug_ck804(struct ata_host_set *host_set);
130 static void nv_check_hotplug_ck804(struct ata_host_set *host_set);
131
132 enum nv_host_type
133 {
134 GENERIC,
135 NFORCE2,
136 NFORCE3,
137 CK804
138 };
139
140 static const struct pci_device_id nv_pci_tbl[] = {
141 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2S_SATA,
142 PCI_ANY_ID, PCI_ANY_ID, 0, 0, NFORCE2 },
143 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA,
144 PCI_ANY_ID, PCI_ANY_ID, 0, 0, NFORCE3 },
145 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA2,
146 PCI_ANY_ID, PCI_ANY_ID, 0, 0, NFORCE3 },
147 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_CK804_SATA,
148 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CK804 },
149 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_CK804_SATA2,
150 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CK804 },
151 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_SATA,
152 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CK804 },
153 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_SATA2,
154 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CK804 },
155 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SATA,
156 PCI_ANY_ID, PCI_ANY_ID, 0, 0, GENERIC },
157 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SATA2,
158 PCI_ANY_ID, PCI_ANY_ID, 0, 0, GENERIC },
159 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SATA,
160 PCI_ANY_ID, PCI_ANY_ID, 0, 0, GENERIC },
161 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SATA2,
162 PCI_ANY_ID, PCI_ANY_ID, 0, 0, GENERIC },
163 { PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID,
164 PCI_ANY_ID, PCI_ANY_ID,
165 PCI_CLASS_STORAGE_IDE<<8, 0xffff00, GENERIC },
166 { PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID,
167 PCI_ANY_ID, PCI_ANY_ID,
168 PCI_CLASS_STORAGE_RAID<<8, 0xffff00, GENERIC },
169 { 0, } /* terminate list */
170 };
171
172 #define NV_HOST_FLAGS_SCR_MMIO 0x00000001
173
174 struct nv_host_desc
175 {
176 enum nv_host_type host_type;
177 void (*enable_hotplug)(struct ata_probe_ent *probe_ent);
178 void (*disable_hotplug)(struct ata_host_set *host_set);
179 void (*check_hotplug)(struct ata_host_set *host_set);
180
181 };
182 static struct nv_host_desc nv_device_tbl[] = {
183 {
184 .host_type = GENERIC,
185 .enable_hotplug = NULL,
186 .disable_hotplug= NULL,
187 .check_hotplug = NULL,
188 },
189 {
190 .host_type = NFORCE2,
191 .enable_hotplug = nv_enable_hotplug,
192 .disable_hotplug= nv_disable_hotplug,
193 .check_hotplug = nv_check_hotplug,
194 },
195 {
196 .host_type = NFORCE3,
197 .enable_hotplug = nv_enable_hotplug,
198 .disable_hotplug= nv_disable_hotplug,
199 .check_hotplug = nv_check_hotplug,
200 },
201 { .host_type = CK804,
202 .enable_hotplug = nv_enable_hotplug_ck804,
203 .disable_hotplug= nv_disable_hotplug_ck804,
204 .check_hotplug = nv_check_hotplug_ck804,
205 },
206 };
207
208 struct nv_host
209 {
210 struct nv_host_desc *host_desc;
211 unsigned long host_flags;
212 };
213
214 static struct pci_driver nv_pci_driver = {
215 .name = DRV_NAME,
216 .id_table = nv_pci_tbl,
217 .probe = nv_init_one,
218 .remove = ata_pci_remove_one,
219 };
220
221 static struct scsi_host_template nv_sht = {
222 .module = THIS_MODULE,
223 .name = DRV_NAME,
224 .ioctl = ata_scsi_ioctl,
225 .queuecommand = ata_scsi_queuecmd,
226 .eh_strategy_handler = ata_scsi_error,
227 .can_queue = ATA_DEF_QUEUE,
228 .this_id = ATA_SHT_THIS_ID,
229 .sg_tablesize = LIBATA_MAX_PRD,
230 .max_sectors = ATA_MAX_SECTORS,
231 .cmd_per_lun = ATA_SHT_CMD_PER_LUN,
232 .emulated = ATA_SHT_EMULATED,
233 .use_clustering = ATA_SHT_USE_CLUSTERING,
234 .proc_name = DRV_NAME,
235 .dma_boundary = ATA_DMA_BOUNDARY,
236 .slave_configure = ata_scsi_slave_config,
237 .bios_param = ata_std_bios_param,
238 .ordered_flush = 1,
239 };
240
241 static const struct ata_port_operations nv_ops = {
242 .port_disable = ata_port_disable,
243 .tf_load = ata_tf_load,
244 .tf_read = ata_tf_read,
245 .exec_command = ata_exec_command,
246 .check_status = ata_check_status,
247 .dev_select = ata_std_dev_select,
248 .phy_reset = sata_phy_reset,
249 .bmdma_setup = ata_bmdma_setup,
250 .bmdma_start = ata_bmdma_start,
251 .bmdma_stop = ata_bmdma_stop,
252 .bmdma_status = ata_bmdma_status,
253 .qc_prep = ata_qc_prep,
254 .qc_issue = ata_qc_issue_prot,
255 .eng_timeout = ata_eng_timeout,
256 .irq_handler = nv_interrupt,
257 .irq_clear = ata_bmdma_irq_clear,
258 .scr_read = nv_scr_read,
259 .scr_write = nv_scr_write,
260 .port_start = ata_port_start,
261 .port_stop = ata_port_stop,
262 .host_stop = nv_host_stop,
263 };
264
265 /* FIXME: The hardware provides the necessary SATA PHY controls
266 * to support ATA_FLAG_SATA_RESET. However, it is currently
267 * necessary to disable that flag, to solve misdetection problems.
268 * See http://bugme.osdl.org/show_bug.cgi?id=3352 for more info.
269 *
270 * This problem really needs to be investigated further. But in the
271 * meantime, we avoid ATA_FLAG_SATA_RESET to get people working.
272 */
273 static struct ata_port_info nv_port_info = {
274 .sht = &nv_sht,
275 .host_flags = ATA_FLAG_SATA |
276 /* ATA_FLAG_SATA_RESET | */
277 ATA_FLAG_SRST |
278 ATA_FLAG_NO_LEGACY,
279 .pio_mask = NV_PIO_MASK,
280 .mwdma_mask = NV_MWDMA_MASK,
281 .udma_mask = NV_UDMA_MASK,
282 .port_ops = &nv_ops,
283 };
284
285 MODULE_AUTHOR("NVIDIA");
286 MODULE_DESCRIPTION("low-level driver for NVIDIA nForce SATA controller");
287 MODULE_LICENSE("GPL");
288 MODULE_DEVICE_TABLE(pci, nv_pci_tbl);
289 MODULE_VERSION(DRV_VERSION);
290
291 static irqreturn_t nv_interrupt (int irq, void *dev_instance,
292 struct pt_regs *regs)
293 {
294 struct ata_host_set *host_set = dev_instance;
295 struct nv_host *host = host_set->private_data;
296 unsigned int i;
297 unsigned int handled = 0;
298 unsigned long flags;
299
300 spin_lock_irqsave(&host_set->lock, flags);
301
302 for (i = 0; i < host_set->n_ports; i++) {
303 struct ata_port *ap;
304
305 ap = host_set->ports[i];
306 if (ap &&
307 !(ap->flags & (ATA_FLAG_PORT_DISABLED | ATA_FLAG_NOINTR))) {
308 struct ata_queued_cmd *qc;
309
310 qc = ata_qc_from_tag(ap, ap->active_tag);
311 if (qc && (!(qc->tf.ctl & ATA_NIEN)))
312 handled += ata_host_intr(ap, qc);
313 }
314
315 }
316
317 if (host->host_desc->check_hotplug)
318 host->host_desc->check_hotplug(host_set);
319
320 spin_unlock_irqrestore(&host_set->lock, flags);
321
322 return IRQ_RETVAL(handled);
323 }
324
325 static u32 nv_scr_read (struct ata_port *ap, unsigned int sc_reg)
326 {
327 struct ata_host_set *host_set = ap->host_set;
328 struct nv_host *host = host_set->private_data;
329
330 if (sc_reg > SCR_CONTROL)
331 return 0xffffffffU;
332
333 if (host->host_flags & NV_HOST_FLAGS_SCR_MMIO)
334 return readl((void __iomem *)ap->ioaddr.scr_addr + (sc_reg * 4));
335 else
336 return inl(ap->ioaddr.scr_addr + (sc_reg * 4));
337 }
338
339 static void nv_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val)
340 {
341 struct ata_host_set *host_set = ap->host_set;
342 struct nv_host *host = host_set->private_data;
343
344 if (sc_reg > SCR_CONTROL)
345 return;
346
347 if (host->host_flags & NV_HOST_FLAGS_SCR_MMIO)
348 writel(val, (void __iomem *)ap->ioaddr.scr_addr + (sc_reg * 4));
349 else
350 outl(val, ap->ioaddr.scr_addr + (sc_reg * 4));
351 }
352
353 static void nv_host_stop (struct ata_host_set *host_set)
354 {
355 struct nv_host *host = host_set->private_data;
356 struct pci_dev *pdev = to_pci_dev(host_set->dev);
357
358 // Disable hotplug event interrupts.
359 if (host->host_desc->disable_hotplug)
360 host->host_desc->disable_hotplug(host_set);
361
362 kfree(host);
363
364 if (host_set->mmio_base)
365 pci_iounmap(pdev, host_set->mmio_base);
366 }
367
368 static int nv_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
369 {
370 static int printed_version = 0;
371 struct nv_host *host;
372 struct ata_port_info *ppi;
373 struct ata_probe_ent *probe_ent;
374 int pci_dev_busy = 0;
375 int rc;
376 u32 bar;
377
378 // Make sure this is a SATA controller by counting the number of bars
379 // (NVIDIA SATA controllers will always have six bars). Otherwise,
380 // it's an IDE controller and we ignore it.
381 for (bar=0; bar<6; bar++)
382 if (pci_resource_start(pdev, bar) == 0)
383 return -ENODEV;
384
385 if (!printed_version++)
386 dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n");
387
388 rc = pci_enable_device(pdev);
389 if (rc)
390 goto err_out;
391
392 rc = pci_request_regions(pdev, DRV_NAME);
393 if (rc) {
394 pci_dev_busy = 1;
395 goto err_out_disable;
396 }
397
398 rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
399 if (rc)
400 goto err_out_regions;
401 rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
402 if (rc)
403 goto err_out_regions;
404
405 rc = -ENOMEM;
406
407 ppi = &nv_port_info;
408 probe_ent = ata_pci_init_native_mode(pdev, &ppi, ATA_PORT_PRIMARY | ATA_PORT_SECONDARY);
409 if (!probe_ent)
410 goto err_out_regions;
411
412 host = kmalloc(sizeof(struct nv_host), GFP_KERNEL);
413 if (!host)
414 goto err_out_free_ent;
415
416 memset(host, 0, sizeof(struct nv_host));
417 host->host_desc = &nv_device_tbl[ent->driver_data];
418
419 probe_ent->private_data = host;
420
421 if (pci_resource_flags(pdev, 5) & IORESOURCE_MEM)
422 host->host_flags |= NV_HOST_FLAGS_SCR_MMIO;
423
424 if (host->host_flags & NV_HOST_FLAGS_SCR_MMIO) {
425 unsigned long base;
426
427 probe_ent->mmio_base = pci_iomap(pdev, 5, 0);
428 if (probe_ent->mmio_base == NULL) {
429 rc = -EIO;
430 goto err_out_free_host;
431 }
432
433 base = (unsigned long)probe_ent->mmio_base;
434
435 probe_ent->port[0].scr_addr =
436 base + NV_PORT0_SCR_REG_OFFSET;
437 probe_ent->port[1].scr_addr =
438 base + NV_PORT1_SCR_REG_OFFSET;
439 } else {
440
441 probe_ent->port[0].scr_addr =
442 pci_resource_start(pdev, 5) | NV_PORT0_SCR_REG_OFFSET;
443 probe_ent->port[1].scr_addr =
444 pci_resource_start(pdev, 5) | NV_PORT1_SCR_REG_OFFSET;
445 }
446
447 pci_set_master(pdev);
448
449 rc = ata_device_add(probe_ent);
450 if (rc != NV_PORTS)
451 goto err_out_iounmap;
452
453 // Enable hotplug event interrupts.
454 if (host->host_desc->enable_hotplug)
455 host->host_desc->enable_hotplug(probe_ent);
456
457 kfree(probe_ent);
458
459 return 0;
460
461 err_out_iounmap:
462 if (host->host_flags & NV_HOST_FLAGS_SCR_MMIO)
463 pci_iounmap(pdev, probe_ent->mmio_base);
464 err_out_free_host:
465 kfree(host);
466 err_out_free_ent:
467 kfree(probe_ent);
468 err_out_regions:
469 pci_release_regions(pdev);
470 err_out_disable:
471 if (!pci_dev_busy)
472 pci_disable_device(pdev);
473 err_out:
474 return rc;
475 }
476
477 static void nv_enable_hotplug(struct ata_probe_ent *probe_ent)
478 {
479 u8 intr_mask;
480
481 outb(NV_INT_STATUS_HOTPLUG,
482 probe_ent->port[0].scr_addr + NV_INT_STATUS);
483
484 intr_mask = inb(probe_ent->port[0].scr_addr + NV_INT_ENABLE);
485 intr_mask |= NV_INT_ENABLE_HOTPLUG;
486
487 outb(intr_mask, probe_ent->port[0].scr_addr + NV_INT_ENABLE);
488 }
489
490 static void nv_disable_hotplug(struct ata_host_set *host_set)
491 {
492 u8 intr_mask;
493
494 intr_mask = inb(host_set->ports[0]->ioaddr.scr_addr + NV_INT_ENABLE);
495
496 intr_mask &= ~(NV_INT_ENABLE_HOTPLUG);
497
498 outb(intr_mask, host_set->ports[0]->ioaddr.scr_addr + NV_INT_ENABLE);
499 }
500
501 static void nv_check_hotplug(struct ata_host_set *host_set)
502 {
503 u8 intr_status;
504
505 intr_status = inb(host_set->ports[0]->ioaddr.scr_addr + NV_INT_STATUS);
506
507 // Clear interrupt status.
508 outb(0xff, host_set->ports[0]->ioaddr.scr_addr + NV_INT_STATUS);
509
510 if (intr_status & NV_INT_STATUS_HOTPLUG) {
511 if (intr_status & NV_INT_STATUS_PDEV_ADDED)
512 printk(KERN_WARNING "nv_sata: "
513 "Primary device added\n");
514
515 if (intr_status & NV_INT_STATUS_PDEV_REMOVED)
516 printk(KERN_WARNING "nv_sata: "
517 "Primary device removed\n");
518
519 if (intr_status & NV_INT_STATUS_SDEV_ADDED)
520 printk(KERN_WARNING "nv_sata: "
521 "Secondary device added\n");
522
523 if (intr_status & NV_INT_STATUS_SDEV_REMOVED)
524 printk(KERN_WARNING "nv_sata: "
525 "Secondary device removed\n");
526 }
527 }
528
529 static void nv_enable_hotplug_ck804(struct ata_probe_ent *probe_ent)
530 {
531 struct pci_dev *pdev = to_pci_dev(probe_ent->dev);
532 u8 intr_mask;
533 u8 regval;
534
535 pci_read_config_byte(pdev, NV_MCP_SATA_CFG_20, &regval);
536 regval |= NV_MCP_SATA_CFG_20_SATA_SPACE_EN;
537 pci_write_config_byte(pdev, NV_MCP_SATA_CFG_20, regval);
538
539 writeb(NV_INT_STATUS_HOTPLUG, probe_ent->mmio_base + NV_INT_STATUS_CK804);
540
541 intr_mask = readb(probe_ent->mmio_base + NV_INT_ENABLE_CK804);
542 intr_mask |= NV_INT_ENABLE_HOTPLUG;
543
544 writeb(intr_mask, probe_ent->mmio_base + NV_INT_ENABLE_CK804);
545 }
546
547 static void nv_disable_hotplug_ck804(struct ata_host_set *host_set)
548 {
549 struct pci_dev *pdev = to_pci_dev(host_set->dev);
550 u8 intr_mask;
551 u8 regval;
552
553 intr_mask = readb(host_set->mmio_base + NV_INT_ENABLE_CK804);
554
555 intr_mask &= ~(NV_INT_ENABLE_HOTPLUG);
556
557 writeb(intr_mask, host_set->mmio_base + NV_INT_ENABLE_CK804);
558
559 pci_read_config_byte(pdev, NV_MCP_SATA_CFG_20, &regval);
560 regval &= ~NV_MCP_SATA_CFG_20_SATA_SPACE_EN;
561 pci_write_config_byte(pdev, NV_MCP_SATA_CFG_20, regval);
562 }
563
564 static void nv_check_hotplug_ck804(struct ata_host_set *host_set)
565 {
566 u8 intr_status;
567
568 intr_status = readb(host_set->mmio_base + NV_INT_STATUS_CK804);
569
570 // Clear interrupt status.
571 writeb(0xff, host_set->mmio_base + NV_INT_STATUS_CK804);
572
573 if (intr_status & NV_INT_STATUS_HOTPLUG) {
574 if (intr_status & NV_INT_STATUS_PDEV_ADDED)
575 printk(KERN_WARNING "nv_sata: "
576 "Primary device added\n");
577
578 if (intr_status & NV_INT_STATUS_PDEV_REMOVED)
579 printk(KERN_WARNING "nv_sata: "
580 "Primary device removed\n");
581
582 if (intr_status & NV_INT_STATUS_SDEV_ADDED)
583 printk(KERN_WARNING "nv_sata: "
584 "Secondary device added\n");
585
586 if (intr_status & NV_INT_STATUS_SDEV_REMOVED)
587 printk(KERN_WARNING "nv_sata: "
588 "Secondary device removed\n");
589 }
590 }
591
592 static int __init nv_init(void)
593 {
594 return pci_module_init(&nv_pci_driver);
595 }
596
597 static void __exit nv_exit(void)
598 {
599 pci_unregister_driver(&nv_pci_driver);
600 }
601
602 module_init(nv_init);
603 module_exit(nv_exit);
linux v2.6.22.y-op