drivers/pci/htirq.c

   1 /*
   2  * File:        htirq.c
   3  * Purpose:     Hypertransport Interrupt Capability
   4  *
   5  * Copyright (C) 2006 Linux Networx
   6  * Copyright (C) Eric Biederman <ebiederman@lnxi.com>
   7  */
   8
   9 #include <linux/irq.h>
  10 #include <linux/pci.h>
  11 #include <linux/spinlock.h>
  12 #include <linux/slab.h>
  13 #include <linux/gfp.h>
  14 #include <linux/htirq.h>
  15
  16 /* Global ht irq lock.
  17  *
  18  * This is needed to serialize access to the data port in hypertransport
  19  * irq capability.
  20  *
  21  * With multiple simultaneous hypertransport irq devices it might pay
  22  * to make this more fine grained.  But start with simple, stupid, and correct.
  23  */
  24 static DEFINE_SPINLOCK(ht_irq_lock);
  25
  26 struct ht_irq_cfg {
  27         struct pci_dev *dev;
  28          /* Update callback used to cope with buggy hardware */
  29         ht_irq_update_t *update;
  30         unsigned pos;
  31         unsigned idx;
  32         struct ht_irq_msg msg;
  33 };
  34
  35
  36 void write_ht_irq_msg(unsigned int irq, struct ht_irq_msg *msg)
  37 {
  38         struct ht_irq_cfg *cfg = get_irq_data(irq);
  39         unsigned long flags;
  40         spin_lock_irqsave(&ht_irq_lock, flags);
  41         if (cfg->msg.address_lo != msg->address_lo) {
  42                 pci_write_config_byte(cfg->dev, cfg->pos + 2, cfg->idx);
  43                 pci_write_config_dword(cfg->dev, cfg->pos + 4, msg->address_lo);
  44         }
  45         if (cfg->msg.address_hi != msg->address_hi) {
  46                 pci_write_config_byte(cfg->dev, cfg->pos + 2, cfg->idx + 1);
  47                 pci_write_config_dword(cfg->dev, cfg->pos + 4, msg->address_hi);
  48         }
  49         if (cfg->update)
  50                 cfg->update(cfg->dev, irq, msg);
  51         spin_unlock_irqrestore(&ht_irq_lock, flags);
  52         cfg->msg = *msg;
  53 }
  54
  55 void fetch_ht_irq_msg(unsigned int irq, struct ht_irq_msg *msg)
  56 {
  57         struct ht_irq_cfg *cfg = get_irq_data(irq);
  58         *msg = cfg->msg;
  59 }
  60
  61 void mask_ht_irq(unsigned int irq)
  62 {
  63         struct ht_irq_cfg *cfg;
  64         struct ht_irq_msg msg;
  65
  66         cfg = get_irq_data(irq);
  67
  68         msg = cfg->msg;
  69         msg.address_lo |= 1;
  70         write_ht_irq_msg(irq, &msg);
  71 }
  72
  73 void unmask_ht_irq(unsigned int irq)
  74 {
  75         struct ht_irq_cfg *cfg;
  76         struct ht_irq_msg msg;
  77
  78         cfg = get_irq_data(irq);
  79
  80         msg = cfg->msg;
  81         msg.address_lo &= ~1;
  82         write_ht_irq_msg(irq, &msg);
  83 }
  84
  85 /**
  86  * __ht_create_irq - create an irq and attach it to a device.
  87  * @dev: The hypertransport device to find the irq capability on.
  88  * @idx: Which of the possible irqs to attach to.
  89  * @update: Function to be called when changing the htirq message
  90  *
  91  * The irq number of the new irq or a negative error value is returned.
  92  */
  93 int __ht_create_irq(struct pci_dev *dev, int idx, ht_irq_update_t *update)
  94 {
  95         struct ht_irq_cfg *cfg;
  96         unsigned long flags;
  97         u32 data;
  98         int max_irq;
  99         int pos;
 100         int irq;
 101
 102         pos = pci_find_capability(dev, PCI_CAP_ID_HT);
 103         while (pos) {
 104                 u8 subtype;
 105                 pci_read_config_byte(dev, pos + 3, &subtype);
 106                 if (subtype == HT_CAPTYPE_IRQ)
 107                         break;
 108                 pos = pci_find_next_capability(dev, pos, PCI_CAP_ID_HT);
 109         }
 110         if (!pos)
 111                 return -EINVAL;
 112
 113         /* Verify the idx I want to use is in range */
 114         spin_lock_irqsave(&ht_irq_lock, flags);
 115         pci_write_config_byte(dev, pos + 2, 1);
 116         pci_read_config_dword(dev, pos + 4, &data);
 117         spin_unlock_irqrestore(&ht_irq_lock, flags);
 118
 119         max_irq = (data >> 16) & 0xff;
 120         if ( idx > max_irq)
 121                 return -EINVAL;
 122
 123         cfg = kmalloc(sizeof(*cfg), GFP_KERNEL);
 124         if (!cfg)
 125                 return -ENOMEM;
 126
 127         cfg->dev = dev;
 128         cfg->update = update;
 129         cfg->pos = pos;
 130         cfg->idx = 0x10 + (idx * 2);
 131         /* Initialize msg to a value that will never match the first write. */
 132         cfg->msg.address_lo = 0xffffffff;
 133         cfg->msg.address_hi = 0xffffffff;
 134
 135         irq = create_irq();
 136         if (irq < 0) {
 137                 kfree(cfg);
 138                 return -EBUSY;
 139         }
 140         set_irq_data(irq, cfg);
 141
 142         if (arch_setup_ht_irq(irq, dev) < 0) {
 143                 ht_destroy_irq(irq);
 144                 return -EBUSY;
 145         }
 146
 147         return irq;
 148 }
 149
 150 /**
 151  * ht_create_irq - create an irq and attach it to a device.
 152  * @dev: The hypertransport device to find the irq capability on.
 153  * @idx: Which of the possible irqs to attach to.
 154  *
 155  * ht_create_irq needs to be called for all hypertransport devices
 156  * that generate irqs.
 157  *
 158  * The irq number of the new irq or a negative error value is returned.
 159  */
 160 int ht_create_irq(struct pci_dev *dev, int idx)
 161 {
 162         return __ht_create_irq(dev, idx, NULL);
 163 }
 164
 165 /**
 166  * ht_destroy_irq - destroy an irq created with ht_create_irq
 167  *
 168  * This reverses ht_create_irq removing the specified irq from
 169  * existence.  The irq should be free before this happens.
 170  */
 171 void ht_destroy_irq(unsigned int irq)
 172 {
 173         struct ht_irq_cfg *cfg;
 174
 175         cfg = get_irq_data(irq);
 176         set_irq_chip(irq, NULL);
 177         set_irq_data(irq, NULL);
 178         destroy_irq(irq);
 179
 180         kfree(cfg);
 181 }
 182
 183 EXPORT_SYMBOL(__ht_create_irq);
 184 EXPORT_SYMBOL(ht_create_irq);
 185 EXPORT_SYMBOL(ht_destroy_irq);