2 * processor_idle - idle state submodule to the ACPI processor driver
4 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
5 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
6 * Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de>
7 * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
8 * - Added processor hotplug support
9 * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
10 * - Added support for C3 on SMP
12 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or (at
17 * your option) any later version.
19 * This program is distributed in the hope that it will be useful, but
20 * WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
22 * General Public License for more details.
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
28 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
31 #include <linux/kernel.h>
32 #include <linux/module.h>
33 #include <linux/init.h>
34 #include <linux/cpufreq.h>
35 #include <linux/proc_fs.h>
36 #include <linux/seq_file.h>
37 #include <linux/acpi.h>
38 #include <linux/dmi.h>
39 #include <linux/moduleparam.h>
40 #include <linux/sched.h> /* need_resched() */
41 #include <linux/latency.h>
42 #include <linux/clockchips.h>
45 * Include the apic definitions for x86 to have the APIC timer related defines
46 * available also for UP (on SMP it gets magically included via linux/smp.h).
47 * asm/acpi.h is not an option, as it would require more include magic. Also
48 * creating an empty asm-ia64/apic.h would just trade pest vs. cholera.
55 * Include the apic definitions for x86 to have the APIC timer related defines
56 * available also for UP (on SMP it gets magically included via linux/smp.h).
63 #include <asm/uaccess.h>
65 #include <acpi/acpi_bus.h>
66 #include <acpi/processor.h>
68 #define ACPI_PROCESSOR_COMPONENT 0x01000000
69 #define ACPI_PROCESSOR_CLASS "processor"
70 #define _COMPONENT ACPI_PROCESSOR_COMPONENT
71 ACPI_MODULE_NAME("processor_idle");
72 #define ACPI_PROCESSOR_FILE_POWER "power"
73 #define US_TO_PM_TIMER_TICKS(t) ((t * (PM_TIMER_FREQUENCY/1000)) / 1000)
74 #define C2_OVERHEAD 4 /* 1us (3.579 ticks per us) */
75 #define C3_OVERHEAD 4 /* 1us (3.579 ticks per us) */
76 static void (*pm_idle_save
) (void) __read_mostly
;
77 module_param(max_cstate
, uint
, 0644);
79 static unsigned int nocst __read_mostly
;
80 module_param(nocst
, uint
, 0000);
83 * bm_history -- bit-mask with a bit per jiffy of bus-master activity
84 * 1000 HZ: 0xFFFFFFFF: 32 jiffies = 32ms
85 * 800 HZ: 0xFFFFFFFF: 32 jiffies = 40ms
86 * 100 HZ: 0x0000000F: 4 jiffies = 40ms
87 * reduce history for more aggressive entry into C3
89 static unsigned int bm_history __read_mostly
=
90 (HZ
>= 800 ? 0xFFFFFFFF : ((1U << (HZ
/ 25)) - 1));
91 module_param(bm_history
, uint
, 0644);
92 /* --------------------------------------------------------------------------
94 -------------------------------------------------------------------------- */
97 * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3.
98 * For now disable this. Probably a bug somewhere else.
100 * To skip this limit, boot/load with a large max_cstate limit.
102 static int set_max_cstate(struct dmi_system_id
*id
)
104 if (max_cstate
> ACPI_PROCESSOR_MAX_POWER
)
107 printk(KERN_NOTICE PREFIX
"%s detected - limiting to C%ld max_cstate."
108 " Override with \"processor.max_cstate=%d\"\n", id
->ident
,
109 (long)id
->driver_data
, ACPI_PROCESSOR_MAX_POWER
+ 1);
111 max_cstate
= (long)id
->driver_data
;
116 /* Actually this shouldn't be __cpuinitdata, would be better to fix the
117 callers to only run once -AK */
118 static struct dmi_system_id __cpuinitdata processor_power_dmi_table
[] = {
119 { set_max_cstate
, "IBM ThinkPad R40e", {
120 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
121 DMI_MATCH(DMI_BIOS_VERSION
,"1SET70WW")}, (void *)1},
122 { set_max_cstate
, "IBM ThinkPad R40e", {
123 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
124 DMI_MATCH(DMI_BIOS_VERSION
,"1SET60WW")}, (void *)1},
125 { set_max_cstate
, "IBM ThinkPad R40e", {
126 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
127 DMI_MATCH(DMI_BIOS_VERSION
,"1SET43WW") }, (void*)1},
128 { set_max_cstate
, "IBM ThinkPad R40e", {
129 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
130 DMI_MATCH(DMI_BIOS_VERSION
,"1SET45WW") }, (void*)1},
131 { set_max_cstate
, "IBM ThinkPad R40e", {
132 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
133 DMI_MATCH(DMI_BIOS_VERSION
,"1SET47WW") }, (void*)1},
134 { set_max_cstate
, "IBM ThinkPad R40e", {
135 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
136 DMI_MATCH(DMI_BIOS_VERSION
,"1SET50WW") }, (void*)1},
137 { set_max_cstate
, "IBM ThinkPad R40e", {
138 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
139 DMI_MATCH(DMI_BIOS_VERSION
,"1SET52WW") }, (void*)1},
140 { set_max_cstate
, "IBM ThinkPad R40e", {
141 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
142 DMI_MATCH(DMI_BIOS_VERSION
,"1SET55WW") }, (void*)1},
143 { set_max_cstate
, "IBM ThinkPad R40e", {
144 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
145 DMI_MATCH(DMI_BIOS_VERSION
,"1SET56WW") }, (void*)1},
146 { set_max_cstate
, "IBM ThinkPad R40e", {
147 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
148 DMI_MATCH(DMI_BIOS_VERSION
,"1SET59WW") }, (void*)1},
149 { set_max_cstate
, "IBM ThinkPad R40e", {
150 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
151 DMI_MATCH(DMI_BIOS_VERSION
,"1SET60WW") }, (void*)1},
152 { set_max_cstate
, "IBM ThinkPad R40e", {
153 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
154 DMI_MATCH(DMI_BIOS_VERSION
,"1SET61WW") }, (void*)1},
155 { set_max_cstate
, "IBM ThinkPad R40e", {
156 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
157 DMI_MATCH(DMI_BIOS_VERSION
,"1SET62WW") }, (void*)1},
158 { set_max_cstate
, "IBM ThinkPad R40e", {
159 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
160 DMI_MATCH(DMI_BIOS_VERSION
,"1SET64WW") }, (void*)1},
161 { set_max_cstate
, "IBM ThinkPad R40e", {
162 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
163 DMI_MATCH(DMI_BIOS_VERSION
,"1SET65WW") }, (void*)1},
164 { set_max_cstate
, "IBM ThinkPad R40e", {
165 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
166 DMI_MATCH(DMI_BIOS_VERSION
,"1SET68WW") }, (void*)1},
167 { set_max_cstate
, "Medion 41700", {
168 DMI_MATCH(DMI_BIOS_VENDOR
,"Phoenix Technologies LTD"),
169 DMI_MATCH(DMI_BIOS_VERSION
,"R01-A1J")}, (void *)1},
170 { set_max_cstate
, "Clevo 5600D", {
171 DMI_MATCH(DMI_BIOS_VENDOR
,"Phoenix Technologies LTD"),
172 DMI_MATCH(DMI_BIOS_VERSION
,"SHE845M0.86C.0013.D.0302131307")},
177 static inline u32
ticks_elapsed(u32 t1
, u32 t2
)
181 else if (!(acpi_gbl_FADT
.flags
& ACPI_FADT_32BIT_TIMER
))
182 return (((0x00FFFFFF - t1
) + t2
) & 0x00FFFFFF);
184 return ((0xFFFFFFFF - t1
) + t2
);
188 acpi_processor_power_activate(struct acpi_processor
*pr
,
189 struct acpi_processor_cx
*new)
191 struct acpi_processor_cx
*old
;
196 old
= pr
->power
.state
;
199 old
->promotion
.count
= 0;
200 new->demotion
.count
= 0;
202 /* Cleanup from old state. */
206 /* Disable bus master reload */
207 if (new->type
!= ACPI_STATE_C3
&& pr
->flags
.bm_check
)
208 acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD
, 0);
213 /* Prepare to use new state. */
216 /* Enable bus master reload */
217 if (old
->type
!= ACPI_STATE_C3
&& pr
->flags
.bm_check
)
218 acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD
, 1);
222 pr
->power
.state
= new;
227 static void acpi_safe_halt(void)
229 current_thread_info()->status
&= ~TS_POLLING
;
231 * TS_POLLING-cleared state must be visible before we
237 current_thread_info()->status
|= TS_POLLING
;
240 static atomic_t c3_cpu_count
;
242 /* Common C-state entry for C2, C3, .. */
243 static void acpi_cstate_enter(struct acpi_processor_cx
*cstate
)
245 if (cstate
->space_id
== ACPI_CSTATE_FFH
) {
246 /* Call into architectural FFH based C-state */
247 acpi_processor_ffh_cstate_enter(cstate
);
250 /* IO port based C-state */
251 inb(cstate
->address
);
252 /* Dummy wait op - must do something useless after P_LVL2 read
253 because chipsets cannot guarantee that STPCLK# signal
254 gets asserted in time to freeze execution properly. */
255 unused
= inl(acpi_gbl_FADT
.xpm_timer_block
.address
);
259 #ifdef ARCH_APICTIMER_STOPS_ON_C3
262 * Some BIOS implementations switch to C3 in the published C2 state.
263 * This seems to be a common problem on AMD boxen, but other vendors
264 * are affected too. We pick the most conservative approach: we assume
265 * that the local APIC stops in both C2 and C3.
267 static void acpi_timer_check_state(int state
, struct acpi_processor
*pr
,
268 struct acpi_processor_cx
*cx
)
270 struct acpi_processor_power
*pwr
= &pr
->power
;
271 u8 type
= local_apic_timer_c2_ok
? ACPI_STATE_C3
: ACPI_STATE_C2
;
274 * Check, if one of the previous states already marked the lapic
277 if (pwr
->timer_broadcast_on_state
< state
)
280 if (cx
->type
>= type
)
281 pr
->power
.timer_broadcast_on_state
= state
;
284 static void acpi_propagate_timer_broadcast(struct acpi_processor
*pr
)
286 #ifdef CONFIG_GENERIC_CLOCKEVENTS
287 unsigned long reason
;
289 reason
= pr
->power
.timer_broadcast_on_state
< INT_MAX
?
290 CLOCK_EVT_NOTIFY_BROADCAST_ON
: CLOCK_EVT_NOTIFY_BROADCAST_OFF
;
292 clockevents_notify(reason
, &pr
->id
);
294 cpumask_t mask
= cpumask_of_cpu(pr
->id
);
296 if (pr
->power
.timer_broadcast_on_state
< INT_MAX
)
297 on_each_cpu(switch_APIC_timer_to_ipi
, &mask
, 1, 1);
299 on_each_cpu(switch_ipi_to_APIC_timer
, &mask
, 1, 1);
303 /* Power(C) State timer broadcast control */
304 static void acpi_state_timer_broadcast(struct acpi_processor
*pr
,
305 struct acpi_processor_cx
*cx
,
308 #ifdef CONFIG_GENERIC_CLOCKEVENTS
310 int state
= cx
- pr
->power
.states
;
312 if (state
>= pr
->power
.timer_broadcast_on_state
) {
313 unsigned long reason
;
315 reason
= broadcast
? CLOCK_EVT_NOTIFY_BROADCAST_ENTER
:
316 CLOCK_EVT_NOTIFY_BROADCAST_EXIT
;
317 clockevents_notify(reason
, &pr
->id
);
324 static void acpi_timer_check_state(int state
, struct acpi_processor
*pr
,
325 struct acpi_processor_cx
*cstate
) { }
326 static void acpi_propagate_timer_broadcast(struct acpi_processor
*pr
) { }
327 static void acpi_state_timer_broadcast(struct acpi_processor
*pr
,
328 struct acpi_processor_cx
*cx
,
335 static void acpi_processor_idle(void)
337 struct acpi_processor
*pr
= NULL
;
338 struct acpi_processor_cx
*cx
= NULL
;
339 struct acpi_processor_cx
*next_state
= NULL
;
343 pr
= processors
[smp_processor_id()];
348 * Interrupts must be disabled during bus mastering calculations and
349 * for C2/C3 transitions.
354 * Check whether we truly need to go idle, or should
357 if (unlikely(need_resched())) {
362 cx
= pr
->power
.state
;
374 * Check for bus mastering activity (if required), record, and check
377 if (pr
->flags
.bm_check
) {
379 unsigned long diff
= jiffies
- pr
->power
.bm_check_timestamp
;
384 pr
->power
.bm_activity
<<= diff
;
386 acpi_get_register(ACPI_BITREG_BUS_MASTER_STATUS
, &bm_status
);
388 pr
->power
.bm_activity
|= 0x1;
389 acpi_set_register(ACPI_BITREG_BUS_MASTER_STATUS
, 1);
392 * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
393 * the true state of bus mastering activity; forcing us to
394 * manually check the BMIDEA bit of each IDE channel.
396 else if (errata
.piix4
.bmisx
) {
397 if ((inb_p(errata
.piix4
.bmisx
+ 0x02) & 0x01)
398 || (inb_p(errata
.piix4
.bmisx
+ 0x0A) & 0x01))
399 pr
->power
.bm_activity
|= 0x1;
402 pr
->power
.bm_check_timestamp
= jiffies
;
405 * If bus mastering is or was active this jiffy, demote
406 * to avoid a faulty transition. Note that the processor
407 * won't enter a low-power state during this call (to this
408 * function) but should upon the next.
410 * TBD: A better policy might be to fallback to the demotion
411 * state (use it for this quantum only) istead of
412 * demoting -- and rely on duration as our sole demotion
413 * qualification. This may, however, introduce DMA
414 * issues (e.g. floppy DMA transfer overrun/underrun).
416 if ((pr
->power
.bm_activity
& 0x1) &&
417 cx
->demotion
.threshold
.bm
) {
419 next_state
= cx
->demotion
.state
;
424 #ifdef CONFIG_HOTPLUG_CPU
426 * Check for P_LVL2_UP flag before entering C2 and above on
427 * an SMP system. We do it here instead of doing it at _CST/P_LVL
428 * detection phase, to work cleanly with logical CPU hotplug.
430 if ((cx
->type
!= ACPI_STATE_C1
) && (num_online_cpus() > 1) &&
431 !pr
->flags
.has_cst
&& !(acpi_gbl_FADT
.flags
& ACPI_FADT_C2_MP_SUPPORTED
))
432 cx
= &pr
->power
.states
[ACPI_STATE_C1
];
438 * Invoke the current Cx state to put the processor to sleep.
440 if (cx
->type
== ACPI_STATE_C2
|| cx
->type
== ACPI_STATE_C3
) {
441 current_thread_info()->status
&= ~TS_POLLING
;
443 * TS_POLLING-cleared state must be visible before we
447 if (need_resched()) {
448 current_thread_info()->status
|= TS_POLLING
;
459 * Use the appropriate idle routine, the one that would
460 * be used without acpi C-states.
468 * TBD: Can't get time duration while in C1, as resumes
469 * go to an ISR rather than here. Need to instrument
470 * base interrupt handler.
472 sleep_ticks
= 0xFFFFFFFF;
476 /* Get start time (ticks) */
477 t1
= inl(acpi_gbl_FADT
.xpm_timer_block
.address
);
479 acpi_state_timer_broadcast(pr
, cx
, 1);
480 acpi_cstate_enter(cx
);
481 /* Get end time (ticks) */
482 t2
= inl(acpi_gbl_FADT
.xpm_timer_block
.address
);
484 #ifdef CONFIG_GENERIC_TIME
485 /* TSC halts in C2, so notify users */
488 /* Re-enable interrupts */
490 current_thread_info()->status
|= TS_POLLING
;
491 /* Compute time (ticks) that we were actually asleep */
493 ticks_elapsed(t1
, t2
) - cx
->latency_ticks
- C2_OVERHEAD
;
494 acpi_state_timer_broadcast(pr
, cx
, 0);
499 if (pr
->flags
.bm_check
) {
500 if (atomic_inc_return(&c3_cpu_count
) ==
503 * All CPUs are trying to go to C3
504 * Disable bus master arbitration
506 acpi_set_register(ACPI_BITREG_ARB_DISABLE
, 1);
509 /* SMP with no shared cache... Invalidate cache */
510 ACPI_FLUSH_CPU_CACHE();
513 /* Get start time (ticks) */
514 t1
= inl(acpi_gbl_FADT
.xpm_timer_block
.address
);
516 acpi_state_timer_broadcast(pr
, cx
, 1);
517 acpi_cstate_enter(cx
);
518 /* Get end time (ticks) */
519 t2
= inl(acpi_gbl_FADT
.xpm_timer_block
.address
);
520 if (pr
->flags
.bm_check
) {
521 /* Enable bus master arbitration */
522 atomic_dec(&c3_cpu_count
);
523 acpi_set_register(ACPI_BITREG_ARB_DISABLE
, 0);
526 #ifdef CONFIG_GENERIC_TIME
527 /* TSC halts in C3, so notify users */
530 /* Re-enable interrupts */
532 current_thread_info()->status
|= TS_POLLING
;
533 /* Compute time (ticks) that we were actually asleep */
535 ticks_elapsed(t1
, t2
) - cx
->latency_ticks
- C3_OVERHEAD
;
536 acpi_state_timer_broadcast(pr
, cx
, 0);
544 if ((cx
->type
!= ACPI_STATE_C1
) && (sleep_ticks
> 0))
545 cx
->time
+= sleep_ticks
;
547 next_state
= pr
->power
.state
;
549 #ifdef CONFIG_HOTPLUG_CPU
550 /* Don't do promotion/demotion */
551 if ((cx
->type
== ACPI_STATE_C1
) && (num_online_cpus() > 1) &&
552 !pr
->flags
.has_cst
&& !(acpi_gbl_FADT
.flags
& ACPI_FADT_C2_MP_SUPPORTED
)) {
561 * Track the number of longs (time asleep is greater than threshold)
562 * and promote when the count threshold is reached. Note that bus
563 * mastering activity may prevent promotions.
564 * Do not promote above max_cstate.
566 if (cx
->promotion
.state
&&
567 ((cx
->promotion
.state
- pr
->power
.states
) <= max_cstate
)) {
568 if (sleep_ticks
> cx
->promotion
.threshold
.ticks
&&
569 cx
->promotion
.state
->latency
<= system_latency_constraint()) {
570 cx
->promotion
.count
++;
571 cx
->demotion
.count
= 0;
572 if (cx
->promotion
.count
>=
573 cx
->promotion
.threshold
.count
) {
574 if (pr
->flags
.bm_check
) {
576 (pr
->power
.bm_activity
& cx
->
577 promotion
.threshold
.bm
)) {
583 next_state
= cx
->promotion
.state
;
593 * Track the number of shorts (time asleep is less than time threshold)
594 * and demote when the usage threshold is reached.
596 if (cx
->demotion
.state
) {
597 if (sleep_ticks
< cx
->demotion
.threshold
.ticks
) {
598 cx
->demotion
.count
++;
599 cx
->promotion
.count
= 0;
600 if (cx
->demotion
.count
>= cx
->demotion
.threshold
.count
) {
601 next_state
= cx
->demotion
.state
;
609 * Demote if current state exceeds max_cstate
610 * or if the latency of the current state is unacceptable
612 if ((pr
->power
.state
- pr
->power
.states
) > max_cstate
||
613 pr
->power
.state
->latency
> system_latency_constraint()) {
614 if (cx
->demotion
.state
)
615 next_state
= cx
->demotion
.state
;
621 * If we're going to start using a new Cx state we must clean up
622 * from the previous and prepare to use the new.
624 if (next_state
!= pr
->power
.state
)
625 acpi_processor_power_activate(pr
, next_state
);
628 static int acpi_processor_set_power_policy(struct acpi_processor
*pr
)
631 unsigned int state_is_set
= 0;
632 struct acpi_processor_cx
*lower
= NULL
;
633 struct acpi_processor_cx
*higher
= NULL
;
634 struct acpi_processor_cx
*cx
;
641 * This function sets the default Cx state policy (OS idle handler).
642 * Our scheme is to promote quickly to C2 but more conservatively
643 * to C3. We're favoring C2 for its characteristics of low latency
644 * (quick response), good power savings, and ability to allow bus
645 * mastering activity. Note that the Cx state policy is completely
646 * customizable and can be altered dynamically.
650 for (i
= 1; i
< ACPI_PROCESSOR_MAX_POWER
; i
++) {
651 cx
= &pr
->power
.states
[i
];
656 pr
->power
.state
= cx
;
665 for (i
= 1; i
< ACPI_PROCESSOR_MAX_POWER
; i
++) {
666 cx
= &pr
->power
.states
[i
];
671 cx
->demotion
.state
= lower
;
672 cx
->demotion
.threshold
.ticks
= cx
->latency_ticks
;
673 cx
->demotion
.threshold
.count
= 1;
674 if (cx
->type
== ACPI_STATE_C3
)
675 cx
->demotion
.threshold
.bm
= bm_history
;
682 for (i
= (ACPI_PROCESSOR_MAX_POWER
- 1); i
> 0; i
--) {
683 cx
= &pr
->power
.states
[i
];
688 cx
->promotion
.state
= higher
;
689 cx
->promotion
.threshold
.ticks
= cx
->latency_ticks
;
690 if (cx
->type
>= ACPI_STATE_C2
)
691 cx
->promotion
.threshold
.count
= 4;
693 cx
->promotion
.threshold
.count
= 10;
694 if (higher
->type
== ACPI_STATE_C3
)
695 cx
->promotion
.threshold
.bm
= bm_history
;
704 static int acpi_processor_get_power_info_fadt(struct acpi_processor
*pr
)
713 /* if info is obtained from pblk/fadt, type equals state */
714 pr
->power
.states
[ACPI_STATE_C2
].type
= ACPI_STATE_C2
;
715 pr
->power
.states
[ACPI_STATE_C3
].type
= ACPI_STATE_C3
;
717 #ifndef CONFIG_HOTPLUG_CPU
719 * Check for P_LVL2_UP flag before entering C2 and above on
722 if ((num_online_cpus() > 1) &&
723 !(acpi_gbl_FADT
.flags
& ACPI_FADT_C2_MP_SUPPORTED
))
727 /* determine C2 and C3 address from pblk */
728 pr
->power
.states
[ACPI_STATE_C2
].address
= pr
->pblk
+ 4;
729 pr
->power
.states
[ACPI_STATE_C3
].address
= pr
->pblk
+ 5;
731 /* determine latencies from FADT */
732 pr
->power
.states
[ACPI_STATE_C2
].latency
= acpi_gbl_FADT
.C2latency
;
733 pr
->power
.states
[ACPI_STATE_C3
].latency
= acpi_gbl_FADT
.C3latency
;
735 ACPI_DEBUG_PRINT((ACPI_DB_INFO
,
736 "lvl2[0x%08x] lvl3[0x%08x]\n",
737 pr
->power
.states
[ACPI_STATE_C2
].address
,
738 pr
->power
.states
[ACPI_STATE_C3
].address
));
743 static int acpi_processor_get_power_info_default(struct acpi_processor
*pr
)
745 if (!pr
->power
.states
[ACPI_STATE_C1
].valid
) {
746 /* set the first C-State to C1 */
747 /* all processors need to support C1 */
748 pr
->power
.states
[ACPI_STATE_C1
].type
= ACPI_STATE_C1
;
749 pr
->power
.states
[ACPI_STATE_C1
].valid
= 1;
751 /* the C0 state only exists as a filler in our array */
752 pr
->power
.states
[ACPI_STATE_C0
].valid
= 1;
756 static int acpi_processor_get_power_info_cst(struct acpi_processor
*pr
)
758 acpi_status status
= 0;
762 struct acpi_buffer buffer
= { ACPI_ALLOCATE_BUFFER
, NULL
};
763 union acpi_object
*cst
;
771 status
= acpi_evaluate_object(pr
->handle
, "_CST", NULL
, &buffer
);
772 if (ACPI_FAILURE(status
)) {
773 ACPI_DEBUG_PRINT((ACPI_DB_INFO
, "No _CST, giving up\n"));
777 cst
= buffer
.pointer
;
779 /* There must be at least 2 elements */
780 if (!cst
|| (cst
->type
!= ACPI_TYPE_PACKAGE
) || cst
->package
.count
< 2) {
781 printk(KERN_ERR PREFIX
"not enough elements in _CST\n");
786 count
= cst
->package
.elements
[0].integer
.value
;
788 /* Validate number of power states. */
789 if (count
< 1 || count
!= cst
->package
.count
- 1) {
790 printk(KERN_ERR PREFIX
"count given by _CST is not valid\n");
795 /* Tell driver that at least _CST is supported. */
796 pr
->flags
.has_cst
= 1;
798 for (i
= 1; i
<= count
; i
++) {
799 union acpi_object
*element
;
800 union acpi_object
*obj
;
801 struct acpi_power_register
*reg
;
802 struct acpi_processor_cx cx
;
804 memset(&cx
, 0, sizeof(cx
));
806 element
= &(cst
->package
.elements
[i
]);
807 if (element
->type
!= ACPI_TYPE_PACKAGE
)
810 if (element
->package
.count
!= 4)
813 obj
= &(element
->package
.elements
[0]);
815 if (obj
->type
!= ACPI_TYPE_BUFFER
)
818 reg
= (struct acpi_power_register
*)obj
->buffer
.pointer
;
820 if (reg
->space_id
!= ACPI_ADR_SPACE_SYSTEM_IO
&&
821 (reg
->space_id
!= ACPI_ADR_SPACE_FIXED_HARDWARE
))
824 /* There should be an easy way to extract an integer... */
825 obj
= &(element
->package
.elements
[1]);
826 if (obj
->type
!= ACPI_TYPE_INTEGER
)
829 cx
.type
= obj
->integer
.value
;
831 * Some buggy BIOSes won't list C1 in _CST -
832 * Let acpi_processor_get_power_info_default() handle them later
834 if (i
== 1 && cx
.type
!= ACPI_STATE_C1
)
837 cx
.address
= reg
->address
;
838 cx
.index
= current_count
+ 1;
840 cx
.space_id
= ACPI_CSTATE_SYSTEMIO
;
841 if (reg
->space_id
== ACPI_ADR_SPACE_FIXED_HARDWARE
) {
842 if (acpi_processor_ffh_cstate_probe
843 (pr
->id
, &cx
, reg
) == 0) {
844 cx
.space_id
= ACPI_CSTATE_FFH
;
845 } else if (cx
.type
!= ACPI_STATE_C1
) {
847 * C1 is a special case where FIXED_HARDWARE
848 * can be handled in non-MWAIT way as well.
849 * In that case, save this _CST entry info.
850 * That is, we retain space_id of SYSTEM_IO for
852 * Otherwise, ignore this info and continue.
858 obj
= &(element
->package
.elements
[2]);
859 if (obj
->type
!= ACPI_TYPE_INTEGER
)
862 cx
.latency
= obj
->integer
.value
;
864 obj
= &(element
->package
.elements
[3]);
865 if (obj
->type
!= ACPI_TYPE_INTEGER
)
868 cx
.power
= obj
->integer
.value
;
871 memcpy(&(pr
->power
.states
[current_count
]), &cx
, sizeof(cx
));
874 * We support total ACPI_PROCESSOR_MAX_POWER - 1
875 * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1)
877 if (current_count
>= (ACPI_PROCESSOR_MAX_POWER
- 1)) {
879 "Limiting number of power states to max (%d)\n",
880 ACPI_PROCESSOR_MAX_POWER
);
882 "Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n");
887 ACPI_DEBUG_PRINT((ACPI_DB_INFO
, "Found %d power states\n",
890 /* Validate number of power states discovered */
891 if (current_count
< 2)
895 kfree(buffer
.pointer
);
900 static void acpi_processor_power_verify_c2(struct acpi_processor_cx
*cx
)
907 * C2 latency must be less than or equal to 100
910 else if (cx
->latency
> ACPI_PROCESSOR_MAX_C2_LATENCY
) {
911 ACPI_DEBUG_PRINT((ACPI_DB_INFO
,
912 "latency too large [%d]\n", cx
->latency
));
917 * Otherwise we've met all of our C2 requirements.
918 * Normalize the C2 latency to expidite policy
921 cx
->latency_ticks
= US_TO_PM_TIMER_TICKS(cx
->latency
);
926 static void acpi_processor_power_verify_c3(struct acpi_processor
*pr
,
927 struct acpi_processor_cx
*cx
)
929 static int bm_check_flag
;
936 * C3 latency must be less than or equal to 1000
939 else if (cx
->latency
> ACPI_PROCESSOR_MAX_C3_LATENCY
) {
940 ACPI_DEBUG_PRINT((ACPI_DB_INFO
,
941 "latency too large [%d]\n", cx
->latency
));
946 * PIIX4 Erratum #18: We don't support C3 when Type-F (fast)
947 * DMA transfers are used by any ISA device to avoid livelock.
948 * Note that we could disable Type-F DMA (as recommended by
949 * the erratum), but this is known to disrupt certain ISA
950 * devices thus we take the conservative approach.
952 else if (errata
.piix4
.fdma
) {
953 ACPI_DEBUG_PRINT((ACPI_DB_INFO
,
954 "C3 not supported on PIIX4 with Type-F DMA\n"));
958 /* All the logic here assumes flags.bm_check is same across all CPUs */
959 if (!bm_check_flag
) {
960 /* Determine whether bm_check is needed based on CPU */
961 acpi_processor_power_init_bm_check(&(pr
->flags
), pr
->id
);
962 bm_check_flag
= pr
->flags
.bm_check
;
964 pr
->flags
.bm_check
= bm_check_flag
;
967 if (pr
->flags
.bm_check
) {
968 /* bus mastering control is necessary */
969 if (!pr
->flags
.bm_control
) {
970 ACPI_DEBUG_PRINT((ACPI_DB_INFO
,
971 "C3 support requires bus mastering control\n"));
976 * WBINVD should be set in fadt, for C3 state to be
977 * supported on when bm_check is not required.
979 if (!(acpi_gbl_FADT
.flags
& ACPI_FADT_WBINVD
)) {
980 ACPI_DEBUG_PRINT((ACPI_DB_INFO
,
981 "Cache invalidation should work properly"
982 " for C3 to be enabled on SMP systems\n"));
985 acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD
, 0);
989 * Otherwise we've met all of our C3 requirements.
990 * Normalize the C3 latency to expidite policy. Enable
991 * checking of bus mastering status (bm_check) so we can
992 * use this in our C3 policy
995 cx
->latency_ticks
= US_TO_PM_TIMER_TICKS(cx
->latency
);
1000 static int acpi_processor_power_verify(struct acpi_processor
*pr
)
1003 unsigned int working
= 0;
1005 pr
->power
.timer_broadcast_on_state
= INT_MAX
;
1007 for (i
= 1; i
< ACPI_PROCESSOR_MAX_POWER
; i
++) {
1008 struct acpi_processor_cx
*cx
= &pr
->power
.states
[i
];
1016 acpi_processor_power_verify_c2(cx
);
1018 acpi_timer_check_state(i
, pr
, cx
);
1022 acpi_processor_power_verify_c3(pr
, cx
);
1024 acpi_timer_check_state(i
, pr
, cx
);
1032 acpi_propagate_timer_broadcast(pr
);
1037 static int acpi_processor_get_power_info(struct acpi_processor
*pr
)
1043 /* NOTE: the idle thread may not be running while calling
1046 /* Zero initialize all the C-states info. */
1047 memset(pr
->power
.states
, 0, sizeof(pr
->power
.states
));
1049 result
= acpi_processor_get_power_info_cst(pr
);
1050 if (result
== -ENODEV
)
1051 result
= acpi_processor_get_power_info_fadt(pr
);
1056 acpi_processor_get_power_info_default(pr
);
1058 pr
->power
.count
= acpi_processor_power_verify(pr
);
1061 * Set Default Policy
1062 * ------------------
1063 * Now that we know which states are supported, set the default
1064 * policy. Note that this policy can be changed dynamically
1065 * (e.g. encourage deeper sleeps to conserve battery life when
1068 result
= acpi_processor_set_power_policy(pr
);
1073 * if one state of type C2 or C3 is available, mark this
1074 * CPU as being "idle manageable"
1076 for (i
= 1; i
< ACPI_PROCESSOR_MAX_POWER
; i
++) {
1077 if (pr
->power
.states
[i
].valid
) {
1078 pr
->power
.count
= i
;
1079 if (pr
->power
.states
[i
].type
>= ACPI_STATE_C2
)
1080 pr
->flags
.power
= 1;
1087 int acpi_processor_cst_has_changed(struct acpi_processor
*pr
)
1099 if (!pr
->flags
.power_setup_done
)
1102 /* Fall back to the default idle loop */
1103 pm_idle
= pm_idle_save
;
1104 synchronize_sched(); /* Relies on interrupts forcing exit from idle. */
1106 pr
->flags
.power
= 0;
1107 result
= acpi_processor_get_power_info(pr
);
1108 if ((pr
->flags
.power
== 1) && (pr
->flags
.power_setup_done
))
1109 pm_idle
= acpi_processor_idle
;
1114 /* proc interface */
1116 static int acpi_processor_power_seq_show(struct seq_file
*seq
, void *offset
)
1118 struct acpi_processor
*pr
= seq
->private;
1125 seq_printf(seq
, "active state: C%zd\n"
1127 "bus master activity: %08x\n"
1128 "maximum allowed latency: %d usec\n",
1129 pr
->power
.state
? pr
->power
.state
- pr
->power
.states
: 0,
1130 max_cstate
, (unsigned)pr
->power
.bm_activity
,
1131 system_latency_constraint());
1133 seq_puts(seq
, "states:\n");
1135 for (i
= 1; i
<= pr
->power
.count
; i
++) {
1136 seq_printf(seq
, " %cC%d: ",
1137 (&pr
->power
.states
[i
] ==
1138 pr
->power
.state
? '*' : ' '), i
);
1140 if (!pr
->power
.states
[i
].valid
) {
1141 seq_puts(seq
, "<not supported>\n");
1145 switch (pr
->power
.states
[i
].type
) {
1147 seq_printf(seq
, "type[C1] ");
1150 seq_printf(seq
, "type[C2] ");
1153 seq_printf(seq
, "type[C3] ");
1156 seq_printf(seq
, "type[--] ");
1160 if (pr
->power
.states
[i
].promotion
.state
)
1161 seq_printf(seq
, "promotion[C%zd] ",
1162 (pr
->power
.states
[i
].promotion
.state
-
1165 seq_puts(seq
, "promotion[--] ");
1167 if (pr
->power
.states
[i
].demotion
.state
)
1168 seq_printf(seq
, "demotion[C%zd] ",
1169 (pr
->power
.states
[i
].demotion
.state
-
1172 seq_puts(seq
, "demotion[--] ");
1174 seq_printf(seq
, "latency[%03d] usage[%08d] duration[%020llu]\n",
1175 pr
->power
.states
[i
].latency
,
1176 pr
->power
.states
[i
].usage
,
1177 (unsigned long long)pr
->power
.states
[i
].time
);
1184 static int acpi_processor_power_open_fs(struct inode
*inode
, struct file
*file
)
1186 return single_open(file
, acpi_processor_power_seq_show
,
1190 static const struct file_operations acpi_processor_power_fops
= {
1191 .open
= acpi_processor_power_open_fs
,
1193 .llseek
= seq_lseek
,
1194 .release
= single_release
,
1198 static void smp_callback(void *v
)
1200 /* we already woke the CPU up, nothing more to do */
1204 * This function gets called when a part of the kernel has a new latency
1205 * requirement. This means we need to get all processors out of their C-state,
1206 * and then recalculate a new suitable C-state. Just do a cross-cpu IPI; that
1207 * wakes them all right up.
1209 static int acpi_processor_latency_notify(struct notifier_block
*b
,
1210 unsigned long l
, void *v
)
1212 smp_call_function(smp_callback
, NULL
, 0, 1);
1216 static struct notifier_block acpi_processor_latency_notifier
= {
1217 .notifier_call
= acpi_processor_latency_notify
,
1221 int __cpuinit
acpi_processor_power_init(struct acpi_processor
*pr
,
1222 struct acpi_device
*device
)
1224 acpi_status status
= 0;
1225 static int first_run
;
1226 struct proc_dir_entry
*entry
= NULL
;
1231 dmi_check_system(processor_power_dmi_table
);
1232 if (max_cstate
< ACPI_C_STATES_MAX
)
1234 "ACPI: processor limited to max C-state %d\n",
1238 register_latency_notifier(&acpi_processor_latency_notifier
);
1245 if (acpi_gbl_FADT
.cst_control
&& !nocst
) {
1247 acpi_os_write_port(acpi_gbl_FADT
.smi_command
, acpi_gbl_FADT
.cst_control
, 8);
1248 if (ACPI_FAILURE(status
)) {
1249 ACPI_EXCEPTION((AE_INFO
, status
,
1250 "Notifying BIOS of _CST ability failed"));
1254 acpi_processor_get_power_info(pr
);
1257 * Install the idle handler if processor power management is supported.
1258 * Note that we use previously set idle handler will be used on
1259 * platforms that only support C1.
1261 if ((pr
->flags
.power
) && (!boot_option_idle_override
)) {
1262 printk(KERN_INFO PREFIX
"CPU%d (power states:", pr
->id
);
1263 for (i
= 1; i
<= pr
->power
.count
; i
++)
1264 if (pr
->power
.states
[i
].valid
)
1265 printk(" C%d[C%d]", i
,
1266 pr
->power
.states
[i
].type
);
1270 pm_idle_save
= pm_idle
;
1271 pm_idle
= acpi_processor_idle
;
1276 entry
= create_proc_entry(ACPI_PROCESSOR_FILE_POWER
,
1277 S_IRUGO
, acpi_device_dir(device
));
1281 entry
->proc_fops
= &acpi_processor_power_fops
;
1282 entry
->data
= acpi_driver_data(device
);
1283 entry
->owner
= THIS_MODULE
;
1286 pr
->flags
.power_setup_done
= 1;
1291 int acpi_processor_power_exit(struct acpi_processor
*pr
,
1292 struct acpi_device
*device
)
1295 pr
->flags
.power_setup_done
= 0;
1297 if (acpi_device_dir(device
))
1298 remove_proc_entry(ACPI_PROCESSOR_FILE_POWER
,
1299 acpi_device_dir(device
));
1301 /* Unregister the idle handler when processor #0 is removed. */
1303 pm_idle
= pm_idle_save
;
1306 * We are about to unload the current idle thread pm callback
1307 * (pm_idle), Wait for all processors to update cached/local
1308 * copies of pm_idle before proceeding.
1312 unregister_latency_notifier(&acpi_processor_latency_notifier
);