1 /* National Semiconductor NS87560UBD Super I/O controller used in
2 * HP [BCJ]x000 workstations.
4 * This chip is a horrid piece of engineering, and National
5 * denies any knowledge of its existence. Thus no datasheet is
6 * available off www.national.com.
8 * (C) Copyright 2000 Linuxcare, Inc.
9 * (C) Copyright 2000 Linuxcare Canada, Inc.
10 * (C) Copyright 2000 Martin K. Petersen <mkp@linuxcare.com>
11 * (C) Copyright 2000 Alex deVries <alex@onefishtwo.ca>
12 * (C) Copyright 2001 John Marvin <jsm fc hp com>
13 * (C) Copyright 2003 Grant Grundler <grundler parisc-linux org>
14 * (C) Copyright 2005 Kyle McMartin <kyle@parisc-linux.org>
16 * This program is free software; you can redistribute it and/or
17 * modify it under the terms of the GNU General Public License as
18 * published by the Free Software Foundation; either version 2 of
19 * the License, or (at your option) any later version.
21 * The initial version of this is by Martin Peterson. Alex deVries
22 * has spent a bit of time trying to coax it into working.
24 * Major changes to get basic interrupt infrastructure working to
25 * hopefully be able to support all SuperIO devices. Currently
26 * works with serial. -- John Marvin <jsm@fc.hp.com>
28 * Converted superio_init() to be a PCI_FIXUP_FINAL callee.
29 * -- Kyle McMartin <kyle@parisc-linux.org>
35 * Function 0 is an IDE controller. It is identical to a PC87415 IDE
36 * controller (and identifies itself as such).
38 * Function 1 is a "Legacy I/O" controller. Under this function is a
39 * whole mess of legacy I/O peripherals. Of course, HP hasn't enabled
40 * all the functionality in hardware, but the following is available:
42 * Two 16550A compatible serial controllers
43 * An IEEE 1284 compatible parallel port
44 * A floppy disk controller
46 * Function 2 is a USB controller.
48 * We must be incredibly careful during initialization. Since all
49 * interrupts are routed through function 1 (which is not allowed by
50 * the PCI spec), we need to program the PICs on the legacy I/O port
51 * *before* we attempt to set up IDE and USB. @#$!&
53 * According to HP, devices are only enabled by firmware if they have
54 * a physical device connected.
56 * Configuration register bits:
57 * 0x5A: FDC, SP1, IDE1, SP2, IDE2, PAR, Reserved, P92
58 * 0x5B: RTC, 8259, 8254, DMA1, DMA2, KBC, P61, APM
62 #include <linux/errno.h>
63 #include <linux/init.h>
64 #include <linux/module.h>
65 #include <linux/types.h>
66 #include <linux/interrupt.h>
67 #include <linux/ioport.h>
68 #include <linux/serial.h>
69 #include <linux/pci.h>
70 #include <linux/parport.h>
71 #include <linux/parport_pc.h>
72 #include <linux/termios.h>
73 #include <linux/tty.h>
74 #include <linux/serial_core.h>
75 #include <linux/delay.h>
78 #include <asm/hardware.h>
79 #include <asm/superio.h>
81 static struct superio_device sio_dev
;
84 #undef DEBUG_SUPERIO_INIT
86 #ifdef DEBUG_SUPERIO_INIT
87 #define DBG_INIT(x...) printk(x)
89 #define DBG_INIT(x...)
92 #define SUPERIO "SuperIO"
93 #define PFX SUPERIO ": "
96 superio_interrupt(int parent_irq
, void *devp
, struct pt_regs
*regs
)
101 /* Poll the 8259 to see if there's an interrupt. */
102 outb (OCW3_POLL
,IC_PIC1
+0);
104 results
= inb(IC_PIC1
+0);
107 * Bit 7: 1 = active Interrupt; 0 = no Interrupt pending
109 * Bits 2-0: highest priority, active requesting interrupt ID (0-7)
111 if ((results
& 0x80) == 0) {
112 /* I suspect "spurious" interrupts are from unmasking an IRQ.
113 * We don't know if an interrupt was/is pending and thus
114 * just call the handler for that IRQ as if it were pending.
119 /* Check to see which device is interrupting */
120 local_irq
= results
& 0x0f;
122 if (local_irq
== 2 || local_irq
> 7) {
123 printk(KERN_ERR PFX
"slave interrupted!\n");
127 if (local_irq
== 7) {
129 /* Could be spurious. Check in service bits */
131 outb(OCW3_ISR
,IC_PIC1
+0);
132 results
= inb(IC_PIC1
+0);
133 if ((results
& 0x80) == 0) { /* if ISR7 not set: spurious */
134 printk(KERN_WARNING PFX
"spurious interrupt!\n");
139 /* Call the appropriate device's interrupt */
140 __do_IRQ(local_irq
, regs
);
142 /* set EOI - forces a new interrupt if a lower priority device
143 * still needs service.
145 outb((OCW2_SEOI
|local_irq
),IC_PIC1
+ 0);
149 /* Initialize Super I/O device */
151 superio_init(struct pci_dev
*pcidev
)
153 struct superio_device
*sio
= &sio_dev
;
154 struct pci_dev
*pdev
= sio
->lio_pdev
;
157 if (sio
->suckyio_irq_enabled
)
161 BUG_ON(!sio
->usb_pdev
);
163 /* use the IRQ iosapic found for USB INT D... */
164 pdev
->irq
= sio
->usb_pdev
->irq
;
166 /* ...then properly fixup the USB to point at suckyio PIC */
167 sio
->usb_pdev
->irq
= superio_fixup_irq(sio
->usb_pdev
);
169 printk(KERN_INFO PFX
"Found NS87560 Legacy I/O device at %s (IRQ %i) \n",
170 pci_name(pdev
), pdev
->irq
);
172 pci_read_config_dword (pdev
, SIO_SP1BAR
, &sio
->sp1_base
);
174 printk(KERN_INFO PFX
"Serial port 1 at 0x%x\n", sio
->sp1_base
);
176 pci_read_config_dword (pdev
, SIO_SP2BAR
, &sio
->sp2_base
);
178 printk(KERN_INFO PFX
"Serial port 2 at 0x%x\n", sio
->sp2_base
);
180 pci_read_config_dword (pdev
, SIO_PPBAR
, &sio
->pp_base
);
182 printk(KERN_INFO PFX
"Parallel port at 0x%x\n", sio
->pp_base
);
184 pci_read_config_dword (pdev
, SIO_FDCBAR
, &sio
->fdc_base
);
186 printk(KERN_INFO PFX
"Floppy controller at 0x%x\n", sio
->fdc_base
);
187 pci_read_config_dword (pdev
, SIO_ACPIBAR
, &sio
->acpi_base
);
188 sio
->acpi_base
&= ~1;
189 printk(KERN_INFO PFX
"ACPI at 0x%x\n", sio
->acpi_base
);
191 request_region (IC_PIC1
, 0x1f, "pic1");
192 request_region (IC_PIC2
, 0x1f, "pic2");
193 request_region (sio
->acpi_base
, 0x1f, "acpi");
195 /* Enable the legacy I/O function */
196 pci_read_config_word (pdev
, PCI_COMMAND
, &word
);
197 word
|= PCI_COMMAND_SERR
| PCI_COMMAND_PARITY
| PCI_COMMAND_IO
;
198 pci_write_config_word (pdev
, PCI_COMMAND
, word
);
200 pci_set_master (pdev
);
201 pci_enable_device(pdev
);
204 * Next project is programming the onboard interrupt controllers.
205 * PDC hasn't done this for us, since it's using polled I/O.
207 * XXX Use dword writes to avoid bugs in Elroy or Suckyio Config
208 * space access. PCI is by nature a 32-bit bus and config
209 * space can be sensitive to that.
216 TRIGGER_1 == 0x82 USB & IDE level triggered, rest to edge
218 pci_write_config_dword (pdev
, 0x64, 0x82000000U
);
221 TRIGGER_2 == 0x00 all edge triggered (not used)
222 CFG_IR_SER == 0x43 SerPort1 = IRQ3, SerPort2 = IRQ4
223 CFG_IR_PF == 0x65 ParPort = IRQ5, FloppyCtlr = IRQ6
224 CFG_IR_IDE == 0x07 IDE1 = IRQ7, reserved
226 pci_write_config_dword (pdev
, TRIGGER_2
, 0x07654300U
);
230 CFG_IR_INTCD == 0x10 USB = IRQ1
234 pci_write_config_dword (pdev
, CFG_IR_INTAB
, 0x00001000U
);
237 CFG_IR_USB == 0x00 not used. USB is connected to INTD.
238 CFG_IR_ACPI == 0x00 not used.
239 DMA Priority == 0x4c88 Power on default value. NFC.
241 pci_write_config_dword (pdev
, CFG_IR_USB
, 0x4c880000U
);
243 /* PIC1 Initialization Command Word register programming */
244 outb (0x11,IC_PIC1
+0); /* ICW1: ICW4 write req | ICW1 */
245 outb (0x00,IC_PIC1
+1); /* ICW2: interrupt vector table - not used */
246 outb (0x04,IC_PIC1
+1); /* ICW3: Cascade */
247 outb (0x01,IC_PIC1
+1); /* ICW4: x86 mode */
249 /* PIC1 Program Operational Control Words */
250 outb (0xff,IC_PIC1
+1); /* OCW1: Mask all interrupts */
251 outb (0xc2,IC_PIC1
+0); /* OCW2: priority (3-7,0-2) */
253 /* PIC2 Initialization Command Word register programming */
254 outb (0x11,IC_PIC2
+0); /* ICW1: ICW4 write req | ICW1 */
255 outb (0x00,IC_PIC2
+1); /* ICW2: N/A */
256 outb (0x02,IC_PIC2
+1); /* ICW3: Slave ID code */
257 outb (0x01,IC_PIC2
+1); /* ICW4: x86 mode */
259 /* Program Operational Control Words */
260 outb (0xff,IC_PIC1
+1); /* OCW1: Mask all interrupts */
261 outb (0x68,IC_PIC1
+0); /* OCW3: OCW3 select | ESMM | SMM */
263 /* Write master mask reg */
264 outb (0xff,IC_PIC1
+1);
266 /* Setup USB power regulation */
267 outb(1, sio
->acpi_base
+ USB_REG_CR
);
268 if (inb(sio
->acpi_base
+ USB_REG_CR
) & 1)
269 printk(KERN_INFO PFX
"USB regulator enabled\n");
271 printk(KERN_ERR PFX
"USB regulator not initialized!\n");
273 if (request_irq(pdev
->irq
, superio_interrupt
, SA_INTERRUPT
,
274 SUPERIO
, (void *)sio
)) {
276 printk(KERN_ERR PFX
"could not get irq\n");
281 sio
->suckyio_irq_enabled
= 1;
283 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NS
, PCI_DEVICE_ID_NS_87560_LIO
, superio_init
);
285 static void superio_disable_irq(unsigned int irq
)
289 if ((irq
< 1) || (irq
== 2) || (irq
> 7)) {
290 printk(KERN_ERR PFX
"Illegal irq number.\n");
302 static void superio_enable_irq(unsigned int irq
)
306 if ((irq
< 1) || (irq
== 2) || (irq
> 7)) {
307 printk(KERN_ERR PFX
"Illegal irq number (%d).\n", irq
);
312 /* Unmask interrupt */
318 static unsigned int superio_startup_irq(unsigned int irq
)
320 superio_enable_irq(irq
);
324 static struct hw_interrupt_type superio_interrupt_type
= {
326 .startup
= superio_startup_irq
,
327 .shutdown
= superio_disable_irq
,
328 .enable
= superio_enable_irq
,
329 .disable
= superio_disable_irq
,
334 #ifdef DEBUG_SUPERIO_INIT
335 static unsigned short expected_device
[3] = {
336 PCI_DEVICE_ID_NS_87415
,
337 PCI_DEVICE_ID_NS_87560_LIO
,
338 PCI_DEVICE_ID_NS_87560_USB
342 int superio_fixup_irq(struct pci_dev
*pcidev
)
346 #ifdef DEBUG_SUPERIO_INIT
348 fn
= PCI_FUNC(pcidev
->devfn
);
350 /* Verify the function number matches the expected device id. */
351 if (expected_device
[fn
] != pcidev
->device
) {
355 printk("superio_fixup_irq(%s) ven 0x%x dev 0x%x from %p\n",
357 pcidev
->vendor
, pcidev
->device
,
358 __builtin_return_address(0));
361 for (i
= 0; i
< 16; i
++) {
362 irq_desc
[i
].handler
= &superio_interrupt_type
;
366 * We don't allocate a SuperIO irq for the legacy IO function,
367 * since it is a "bridge". Instead, we will allocate irq's for
368 * each legacy device as they are initialized.
371 switch(pcidev
->device
) {
372 case PCI_DEVICE_ID_NS_87415
: /* Function 0 */
375 case PCI_DEVICE_ID_NS_87560_LIO
: /* Function 1 */
376 sio_dev
.lio_pdev
= pcidev
; /* save for superio_init() */
378 case PCI_DEVICE_ID_NS_87560_USB
: /* Function 2 */
379 sio_dev
.usb_pdev
= pcidev
; /* save for superio_init() */
391 static struct uart_port serial
[] = {
396 .uartclk
= 115200*16,
403 .uartclk
= 115200*16,
408 static void __devinit
superio_serial_init(void)
410 #ifdef CONFIG_SERIAL_8250
413 serial
[0].iobase
= sio_dev
.sp1_base
;
414 serial
[0].irq
= SP1_IRQ
;
415 spin_lock_init(&serial
[0].lock
);
417 retval
= early_serial_setup(&serial
[0]);
419 printk(KERN_WARNING PFX
"Register Serial #0 failed.\n");
423 serial
[1].iobase
= sio_dev
.sp2_base
;
424 serial
[1].irq
= SP2_IRQ
;
425 spin_lock_init(&serial
[1].lock
);
426 retval
= early_serial_setup(&serial
[1]);
429 printk(KERN_WARNING PFX
"Register Serial #1 failed.\n");
430 #endif /* CONFIG_SERIAL_8250 */
434 static void __devinit
superio_parport_init(void)
436 #ifdef CONFIG_PARPORT_PC
437 if (!parport_pc_probe_port(sio_dev
.pp_base
,
440 PARPORT_DMA_NONE
/* dma */,
441 NULL
/*struct pci_dev* */) )
443 printk(KERN_WARNING PFX
"Probing parallel port failed.\n");
444 #endif /* CONFIG_PARPORT_PC */
448 static void superio_fixup_pci(struct pci_dev
*pdev
)
453 pci_write_config_byte(pdev
, PCI_CLASS_PROG
, pdev
->class);
455 pci_read_config_byte(pdev
, PCI_CLASS_PROG
, &prog
);
456 printk("PCI: Enabled native mode for NS87415 (pif=0x%x)\n", prog
);
458 DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_NS
, PCI_DEVICE_ID_NS_87415
, superio_fixup_pci
);
462 superio_probe(struct pci_dev
*dev
, const struct pci_device_id
*id
)
464 struct superio_device
*sio
= &sio_dev
;
467 ** superio_probe(00:0e.0) ven 0x100b dev 0x2 sv 0x0 sd 0x0 class 0x1018a
468 ** superio_probe(00:0e.1) ven 0x100b dev 0xe sv 0x0 sd 0x0 class 0x68000
469 ** superio_probe(00:0e.2) ven 0x100b dev 0x12 sv 0x0 sd 0x0 class 0xc0310
471 DBG_INIT("superio_probe(%s) ven 0x%x dev 0x%x sv 0x%x sd 0x%x class 0x%x\n",
473 dev
->vendor
, dev
->device
,
474 dev
->subsystem_vendor
, dev
->subsystem_device
,
477 BUG_ON(!sio
->suckyio_irq_enabled
); /* Enabled by PCI_FIXUP_FINAL */
479 if (dev
->device
== PCI_DEVICE_ID_NS_87560_LIO
) { /* Function 1 */
480 superio_parport_init();
481 superio_serial_init();
482 /* REVISIT XXX : superio_fdc_init() ? */
484 } else if (dev
->device
== PCI_DEVICE_ID_NS_87415
) { /* Function 0 */
485 DBG_INIT("superio_probe: ignoring IDE 87415\n");
486 } else if (dev
->device
== PCI_DEVICE_ID_NS_87560_USB
) { /* Function 2 */
487 DBG_INIT("superio_probe: ignoring USB OHCI controller\n");
489 DBG_INIT("superio_probe: WTF? Fire Extinguisher?\n");
492 /* Let appropriate other driver claim this device. */
496 static struct pci_device_id superio_tbl
[] = {
497 { PCI_DEVICE(PCI_VENDOR_ID_NS
, PCI_DEVICE_ID_NS_87560_LIO
) },
498 { PCI_DEVICE(PCI_VENDOR_ID_NS
, PCI_DEVICE_ID_NS_87560_USB
) },
499 { PCI_DEVICE(PCI_VENDOR_ID_NS
, PCI_DEVICE_ID_NS_87415
) },
503 static struct pci_driver superio_driver
= {
505 .id_table
= superio_tbl
,
506 .probe
= superio_probe
,
509 static int __init
superio_modinit(void)
511 return pci_register_driver(&superio_driver
);
514 static void __exit
superio_exit(void)
516 pci_unregister_driver(&superio_driver
);
519 module_init(superio_modinit
);
520 module_exit(superio_exit
);