2 * Universal Host Controller Interface driver for USB.
4 * Maintainer: Alan Stern <stern@rowland.harvard.edu>
6 * (C) Copyright 1999 Linus Torvalds
7 * (C) Copyright 1999-2002 Johannes Erdfelt, johannes@erdfelt.com
8 * (C) Copyright 1999 Randy Dunlap
9 * (C) Copyright 1999 Georg Acher, acher@in.tum.de
10 * (C) Copyright 1999 Deti Fliegl, deti@fliegl.de
11 * (C) Copyright 1999 Thomas Sailer, sailer@ife.ee.ethz.ch
12 * (C) Copyright 2004 Alan Stern, stern@rowland.harvard.edu
15 static __u8 root_hub_hub_des
[] =
17 0x09, /* __u8 bLength; */
18 0x29, /* __u8 bDescriptorType; Hub-descriptor */
19 0x02, /* __u8 bNbrPorts; */
20 0x0a, /* __u16 wHubCharacteristics; */
21 0x00, /* (per-port OC, no power switching) */
22 0x01, /* __u8 bPwrOn2pwrGood; 2ms */
23 0x00, /* __u8 bHubContrCurrent; 0 mA */
24 0x00, /* __u8 DeviceRemovable; *** 7 Ports max *** */
25 0xff /* __u8 PortPwrCtrlMask; *** 7 ports max *** */
28 #define UHCI_RH_MAXCHILD 7
30 /* must write as zeroes */
31 #define WZ_BITS (USBPORTSC_RES2 | USBPORTSC_RES3 | USBPORTSC_RES4)
33 /* status change bits: nonzero writes will clear */
34 #define RWC_BITS (USBPORTSC_OCC | USBPORTSC_PEC | USBPORTSC_CSC)
36 /* A port that either is connected or has a changed-bit set will prevent
37 * us from AUTO_STOPPING.
39 static int any_ports_active(struct uhci_hcd
*uhci
)
43 for (port
= 0; port
< uhci
->rh_numports
; ++port
) {
44 if ((inw(uhci
->io_addr
+ USBPORTSC1
+ port
* 2) &
45 (USBPORTSC_CCS
| RWC_BITS
)) ||
46 test_bit(port
, &uhci
->port_c_suspend
))
52 static int uhci_hub_status_data(struct usb_hcd
*hcd
, char *buf
)
54 struct uhci_hcd
*uhci
= hcd_to_uhci(hcd
);
57 if (uhci
->hc_inaccessible
)
61 for (port
= 0; port
< uhci
->rh_numports
; ++port
) {
62 if ((inw(uhci
->io_addr
+ USBPORTSC1
+ port
* 2) & RWC_BITS
) ||
63 test_bit(port
, &uhci
->port_c_suspend
))
64 *buf
|= (1 << (port
+ 1));
66 if (*buf
&& uhci
->is_stopped
)
67 uhci
->resume_detect
= 1;
71 #define OK(x) len = (x); break
73 #define CLR_RH_PORTSTAT(x) \
74 status = inw(port_addr); \
75 status &= ~(RWC_BITS|WZ_BITS); \
77 status |= RWC_BITS & (x); \
78 outw(status, port_addr)
80 #define SET_RH_PORTSTAT(x) \
81 status = inw(port_addr); \
83 status &= ~(RWC_BITS|WZ_BITS); \
84 outw(status, port_addr)
86 /* UHCI controllers don't automatically stop resume signalling after 20 msec,
87 * so we have to poll and check timeouts in order to take care of it.
89 static void uhci_finish_suspend(struct uhci_hcd
*uhci
, int port
,
90 unsigned long port_addr
)
94 if (test_bit(port
, &uhci
->suspended_ports
)) {
95 CLR_RH_PORTSTAT(USBPORTSC_SUSP
| USBPORTSC_RD
);
96 clear_bit(port
, &uhci
->suspended_ports
);
97 clear_bit(port
, &uhci
->resuming_ports
);
98 set_bit(port
, &uhci
->port_c_suspend
);
100 /* The controller won't actually turn off the RD bit until
101 * it has had a chance to send a low-speed EOP sequence,
102 * which takes 3 bit times (= 2 microseconds). We'll delay
103 * slightly longer for good luck. */
108 static void uhci_check_ports(struct uhci_hcd
*uhci
)
111 unsigned long port_addr
;
114 for (port
= 0; port
< uhci
->rh_numports
; ++port
) {
115 port_addr
= uhci
->io_addr
+ USBPORTSC1
+ 2 * port
;
116 status
= inw(port_addr
);
117 if (unlikely(status
& USBPORTSC_PR
)) {
118 if (time_after_eq(jiffies
, uhci
->ports_timeout
)) {
119 CLR_RH_PORTSTAT(USBPORTSC_PR
);
122 /* If the port was enabled before, turning
123 * reset on caused a port enable change.
124 * Turning reset off causes a port connect
125 * status change. Clear these changes. */
126 CLR_RH_PORTSTAT(USBPORTSC_CSC
| USBPORTSC_PEC
);
127 SET_RH_PORTSTAT(USBPORTSC_PE
);
130 if (unlikely(status
& USBPORTSC_RD
)) {
131 if (!test_bit(port
, &uhci
->resuming_ports
)) {
133 /* Port received a wakeup request */
134 set_bit(port
, &uhci
->resuming_ports
);
135 uhci
->ports_timeout
= jiffies
+
136 msecs_to_jiffies(20);
137 } else if (time_after_eq(jiffies
,
138 uhci
->ports_timeout
)) {
139 uhci_finish_suspend(uhci
, port
, port_addr
);
145 /* size of returned buffer is part of USB spec */
146 static int uhci_hub_control(struct usb_hcd
*hcd
, u16 typeReq
, u16 wValue
,
147 u16 wIndex
, char *buf
, u16 wLength
)
149 struct uhci_hcd
*uhci
= hcd_to_uhci(hcd
);
150 int status
, lstatus
, retval
= 0, len
= 0;
151 unsigned int port
= wIndex
- 1;
152 unsigned long port_addr
= uhci
->io_addr
+ USBPORTSC1
+ 2 * port
;
153 u16 wPortChange
, wPortStatus
;
156 if (uhci
->hc_inaccessible
)
159 spin_lock_irqsave(&uhci
->lock
, flags
);
163 *(__le32
*)buf
= cpu_to_le32(0);
164 OK(4); /* hub power */
166 if (port
>= uhci
->rh_numports
)
169 uhci_check_ports(uhci
);
170 status
= inw(port_addr
);
172 /* Intel controllers report the OverCurrent bit active on.
173 * VIA controllers report it active off, so we'll adjust the
174 * bit value. (It's not standardized in the UHCI spec.)
176 if (to_pci_dev(hcd
->self
.controller
)->vendor
==
178 status
^= USBPORTSC_OC
;
180 /* UHCI doesn't support C_RESET (always false) */
181 wPortChange
= lstatus
= 0;
182 if (status
& USBPORTSC_CSC
)
183 wPortChange
|= USB_PORT_STAT_C_CONNECTION
;
184 if (status
& USBPORTSC_PEC
)
185 wPortChange
|= USB_PORT_STAT_C_ENABLE
;
186 if (status
& USBPORTSC_OCC
)
187 wPortChange
|= USB_PORT_STAT_C_OVERCURRENT
;
189 if (test_bit(port
, &uhci
->port_c_suspend
)) {
190 wPortChange
|= USB_PORT_STAT_C_SUSPEND
;
193 if (test_bit(port
, &uhci
->suspended_ports
))
195 if (test_bit(port
, &uhci
->resuming_ports
))
198 /* UHCI has no power switching (always on) */
199 wPortStatus
= USB_PORT_STAT_POWER
;
200 if (status
& USBPORTSC_CCS
)
201 wPortStatus
|= USB_PORT_STAT_CONNECTION
;
202 if (status
& USBPORTSC_PE
) {
203 wPortStatus
|= USB_PORT_STAT_ENABLE
;
204 if (status
& (USBPORTSC_SUSP
| USBPORTSC_RD
))
205 wPortStatus
|= USB_PORT_STAT_SUSPEND
;
207 if (status
& USBPORTSC_OC
)
208 wPortStatus
|= USB_PORT_STAT_OVERCURRENT
;
209 if (status
& USBPORTSC_PR
)
210 wPortStatus
|= USB_PORT_STAT_RESET
;
211 if (status
& USBPORTSC_LSDA
)
212 wPortStatus
|= USB_PORT_STAT_LOW_SPEED
;
215 dev_dbg(uhci_dev(uhci
), "port %d portsc %04x,%02x\n",
216 wIndex
, status
, lstatus
);
218 *(__le16
*)buf
= cpu_to_le16(wPortStatus
);
219 *(__le16
*)(buf
+ 2) = cpu_to_le16(wPortChange
);
221 case SetHubFeature
: /* We don't implement these */
222 case ClearHubFeature
:
224 case C_HUB_OVER_CURRENT
:
225 case C_HUB_LOCAL_POWER
:
232 if (port
>= uhci
->rh_numports
)
236 case USB_PORT_FEAT_SUSPEND
:
237 set_bit(port
, &uhci
->suspended_ports
);
238 SET_RH_PORTSTAT(USBPORTSC_SUSP
);
240 case USB_PORT_FEAT_RESET
:
241 SET_RH_PORTSTAT(USBPORTSC_PR
);
243 /* Reset terminates Resume signalling */
244 uhci_finish_suspend(uhci
, port
, port_addr
);
246 /* USB v2.0 7.1.7.5 */
247 uhci
->ports_timeout
= jiffies
+ msecs_to_jiffies(50);
249 case USB_PORT_FEAT_POWER
:
250 /* UHCI has no power switching */
256 case ClearPortFeature
:
257 if (port
>= uhci
->rh_numports
)
261 case USB_PORT_FEAT_ENABLE
:
262 CLR_RH_PORTSTAT(USBPORTSC_PE
);
264 /* Disable terminates Resume signalling */
265 uhci_finish_suspend(uhci
, port
, port_addr
);
267 case USB_PORT_FEAT_C_ENABLE
:
268 CLR_RH_PORTSTAT(USBPORTSC_PEC
);
270 case USB_PORT_FEAT_SUSPEND
:
271 if (test_bit(port
, &uhci
->suspended_ports
) &&
272 !test_and_set_bit(port
,
273 &uhci
->resuming_ports
)) {
274 SET_RH_PORTSTAT(USBPORTSC_RD
);
276 /* The controller won't allow RD to be set
277 * if the port is disabled. When this happens
278 * just skip the Resume signalling.
280 if (!(inw(port_addr
) & USBPORTSC_RD
))
281 uhci_finish_suspend(uhci
, port
,
284 /* USB v2.0 7.1.7.7 */
285 uhci
->ports_timeout
= jiffies
+
286 msecs_to_jiffies(20);
289 case USB_PORT_FEAT_C_SUSPEND
:
290 clear_bit(port
, &uhci
->port_c_suspend
);
292 case USB_PORT_FEAT_POWER
:
293 /* UHCI has no power switching */
295 case USB_PORT_FEAT_C_CONNECTION
:
296 CLR_RH_PORTSTAT(USBPORTSC_CSC
);
298 case USB_PORT_FEAT_C_OVER_CURRENT
:
299 CLR_RH_PORTSTAT(USBPORTSC_OCC
);
301 case USB_PORT_FEAT_C_RESET
:
302 /* this driver won't report these */
308 case GetHubDescriptor
:
309 len
= min_t(unsigned int, sizeof(root_hub_hub_des
), wLength
);
310 memcpy(buf
, root_hub_hub_des
, len
);
312 buf
[2] = uhci
->rh_numports
;
318 spin_unlock_irqrestore(&uhci
->lock
, flags
);