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v2.6.22.24-op1
[linux-2.6.22.y-op.git] / drivers / scsi / lpfc / lpfc_mbox.c
blob8041c3f06f7b466483c4ec61d256adc49c2b6d6c
1 /*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
3 * Fibre Channel Host Bus Adapters. *
4 * Copyright (C) 2004-2007 Emulex. All rights reserved. *
5 * EMULEX and SLI are trademarks of Emulex. *
6 * www.emulex.com *
7 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
8 * *
9 * This program is free software; you can redistribute it and/or *
10 * modify it under the terms of version 2 of the GNU General *
11 * Public License as published by the Free Software Foundation. *
12 * This program is distributed in the hope that it will be useful. *
13 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
14 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
15 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
16 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
17 * TO BE LEGALLY INVALID. See the GNU General Public License for *
18 * more details, a copy of which can be found in the file COPYING *
19 * included with this package. *
20 *******************************************************************/
21
22 #include <linux/blkdev.h>
23 #include <linux/pci.h>
24 #include <linux/interrupt.h>
25
26 #include <scsi/scsi_device.h>
27 #include <scsi/scsi_transport_fc.h>
28
29 #include <scsi/scsi.h>
30
31 #include "lpfc_hw.h"
32 #include "lpfc_sli.h"
33 #include "lpfc_disc.h"
34 #include "lpfc_scsi.h"
35 #include "lpfc.h"
36 #include "lpfc_logmsg.h"
37 #include "lpfc_crtn.h"
38 #include "lpfc_compat.h"
39
40 /**********************************************/
41
42 /* mailbox command */
43 /**********************************************/
44 void
45 lpfc_dump_mem(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb, uint16_t offset)
46 {
47 MAILBOX_t *mb;
48 void *ctx;
49
50 mb = &pmb->mb;
51 ctx = pmb->context2;
52
53 /* Setup to dump VPD region */
54 memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
55 mb->mbxCommand = MBX_DUMP_MEMORY;
56 mb->un.varDmp.cv = 1;
57 mb->un.varDmp.type = DMP_NV_PARAMS;
58 mb->un.varDmp.entry_index = offset;
59 mb->un.varDmp.region_id = DMP_REGION_VPD;
60 mb->un.varDmp.word_cnt = (DMP_RSP_SIZE / sizeof (uint32_t));
61 mb->un.varDmp.co = 0;
62 mb->un.varDmp.resp_offset = 0;
63 pmb->context2 = ctx;
64 mb->mbxOwner = OWN_HOST;
65 return;
66 }
67
68 /**********************************************/
69 /* lpfc_read_nv Issue a READ NVPARAM */
70 /* mailbox command */
71 /**********************************************/
72 void
73 lpfc_read_nv(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
74 {
75 MAILBOX_t *mb;
76
77 mb = &pmb->mb;
78 memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
79 mb->mbxCommand = MBX_READ_NV;
80 mb->mbxOwner = OWN_HOST;
81 return;
82 }
83
84 /**********************************************/
85 /* lpfc_read_la Issue a READ LA */
86 /* mailbox command */
87 /**********************************************/
88 int
89 lpfc_read_la(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb, struct lpfc_dmabuf *mp)
90 {
91 MAILBOX_t *mb;
92 struct lpfc_sli *psli;
93
94 psli = &phba->sli;
95 mb = &pmb->mb;
96 memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
97
98 INIT_LIST_HEAD(&mp->list);
99 mb->mbxCommand = MBX_READ_LA64;
100 mb->un.varReadLA.un.lilpBde64.tus.f.bdeSize = 128;
101 mb->un.varReadLA.un.lilpBde64.addrHigh = putPaddrHigh(mp->phys);
102 mb->un.varReadLA.un.lilpBde64.addrLow = putPaddrLow(mp->phys);
103
104 /* Save address for later completion and set the owner to host so that
105 * the FW knows this mailbox is available for processing.
106 */
107 pmb->context1 = (uint8_t *) mp;
108 mb->mbxOwner = OWN_HOST;
109 return (0);
110 }
111
112 /**********************************************/
113 /* lpfc_clear_la Issue a CLEAR LA */
114 /* mailbox command */
115 /**********************************************/
116 void
117 lpfc_clear_la(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
118 {
119 MAILBOX_t *mb;
120
121 mb = &pmb->mb;
122 memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
123
124 mb->un.varClearLA.eventTag = phba->fc_eventTag;
125 mb->mbxCommand = MBX_CLEAR_LA;
126 mb->mbxOwner = OWN_HOST;
127 return;
128 }
129
130 /**************************************************/
131 /* lpfc_config_link Issue a CONFIG LINK */
132 /* mailbox command */
133 /**************************************************/
134 void
135 lpfc_config_link(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
136 {
137 MAILBOX_t *mb = &pmb->mb;
138 memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
139
140 /* NEW_FEATURE
141 * SLI-2, Coalescing Response Feature.
142 */
143 if (phba->cfg_cr_delay) {
144 mb->un.varCfgLnk.cr = 1;
145 mb->un.varCfgLnk.ci = 1;
146 mb->un.varCfgLnk.cr_delay = phba->cfg_cr_delay;
147 mb->un.varCfgLnk.cr_count = phba->cfg_cr_count;
148 }
149
150 mb->un.varCfgLnk.myId = phba->fc_myDID;
151 mb->un.varCfgLnk.edtov = phba->fc_edtov;
152 mb->un.varCfgLnk.arbtov = phba->fc_arbtov;
153 mb->un.varCfgLnk.ratov = phba->fc_ratov;
154 mb->un.varCfgLnk.rttov = phba->fc_rttov;
155 mb->un.varCfgLnk.altov = phba->fc_altov;
156 mb->un.varCfgLnk.crtov = phba->fc_crtov;
157 mb->un.varCfgLnk.citov = phba->fc_citov;
158
159 if (phba->cfg_ack0)
160 mb->un.varCfgLnk.ack0_enable = 1;
161
162 mb->mbxCommand = MBX_CONFIG_LINK;
163 mb->mbxOwner = OWN_HOST;
164 return;
165 }
166
167 /**********************************************/
168 /* lpfc_init_link Issue an INIT LINK */
169 /* mailbox command */
170 /**********************************************/
171 void
172 lpfc_init_link(struct lpfc_hba * phba,
173 LPFC_MBOXQ_t * pmb, uint32_t topology, uint32_t linkspeed)
174 {
175 lpfc_vpd_t *vpd;
176 struct lpfc_sli *psli;
177 MAILBOX_t *mb;
178
179 mb = &pmb->mb;
180 memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
181
182 psli = &phba->sli;
183 switch (topology) {
184 case FLAGS_TOPOLOGY_MODE_LOOP_PT:
185 mb->un.varInitLnk.link_flags = FLAGS_TOPOLOGY_MODE_LOOP;
186 mb->un.varInitLnk.link_flags |= FLAGS_TOPOLOGY_FAILOVER;
187 break;
188 case FLAGS_TOPOLOGY_MODE_PT_PT:
189 mb->un.varInitLnk.link_flags = FLAGS_TOPOLOGY_MODE_PT_PT;
190 break;
191 case FLAGS_TOPOLOGY_MODE_LOOP:
192 mb->un.varInitLnk.link_flags = FLAGS_TOPOLOGY_MODE_LOOP;
193 break;
194 case FLAGS_TOPOLOGY_MODE_PT_LOOP:
195 mb->un.varInitLnk.link_flags = FLAGS_TOPOLOGY_MODE_PT_PT;
196 mb->un.varInitLnk.link_flags |= FLAGS_TOPOLOGY_FAILOVER;
197 break;
198 case FLAGS_LOCAL_LB:
199 mb->un.varInitLnk.link_flags = FLAGS_LOCAL_LB;
200 break;
201 }
202
203 /* Enable asynchronous ABTS responses from firmware */
204 mb->un.varInitLnk.link_flags |= FLAGS_IMED_ABORT;
205
206 /* NEW_FEATURE
207 * Setting up the link speed
208 */
209 vpd = &phba->vpd;
210 if (vpd->rev.feaLevelHigh >= 0x02){
211 switch(linkspeed){
212 case LINK_SPEED_1G:
213 case LINK_SPEED_2G:
214 case LINK_SPEED_4G:
215 case LINK_SPEED_8G:
216 mb->un.varInitLnk.link_flags |=
217 FLAGS_LINK_SPEED;
218 mb->un.varInitLnk.link_speed = linkspeed;
219 break;
220 case LINK_SPEED_AUTO:
221 default:
222 mb->un.varInitLnk.link_speed =
223 LINK_SPEED_AUTO;
224 break;
225 }
226
227 }
228 else
229 mb->un.varInitLnk.link_speed = LINK_SPEED_AUTO;
230
231 mb->mbxCommand = (volatile uint8_t)MBX_INIT_LINK;
232 mb->mbxOwner = OWN_HOST;
233 mb->un.varInitLnk.fabric_AL_PA = phba->fc_pref_ALPA;
234 return;
235 }
236
237 /**********************************************/
238 /* lpfc_read_sparam Issue a READ SPARAM */
239 /* mailbox command */
240 /**********************************************/
241 int
242 lpfc_read_sparam(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
243 {
244 struct lpfc_dmabuf *mp;
245 MAILBOX_t *mb;
246 struct lpfc_sli *psli;
247
248 psli = &phba->sli;
249 mb = &pmb->mb;
250 memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
251
252 mb->mbxOwner = OWN_HOST;
253
254 /* Get a buffer to hold the HBAs Service Parameters */
255
256 if (((mp = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL)) == 0) ||
257 ((mp->virt = lpfc_mbuf_alloc(phba, 0, &(mp->phys))) == 0)) {
258 kfree(mp);
259 mb->mbxCommand = MBX_READ_SPARM64;
260 /* READ_SPARAM: no buffers */
261 lpfc_printf_log(phba,
262 KERN_WARNING,
263 LOG_MBOX,
264 "%d:0301 READ_SPARAM: no buffers\n",
265 phba->brd_no);
266 return (1);
267 }
268 INIT_LIST_HEAD(&mp->list);
269 mb->mbxCommand = MBX_READ_SPARM64;
270 mb->un.varRdSparm.un.sp64.tus.f.bdeSize = sizeof (struct serv_parm);
271 mb->un.varRdSparm.un.sp64.addrHigh = putPaddrHigh(mp->phys);
272 mb->un.varRdSparm.un.sp64.addrLow = putPaddrLow(mp->phys);
273
274 /* save address for completion */
275 pmb->context1 = mp;
276
277 return (0);
278 }
279
280 /********************************************/
281 /* lpfc_unreg_did Issue a UNREG_DID */
282 /* mailbox command */
283 /********************************************/
284 void
285 lpfc_unreg_did(struct lpfc_hba * phba, uint32_t did, LPFC_MBOXQ_t * pmb)
286 {
287 MAILBOX_t *mb;
288
289 mb = &pmb->mb;
290 memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
291
292 mb->un.varUnregDID.did = did;
293
294 mb->mbxCommand = MBX_UNREG_D_ID;
295 mb->mbxOwner = OWN_HOST;
296 return;
297 }
298
299 /**********************************************/
300 /* lpfc_read_nv Issue a READ CONFIG */
301 /* mailbox command */
302 /**********************************************/
303 void
304 lpfc_read_config(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
305 {
306 MAILBOX_t *mb;
307
308 mb = &pmb->mb;
309 memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
310
311 mb->mbxCommand = MBX_READ_CONFIG;
312 mb->mbxOwner = OWN_HOST;
313 return;
314 }
315
316 /*************************************************/
317 /* lpfc_read_lnk_stat Issue a READ LINK STATUS */
318 /* mailbox command */
319 /*************************************************/
320 void
321 lpfc_read_lnk_stat(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
322 {
323 MAILBOX_t *mb;
324
325 mb = &pmb->mb;
326 memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
327
328 mb->mbxCommand = MBX_READ_LNK_STAT;
329 mb->mbxOwner = OWN_HOST;
330 return;
331 }
332
333 /********************************************/
334 /* lpfc_reg_login Issue a REG_LOGIN */
335 /* mailbox command */
336 /********************************************/
337 int
338 lpfc_reg_login(struct lpfc_hba * phba,
339 uint32_t did, uint8_t * param, LPFC_MBOXQ_t * pmb, uint32_t flag)
340 {
341 uint8_t *sparam;
342 struct lpfc_dmabuf *mp;
343 MAILBOX_t *mb;
344 struct lpfc_sli *psli;
345
346 psli = &phba->sli;
347 mb = &pmb->mb;
348 memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
349
350 mb->un.varRegLogin.rpi = 0;
351 mb->un.varRegLogin.did = did;
352 mb->un.varWords[30] = flag; /* Set flag to issue action on cmpl */
353
354 mb->mbxOwner = OWN_HOST;
355
356 /* Get a buffer to hold NPorts Service Parameters */
357 if (((mp = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL)) == NULL) ||
358 ((mp->virt = lpfc_mbuf_alloc(phba, 0, &(mp->phys))) == 0)) {
359 kfree(mp);
360 mb->mbxCommand = MBX_REG_LOGIN64;
361 /* REG_LOGIN: no buffers */
362 lpfc_printf_log(phba,
363 KERN_WARNING,
364 LOG_MBOX,
365 "%d:0302 REG_LOGIN: no buffers Data x%x x%x\n",
366 phba->brd_no,
367 (uint32_t) did, (uint32_t) flag);
368 return (1);
369 }
370 INIT_LIST_HEAD(&mp->list);
371 sparam = mp->virt;
372
373 /* Copy param's into a new buffer */
374 memcpy(sparam, param, sizeof (struct serv_parm));
375
376 /* save address for completion */
377 pmb->context1 = (uint8_t *) mp;
378
379 mb->mbxCommand = MBX_REG_LOGIN64;
380 mb->un.varRegLogin.un.sp64.tus.f.bdeSize = sizeof (struct serv_parm);
381 mb->un.varRegLogin.un.sp64.addrHigh = putPaddrHigh(mp->phys);
382 mb->un.varRegLogin.un.sp64.addrLow = putPaddrLow(mp->phys);
383
384 return (0);
385 }
386
387 /**********************************************/
388 /* lpfc_unreg_login Issue a UNREG_LOGIN */
389 /* mailbox command */
390 /**********************************************/
391 void
392 lpfc_unreg_login(struct lpfc_hba * phba, uint32_t rpi, LPFC_MBOXQ_t * pmb)
393 {
394 MAILBOX_t *mb;
395
396 mb = &pmb->mb;
397 memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
398
399 mb->un.varUnregLogin.rpi = (uint16_t) rpi;
400 mb->un.varUnregLogin.rsvd1 = 0;
401
402 mb->mbxCommand = MBX_UNREG_LOGIN;
403 mb->mbxOwner = OWN_HOST;
404 return;
405 }
406
407 static void
408 lpfc_config_pcb_setup(struct lpfc_hba * phba)
409 {
410 struct lpfc_sli *psli = &phba->sli;
411 struct lpfc_sli_ring *pring;
412 PCB_t *pcbp = &phba->slim2p->pcb;
413 dma_addr_t pdma_addr;
414 uint32_t offset;
415 uint32_t iocbCnt;
416 int i;
417
418 pcbp->maxRing = (psli->num_rings - 1);
419
420 iocbCnt = 0;
421 for (i = 0; i < psli->num_rings; i++) {
422 pring = &psli->ring[i];
423 /* A ring MUST have both cmd and rsp entries defined to be
424 valid */
425 if ((pring->numCiocb == 0) || (pring->numRiocb == 0)) {
426 pcbp->rdsc[i].cmdEntries = 0;
427 pcbp->rdsc[i].rspEntries = 0;
428 pcbp->rdsc[i].cmdAddrHigh = 0;
429 pcbp->rdsc[i].rspAddrHigh = 0;
430 pcbp->rdsc[i].cmdAddrLow = 0;
431 pcbp->rdsc[i].rspAddrLow = 0;
432 pring->cmdringaddr = NULL;
433 pring->rspringaddr = NULL;
434 continue;
435 }
436 /* Command ring setup for ring */
437 pring->cmdringaddr =
438 (void *)&phba->slim2p->IOCBs[iocbCnt];
439 pcbp->rdsc[i].cmdEntries = pring->numCiocb;
440
441 offset = (uint8_t *)&phba->slim2p->IOCBs[iocbCnt] -
442 (uint8_t *)phba->slim2p;
443 pdma_addr = phba->slim2p_mapping + offset;
444 pcbp->rdsc[i].cmdAddrHigh = putPaddrHigh(pdma_addr);
445 pcbp->rdsc[i].cmdAddrLow = putPaddrLow(pdma_addr);
446 iocbCnt += pring->numCiocb;
447
448 /* Response ring setup for ring */
449 pring->rspringaddr =
450 (void *)&phba->slim2p->IOCBs[iocbCnt];
451
452 pcbp->rdsc[i].rspEntries = pring->numRiocb;
453 offset = (uint8_t *)&phba->slim2p->IOCBs[iocbCnt] -
454 (uint8_t *)phba->slim2p;
455 pdma_addr = phba->slim2p_mapping + offset;
456 pcbp->rdsc[i].rspAddrHigh = putPaddrHigh(pdma_addr);
457 pcbp->rdsc[i].rspAddrLow = putPaddrLow(pdma_addr);
458 iocbCnt += pring->numRiocb;
459 }
460 }
461
462 void
463 lpfc_read_rev(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
464 {
465 MAILBOX_t *mb;
466
467 mb = &pmb->mb;
468 memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
469 mb->un.varRdRev.cv = 1;
470 mb->mbxCommand = MBX_READ_REV;
471 mb->mbxOwner = OWN_HOST;
472 return;
473 }
474
475 void
476 lpfc_config_ring(struct lpfc_hba * phba, int ring, LPFC_MBOXQ_t * pmb)
477 {
478 int i;
479 MAILBOX_t *mb = &pmb->mb;
480 struct lpfc_sli *psli;
481 struct lpfc_sli_ring *pring;
482
483 memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
484
485 mb->un.varCfgRing.ring = ring;
486 mb->un.varCfgRing.maxOrigXchg = 0;
487 mb->un.varCfgRing.maxRespXchg = 0;
488 mb->un.varCfgRing.recvNotify = 1;
489
490 psli = &phba->sli;
491 pring = &psli->ring[ring];
492 mb->un.varCfgRing.numMask = pring->num_mask;
493 mb->mbxCommand = MBX_CONFIG_RING;
494 mb->mbxOwner = OWN_HOST;
495
496 /* Is this ring configured for a specific profile */
497 if (pring->prt[0].profile) {
498 mb->un.varCfgRing.profile = pring->prt[0].profile;
499 return;
500 }
501
502 /* Otherwise we setup specific rctl / type masks for this ring */
503 for (i = 0; i < pring->num_mask; i++) {
504 mb->un.varCfgRing.rrRegs[i].rval = pring->prt[i].rctl;
505 if (mb->un.varCfgRing.rrRegs[i].rval != FC_ELS_REQ)
506 mb->un.varCfgRing.rrRegs[i].rmask = 0xff;
507 else
508 mb->un.varCfgRing.rrRegs[i].rmask = 0xfe;
509 mb->un.varCfgRing.rrRegs[i].tval = pring->prt[i].type;
510 mb->un.varCfgRing.rrRegs[i].tmask = 0xff;
511 }
512
513 return;
514 }
515
516 void
517 lpfc_config_port(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
518 {
519 MAILBOX_t *mb = &pmb->mb;
520 dma_addr_t pdma_addr;
521 uint32_t bar_low, bar_high;
522 size_t offset;
523 struct lpfc_hgp hgp;
524 void __iomem *to_slim;
525 int i;
526
527 memset(pmb, 0, sizeof(LPFC_MBOXQ_t));
528 mb->mbxCommand = MBX_CONFIG_PORT;
529 mb->mbxOwner = OWN_HOST;
530
531 mb->un.varCfgPort.pcbLen = sizeof(PCB_t);
532
533 offset = (uint8_t *)&phba->slim2p->pcb - (uint8_t *)phba->slim2p;
534 pdma_addr = phba->slim2p_mapping + offset;
535 mb->un.varCfgPort.pcbLow = putPaddrLow(pdma_addr);
536 mb->un.varCfgPort.pcbHigh = putPaddrHigh(pdma_addr);
537
538 /* Now setup pcb */
539 phba->slim2p->pcb.type = TYPE_NATIVE_SLI2;
540 phba->slim2p->pcb.feature = FEATURE_INITIAL_SLI2;
541
542 /* Setup Mailbox pointers */
543 phba->slim2p->pcb.mailBoxSize = sizeof(MAILBOX_t);
544 offset = (uint8_t *)&phba->slim2p->mbx - (uint8_t *)phba->slim2p;
545 pdma_addr = phba->slim2p_mapping + offset;
546 phba->slim2p->pcb.mbAddrHigh = putPaddrHigh(pdma_addr);
547 phba->slim2p->pcb.mbAddrLow = putPaddrLow(pdma_addr);
548
549 /*
550 * Setup Host Group ring pointer.
551 *
552 * For efficiency reasons, the ring get/put pointers can be
553 * placed in adapter memory (SLIM) rather than in host memory.
554 * This allows firmware to avoid PCI reads/writes when updating
555 * and checking pointers.
556 *
557 * The firmware recognizes the use of SLIM memory by comparing
558 * the address of the get/put pointers structure with that of
559 * the SLIM BAR (BAR0).
560 *
561 * Caution: be sure to use the PCI config space value of BAR0/BAR1
562 * (the hardware's view of the base address), not the OS's
563 * value of pci_resource_start() as the OS value may be a cookie
564 * for ioremap/iomap.
565 */
566
567
568 pci_read_config_dword(phba->pcidev, PCI_BASE_ADDRESS_0, &bar_low);
569 pci_read_config_dword(phba->pcidev, PCI_BASE_ADDRESS_1, &bar_high);
570
571
572 /* mask off BAR0's flag bits 0 - 3 */
573 phba->slim2p->pcb.hgpAddrLow = (bar_low & PCI_BASE_ADDRESS_MEM_MASK) +
574 (SLIMOFF*sizeof(uint32_t));
575 if (bar_low & PCI_BASE_ADDRESS_MEM_TYPE_64)
576 phba->slim2p->pcb.hgpAddrHigh = bar_high;
577 else
578 phba->slim2p->pcb.hgpAddrHigh = 0;
579 /* write HGP data to SLIM at the required longword offset */
580 memset(&hgp, 0, sizeof(struct lpfc_hgp));
581 to_slim = phba->MBslimaddr + (SLIMOFF*sizeof (uint32_t));
582
583 for (i=0; i < phba->sli.num_rings; i++) {
584 lpfc_memcpy_to_slim(to_slim, &hgp, sizeof(struct lpfc_hgp));
585 to_slim += sizeof (struct lpfc_hgp);
586 }
587
588 /* Setup Port Group ring pointer */
589 offset = (uint8_t *)&phba->slim2p->mbx.us.s2.port -
590 (uint8_t *)phba->slim2p;
591 pdma_addr = phba->slim2p_mapping + offset;
592 phba->slim2p->pcb.pgpAddrHigh = putPaddrHigh(pdma_addr);
593 phba->slim2p->pcb.pgpAddrLow = putPaddrLow(pdma_addr);
594
595 /* Use callback routine to setp rings in the pcb */
596 lpfc_config_pcb_setup(phba);
597
598 /* special handling for LC HBAs */
599 if (lpfc_is_LC_HBA(phba->pcidev->device)) {
600 uint32_t hbainit[5];
601
602 lpfc_hba_init(phba, hbainit);
603
604 memcpy(&mb->un.varCfgPort.hbainit, hbainit, 20);
605 }
606
607 /* Swap PCB if needed */
608 lpfc_sli_pcimem_bcopy(&phba->slim2p->pcb, &phba->slim2p->pcb,
609 sizeof (PCB_t));
610
611 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
612 "%d:0405 Service Level Interface (SLI) 2 selected\n",
613 phba->brd_no);
614 }
615
616 void
617 lpfc_kill_board(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
618 {
619 MAILBOX_t *mb = &pmb->mb;
620
621 memset(pmb, 0, sizeof(LPFC_MBOXQ_t));
622 mb->mbxCommand = MBX_KILL_BOARD;
623 mb->mbxOwner = OWN_HOST;
624 return;
625 }
626
627 void
628 lpfc_mbox_put(struct lpfc_hba * phba, LPFC_MBOXQ_t * mbq)
629 {
630 struct lpfc_sli *psli;
631
632 psli = &phba->sli;
633
634 list_add_tail(&mbq->list, &psli->mboxq);
635
636 psli->mboxq_cnt++;
637
638 return;
639 }
640
641 LPFC_MBOXQ_t *
642 lpfc_mbox_get(struct lpfc_hba * phba)
643 {
644 LPFC_MBOXQ_t *mbq = NULL;
645 struct lpfc_sli *psli = &phba->sli;
646
647 list_remove_head((&psli->mboxq), mbq, LPFC_MBOXQ_t,
648 list);
649 if (mbq) {
650 psli->mboxq_cnt--;
651 }
652
653 return mbq;
654 }
655
656 int
657 lpfc_mbox_tmo_val(struct lpfc_hba *phba, int cmd)
658 {
659 switch (cmd) {
660 case MBX_WRITE_NV: /* 0x03 */
661 case MBX_UPDATE_CFG: /* 0x1B */
662 case MBX_DOWN_LOAD: /* 0x1C */
663 case MBX_DEL_LD_ENTRY: /* 0x1D */
664 case MBX_LOAD_AREA: /* 0x81 */
665 case MBX_FLASH_WR_ULA: /* 0x98 */
666 case MBX_LOAD_EXP_ROM: /* 0x9C */
667 return LPFC_MBOX_TMO_FLASH_CMD;
668 }
669 return LPFC_MBOX_TMO;
670 }
linux v2.6.22.y-op