2 * Copyright (c) 2006 QLogic, Inc. All rights reserved.
3 * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the
9 * OpenIB.org BSD license below:
11 * Redistribution and use in source and binary forms, with or
12 * without modification, are permitted provided that the following
15 * - Redistributions of source code must retain the above
16 * copyright notice, this list of conditions and the following
19 * - Redistributions in binary form must reproduce the above
20 * copyright notice, this list of conditions and the following
21 * disclaimer in the documentation and/or other materials
22 * provided with the distribution.
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
34 #include <linux/pci.h>
36 #include "ipath_kernel.h"
37 #include "ipath_verbs.h"
38 #include "ipath_common.h"
41 * clear (write) a pio buffer, to clear a parity error. This routine
42 * should only be called when in freeze mode, and the buffer should be
43 * canceled afterwards.
45 static void ipath_clrpiobuf(struct ipath_devdata
*dd
, u32 pnum
)
48 u32 dwcnt
; /* dword count to write */
49 if (pnum
< dd
->ipath_piobcnt2k
) {
50 pbuf
= (u32 __iomem
*) (dd
->ipath_pio2kbase
+ pnum
*
52 dwcnt
= dd
->ipath_piosize2k
>> 2;
55 pbuf
= (u32 __iomem
*) (dd
->ipath_pio4kbase
+
56 (pnum
- dd
->ipath_piobcnt2k
) * dd
->ipath_4kalign
);
57 dwcnt
= dd
->ipath_piosize4k
>> 2;
59 dev_info(&dd
->pcidev
->dev
,
60 "Rewrite PIO buffer %u, to recover from parity error\n",
62 *pbuf
= dwcnt
+1; /* no flush required, since already in freeze */
68 * Called when we might have an error that is specific to a particular
69 * PIO buffer, and may need to cancel that buffer, so it can be re-used.
70 * If rewrite is true, and bits are set in the sendbufferror registers,
71 * we'll write to the buffer, for error recovery on parity errors.
73 void ipath_disarm_senderrbufs(struct ipath_devdata
*dd
, int rewrite
)
76 unsigned long sbuf
[4];
78 * it's possible that sendbuffererror could have bits set; might
79 * have already done this as a result of hardware error handling
81 piobcnt
= dd
->ipath_piobcnt2k
+ dd
->ipath_piobcnt4k
;
82 /* read these before writing errorclear */
83 sbuf
[0] = ipath_read_kreg64(
84 dd
, dd
->ipath_kregs
->kr_sendbuffererror
);
85 sbuf
[1] = ipath_read_kreg64(
86 dd
, dd
->ipath_kregs
->kr_sendbuffererror
+ 1);
88 sbuf
[2] = ipath_read_kreg64(
89 dd
, dd
->ipath_kregs
->kr_sendbuffererror
+ 2);
90 sbuf
[3] = ipath_read_kreg64(
91 dd
, dd
->ipath_kregs
->kr_sendbuffererror
+ 3);
94 if (sbuf
[0] || sbuf
[1] || (piobcnt
> 128 && (sbuf
[2] || sbuf
[3]))) {
96 if (ipath_debug
& (__IPATH_PKTDBG
|__IPATH_DBG
)) {
97 __IPATH_DBG_WHICH(__IPATH_PKTDBG
|__IPATH_DBG
,
98 "SendbufErrs %lx %lx", sbuf
[0],
100 if (ipath_debug
& __IPATH_PKTDBG
&& piobcnt
> 128)
101 printk(" %lx %lx ", sbuf
[2], sbuf
[3]);
105 for (i
= 0; i
< piobcnt
; i
++)
106 if (test_bit(i
, sbuf
)) {
108 ipath_clrpiobuf(dd
, i
);
109 ipath_disarm_piobufs(dd
, i
, 1);
111 dd
->ipath_lastcancel
= jiffies
+3; /* no armlaunch for a bit */
116 /* These are all rcv-related errors which we want to count for stats */
117 #define E_SUM_PKTERRS \
118 (INFINIPATH_E_RHDRLEN | INFINIPATH_E_RBADTID | \
119 INFINIPATH_E_RBADVERSION | INFINIPATH_E_RHDR | \
120 INFINIPATH_E_RLONGPKTLEN | INFINIPATH_E_RSHORTPKTLEN | \
121 INFINIPATH_E_RMAXPKTLEN | INFINIPATH_E_RMINPKTLEN | \
122 INFINIPATH_E_RFORMATERR | INFINIPATH_E_RUNSUPVL | \
123 INFINIPATH_E_RUNEXPCHAR | INFINIPATH_E_REBP)
125 /* These are all send-related errors which we want to count for stats */
127 (INFINIPATH_E_SPIOARMLAUNCH | INFINIPATH_E_SUNEXPERRPKTNUM | \
128 INFINIPATH_E_SDROPPEDDATAPKT | INFINIPATH_E_SDROPPEDSMPPKT | \
129 INFINIPATH_E_SMAXPKTLEN | INFINIPATH_E_SUNSUPVL | \
130 INFINIPATH_E_SMINPKTLEN | INFINIPATH_E_SPKTLEN | \
131 INFINIPATH_E_INVALIDADDR)
134 * these are errors that can occur when the link changes state while
135 * a packet is being sent or received. This doesn't cover things
136 * like EBP or VCRC that can be the result of a sending having the
137 * link change state, so we receive a "known bad" packet.
139 #define E_SUM_LINK_PKTERRS \
140 (INFINIPATH_E_SDROPPEDDATAPKT | INFINIPATH_E_SDROPPEDSMPPKT | \
141 INFINIPATH_E_SMINPKTLEN | INFINIPATH_E_SPKTLEN | \
142 INFINIPATH_E_RSHORTPKTLEN | INFINIPATH_E_RMINPKTLEN | \
143 INFINIPATH_E_RUNEXPCHAR)
145 static u64
handle_e_sum_errs(struct ipath_devdata
*dd
, ipath_err_t errs
)
147 u64 ignore_this_time
= 0;
149 ipath_disarm_senderrbufs(dd
, 0);
150 if ((errs
& E_SUM_LINK_PKTERRS
) &&
151 !(dd
->ipath_flags
& IPATH_LINKACTIVE
)) {
153 * This can happen when SMA is trying to bring the link
154 * up, but the IB link changes state at the "wrong" time.
155 * The IB logic then complains that the packet isn't
156 * valid. We don't want to confuse people, so we just
157 * don't print them, except at debug
159 ipath_dbg("Ignoring packet errors %llx, because link not "
160 "ACTIVE\n", (unsigned long long) errs
);
161 ignore_this_time
= errs
& E_SUM_LINK_PKTERRS
;
164 return ignore_this_time
;
167 /* generic hw error messages... */
168 #define INFINIPATH_HWE_TXEMEMPARITYERR_MSG(a) \
170 .mask = ( INFINIPATH_HWE_TXEMEMPARITYERR_##a << \
171 INFINIPATH_HWE_TXEMEMPARITYERR_SHIFT ), \
172 .msg = "TXE " #a " Memory Parity" \
174 #define INFINIPATH_HWE_RXEMEMPARITYERR_MSG(a) \
176 .mask = ( INFINIPATH_HWE_RXEMEMPARITYERR_##a << \
177 INFINIPATH_HWE_RXEMEMPARITYERR_SHIFT ), \
178 .msg = "RXE " #a " Memory Parity" \
181 static const struct ipath_hwerror_msgs ipath_generic_hwerror_msgs
[] = {
182 INFINIPATH_HWE_MSG(IBCBUSFRSPCPARITYERR
, "IPATH2IB Parity"),
183 INFINIPATH_HWE_MSG(IBCBUSTOSPCPARITYERR
, "IB2IPATH Parity"),
185 INFINIPATH_HWE_TXEMEMPARITYERR_MSG(PIOBUF
),
186 INFINIPATH_HWE_TXEMEMPARITYERR_MSG(PIOPBC
),
187 INFINIPATH_HWE_TXEMEMPARITYERR_MSG(PIOLAUNCHFIFO
),
189 INFINIPATH_HWE_RXEMEMPARITYERR_MSG(RCVBUF
),
190 INFINIPATH_HWE_RXEMEMPARITYERR_MSG(LOOKUPQ
),
191 INFINIPATH_HWE_RXEMEMPARITYERR_MSG(EAGERTID
),
192 INFINIPATH_HWE_RXEMEMPARITYERR_MSG(EXPTID
),
193 INFINIPATH_HWE_RXEMEMPARITYERR_MSG(FLAGBUF
),
194 INFINIPATH_HWE_RXEMEMPARITYERR_MSG(DATAINFO
),
195 INFINIPATH_HWE_RXEMEMPARITYERR_MSG(HDRINFO
),
199 * ipath_format_hwmsg - format a single hwerror message
200 * @msg message buffer
201 * @msgl length of message buffer
202 * @hwmsg message to add to message buffer
204 static void ipath_format_hwmsg(char *msg
, size_t msgl
, const char *hwmsg
)
206 strlcat(msg
, "[", msgl
);
207 strlcat(msg
, hwmsg
, msgl
);
208 strlcat(msg
, "]", msgl
);
212 * ipath_format_hwerrors - format hardware error messages for display
213 * @hwerrs hardware errors bit vector
214 * @hwerrmsgs hardware error descriptions
215 * @nhwerrmsgs number of hwerrmsgs
216 * @msg message buffer
217 * @msgl message buffer length
219 void ipath_format_hwerrors(u64 hwerrs
,
220 const struct ipath_hwerror_msgs
*hwerrmsgs
,
222 char *msg
, size_t msgl
)
226 sizeof(ipath_generic_hwerror_msgs
) /
227 sizeof(ipath_generic_hwerror_msgs
[0]);
229 for (i
=0; i
<glen
; i
++) {
230 if (hwerrs
& ipath_generic_hwerror_msgs
[i
].mask
) {
231 ipath_format_hwmsg(msg
, msgl
,
232 ipath_generic_hwerror_msgs
[i
].msg
);
236 for (i
=0; i
<nhwerrmsgs
; i
++) {
237 if (hwerrs
& hwerrmsgs
[i
].mask
) {
238 ipath_format_hwmsg(msg
, msgl
, hwerrmsgs
[i
].msg
);
243 /* return the strings for the most common link states */
244 static char *ib_linkstate(u32 linkstate
)
249 case IPATH_IBSTATE_INIT
:
252 case IPATH_IBSTATE_ARM
:
255 case IPATH_IBSTATE_ACTIVE
:
265 static void handle_e_ibstatuschanged(struct ipath_devdata
*dd
,
266 ipath_err_t errs
, int noprint
)
272 * even if diags are enabled, we want to notice LINKINIT, etc.
273 * We just don't want to change the LED state, or
274 * dd->ipath_kregs->kr_ibcctrl
276 val
= ipath_read_kreg64(dd
, dd
->ipath_kregs
->kr_ibcstatus
);
277 lstate
= val
& IPATH_IBSTATE_MASK
;
280 * this is confusing enough when it happens that I want to always put it
281 * on the console and in the logs. If it was a requested state change,
282 * we'll have already cleared the flags, so we won't print this warning
284 if ((lstate
!= IPATH_IBSTATE_ARM
&& lstate
!= IPATH_IBSTATE_ACTIVE
)
285 && (dd
->ipath_flags
& (IPATH_LINKARMED
| IPATH_LINKACTIVE
))) {
286 dev_info(&dd
->pcidev
->dev
, "Link state changed from %s to %s\n",
287 (dd
->ipath_flags
& IPATH_LINKARMED
) ? "ARM" : "ACTIVE",
288 ib_linkstate(lstate
));
290 * Flush all queued sends when link went to DOWN or INIT,
291 * to be sure that they don't block SMA and other MAD packets
293 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_sendctrl
,
295 ipath_disarm_piobufs(dd
, dd
->ipath_lastport_piobuf
,
296 (unsigned)(dd
->ipath_piobcnt2k
+
297 dd
->ipath_piobcnt4k
) -
298 dd
->ipath_lastport_piobuf
);
300 else if (lstate
== IPATH_IBSTATE_INIT
|| lstate
== IPATH_IBSTATE_ARM
||
301 lstate
== IPATH_IBSTATE_ACTIVE
) {
303 * only print at SMA if there is a change, debug if not
304 * (sometimes we want to know that, usually not).
306 if (lstate
== ((unsigned) dd
->ipath_lastibcstat
307 & IPATH_IBSTATE_MASK
)) {
308 ipath_dbg("Status change intr but no change (%s)\n",
309 ib_linkstate(lstate
));
312 ipath_cdbg(VERBOSE
, "Unit %u link state %s, last "
313 "was %s\n", dd
->ipath_unit
,
314 ib_linkstate(lstate
),
315 ib_linkstate((unsigned)
316 dd
->ipath_lastibcstat
317 & IPATH_IBSTATE_MASK
));
320 lstate
= dd
->ipath_lastibcstat
& IPATH_IBSTATE_MASK
;
321 if (lstate
== IPATH_IBSTATE_INIT
||
322 lstate
== IPATH_IBSTATE_ARM
||
323 lstate
== IPATH_IBSTATE_ACTIVE
)
324 ipath_cdbg(VERBOSE
, "Unit %u link state down"
325 " (state 0x%x), from %s\n",
327 (u32
)val
& IPATH_IBSTATE_MASK
,
328 ib_linkstate(lstate
));
330 ipath_cdbg(VERBOSE
, "Unit %u link state changed "
331 "to 0x%x from down (%x)\n",
332 dd
->ipath_unit
, (u32
) val
, lstate
);
334 ltstate
= (val
>> INFINIPATH_IBCS_LINKTRAININGSTATE_SHIFT
) &
335 INFINIPATH_IBCS_LINKTRAININGSTATE_MASK
;
336 lstate
= (val
>> INFINIPATH_IBCS_LINKSTATE_SHIFT
) &
337 INFINIPATH_IBCS_LINKSTATE_MASK
;
339 if (ltstate
== INFINIPATH_IBCS_LT_STATE_POLLACTIVE
||
340 ltstate
== INFINIPATH_IBCS_LT_STATE_POLLQUIET
) {
344 * Ignore cycling back and forth from Polling.Active
345 * to Polling.Quiet while waiting for the other end of
346 * the link to come up. We will cycle back and forth
347 * between them if no cable is plugged in,
348 * the other device is powered off or disabled, etc.
350 last_ltstate
= (dd
->ipath_lastibcstat
>>
351 INFINIPATH_IBCS_LINKTRAININGSTATE_SHIFT
)
352 & INFINIPATH_IBCS_LINKTRAININGSTATE_MASK
;
353 if (last_ltstate
== INFINIPATH_IBCS_LT_STATE_POLLACTIVE
355 INFINIPATH_IBCS_LT_STATE_POLLQUIET
) {
356 if (dd
->ipath_ibpollcnt
> 40) {
357 dd
->ipath_flags
|= IPATH_NOCABLE
;
358 *dd
->ipath_statusp
|=
359 IPATH_STATUS_IB_NOCABLE
;
361 dd
->ipath_ibpollcnt
++;
365 dd
->ipath_ibpollcnt
= 0; /* some state other than 2 or 3 */
366 ipath_stats
.sps_iblink
++;
367 if (ltstate
!= INFINIPATH_IBCS_LT_STATE_LINKUP
) {
368 dd
->ipath_flags
|= IPATH_LINKDOWN
;
369 dd
->ipath_flags
&= ~(IPATH_LINKUNK
| IPATH_LINKINIT
372 *dd
->ipath_statusp
&= ~IPATH_STATUS_IB_READY
;
373 dd
->ipath_lli_counter
= 0;
375 if (((dd
->ipath_lastibcstat
>>
376 INFINIPATH_IBCS_LINKSTATE_SHIFT
) &
377 INFINIPATH_IBCS_LINKSTATE_MASK
)
378 == INFINIPATH_IBCS_L_STATE_ACTIVE
)
379 /* if from up to down be more vocal */
381 "Unit %u link now down (%s)\n",
383 ipath_ibcstatus_str
[ltstate
]);
385 ipath_cdbg(VERBOSE
, "Unit %u link is "
386 "down (%s)\n", dd
->ipath_unit
,
387 ipath_ibcstatus_str
[ltstate
]);
390 dd
->ipath_f_setextled(dd
, lstate
, ltstate
);
391 } else if ((val
& IPATH_IBSTATE_MASK
) == IPATH_IBSTATE_ACTIVE
) {
392 dd
->ipath_flags
|= IPATH_LINKACTIVE
;
394 ~(IPATH_LINKUNK
| IPATH_LINKINIT
| IPATH_LINKDOWN
|
395 IPATH_LINKARMED
| IPATH_NOCABLE
);
396 *dd
->ipath_statusp
&= ~IPATH_STATUS_IB_NOCABLE
;
397 *dd
->ipath_statusp
|=
398 IPATH_STATUS_IB_READY
| IPATH_STATUS_IB_CONF
;
399 dd
->ipath_f_setextled(dd
, lstate
, ltstate
);
400 } else if ((val
& IPATH_IBSTATE_MASK
) == IPATH_IBSTATE_INIT
) {
402 * set INIT and DOWN. Down is checked by most of the other
403 * code, but INIT is useful to know in a few places.
405 dd
->ipath_flags
|= IPATH_LINKINIT
| IPATH_LINKDOWN
;
407 ~(IPATH_LINKUNK
| IPATH_LINKACTIVE
| IPATH_LINKARMED
409 *dd
->ipath_statusp
&= ~(IPATH_STATUS_IB_NOCABLE
410 | IPATH_STATUS_IB_READY
);
411 dd
->ipath_f_setextled(dd
, lstate
, ltstate
);
412 } else if ((val
& IPATH_IBSTATE_MASK
) == IPATH_IBSTATE_ARM
) {
413 dd
->ipath_flags
|= IPATH_LINKARMED
;
415 ~(IPATH_LINKUNK
| IPATH_LINKDOWN
| IPATH_LINKINIT
|
416 IPATH_LINKACTIVE
| IPATH_NOCABLE
);
417 *dd
->ipath_statusp
&= ~(IPATH_STATUS_IB_NOCABLE
418 | IPATH_STATUS_IB_READY
);
419 dd
->ipath_f_setextled(dd
, lstate
, ltstate
);
422 ipath_dbg("IBstatuschange unit %u: %s (%x)\n",
424 ipath_ibcstatus_str
[ltstate
], ltstate
);
427 dd
->ipath_lastibcstat
= val
;
430 static void handle_supp_msgs(struct ipath_devdata
*dd
,
431 unsigned supp_msgs
, char msg
[512])
434 * Print the message unless it's ibc status change only, which
435 * happens so often we never want to count it.
437 if (dd
->ipath_lasterror
& ~INFINIPATH_E_IBSTATUSCHANGED
) {
439 iserr
= ipath_decode_err(msg
, sizeof msg
,
440 dd
->ipath_lasterror
&
441 ~INFINIPATH_E_IBSTATUSCHANGED
);
442 if (dd
->ipath_lasterror
&
443 ~(INFINIPATH_E_RRCVEGRFULL
|
444 INFINIPATH_E_RRCVHDRFULL
| INFINIPATH_E_PKTERRS
))
445 ipath_dev_err(dd
, "Suppressed %u messages for "
446 "fast-repeating errors (%s) (%llx)\n",
449 dd
->ipath_lasterror
);
452 * rcvegrfull and rcvhdrqfull are "normal", for some
453 * types of processes (mostly benchmarks) that send
454 * huge numbers of messages, while not processing
455 * them. So only complain about these at debug
459 ipath_dbg("Suppressed %u messages for %s\n",
463 "Suppressed %u messages for %s\n",
469 static unsigned handle_frequent_errors(struct ipath_devdata
*dd
,
470 ipath_err_t errs
, char msg
[512],
474 static unsigned long nextmsg_time
;
475 static unsigned nmsgs
, supp_msgs
;
478 * Throttle back "fast" messages to no more than 10 per 5 seconds.
479 * This isn't perfect, but it's a reasonable heuristic. If we get
480 * more than 10, give a 6x longer delay.
484 if (time_before(nc
, nextmsg_time
)) {
487 nextmsg_time
= nc
+ HZ
* 3;
489 else if (supp_msgs
) {
490 handle_supp_msgs(dd
, supp_msgs
, msg
);
495 else if (!nmsgs
++ || time_after(nc
, nextmsg_time
))
496 nextmsg_time
= nc
+ HZ
/ 2;
501 static int handle_errors(struct ipath_devdata
*dd
, ipath_err_t errs
)
504 u64 ignore_this_time
= 0;
506 int chkerrpkts
= 0, noprint
= 0;
509 supp_msgs
= handle_frequent_errors(dd
, errs
, msg
, &noprint
);
512 * don't report errors that are masked (includes those always
515 errs
&= ~dd
->ipath_maskederrs
;
517 /* do these first, they are most important */
518 if (errs
& INFINIPATH_E_HARDWARE
) {
519 /* reuse same msg buf */
520 dd
->ipath_f_handle_hwerrors(dd
, msg
, sizeof msg
);
523 if (!noprint
&& (errs
& ~dd
->ipath_e_bitsextant
))
524 ipath_dev_err(dd
, "error interrupt with unknown errors "
525 "%llx set\n", (unsigned long long)
526 (errs
& ~dd
->ipath_e_bitsextant
));
528 if (errs
& E_SUM_ERRS
)
529 ignore_this_time
= handle_e_sum_errs(dd
, errs
);
530 else if ((errs
& E_SUM_LINK_PKTERRS
) &&
531 !(dd
->ipath_flags
& IPATH_LINKACTIVE
)) {
533 * This can happen when SMA is trying to bring the link
534 * up, but the IB link changes state at the "wrong" time.
535 * The IB logic then complains that the packet isn't
536 * valid. We don't want to confuse people, so we just
537 * don't print them, except at debug
539 ipath_dbg("Ignoring packet errors %llx, because link not "
540 "ACTIVE\n", (unsigned long long) errs
);
541 ignore_this_time
= errs
& E_SUM_LINK_PKTERRS
;
544 if (supp_msgs
== 250000) {
547 * It's not entirely reasonable assuming that the errors set
548 * in the last clear period are all responsible for the
549 * problem, but the alternative is to assume it's the only
550 * ones on this particular interrupt, which also isn't great
552 dd
->ipath_maskederrs
|= dd
->ipath_lasterror
| errs
;
553 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_errormask
,
554 ~dd
->ipath_maskederrs
);
555 s_iserr
= ipath_decode_err(msg
, sizeof msg
,
556 (dd
->ipath_maskederrs
& ~dd
->
559 if ((dd
->ipath_maskederrs
& ~dd
->ipath_ignorederrs
) &
560 ~(INFINIPATH_E_RRCVEGRFULL
|
561 INFINIPATH_E_RRCVHDRFULL
| INFINIPATH_E_PKTERRS
))
562 ipath_dev_err(dd
, "Temporarily disabling "
563 "error(s) %llx reporting; too frequent (%s)\n",
564 (unsigned long long) (dd
->ipath_maskederrs
&
565 ~dd
->ipath_ignorederrs
), msg
);
568 * rcvegrfull and rcvhdrqfull are "normal",
569 * for some types of processes (mostly benchmarks)
570 * that send huge numbers of messages, while not
571 * processing them. So only complain about
572 * these at debug level.
575 ipath_dbg("Temporarily disabling reporting "
576 "too frequent queue full errors (%s)\n",
580 "Temporarily disabling reporting too"
581 " frequent packet errors (%s)\n",
586 * Re-enable the masked errors after around 3 minutes. in
587 * ipath_get_faststats(). If we have a series of fast
588 * repeating but different errors, the interval will keep
589 * stretching out, but that's OK, as that's pretty
592 dd
->ipath_unmasktime
= jiffies
+ HZ
* 180;
595 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_errorclear
, errs
);
596 if (ignore_this_time
)
597 errs
&= ~ignore_this_time
;
598 if (errs
& ~dd
->ipath_lasterror
) {
599 errs
&= ~dd
->ipath_lasterror
;
600 /* never suppress duplicate hwerrors or ibstatuschange */
601 dd
->ipath_lasterror
|= errs
&
602 ~(INFINIPATH_E_HARDWARE
|
603 INFINIPATH_E_IBSTATUSCHANGED
);
606 /* likely due to cancel, so suppress */
607 if ((errs
& (INFINIPATH_E_SPKTLEN
| INFINIPATH_E_SPIOARMLAUNCH
)) &&
608 dd
->ipath_lastcancel
> jiffies
) {
609 ipath_dbg("Suppressed armlaunch/spktlen after error send cancel\n");
610 errs
&= ~(INFINIPATH_E_SPIOARMLAUNCH
| INFINIPATH_E_SPKTLEN
);
618 * the ones we mask off are handled specially below or above
620 ipath_decode_err(msg
, sizeof msg
,
621 errs
& ~(INFINIPATH_E_IBSTATUSCHANGED
|
622 INFINIPATH_E_RRCVEGRFULL
|
623 INFINIPATH_E_RRCVHDRFULL
|
624 INFINIPATH_E_HARDWARE
));
626 /* so we don't need if (!noprint) at strlcat's below */
629 if (errs
& E_SUM_PKTERRS
) {
630 ipath_stats
.sps_pkterrs
++;
633 if (errs
& E_SUM_ERRS
)
634 ipath_stats
.sps_errs
++;
636 if (errs
& (INFINIPATH_E_RICRC
| INFINIPATH_E_RVCRC
)) {
637 ipath_stats
.sps_crcerrs
++;
640 iserr
= errs
& ~(E_SUM_PKTERRS
| INFINIPATH_E_PKTERRS
);
644 * We don't want to print these two as they happen, or we can make
645 * the situation even worse, because it takes so long to print
646 * messages to serial consoles. Kernel ports get printed from
647 * fast_stats, no more than every 5 seconds, user ports get printed
650 if (errs
& INFINIPATH_E_RRCVHDRFULL
) {
652 ipath_stats
.sps_hdrqfull
++;
653 for (i
= 0; i
< dd
->ipath_cfgports
; i
++) {
654 struct ipath_portdata
*pd
= dd
->ipath_pd
[i
];
656 hd
= dd
->ipath_port0head
;
657 tl
= (u32
) le64_to_cpu(
658 *dd
->ipath_hdrqtailptr
);
659 } else if (pd
&& pd
->port_cnt
&&
660 pd
->port_rcvhdrtail_kvaddr
) {
662 * don't report same point multiple times,
665 tl
= *(u64
*) pd
->port_rcvhdrtail_kvaddr
;
666 if (tl
== dd
->ipath_lastrcvhdrqtails
[i
])
668 hd
= ipath_read_ureg32(dd
, ur_rcvhdrhead
,
672 if (hd
== (tl
+ 1) ||
673 (!hd
&& tl
== dd
->ipath_hdrqlast
)) {
676 dd
->ipath_lastrcvhdrqtails
[i
] = tl
;
681 if (errs
& INFINIPATH_E_RRCVEGRFULL
) {
683 * since this is of less importance and not likely to
684 * happen without also getting hdrfull, only count
685 * occurrences; don't check each port (or even the kernel
688 ipath_stats
.sps_etidfull
++;
689 if (dd
->ipath_port0head
!=
690 (u32
) le64_to_cpu(*dd
->ipath_hdrqtailptr
))
695 * do this before IBSTATUSCHANGED, in case both bits set in a single
696 * interrupt; we want the STATUSCHANGE to "win", so we do our
697 * internal copy of state machine correctly
699 if (errs
& INFINIPATH_E_RIBLOSTLINK
) {
701 * force through block below
703 errs
|= INFINIPATH_E_IBSTATUSCHANGED
;
704 ipath_stats
.sps_iblink
++;
705 dd
->ipath_flags
|= IPATH_LINKDOWN
;
706 dd
->ipath_flags
&= ~(IPATH_LINKUNK
| IPATH_LINKINIT
707 | IPATH_LINKARMED
| IPATH_LINKACTIVE
);
708 *dd
->ipath_statusp
&= ~IPATH_STATUS_IB_READY
;
710 u64 st
= ipath_read_kreg64(
711 dd
, dd
->ipath_kregs
->kr_ibcstatus
);
713 ipath_dbg("Lost link, link now down (%s)\n",
714 ipath_ibcstatus_str
[st
& 0xf]);
717 if (errs
& INFINIPATH_E_IBSTATUSCHANGED
)
718 handle_e_ibstatuschanged(dd
, errs
, noprint
);
720 if (errs
& INFINIPATH_E_RESET
) {
722 ipath_dev_err(dd
, "Got reset, requires re-init "
723 "(unload and reload driver)\n");
724 dd
->ipath_flags
&= ~IPATH_INITTED
; /* needs re-init */
725 /* mark as having had error */
726 *dd
->ipath_statusp
|= IPATH_STATUS_HWERROR
;
727 *dd
->ipath_statusp
&= ~IPATH_STATUS_IB_CONF
;
730 if (!noprint
&& *msg
) {
732 ipath_dev_err(dd
, "%s error\n", msg
);
734 dev_info(&dd
->pcidev
->dev
, "%s packet problems\n",
737 if (dd
->ipath_state_wanted
& dd
->ipath_flags
) {
738 ipath_cdbg(VERBOSE
, "driver wanted state %x, iflags now %x, "
739 "waking\n", dd
->ipath_state_wanted
,
741 wake_up_interruptible(&ipath_state_wait
);
747 /* this is separate to allow for better optimization of ipath_intr() */
749 static void ipath_bad_intr(struct ipath_devdata
*dd
, u32
* unexpectp
)
752 * sometimes happen during driver init and unload, don't want
753 * to process any interrupts at that point
756 /* this is just a bandaid, not a fix, if something goes badly
758 if (++*unexpectp
> 100) {
759 if (++*unexpectp
> 105) {
761 * ok, we must be taking somebody else's interrupts,
762 * due to a messed up mptable and/or PIRQ table, so
763 * unregister the interrupt. We've seen this during
764 * linuxbios development work, and it may happen in
767 if (dd
->pcidev
&& dd
->ipath_irq
) {
768 ipath_dev_err(dd
, "Now %u unexpected "
769 "interrupts, unregistering "
770 "interrupt handler\n",
772 ipath_dbg("free_irq of irq %d\n",
774 dd
->ipath_f_free_irq(dd
);
777 if (ipath_read_kreg32(dd
, dd
->ipath_kregs
->kr_intmask
)) {
778 ipath_dev_err(dd
, "%u unexpected interrupts, "
779 "disabling interrupts completely\n",
782 * disable all interrupts, something is very wrong
784 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_intmask
,
787 } else if (*unexpectp
> 1)
788 ipath_dbg("Interrupt when not ready, should not happen, "
792 static void ipath_bad_regread(struct ipath_devdata
*dd
)
796 /* separate routine, for better optimization of ipath_intr() */
799 * We print the message and disable interrupts, in hope of
800 * having a better chance of debugging the problem.
803 "Read of interrupt status failed (all bits set)\n");
805 /* disable all interrupts, something is very wrong */
806 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_intmask
, 0ULL);
808 ipath_dev_err(dd
, "Still bad interrupt status, "
809 "unregistering interrupt\n");
810 dd
->ipath_f_free_irq(dd
);
811 } else if (allbits
> 2) {
812 if ((allbits
% 10000) == 0)
815 ipath_dev_err(dd
, "Disabling interrupts, "
816 "multiple errors\n");
820 static void handle_port_pioavail(struct ipath_devdata
*dd
)
824 * start from port 1, since for now port 0 is never using
827 for (i
= 1; dd
->ipath_portpiowait
&& i
< dd
->ipath_cfgports
; i
++) {
828 struct ipath_portdata
*pd
= dd
->ipath_pd
[i
];
830 if (pd
&& pd
->port_cnt
&&
831 dd
->ipath_portpiowait
& (1U << i
)) {
832 clear_bit(i
, &dd
->ipath_portpiowait
);
833 if (test_bit(IPATH_PORT_WAITING_PIO
,
835 clear_bit(IPATH_PORT_WAITING_PIO
,
837 wake_up_interruptible(&pd
->port_wait
);
843 static void handle_layer_pioavail(struct ipath_devdata
*dd
)
847 ret
= ipath_ib_piobufavail(dd
->verbs_dev
);
853 set_bit(IPATH_S_PIOINTBUFAVAIL
, &dd
->ipath_sendctrl
);
854 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_sendctrl
,
859 * Handle receive interrupts for user ports; this means a user
860 * process was waiting for a packet to arrive, and didn't want
863 static void handle_urcv(struct ipath_devdata
*dd
, u32 istat
)
869 portr
= ((istat
>> INFINIPATH_I_RCVAVAIL_SHIFT
) &
870 dd
->ipath_i_rcvavail_mask
)
871 | ((istat
>> INFINIPATH_I_RCVURG_SHIFT
) &
872 dd
->ipath_i_rcvurg_mask
);
873 for (i
= 1; i
< dd
->ipath_cfgports
; i
++) {
874 struct ipath_portdata
*pd
= dd
->ipath_pd
[i
];
875 if (portr
& (1 << i
) && pd
&& pd
->port_cnt
&&
876 test_bit(IPATH_PORT_WAITING_RCV
, &pd
->port_flag
)) {
877 clear_bit(IPATH_PORT_WAITING_RCV
,
879 clear_bit(i
+ INFINIPATH_R_INTRAVAIL_SHIFT
,
881 wake_up_interruptible(&pd
->port_wait
);
886 /* only want to take one interrupt, so turn off the rcv
887 * interrupt for all the ports that we did the wakeup on
888 * (but never for kernel port)
890 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_rcvctrl
,
895 irqreturn_t
ipath_intr(int irq
, void *data
)
897 struct ipath_devdata
*dd
= data
;
898 u32 istat
, chk0rcv
= 0;
899 ipath_err_t estat
= 0;
901 u32 oldhead
, curtail
;
902 static unsigned unexpected
= 0;
903 static const u32 port0rbits
= (1U<<INFINIPATH_I_RCVAVAIL_SHIFT
) |
904 (1U<<INFINIPATH_I_RCVURG_SHIFT
);
906 ipath_stats
.sps_ints
++;
908 if (!(dd
->ipath_flags
& IPATH_PRESENT
)) {
910 * This return value is not great, but we do not want the
911 * interrupt core code to remove our interrupt handler
912 * because we don't appear to be handling an interrupt
913 * during a chip reset.
919 * this needs to be flags&initted, not statusp, so we keep
920 * taking interrupts even after link goes down, etc.
921 * Also, we *must* clear the interrupt at some point, or we won't
922 * take it again, which can be real bad for errors, etc...
925 if (!(dd
->ipath_flags
& IPATH_INITTED
)) {
926 ipath_bad_intr(dd
, &unexpected
);
932 * We try to avoid reading the interrupt status register, since
933 * that's a PIO read, and stalls the processor for up to about
934 * ~0.25 usec. The idea is that if we processed a port0 packet,
935 * we blindly clear the port 0 receive interrupt bits, and nothing
936 * else, then return. If other interrupts are pending, the chip
937 * will re-interrupt us as soon as we write the intclear register.
938 * We then won't process any more kernel packets (if not the 2nd
939 * time, then the 3rd or 4th) and we'll then handle the other
940 * interrupts. We clear the interrupts first so that we don't
941 * lose intr for later packets that arrive while we are processing.
943 oldhead
= dd
->ipath_port0head
;
944 curtail
= (u32
)le64_to_cpu(*dd
->ipath_hdrqtailptr
);
945 if (oldhead
!= curtail
) {
946 if (dd
->ipath_flags
& IPATH_GPIO_INTR
) {
947 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_gpio_clear
,
948 (u64
) (1 << IPATH_GPIO_PORT0_BIT
));
949 istat
= port0rbits
| INFINIPATH_I_GPIO
;
953 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_intclear
, istat
);
955 if (oldhead
!= dd
->ipath_port0head
) {
956 ipath_stats
.sps_fastrcvint
++;
961 istat
= ipath_read_kreg32(dd
, dd
->ipath_kregs
->kr_intstatus
);
963 if (unlikely(!istat
)) {
964 ipath_stats
.sps_nullintr
++;
965 ret
= IRQ_NONE
; /* not our interrupt, or already handled */
968 if (unlikely(istat
== -1)) {
969 ipath_bad_regread(dd
);
970 /* don't know if it was our interrupt or not */
978 if (unlikely(istat
& ~dd
->ipath_i_bitsextant
))
980 "interrupt with unknown interrupts %x set\n",
981 istat
& (u32
) ~ dd
->ipath_i_bitsextant
);
983 ipath_cdbg(VERBOSE
, "intr stat=0x%x\n", istat
);
985 if (unlikely(istat
& INFINIPATH_I_ERROR
)) {
986 ipath_stats
.sps_errints
++;
987 estat
= ipath_read_kreg64(dd
,
988 dd
->ipath_kregs
->kr_errorstatus
);
990 dev_info(&dd
->pcidev
->dev
, "error interrupt (%x), "
991 "but no error bits set!\n", istat
);
992 else if (estat
== -1LL)
994 * should we try clearing all, or hope next read
997 ipath_dev_err(dd
, "Read of error status failed "
998 "(all bits set); ignoring\n");
1000 if (handle_errors(dd
, estat
))
1001 /* force calling ipath_kreceive() */
1005 if (istat
& INFINIPATH_I_GPIO
) {
1007 * GPIO interrupts fall in two broad classes:
1008 * GPIO_2 indicates (on some HT4xx boards) that a packet
1009 * has arrived for Port 0. Checking for this
1010 * is controlled by flag IPATH_GPIO_INTR.
1011 * GPIO_3..5 on IBA6120 Rev2 chips indicate errors
1012 * that we need to count. Checking for this
1013 * is controlled by flag IPATH_GPIO_ERRINTRS.
1018 gpiostatus
= ipath_read_kreg32(
1019 dd
, dd
->ipath_kregs
->kr_gpio_status
);
1020 /* First the error-counter case.
1022 if ((gpiostatus
& IPATH_GPIO_ERRINTR_MASK
) &&
1023 (dd
->ipath_flags
& IPATH_GPIO_ERRINTRS
)) {
1024 /* want to clear the bits we see asserted. */
1025 to_clear
|= (gpiostatus
& IPATH_GPIO_ERRINTR_MASK
);
1028 * Count appropriately, clear bits out of our copy,
1029 * as they have been "handled".
1031 if (gpiostatus
& (1 << IPATH_GPIO_RXUVL_BIT
)) {
1032 ipath_dbg("FlowCtl on UnsupVL\n");
1033 dd
->ipath_rxfc_unsupvl_errs
++;
1035 if (gpiostatus
& (1 << IPATH_GPIO_OVRUN_BIT
)) {
1036 ipath_dbg("Overrun Threshold exceeded\n");
1037 dd
->ipath_overrun_thresh_errs
++;
1039 if (gpiostatus
& (1 << IPATH_GPIO_LLI_BIT
)) {
1040 ipath_dbg("Local Link Integrity error\n");
1041 dd
->ipath_lli_errs
++;
1043 gpiostatus
&= ~IPATH_GPIO_ERRINTR_MASK
;
1045 /* Now the Port0 Receive case */
1046 if ((gpiostatus
& (1 << IPATH_GPIO_PORT0_BIT
)) &&
1047 (dd
->ipath_flags
& IPATH_GPIO_INTR
)) {
1049 * GPIO status bit 2 is set, and we expected it.
1050 * clear it and indicate in p0bits.
1051 * This probably only happens if a Port0 pkt
1052 * arrives at _just_ the wrong time, and we
1053 * handle that by seting chk0rcv;
1055 to_clear
|= (1 << IPATH_GPIO_PORT0_BIT
);
1056 gpiostatus
&= ~(1 << IPATH_GPIO_PORT0_BIT
);
1061 * Some unexpected bits remain. If they could have
1062 * caused the interrupt, complain and clear.
1063 * MEA: this is almost certainly non-ideal.
1064 * we should look into auto-disable of unexpected
1065 * GPIO interrupts, possibly on a "three strikes"
1068 const u32 mask
= (u32
) dd
->ipath_gpio_mask
;
1070 if (mask
& gpiostatus
) {
1071 ipath_dbg("Unexpected GPIO IRQ bits %x\n",
1073 to_clear
|= (gpiostatus
& mask
);
1077 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_gpio_clear
,
1081 chk0rcv
|= istat
& port0rbits
;
1084 * Clear the interrupt bits we found set, unless they are receive
1085 * related, in which case we already cleared them above, and don't
1086 * want to clear them again, because we might lose an interrupt.
1087 * Clear it early, so we "know" know the chip will have seen this by
1088 * the time we process the queue, and will re-interrupt if necessary.
1089 * The processor itself won't take the interrupt again until we return.
1091 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_intclear
, istat
);
1094 * handle port0 receive before checking for pio buffers available,
1095 * since receives can overflow; piobuf waiters can afford a few
1096 * extra cycles, since they were waiting anyway, and user's waiting
1097 * for receive are at the bottom.
1101 istat
&= ~port0rbits
;
1104 if (istat
& ((dd
->ipath_i_rcvavail_mask
<<
1105 INFINIPATH_I_RCVAVAIL_SHIFT
)
1106 | (dd
->ipath_i_rcvurg_mask
<<
1107 INFINIPATH_I_RCVURG_SHIFT
)))
1108 handle_urcv(dd
, istat
);
1110 if (istat
& INFINIPATH_I_SPIOBUFAVAIL
) {
1111 clear_bit(IPATH_S_PIOINTBUFAVAIL
, &dd
->ipath_sendctrl
);
1112 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_sendctrl
,
1113 dd
->ipath_sendctrl
);
1115 if (dd
->ipath_portpiowait
)
1116 handle_port_pioavail(dd
);
1118 handle_layer_pioavail(dd
);