[NETFILTER]: xt_mac/xt_CLASSIFY: use IPv6 hook names for IPv6 registration
[linux-2.6.22.y-op.git] / drivers / pcmcia / cardbus.c
blob2d7effe7990d9c67136a44617e31bed2290a7026
1 /*
2 * cardbus.c -- 16-bit PCMCIA core support
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
8 * The initial developer of the original code is David A. Hinds
9 * <dahinds@users.sourceforge.net>. Portions created by David A. Hinds
10 * are Copyright (C) 1999 David A. Hinds. All Rights Reserved.
12 * (C) 1999 David A. Hinds
16 * Cardbus handling has been re-written to be more of a PCI bridge thing,
17 * and the PCI code basically does all the resource handling.
19 * Linus, Jan 2000
23 #include <linux/module.h>
24 #include <linux/kernel.h>
25 #include <linux/string.h>
26 #include <linux/slab.h>
27 #include <linux/mm.h>
28 #include <linux/pci.h>
29 #include <linux/ioport.h>
30 #include <asm/irq.h>
31 #include <asm/io.h>
33 #define IN_CARD_SERVICES
34 #include <pcmcia/cs_types.h>
35 #include <pcmcia/ss.h>
36 #include <pcmcia/cs.h>
37 #include <pcmcia/bulkmem.h>
38 #include <pcmcia/cistpl.h>
39 #include "cs_internal.h"
41 /*====================================================================*/
43 #define FIND_FIRST_BIT(n) ((n) - ((n) & ((n)-1)))
45 /* Offsets in the Expansion ROM Image Header */
46 #define ROM_SIGNATURE 0x0000 /* 2 bytes */
47 #define ROM_DATA_PTR 0x0018 /* 2 bytes */
49 /* Offsets in the CardBus PC Card Data Structure */
50 #define PCDATA_SIGNATURE 0x0000 /* 4 bytes */
51 #define PCDATA_VPD_PTR 0x0008 /* 2 bytes */
52 #define PCDATA_LENGTH 0x000a /* 2 bytes */
53 #define PCDATA_REVISION 0x000c
54 #define PCDATA_IMAGE_SZ 0x0010 /* 2 bytes */
55 #define PCDATA_ROM_LEVEL 0x0012 /* 2 bytes */
56 #define PCDATA_CODE_TYPE 0x0014
57 #define PCDATA_INDICATOR 0x0015
59 /*=====================================================================
61 Expansion ROM's have a special layout, and pointers specify an
62 image number and an offset within that image. xlate_rom_addr()
63 converts an image/offset address to an absolute offset from the
64 ROM's base address.
66 =====================================================================*/
68 static u_int xlate_rom_addr(void __iomem *b, u_int addr)
70 u_int img = 0, ofs = 0, sz;
71 u_short data;
72 while ((readb(b) == 0x55) && (readb(b + 1) == 0xaa)) {
73 if (img == (addr >> 28))
74 return (addr & 0x0fffffff) + ofs;
75 data = readb(b + ROM_DATA_PTR) + (readb(b + ROM_DATA_PTR + 1) << 8);
76 sz = 512 * (readb(b + data + PCDATA_IMAGE_SZ) +
77 (readb(b + data + PCDATA_IMAGE_SZ + 1) << 8));
78 if ((sz == 0) || (readb(b + data + PCDATA_INDICATOR) & 0x80))
79 break;
80 b += sz;
81 ofs += sz;
82 img++;
84 return 0;
87 /*=====================================================================
89 These are similar to setup_cis_mem and release_cis_mem for 16-bit
90 cards. The "result" that is used externally is the cb_cis_virt
91 pointer in the struct pcmcia_socket structure.
93 =====================================================================*/
95 static void cb_release_cis_mem(struct pcmcia_socket * s)
97 if (s->cb_cis_virt) {
98 cs_dbg(s, 1, "cb_release_cis_mem()\n");
99 iounmap(s->cb_cis_virt);
100 s->cb_cis_virt = NULL;
101 s->cb_cis_res = NULL;
105 static int cb_setup_cis_mem(struct pcmcia_socket * s, struct resource *res)
107 unsigned int start, size;
109 if (res == s->cb_cis_res)
110 return 0;
112 if (s->cb_cis_res)
113 cb_release_cis_mem(s);
115 start = res->start;
116 size = res->end - start + 1;
117 s->cb_cis_virt = ioremap(start, size);
119 if (!s->cb_cis_virt)
120 return -1;
122 s->cb_cis_res = res;
124 return 0;
127 /*=====================================================================
129 This is used by the CIS processing code to read CIS information
130 from a CardBus device.
132 =====================================================================*/
134 int read_cb_mem(struct pcmcia_socket * s, int space, u_int addr, u_int len, void *ptr)
136 struct pci_dev *dev;
137 struct resource *res;
139 cs_dbg(s, 3, "read_cb_mem(%d, %#x, %u)\n", space, addr, len);
141 dev = pci_get_slot(s->cb_dev->subordinate, 0);
142 if (!dev)
143 goto fail;
145 /* Config space? */
146 if (space == 0) {
147 if (addr + len > 0x100)
148 goto fail;
149 for (; len; addr++, ptr++, len--)
150 pci_read_config_byte(dev, addr, ptr);
151 return 0;
154 res = dev->resource + space - 1;
156 pci_dev_put(dev);
158 if (!res->flags)
159 goto fail;
161 if (cb_setup_cis_mem(s, res) != 0)
162 goto fail;
164 if (space == 7) {
165 addr = xlate_rom_addr(s->cb_cis_virt, addr);
166 if (addr == 0)
167 goto fail;
170 if (addr + len > res->end - res->start)
171 goto fail;
173 memcpy_fromio(ptr, s->cb_cis_virt + addr, len);
174 return 0;
176 fail:
177 memset(ptr, 0xff, len);
178 return -1;
181 /*=====================================================================
183 cb_alloc() and cb_free() allocate and free the kernel data
184 structures for a Cardbus device, and handle the lowest level PCI
185 device setup issues.
187 =====================================================================*/
190 * Since there is only one interrupt available to CardBus
191 * devices, all devices downstream of this device must
192 * be using this IRQ.
194 static void cardbus_assign_irqs(struct pci_bus *bus, int irq)
196 struct pci_dev *dev;
198 list_for_each_entry(dev, &bus->devices, bus_list) {
199 u8 irq_pin;
201 pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &irq_pin);
202 if (irq_pin) {
203 dev->irq = irq;
204 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
207 if (dev->subordinate)
208 cardbus_assign_irqs(dev->subordinate, irq);
212 int cb_alloc(struct pcmcia_socket * s)
214 struct pci_bus *bus = s->cb_dev->subordinate;
215 struct pci_dev *dev;
216 unsigned int max, pass;
218 s->functions = pci_scan_slot(bus, PCI_DEVFN(0, 0));
219 // pcibios_fixup_bus(bus);
221 max = bus->secondary;
222 for (pass = 0; pass < 2; pass++)
223 list_for_each_entry(dev, &bus->devices, bus_list)
224 if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE ||
225 dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
226 max = pci_scan_bridge(bus, dev, max, pass);
229 * Size all resources below the CardBus controller.
231 pci_bus_size_bridges(bus);
232 pci_bus_assign_resources(bus);
233 cardbus_assign_irqs(bus, s->pci_irq);
235 /* socket specific tune function */
236 if (s->tune_bridge)
237 s->tune_bridge(s, bus);
239 pci_enable_bridges(bus);
240 pci_bus_add_devices(bus);
242 s->irq.AssignedIRQ = s->pci_irq;
243 return CS_SUCCESS;
246 void cb_free(struct pcmcia_socket * s)
248 struct pci_dev *bridge = s->cb_dev;
250 cb_release_cis_mem(s);
252 if (bridge)
253 pci_remove_behind_bridge(bridge);