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NLM: Shrink the maximum request size of NLM4 requests
[linux-2.6.22.y-op.git] / drivers / serial / serial_txx9.c
blob509ace7e6881a84cf88f0329247aea4a308add43
1 /*
2 * drivers/serial/serial_txx9.c
3 *
4 * Derived from many drivers using generic_serial interface,
5 * especially serial_tx3912.c by Steven J. Hill and r39xx_serial.c
6 * (was in Linux/VR tree) by Jim Pick.
7 *
8 * Copyright (C) 1999 Harald Koerfgen
9 * Copyright (C) 2000 Jim Pick <jim@jimpick.com>
10 * Copyright (C) 2001 Steven J. Hill (sjhill@realitydiluted.com)
11 * Copyright (C) 2000-2002 Toshiba Corporation
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16 *
17 * Serial driver for TX3927/TX4927/TX4925/TX4938 internal SIO controller
18 *
19 * Revision History:
20 * 0.30 Initial revision. (Renamed from serial_txx927.c)
21 * 0.31 Use save_flags instead of local_irq_save.
22 * 0.32 Support SCLK.
23 * 0.33 Switch TXX9_TTY_NAME by CONFIG_SERIAL_TXX9_STDSERIAL.
24 * Support TIOCSERGETLSR.
25 * 0.34 Support slow baudrate.
26 * 0.40 Merge codes from mainstream kernel (2.4.22).
27 * 0.41 Fix console checking in rs_shutdown_port().
28 * Disable flow-control in serial_console_write().
29 * 0.42 Fix minor compiler warning.
30 * 1.00 Kernel 2.6. Converted to new serial core (based on 8250.c).
31 * 1.01 Set fifosize to make tx_empry called properly.
32 * Use standard uart_get_divisor.
33 * 1.02 Cleanup. (import 8250.c changes)
34 * 1.03 Fix low-latency mode. (import 8250.c changes)
35 * 1.04 Remove usage of deprecated functions, cleanup.
36 * 1.05 More strict check in verify_port. Cleanup.
37 * 1.06 Do not insert a char caused previous overrun.
38 * Fix some spin_locks.
39 * Do not call uart_add_one_port for absent ports.
40 * 1.07 Use CONFIG_SERIAL_TXX9_NR_UARTS. Cleanup.
41 * 1.08 Use platform_device.
42 * Fix and cleanup suspend/resume/initialization codes.
43 */
44
45 #if defined(CONFIG_SERIAL_TXX9_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
46 #define SUPPORT_SYSRQ
47 #endif
48
49 #include <linux/module.h>
50 #include <linux/ioport.h>
51 #include <linux/init.h>
52 #include <linux/console.h>
53 #include <linux/sysrq.h>
54 #include <linux/delay.h>
55 #include <linux/platform_device.h>
56 #include <linux/pci.h>
57 #include <linux/tty.h>
58 #include <linux/tty_flip.h>
59 #include <linux/serial_core.h>
60 #include <linux/serial.h>
61 #include <linux/mutex.h>
62
63 #include <asm/io.h>
64
65 static char *serial_version = "1.08";
66 static char *serial_name = "TX39/49 Serial driver";
67
68 #define PASS_LIMIT 256
69
70 #if !defined(CONFIG_SERIAL_TXX9_STDSERIAL)
71 /* "ttyS" is used for standard serial driver */
72 #define TXX9_TTY_NAME "ttyTX"
73 #define TXX9_TTY_MINOR_START (64 + 64) /* ttyTX0(128), ttyTX1(129) */
74 #else
75 /* acts like standard serial driver */
76 #define TXX9_TTY_NAME "ttyS"
77 #define TXX9_TTY_MINOR_START 64
78 #endif
79 #define TXX9_TTY_MAJOR TTY_MAJOR
80
81 /* flag aliases */
82 #define UPF_TXX9_HAVE_CTS_LINE UPF_BUGGY_UART
83 #define UPF_TXX9_USE_SCLK UPF_MAGIC_MULTIPLIER
84
85 #ifdef CONFIG_PCI
86 /* support for Toshiba TC86C001 SIO */
87 #define ENABLE_SERIAL_TXX9_PCI
88 #endif
89
90 /*
91 * Number of serial ports
92 */
93 #define UART_NR CONFIG_SERIAL_TXX9_NR_UARTS
94
95 #define HIGH_BITS_OFFSET ((sizeof(long)-sizeof(int))*8)
96
97 struct uart_txx9_port {
98 struct uart_port port;
99 /* No additional info for now */
100 };
101
102 #define TXX9_REGION_SIZE 0x24
103
104 /* TXX9 Serial Registers */
105 #define TXX9_SILCR 0x00
106 #define TXX9_SIDICR 0x04
107 #define TXX9_SIDISR 0x08
108 #define TXX9_SICISR 0x0c
109 #define TXX9_SIFCR 0x10
110 #define TXX9_SIFLCR 0x14
111 #define TXX9_SIBGR 0x18
112 #define TXX9_SITFIFO 0x1c
113 #define TXX9_SIRFIFO 0x20
114
115 /* SILCR : Line Control */
116 #define TXX9_SILCR_SCS_MASK 0x00000060
117 #define TXX9_SILCR_SCS_IMCLK 0x00000000
118 #define TXX9_SILCR_SCS_IMCLK_BG 0x00000020
119 #define TXX9_SILCR_SCS_SCLK 0x00000040
120 #define TXX9_SILCR_SCS_SCLK_BG 0x00000060
121 #define TXX9_SILCR_UEPS 0x00000010
122 #define TXX9_SILCR_UPEN 0x00000008
123 #define TXX9_SILCR_USBL_MASK 0x00000004
124 #define TXX9_SILCR_USBL_1BIT 0x00000000
125 #define TXX9_SILCR_USBL_2BIT 0x00000004
126 #define TXX9_SILCR_UMODE_MASK 0x00000003
127 #define TXX9_SILCR_UMODE_8BIT 0x00000000
128 #define TXX9_SILCR_UMODE_7BIT 0x00000001
129
130 /* SIDICR : DMA/Int. Control */
131 #define TXX9_SIDICR_TDE 0x00008000
132 #define TXX9_SIDICR_RDE 0x00004000
133 #define TXX9_SIDICR_TIE 0x00002000
134 #define TXX9_SIDICR_RIE 0x00001000
135 #define TXX9_SIDICR_SPIE 0x00000800
136 #define TXX9_SIDICR_CTSAC 0x00000600
137 #define TXX9_SIDICR_STIE_MASK 0x0000003f
138 #define TXX9_SIDICR_STIE_OERS 0x00000020
139 #define TXX9_SIDICR_STIE_CTSS 0x00000010
140 #define TXX9_SIDICR_STIE_RBRKD 0x00000008
141 #define TXX9_SIDICR_STIE_TRDY 0x00000004
142 #define TXX9_SIDICR_STIE_TXALS 0x00000002
143 #define TXX9_SIDICR_STIE_UBRKD 0x00000001
144
145 /* SIDISR : DMA/Int. Status */
146 #define TXX9_SIDISR_UBRK 0x00008000
147 #define TXX9_SIDISR_UVALID 0x00004000
148 #define TXX9_SIDISR_UFER 0x00002000
149 #define TXX9_SIDISR_UPER 0x00001000
150 #define TXX9_SIDISR_UOER 0x00000800
151 #define TXX9_SIDISR_ERI 0x00000400
152 #define TXX9_SIDISR_TOUT 0x00000200
153 #define TXX9_SIDISR_TDIS 0x00000100
154 #define TXX9_SIDISR_RDIS 0x00000080
155 #define TXX9_SIDISR_STIS 0x00000040
156 #define TXX9_SIDISR_RFDN_MASK 0x0000001f
157
158 /* SICISR : Change Int. Status */
159 #define TXX9_SICISR_OERS 0x00000020
160 #define TXX9_SICISR_CTSS 0x00000010
161 #define TXX9_SICISR_RBRKD 0x00000008
162 #define TXX9_SICISR_TRDY 0x00000004
163 #define TXX9_SICISR_TXALS 0x00000002
164 #define TXX9_SICISR_UBRKD 0x00000001
165
166 /* SIFCR : FIFO Control */
167 #define TXX9_SIFCR_SWRST 0x00008000
168 #define TXX9_SIFCR_RDIL_MASK 0x00000180
169 #define TXX9_SIFCR_RDIL_1 0x00000000
170 #define TXX9_SIFCR_RDIL_4 0x00000080
171 #define TXX9_SIFCR_RDIL_8 0x00000100
172 #define TXX9_SIFCR_RDIL_12 0x00000180
173 #define TXX9_SIFCR_RDIL_MAX 0x00000180
174 #define TXX9_SIFCR_TDIL_MASK 0x00000018
175 #define TXX9_SIFCR_TDIL_MASK 0x00000018
176 #define TXX9_SIFCR_TDIL_1 0x00000000
177 #define TXX9_SIFCR_TDIL_4 0x00000001
178 #define TXX9_SIFCR_TDIL_8 0x00000010
179 #define TXX9_SIFCR_TDIL_MAX 0x00000010
180 #define TXX9_SIFCR_TFRST 0x00000004
181 #define TXX9_SIFCR_RFRST 0x00000002
182 #define TXX9_SIFCR_FRSTE 0x00000001
183 #define TXX9_SIO_TX_FIFO 8
184 #define TXX9_SIO_RX_FIFO 16
185
186 /* SIFLCR : Flow Control */
187 #define TXX9_SIFLCR_RCS 0x00001000
188 #define TXX9_SIFLCR_TES 0x00000800
189 #define TXX9_SIFLCR_RTSSC 0x00000200
190 #define TXX9_SIFLCR_RSDE 0x00000100
191 #define TXX9_SIFLCR_TSDE 0x00000080
192 #define TXX9_SIFLCR_RTSTL_MASK 0x0000001e
193 #define TXX9_SIFLCR_RTSTL_MAX 0x0000001e
194 #define TXX9_SIFLCR_TBRK 0x00000001
195
196 /* SIBGR : Baudrate Control */
197 #define TXX9_SIBGR_BCLK_MASK 0x00000300
198 #define TXX9_SIBGR_BCLK_T0 0x00000000
199 #define TXX9_SIBGR_BCLK_T2 0x00000100
200 #define TXX9_SIBGR_BCLK_T4 0x00000200
201 #define TXX9_SIBGR_BCLK_T6 0x00000300
202 #define TXX9_SIBGR_BRD_MASK 0x000000ff
203
204 static inline unsigned int sio_in(struct uart_txx9_port *up, int offset)
205 {
206 switch (up->port.iotype) {
207 default:
208 return __raw_readl(up->port.membase + offset);
209 case UPIO_PORT:
210 return inl(up->port.iobase + offset);
211 }
212 }
213
214 static inline void
215 sio_out(struct uart_txx9_port *up, int offset, int value)
216 {
217 switch (up->port.iotype) {
218 default:
219 __raw_writel(value, up->port.membase + offset);
220 break;
221 case UPIO_PORT:
222 outl(value, up->port.iobase + offset);
223 break;
224 }
225 }
226
227 static inline void
228 sio_mask(struct uart_txx9_port *up, int offset, unsigned int value)
229 {
230 sio_out(up, offset, sio_in(up, offset) & ~value);
231 }
232 static inline void
233 sio_set(struct uart_txx9_port *up, int offset, unsigned int value)
234 {
235 sio_out(up, offset, sio_in(up, offset) | value);
236 }
237
238 static inline void
239 sio_quot_set(struct uart_txx9_port *up, int quot)
240 {
241 quot >>= 1;
242 if (quot < 256)
243 sio_out(up, TXX9_SIBGR, quot | TXX9_SIBGR_BCLK_T0);
244 else if (quot < (256 << 2))
245 sio_out(up, TXX9_SIBGR, (quot >> 2) | TXX9_SIBGR_BCLK_T2);
246 else if (quot < (256 << 4))
247 sio_out(up, TXX9_SIBGR, (quot >> 4) | TXX9_SIBGR_BCLK_T4);
248 else if (quot < (256 << 6))
249 sio_out(up, TXX9_SIBGR, (quot >> 6) | TXX9_SIBGR_BCLK_T6);
250 else
251 sio_out(up, TXX9_SIBGR, 0xff | TXX9_SIBGR_BCLK_T6);
252 }
253
254 static void serial_txx9_stop_tx(struct uart_port *port)
255 {
256 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
257 sio_mask(up, TXX9_SIDICR, TXX9_SIDICR_TIE);
258 }
259
260 static void serial_txx9_start_tx(struct uart_port *port)
261 {
262 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
263 sio_set(up, TXX9_SIDICR, TXX9_SIDICR_TIE);
264 }
265
266 static void serial_txx9_stop_rx(struct uart_port *port)
267 {
268 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
269 up->port.read_status_mask &= ~TXX9_SIDISR_RDIS;
270 }
271
272 static void serial_txx9_enable_ms(struct uart_port *port)
273 {
274 /* TXX9-SIO can not control DTR... */
275 }
276
277 static void serial_txx9_initialize(struct uart_port *port)
278 {
279 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
280 unsigned int tmout = 10000;
281
282 sio_out(up, TXX9_SIFCR, TXX9_SIFCR_SWRST);
283 /* TX4925 BUG WORKAROUND. Accessing SIOC register
284 * immediately after soft reset causes bus error. */
285 mmiowb();
286 udelay(1);
287 while ((sio_in(up, TXX9_SIFCR) & TXX9_SIFCR_SWRST) && --tmout)
288 udelay(1);
289 /* TX Int by FIFO Empty, RX Int by Receiving 1 char. */
290 sio_set(up, TXX9_SIFCR,
291 TXX9_SIFCR_TDIL_MAX | TXX9_SIFCR_RDIL_1);
292 /* initial settings */
293 sio_out(up, TXX9_SILCR,
294 TXX9_SILCR_UMODE_8BIT | TXX9_SILCR_USBL_1BIT |
295 ((up->port.flags & UPF_TXX9_USE_SCLK) ?
296 TXX9_SILCR_SCS_SCLK_BG : TXX9_SILCR_SCS_IMCLK_BG));
297 sio_quot_set(up, uart_get_divisor(port, 9600));
298 sio_out(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSTL_MAX /* 15 */);
299 sio_out(up, TXX9_SIDICR, 0);
300 }
301
302 static inline void
303 receive_chars(struct uart_txx9_port *up, unsigned int *status)
304 {
305 struct tty_struct *tty = up->port.info->tty;
306 unsigned char ch;
307 unsigned int disr = *status;
308 int max_count = 256;
309 char flag;
310 unsigned int next_ignore_status_mask;
311
312 do {
313 ch = sio_in(up, TXX9_SIRFIFO);
314 flag = TTY_NORMAL;
315 up->port.icount.rx++;
316
317 /* mask out RFDN_MASK bit added by previous overrun */
318 next_ignore_status_mask =
319 up->port.ignore_status_mask & ~TXX9_SIDISR_RFDN_MASK;
320 if (unlikely(disr & (TXX9_SIDISR_UBRK | TXX9_SIDISR_UPER |
321 TXX9_SIDISR_UFER | TXX9_SIDISR_UOER))) {
322 /*
323 * For statistics only
324 */
325 if (disr & TXX9_SIDISR_UBRK) {
326 disr &= ~(TXX9_SIDISR_UFER | TXX9_SIDISR_UPER);
327 up->port.icount.brk++;
328 /*
329 * We do the SysRQ and SAK checking
330 * here because otherwise the break
331 * may get masked by ignore_status_mask
332 * or read_status_mask.
333 */
334 if (uart_handle_break(&up->port))
335 goto ignore_char;
336 } else if (disr & TXX9_SIDISR_UPER)
337 up->port.icount.parity++;
338 else if (disr & TXX9_SIDISR_UFER)
339 up->port.icount.frame++;
340 if (disr & TXX9_SIDISR_UOER) {
341 up->port.icount.overrun++;
342 /*
343 * The receiver read buffer still hold
344 * a char which caused overrun.
345 * Ignore next char by adding RFDN_MASK
346 * to ignore_status_mask temporarily.
347 */
348 next_ignore_status_mask |=
349 TXX9_SIDISR_RFDN_MASK;
350 }
351
352 /*
353 * Mask off conditions which should be ingored.
354 */
355 disr &= up->port.read_status_mask;
356
357 if (disr & TXX9_SIDISR_UBRK) {
358 flag = TTY_BREAK;
359 } else if (disr & TXX9_SIDISR_UPER)
360 flag = TTY_PARITY;
361 else if (disr & TXX9_SIDISR_UFER)
362 flag = TTY_FRAME;
363 }
364 if (uart_handle_sysrq_char(&up->port, ch))
365 goto ignore_char;
366
367 uart_insert_char(&up->port, disr, TXX9_SIDISR_UOER, ch, flag);
368
369 ignore_char:
370 up->port.ignore_status_mask = next_ignore_status_mask;
371 disr = sio_in(up, TXX9_SIDISR);
372 } while (!(disr & TXX9_SIDISR_UVALID) && (max_count-- > 0));
373 spin_unlock(&up->port.lock);
374 tty_flip_buffer_push(tty);
375 spin_lock(&up->port.lock);
376 *status = disr;
377 }
378
379 static inline void transmit_chars(struct uart_txx9_port *up)
380 {
381 struct circ_buf *xmit = &up->port.info->xmit;
382 int count;
383
384 if (up->port.x_char) {
385 sio_out(up, TXX9_SITFIFO, up->port.x_char);
386 up->port.icount.tx++;
387 up->port.x_char = 0;
388 return;
389 }
390 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
391 serial_txx9_stop_tx(&up->port);
392 return;
393 }
394
395 count = TXX9_SIO_TX_FIFO;
396 do {
397 sio_out(up, TXX9_SITFIFO, xmit->buf[xmit->tail]);
398 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
399 up->port.icount.tx++;
400 if (uart_circ_empty(xmit))
401 break;
402 } while (--count > 0);
403
404 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
405 uart_write_wakeup(&up->port);
406
407 if (uart_circ_empty(xmit))
408 serial_txx9_stop_tx(&up->port);
409 }
410
411 static irqreturn_t serial_txx9_interrupt(int irq, void *dev_id)
412 {
413 int pass_counter = 0;
414 struct uart_txx9_port *up = dev_id;
415 unsigned int status;
416
417 while (1) {
418 spin_lock(&up->port.lock);
419 status = sio_in(up, TXX9_SIDISR);
420 if (!(sio_in(up, TXX9_SIDICR) & TXX9_SIDICR_TIE))
421 status &= ~TXX9_SIDISR_TDIS;
422 if (!(status & (TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS |
423 TXX9_SIDISR_TOUT))) {
424 spin_unlock(&up->port.lock);
425 break;
426 }
427
428 if (status & TXX9_SIDISR_RDIS)
429 receive_chars(up, &status);
430 if (status & TXX9_SIDISR_TDIS)
431 transmit_chars(up);
432 /* Clear TX/RX Int. Status */
433 sio_mask(up, TXX9_SIDISR,
434 TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS |
435 TXX9_SIDISR_TOUT);
436 spin_unlock(&up->port.lock);
437
438 if (pass_counter++ > PASS_LIMIT)
439 break;
440 }
441
442 return pass_counter ? IRQ_HANDLED : IRQ_NONE;
443 }
444
445 static unsigned int serial_txx9_tx_empty(struct uart_port *port)
446 {
447 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
448 unsigned long flags;
449 unsigned int ret;
450
451 spin_lock_irqsave(&up->port.lock, flags);
452 ret = (sio_in(up, TXX9_SICISR) & TXX9_SICISR_TXALS) ? TIOCSER_TEMT : 0;
453 spin_unlock_irqrestore(&up->port.lock, flags);
454
455 return ret;
456 }
457
458 static unsigned int serial_txx9_get_mctrl(struct uart_port *port)
459 {
460 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
461 unsigned int ret;
462
463 ret = ((sio_in(up, TXX9_SIFLCR) & TXX9_SIFLCR_RTSSC) ? 0 : TIOCM_RTS)
464 | ((sio_in(up, TXX9_SICISR) & TXX9_SICISR_CTSS) ? 0 : TIOCM_CTS);
465
466 return ret;
467 }
468
469 static void serial_txx9_set_mctrl(struct uart_port *port, unsigned int mctrl)
470 {
471 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
472
473 if (mctrl & TIOCM_RTS)
474 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSSC);
475 else
476 sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSSC);
477 }
478
479 static void serial_txx9_break_ctl(struct uart_port *port, int break_state)
480 {
481 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
482 unsigned long flags;
483
484 spin_lock_irqsave(&up->port.lock, flags);
485 if (break_state == -1)
486 sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
487 else
488 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
489 spin_unlock_irqrestore(&up->port.lock, flags);
490 }
491
492 static int serial_txx9_startup(struct uart_port *port)
493 {
494 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
495 unsigned long flags;
496 int retval;
497
498 /*
499 * Clear the FIFO buffers and disable them.
500 * (they will be reenabled in set_termios())
501 */
502 sio_set(up, TXX9_SIFCR,
503 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
504 /* clear reset */
505 sio_mask(up, TXX9_SIFCR,
506 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
507 sio_out(up, TXX9_SIDICR, 0);
508
509 /*
510 * Clear the interrupt registers.
511 */
512 sio_out(up, TXX9_SIDISR, 0);
513
514 retval = request_irq(up->port.irq, serial_txx9_interrupt,
515 IRQF_SHARED, "serial_txx9", up);
516 if (retval)
517 return retval;
518
519 /*
520 * Now, initialize the UART
521 */
522 spin_lock_irqsave(&up->port.lock, flags);
523 serial_txx9_set_mctrl(&up->port, up->port.mctrl);
524 spin_unlock_irqrestore(&up->port.lock, flags);
525
526 /* Enable RX/TX */
527 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_RSDE | TXX9_SIFLCR_TSDE);
528
529 /*
530 * Finally, enable interrupts.
531 */
532 sio_set(up, TXX9_SIDICR, TXX9_SIDICR_RIE);
533
534 return 0;
535 }
536
537 static void serial_txx9_shutdown(struct uart_port *port)
538 {
539 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
540 unsigned long flags;
541
542 /*
543 * Disable interrupts from this port
544 */
545 sio_out(up, TXX9_SIDICR, 0); /* disable all intrs */
546
547 spin_lock_irqsave(&up->port.lock, flags);
548 serial_txx9_set_mctrl(&up->port, up->port.mctrl);
549 spin_unlock_irqrestore(&up->port.lock, flags);
550
551 /*
552 * Disable break condition
553 */
554 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
555
556 #ifdef CONFIG_SERIAL_TXX9_CONSOLE
557 if (up->port.cons && up->port.line == up->port.cons->index) {
558 free_irq(up->port.irq, up);
559 return;
560 }
561 #endif
562 /* reset FIFOs */
563 sio_set(up, TXX9_SIFCR,
564 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
565 /* clear reset */
566 sio_mask(up, TXX9_SIFCR,
567 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
568
569 /* Disable RX/TX */
570 sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_RSDE | TXX9_SIFLCR_TSDE);
571
572 free_irq(up->port.irq, up);
573 }
574
575 static void
576 serial_txx9_set_termios(struct uart_port *port, struct ktermios *termios,
577 struct ktermios *old)
578 {
579 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
580 unsigned int cval, fcr = 0;
581 unsigned long flags;
582 unsigned int baud, quot;
583
584 cval = sio_in(up, TXX9_SILCR);
585 /* byte size and parity */
586 cval &= ~TXX9_SILCR_UMODE_MASK;
587 switch (termios->c_cflag & CSIZE) {
588 case CS7:
589 cval |= TXX9_SILCR_UMODE_7BIT;
590 break;
591 default:
592 case CS5: /* not supported */
593 case CS6: /* not supported */
594 case CS8:
595 cval |= TXX9_SILCR_UMODE_8BIT;
596 break;
597 }
598
599 cval &= ~TXX9_SILCR_USBL_MASK;
600 if (termios->c_cflag & CSTOPB)
601 cval |= TXX9_SILCR_USBL_2BIT;
602 else
603 cval |= TXX9_SILCR_USBL_1BIT;
604 cval &= ~(TXX9_SILCR_UPEN | TXX9_SILCR_UEPS);
605 if (termios->c_cflag & PARENB)
606 cval |= TXX9_SILCR_UPEN;
607 if (!(termios->c_cflag & PARODD))
608 cval |= TXX9_SILCR_UEPS;
609
610 /*
611 * Ask the core to calculate the divisor for us.
612 */
613 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16/2);
614 quot = uart_get_divisor(port, baud);
615
616 /* Set up FIFOs */
617 /* TX Int by FIFO Empty, RX Int by Receiving 1 char. */
618 fcr = TXX9_SIFCR_TDIL_MAX | TXX9_SIFCR_RDIL_1;
619
620 /*
621 * Ok, we're now changing the port state. Do it with
622 * interrupts disabled.
623 */
624 spin_lock_irqsave(&up->port.lock, flags);
625
626 /*
627 * Update the per-port timeout.
628 */
629 uart_update_timeout(port, termios->c_cflag, baud);
630
631 up->port.read_status_mask = TXX9_SIDISR_UOER |
632 TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS;
633 if (termios->c_iflag & INPCK)
634 up->port.read_status_mask |= TXX9_SIDISR_UFER | TXX9_SIDISR_UPER;
635 if (termios->c_iflag & (BRKINT | PARMRK))
636 up->port.read_status_mask |= TXX9_SIDISR_UBRK;
637
638 /*
639 * Characteres to ignore
640 */
641 up->port.ignore_status_mask = 0;
642 if (termios->c_iflag & IGNPAR)
643 up->port.ignore_status_mask |= TXX9_SIDISR_UPER | TXX9_SIDISR_UFER;
644 if (termios->c_iflag & IGNBRK) {
645 up->port.ignore_status_mask |= TXX9_SIDISR_UBRK;
646 /*
647 * If we're ignoring parity and break indicators,
648 * ignore overruns too (for real raw support).
649 */
650 if (termios->c_iflag & IGNPAR)
651 up->port.ignore_status_mask |= TXX9_SIDISR_UOER;
652 }
653
654 /*
655 * ignore all characters if CREAD is not set
656 */
657 if ((termios->c_cflag & CREAD) == 0)
658 up->port.ignore_status_mask |= TXX9_SIDISR_RDIS;
659
660 /* CTS flow control flag */
661 if ((termios->c_cflag & CRTSCTS) &&
662 (up->port.flags & UPF_TXX9_HAVE_CTS_LINE)) {
663 sio_set(up, TXX9_SIFLCR,
664 TXX9_SIFLCR_RCS | TXX9_SIFLCR_TES);
665 } else {
666 sio_mask(up, TXX9_SIFLCR,
667 TXX9_SIFLCR_RCS | TXX9_SIFLCR_TES);
668 }
669
670 sio_out(up, TXX9_SILCR, cval);
671 sio_quot_set(up, quot);
672 sio_out(up, TXX9_SIFCR, fcr);
673
674 serial_txx9_set_mctrl(&up->port, up->port.mctrl);
675 spin_unlock_irqrestore(&up->port.lock, flags);
676 }
677
678 static void
679 serial_txx9_pm(struct uart_port *port, unsigned int state,
680 unsigned int oldstate)
681 {
682 if (state == 0)
683 serial_txx9_initialize(port);
684 }
685
686 static int serial_txx9_request_resource(struct uart_txx9_port *up)
687 {
688 unsigned int size = TXX9_REGION_SIZE;
689 int ret = 0;
690
691 switch (up->port.iotype) {
692 default:
693 if (!up->port.mapbase)
694 break;
695
696 if (!request_mem_region(up->port.mapbase, size, "serial_txx9")) {
697 ret = -EBUSY;
698 break;
699 }
700
701 if (up->port.flags & UPF_IOREMAP) {
702 up->port.membase = ioremap(up->port.mapbase, size);
703 if (!up->port.membase) {
704 release_mem_region(up->port.mapbase, size);
705 ret = -ENOMEM;
706 }
707 }
708 break;
709
710 case UPIO_PORT:
711 if (!request_region(up->port.iobase, size, "serial_txx9"))
712 ret = -EBUSY;
713 break;
714 }
715 return ret;
716 }
717
718 static void serial_txx9_release_resource(struct uart_txx9_port *up)
719 {
720 unsigned int size = TXX9_REGION_SIZE;
721
722 switch (up->port.iotype) {
723 default:
724 if (!up->port.mapbase)
725 break;
726
727 if (up->port.flags & UPF_IOREMAP) {
728 iounmap(up->port.membase);
729 up->port.membase = NULL;
730 }
731
732 release_mem_region(up->port.mapbase, size);
733 break;
734
735 case UPIO_PORT:
736 release_region(up->port.iobase, size);
737 break;
738 }
739 }
740
741 static void serial_txx9_release_port(struct uart_port *port)
742 {
743 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
744 serial_txx9_release_resource(up);
745 }
746
747 static int serial_txx9_request_port(struct uart_port *port)
748 {
749 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
750 return serial_txx9_request_resource(up);
751 }
752
753 static void serial_txx9_config_port(struct uart_port *port, int uflags)
754 {
755 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
756 int ret;
757
758 /*
759 * Find the region that we can probe for. This in turn
760 * tells us whether we can probe for the type of port.
761 */
762 ret = serial_txx9_request_resource(up);
763 if (ret < 0)
764 return;
765 port->type = PORT_TXX9;
766 up->port.fifosize = TXX9_SIO_TX_FIFO;
767
768 #ifdef CONFIG_SERIAL_TXX9_CONSOLE
769 if (up->port.line == up->port.cons->index)
770 return;
771 #endif
772 serial_txx9_initialize(port);
773 }
774
775 static int
776 serial_txx9_verify_port(struct uart_port *port, struct serial_struct *ser)
777 {
778 unsigned long new_port = ser->port;
779 if (HIGH_BITS_OFFSET)
780 new_port += (unsigned long)ser->port_high << HIGH_BITS_OFFSET;
781 if (ser->type != port->type ||
782 ser->irq != port->irq ||
783 ser->io_type != port->iotype ||
784 new_port != port->iobase ||
785 (unsigned long)ser->iomem_base != port->mapbase)
786 return -EINVAL;
787 return 0;
788 }
789
790 static const char *
791 serial_txx9_type(struct uart_port *port)
792 {
793 return "txx9";
794 }
795
796 static struct uart_ops serial_txx9_pops = {
797 .tx_empty = serial_txx9_tx_empty,
798 .set_mctrl = serial_txx9_set_mctrl,
799 .get_mctrl = serial_txx9_get_mctrl,
800 .stop_tx = serial_txx9_stop_tx,
801 .start_tx = serial_txx9_start_tx,
802 .stop_rx = serial_txx9_stop_rx,
803 .enable_ms = serial_txx9_enable_ms,
804 .break_ctl = serial_txx9_break_ctl,
805 .startup = serial_txx9_startup,
806 .shutdown = serial_txx9_shutdown,
807 .set_termios = serial_txx9_set_termios,
808 .pm = serial_txx9_pm,
809 .type = serial_txx9_type,
810 .release_port = serial_txx9_release_port,
811 .request_port = serial_txx9_request_port,
812 .config_port = serial_txx9_config_port,
813 .verify_port = serial_txx9_verify_port,
814 };
815
816 static struct uart_txx9_port serial_txx9_ports[UART_NR];
817
818 static void __init serial_txx9_register_ports(struct uart_driver *drv,
819 struct device *dev)
820 {
821 int i;
822
823 for (i = 0; i < UART_NR; i++) {
824 struct uart_txx9_port *up = &serial_txx9_ports[i];
825
826 up->port.line = i;
827 up->port.ops = &serial_txx9_pops;
828 up->port.dev = dev;
829 if (up->port.iobase || up->port.mapbase)
830 uart_add_one_port(drv, &up->port);
831 }
832 }
833
834 #ifdef CONFIG_SERIAL_TXX9_CONSOLE
835
836 /*
837 * Wait for transmitter & holding register to empty
838 */
839 static inline void wait_for_xmitr(struct uart_txx9_port *up)
840 {
841 unsigned int tmout = 10000;
842
843 /* Wait up to 10ms for the character(s) to be sent. */
844 while (--tmout &&
845 !(sio_in(up, TXX9_SICISR) & TXX9_SICISR_TXALS))
846 udelay(1);
847
848 /* Wait up to 1s for flow control if necessary */
849 if (up->port.flags & UPF_CONS_FLOW) {
850 tmout = 1000000;
851 while (--tmout &&
852 (sio_in(up, TXX9_SICISR) & TXX9_SICISR_CTSS))
853 udelay(1);
854 }
855 }
856
857 static void serial_txx9_console_putchar(struct uart_port *port, int ch)
858 {
859 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
860
861 wait_for_xmitr(up);
862 sio_out(up, TXX9_SITFIFO, ch);
863 }
864
865 /*
866 * Print a string to the serial port trying not to disturb
867 * any possible real use of the port...
868 *
869 * The console_lock must be held when we get here.
870 */
871 static void
872 serial_txx9_console_write(struct console *co, const char *s, unsigned int count)
873 {
874 struct uart_txx9_port *up = &serial_txx9_ports[co->index];
875 unsigned int ier, flcr;
876
877 /*
878 * First save the UER then disable the interrupts
879 */
880 ier = sio_in(up, TXX9_SIDICR);
881 sio_out(up, TXX9_SIDICR, 0);
882 /*
883 * Disable flow-control if enabled (and unnecessary)
884 */
885 flcr = sio_in(up, TXX9_SIFLCR);
886 if (!(up->port.flags & UPF_CONS_FLOW) && (flcr & TXX9_SIFLCR_TES))
887 sio_out(up, TXX9_SIFLCR, flcr & ~TXX9_SIFLCR_TES);
888
889 uart_console_write(&up->port, s, count, serial_txx9_console_putchar);
890
891 /*
892 * Finally, wait for transmitter to become empty
893 * and restore the IER
894 */
895 wait_for_xmitr(up);
896 sio_out(up, TXX9_SIFLCR, flcr);
897 sio_out(up, TXX9_SIDICR, ier);
898 }
899
900 static int __init serial_txx9_console_setup(struct console *co, char *options)
901 {
902 struct uart_port *port;
903 struct uart_txx9_port *up;
904 int baud = 9600;
905 int bits = 8;
906 int parity = 'n';
907 int flow = 'n';
908
909 /*
910 * Check whether an invalid uart number has been specified, and
911 * if so, search for the first available port that does have
912 * console support.
913 */
914 if (co->index >= UART_NR)
915 co->index = 0;
916 up = &serial_txx9_ports[co->index];
917 port = &up->port;
918 if (!port->ops)
919 return -ENODEV;
920
921 serial_txx9_initialize(&up->port);
922
923 if (options)
924 uart_parse_options(options, &baud, &parity, &bits, &flow);
925
926 return uart_set_options(port, co, baud, parity, bits, flow);
927 }
928
929 static struct uart_driver serial_txx9_reg;
930 static struct console serial_txx9_console = {
931 .name = TXX9_TTY_NAME,
932 .write = serial_txx9_console_write,
933 .device = uart_console_device,
934 .setup = serial_txx9_console_setup,
935 .flags = CON_PRINTBUFFER,
936 .index = -1,
937 .data = &serial_txx9_reg,
938 };
939
940 static int __init serial_txx9_console_init(void)
941 {
942 register_console(&serial_txx9_console);
943 return 0;
944 }
945 console_initcall(serial_txx9_console_init);
946
947 #define SERIAL_TXX9_CONSOLE &serial_txx9_console
948 #else
949 #define SERIAL_TXX9_CONSOLE NULL
950 #endif
951
952 static struct uart_driver serial_txx9_reg = {
953 .owner = THIS_MODULE,
954 .driver_name = "serial_txx9",
955 .dev_name = TXX9_TTY_NAME,
956 .major = TXX9_TTY_MAJOR,
957 .minor = TXX9_TTY_MINOR_START,
958 .nr = UART_NR,
959 .cons = SERIAL_TXX9_CONSOLE,
960 };
961
962 int __init early_serial_txx9_setup(struct uart_port *port)
963 {
964 if (port->line >= ARRAY_SIZE(serial_txx9_ports))
965 return -ENODEV;
966
967 serial_txx9_ports[port->line].port = *port;
968 serial_txx9_ports[port->line].port.ops = &serial_txx9_pops;
969 serial_txx9_ports[port->line].port.flags |= UPF_BOOT_AUTOCONF;
970 return 0;
971 }
972
973 static DEFINE_MUTEX(serial_txx9_mutex);
974
975 /**
976 * serial_txx9_register_port - register a serial port
977 * @port: serial port template
978 *
979 * Configure the serial port specified by the request.
980 *
981 * The port is then probed and if necessary the IRQ is autodetected
982 * If this fails an error is returned.
983 *
984 * On success the port is ready to use and the line number is returned.
985 */
986 static int __devinit serial_txx9_register_port(struct uart_port *port)
987 {
988 int i;
989 struct uart_txx9_port *uart;
990 int ret = -ENOSPC;
991
992 mutex_lock(&serial_txx9_mutex);
993 for (i = 0; i < UART_NR; i++) {
994 uart = &serial_txx9_ports[i];
995 if (uart_match_port(&uart->port, port)) {
996 uart_remove_one_port(&serial_txx9_reg, &uart->port);
997 break;
998 }
999 }
1000 if (i == UART_NR) {
1001 /* Find unused port */
1002 for (i = 0; i < UART_NR; i++) {
1003 uart = &serial_txx9_ports[i];
1004 if (!(uart->port.iobase || uart->port.mapbase))
1005 break;
1006 }
1007 }
1008 if (i < UART_NR) {
1009 uart->port.iobase = port->iobase;
1010 uart->port.membase = port->membase;
1011 uart->port.irq = port->irq;
1012 uart->port.uartclk = port->uartclk;
1013 uart->port.iotype = port->iotype;
1014 uart->port.flags = port->flags | UPF_BOOT_AUTOCONF;
1015 uart->port.mapbase = port->mapbase;
1016 if (port->dev)
1017 uart->port.dev = port->dev;
1018 ret = uart_add_one_port(&serial_txx9_reg, &uart->port);
1019 if (ret == 0)
1020 ret = uart->port.line;
1021 }
1022 mutex_unlock(&serial_txx9_mutex);
1023 return ret;
1024 }
1025
1026 /**
1027 * serial_txx9_unregister_port - remove a txx9 serial port at runtime
1028 * @line: serial line number
1029 *
1030 * Remove one serial port. This may not be called from interrupt
1031 * context. We hand the port back to the our control.
1032 */
1033 static void __devexit serial_txx9_unregister_port(int line)
1034 {
1035 struct uart_txx9_port *uart = &serial_txx9_ports[line];
1036
1037 mutex_lock(&serial_txx9_mutex);
1038 uart_remove_one_port(&serial_txx9_reg, &uart->port);
1039 uart->port.flags = 0;
1040 uart->port.type = PORT_UNKNOWN;
1041 uart->port.iobase = 0;
1042 uart->port.mapbase = 0;
1043 uart->port.membase = NULL;
1044 uart->port.dev = NULL;
1045 mutex_unlock(&serial_txx9_mutex);
1046 }
1047
1048 /*
1049 * Register a set of serial devices attached to a platform device.
1050 */
1051 static int __devinit serial_txx9_probe(struct platform_device *dev)
1052 {
1053 struct uart_port *p = dev->dev.platform_data;
1054 struct uart_port port;
1055 int ret, i;
1056
1057 memset(&port, 0, sizeof(struct uart_port));
1058 for (i = 0; p && p->uartclk != 0; p++, i++) {
1059 port.iobase = p->iobase;
1060 port.membase = p->membase;
1061 port.irq = p->irq;
1062 port.uartclk = p->uartclk;
1063 port.iotype = p->iotype;
1064 port.flags = p->flags;
1065 port.mapbase = p->mapbase;
1066 port.dev = &dev->dev;
1067 ret = serial_txx9_register_port(&port);
1068 if (ret < 0) {
1069 dev_err(&dev->dev, "unable to register port at index %d "
1070 "(IO%x MEM%lx IRQ%d): %d\n", i,
1071 p->iobase, p->mapbase, p->irq, ret);
1072 }
1073 }
1074 return 0;
1075 }
1076
1077 /*
1078 * Remove serial ports registered against a platform device.
1079 */
1080 static int __devexit serial_txx9_remove(struct platform_device *dev)
1081 {
1082 int i;
1083
1084 for (i = 0; i < UART_NR; i++) {
1085 struct uart_txx9_port *up = &serial_txx9_ports[i];
1086
1087 if (up->port.dev == &dev->dev)
1088 serial_txx9_unregister_port(i);
1089 }
1090 return 0;
1091 }
1092
1093 #ifdef CONFIG_PM
1094 static int serial_txx9_suspend(struct platform_device *dev, pm_message_t state)
1095 {
1096 int i;
1097
1098 for (i = 0; i < UART_NR; i++) {
1099 struct uart_txx9_port *up = &serial_txx9_ports[i];
1100
1101 if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev)
1102 uart_suspend_port(&serial_txx9_reg, &up->port);
1103 }
1104
1105 return 0;
1106 }
1107
1108 static int serial_txx9_resume(struct platform_device *dev)
1109 {
1110 int i;
1111
1112 for (i = 0; i < UART_NR; i++) {
1113 struct uart_txx9_port *up = &serial_txx9_ports[i];
1114
1115 if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev)
1116 uart_resume_port(&serial_txx9_reg, &up->port);
1117 }
1118
1119 return 0;
1120 }
1121 #endif
1122
1123 static struct platform_driver serial_txx9_plat_driver = {
1124 .probe = serial_txx9_probe,
1125 .remove = __devexit_p(serial_txx9_remove),
1126 #ifdef CONFIG_PM
1127 .suspend = serial_txx9_suspend,
1128 .resume = serial_txx9_resume,
1129 #endif
1130 .driver = {
1131 .name = "serial_txx9",
1132 .owner = THIS_MODULE,
1133 },
1134 };
1135
1136 #ifdef ENABLE_SERIAL_TXX9_PCI
1137 /*
1138 * Probe one serial board. Unfortunately, there is no rhyme nor reason
1139 * to the arrangement of serial ports on a PCI card.
1140 */
1141 static int __devinit
1142 pciserial_txx9_init_one(struct pci_dev *dev, const struct pci_device_id *ent)
1143 {
1144 struct uart_port port;
1145 int line;
1146 int rc;
1147
1148 rc = pci_enable_device(dev);
1149 if (rc)
1150 return rc;
1151
1152 memset(&port, 0, sizeof(port));
1153 port.ops = &serial_txx9_pops;
1154 port.flags |= UPF_TXX9_HAVE_CTS_LINE;
1155 port.uartclk = 66670000;
1156 port.irq = dev->irq;
1157 port.iotype = UPIO_PORT;
1158 port.iobase = pci_resource_start(dev, 1);
1159 port.dev = &dev->dev;
1160 line = serial_txx9_register_port(&port);
1161 if (line < 0) {
1162 printk(KERN_WARNING "Couldn't register serial port %s: %d\n", pci_name(dev), line);
1163 pci_disable_device(dev);
1164 return line;
1165 }
1166 pci_set_drvdata(dev, &serial_txx9_ports[line]);
1167
1168 return 0;
1169 }
1170
1171 static void __devexit pciserial_txx9_remove_one(struct pci_dev *dev)
1172 {
1173 struct uart_txx9_port *up = pci_get_drvdata(dev);
1174
1175 pci_set_drvdata(dev, NULL);
1176
1177 if (up) {
1178 serial_txx9_unregister_port(up->port.line);
1179 pci_disable_device(dev);
1180 }
1181 }
1182
1183 #ifdef CONFIG_PM
1184 static int pciserial_txx9_suspend_one(struct pci_dev *dev, pm_message_t state)
1185 {
1186 struct uart_txx9_port *up = pci_get_drvdata(dev);
1187
1188 if (up)
1189 uart_suspend_port(&serial_txx9_reg, &up->port);
1190 pci_save_state(dev);
1191 pci_set_power_state(dev, pci_choose_state(dev, state));
1192 return 0;
1193 }
1194
1195 static int pciserial_txx9_resume_one(struct pci_dev *dev)
1196 {
1197 struct uart_txx9_port *up = pci_get_drvdata(dev);
1198
1199 pci_set_power_state(dev, PCI_D0);
1200 pci_restore_state(dev);
1201 if (up)
1202 uart_resume_port(&serial_txx9_reg, &up->port);
1203 return 0;
1204 }
1205 #endif
1206
1207 static const struct pci_device_id serial_txx9_pci_tbl[] = {
1208 { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC86C001_MISC) },
1209 { 0, }
1210 };
1211
1212 static struct pci_driver serial_txx9_pci_driver = {
1213 .name = "serial_txx9",
1214 .probe = pciserial_txx9_init_one,
1215 .remove = __devexit_p(pciserial_txx9_remove_one),
1216 #ifdef CONFIG_PM
1217 .suspend = pciserial_txx9_suspend_one,
1218 .resume = pciserial_txx9_resume_one,
1219 #endif
1220 .id_table = serial_txx9_pci_tbl,
1221 };
1222
1223 MODULE_DEVICE_TABLE(pci, serial_txx9_pci_tbl);
1224 #endif /* ENABLE_SERIAL_TXX9_PCI */
1225
1226 static struct platform_device *serial_txx9_plat_devs;
1227
1228 static int __init serial_txx9_init(void)
1229 {
1230 int ret;
1231
1232 printk(KERN_INFO "%s version %s\n", serial_name, serial_version);
1233
1234 ret = uart_register_driver(&serial_txx9_reg);
1235 if (ret)
1236 goto out;
1237
1238 serial_txx9_plat_devs = platform_device_alloc("serial_txx9", -1);
1239 if (!serial_txx9_plat_devs) {
1240 ret = -ENOMEM;
1241 goto unreg_uart_drv;
1242 }
1243
1244 ret = platform_device_add(serial_txx9_plat_devs);
1245 if (ret)
1246 goto put_dev;
1247
1248 serial_txx9_register_ports(&serial_txx9_reg,
1249 &serial_txx9_plat_devs->dev);
1250
1251 ret = platform_driver_register(&serial_txx9_plat_driver);
1252 if (ret)
1253 goto del_dev;
1254
1255 #ifdef ENABLE_SERIAL_TXX9_PCI
1256 ret = pci_register_driver(&serial_txx9_pci_driver);
1257 #endif
1258 if (ret == 0)
1259 goto out;
1260
1261 del_dev:
1262 platform_device_del(serial_txx9_plat_devs);
1263 put_dev:
1264 platform_device_put(serial_txx9_plat_devs);
1265 unreg_uart_drv:
1266 uart_unregister_driver(&serial_txx9_reg);
1267 out:
1268 return ret;
1269 }
1270
1271 static void __exit serial_txx9_exit(void)
1272 {
1273 int i;
1274
1275 #ifdef ENABLE_SERIAL_TXX9_PCI
1276 pci_unregister_driver(&serial_txx9_pci_driver);
1277 #endif
1278 platform_driver_unregister(&serial_txx9_plat_driver);
1279 platform_device_unregister(serial_txx9_plat_devs);
1280 for (i = 0; i < UART_NR; i++) {
1281 struct uart_txx9_port *up = &serial_txx9_ports[i];
1282 if (up->port.iobase || up->port.mapbase)
1283 uart_remove_one_port(&serial_txx9_reg, &up->port);
1284 }
1285
1286 uart_unregister_driver(&serial_txx9_reg);
1287 }
1288
1289 module_init(serial_txx9_init);
1290 module_exit(serial_txx9_exit);
1291
1292 MODULE_LICENSE("GPL");
1293 MODULE_DESCRIPTION("TX39/49 serial driver");
1294
1295 MODULE_ALIAS_CHARDEV_MAJOR(TXX9_TTY_MAJOR);
linux v2.6.22.y-op