eventfd/kaio integration fix
[linux-2.6.22.y-op.git] / drivers / ata / pata_cypress.c
blobd41a7691dd8ea634c55dd990eeead1dfb1ff28f0
1 /*
2 * pata_cypress.c - Cypress PATA for new ATA layer
3 * (C) 2006 Red Hat Inc
4 * Alan Cox <alan@redhat.com>
6 * Based heavily on
7 * linux/drivers/ide/pci/cy82c693.c Version 0.40 Sep. 10, 2002
9 */
11 #include <linux/kernel.h>
12 #include <linux/module.h>
13 #include <linux/pci.h>
14 #include <linux/init.h>
15 #include <linux/blkdev.h>
16 #include <linux/delay.h>
17 #include <scsi/scsi_host.h>
18 #include <linux/libata.h>
20 #define DRV_NAME "pata_cypress"
21 #define DRV_VERSION "0.1.5"
23 /* here are the offset definitions for the registers */
25 enum {
26 CY82_IDE_CMDREG = 0x04,
27 CY82_IDE_ADDRSETUP = 0x48,
28 CY82_IDE_MASTER_IOR = 0x4C,
29 CY82_IDE_MASTER_IOW = 0x4D,
30 CY82_IDE_SLAVE_IOR = 0x4E,
31 CY82_IDE_SLAVE_IOW = 0x4F,
32 CY82_IDE_MASTER_8BIT = 0x50,
33 CY82_IDE_SLAVE_8BIT = 0x51,
35 CY82_INDEX_PORT = 0x22,
36 CY82_DATA_PORT = 0x23,
38 CY82_INDEX_CTRLREG1 = 0x01,
39 CY82_INDEX_CHANNEL0 = 0x30,
40 CY82_INDEX_CHANNEL1 = 0x31,
41 CY82_INDEX_TIMEOUT = 0x32
44 /**
45 * cy82c693_set_piomode - set initial PIO mode data
46 * @ap: ATA interface
47 * @adev: ATA device
49 * Called to do the PIO mode setup.
52 static void cy82c693_set_piomode(struct ata_port *ap, struct ata_device *adev)
54 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
55 struct ata_timing t;
56 const unsigned long T = 1000000 / 33;
57 short time_16, time_8;
58 u32 addr;
60 if (ata_timing_compute(adev, adev->pio_mode, &t, T, 1) < 0) {
61 printk(KERN_ERR DRV_NAME ": mome computation failed.\n");
62 return;
65 time_16 = FIT(t.recover, 0, 15) | (FIT(t.active, 0, 15) << 4);
66 time_8 = FIT(t.act8b, 0, 15) | (FIT(t.rec8b, 0, 15) << 4);
68 if (adev->devno == 0) {
69 pci_read_config_dword(pdev, CY82_IDE_ADDRSETUP, &addr);
71 addr &= ~0x0F; /* Mask bits */
72 addr |= FIT(t.setup, 0, 15);
74 pci_write_config_dword(pdev, CY82_IDE_ADDRSETUP, addr);
75 pci_write_config_byte(pdev, CY82_IDE_MASTER_IOR, time_16);
76 pci_write_config_byte(pdev, CY82_IDE_MASTER_IOW, time_16);
77 pci_write_config_byte(pdev, CY82_IDE_MASTER_8BIT, time_8);
78 } else {
79 pci_read_config_dword(pdev, CY82_IDE_ADDRSETUP, &addr);
81 addr &= ~0xF0; /* Mask bits */
82 addr |= (FIT(t.setup, 0, 15) << 4);
84 pci_write_config_dword(pdev, CY82_IDE_ADDRSETUP, addr);
85 pci_write_config_byte(pdev, CY82_IDE_SLAVE_IOR, time_16);
86 pci_write_config_byte(pdev, CY82_IDE_SLAVE_IOW, time_16);
87 pci_write_config_byte(pdev, CY82_IDE_SLAVE_8BIT, time_8);
91 /**
92 * cy82c693_set_dmamode - set initial DMA mode data
93 * @ap: ATA interface
94 * @adev: ATA device
96 * Called to do the DMA mode setup.
99 static void cy82c693_set_dmamode(struct ata_port *ap, struct ata_device *adev)
101 int reg = CY82_INDEX_CHANNEL0 + ap->port_no;
103 /* Be afraid, be very afraid. Magic registers in low I/O space */
104 outb(reg, 0x22);
105 outb(adev->dma_mode - XFER_MW_DMA_0, 0x23);
107 /* 0x50 gives the best behaviour on the Alpha's using this chip */
108 outb(CY82_INDEX_TIMEOUT, 0x22);
109 outb(0x50, 0x23);
112 static struct scsi_host_template cy82c693_sht = {
113 .module = THIS_MODULE,
114 .name = DRV_NAME,
115 .ioctl = ata_scsi_ioctl,
116 .queuecommand = ata_scsi_queuecmd,
117 .can_queue = ATA_DEF_QUEUE,
118 .this_id = ATA_SHT_THIS_ID,
119 .sg_tablesize = LIBATA_MAX_PRD,
120 .cmd_per_lun = ATA_SHT_CMD_PER_LUN,
121 .emulated = ATA_SHT_EMULATED,
122 .use_clustering = ATA_SHT_USE_CLUSTERING,
123 .proc_name = DRV_NAME,
124 .dma_boundary = ATA_DMA_BOUNDARY,
125 .slave_configure = ata_scsi_slave_config,
126 .slave_destroy = ata_scsi_slave_destroy,
127 .bios_param = ata_std_bios_param,
130 static struct ata_port_operations cy82c693_port_ops = {
131 .port_disable = ata_port_disable,
132 .set_piomode = cy82c693_set_piomode,
133 .set_dmamode = cy82c693_set_dmamode,
134 .mode_filter = ata_pci_default_filter,
136 .tf_load = ata_tf_load,
137 .tf_read = ata_tf_read,
138 .check_status = ata_check_status,
139 .exec_command = ata_exec_command,
140 .dev_select = ata_std_dev_select,
142 .freeze = ata_bmdma_freeze,
143 .thaw = ata_bmdma_thaw,
144 .error_handler = ata_bmdma_error_handler,
145 .post_internal_cmd = ata_bmdma_post_internal_cmd,
146 .cable_detect = ata_cable_40wire,
148 .bmdma_setup = ata_bmdma_setup,
149 .bmdma_start = ata_bmdma_start,
150 .bmdma_stop = ata_bmdma_stop,
151 .bmdma_status = ata_bmdma_status,
153 .qc_prep = ata_qc_prep,
154 .qc_issue = ata_qc_issue_prot,
156 .data_xfer = ata_data_xfer,
158 .irq_handler = ata_interrupt,
159 .irq_clear = ata_bmdma_irq_clear,
160 .irq_on = ata_irq_on,
161 .irq_ack = ata_irq_ack,
163 .port_start = ata_port_start,
166 static int cy82c693_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
168 static const struct ata_port_info info = {
169 .sht = &cy82c693_sht,
170 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST,
171 .pio_mask = 0x1f,
172 .mwdma_mask = 0x07,
173 .port_ops = &cy82c693_port_ops
175 const struct ata_port_info *ppi[] = { &info, &ata_dummy_port_info };
177 /* Devfn 1 is the ATA primary. The secondary is magic and on devfn2.
178 For the moment we don't handle the secondary. FIXME */
180 if (PCI_FUNC(pdev->devfn) != 1)
181 return -ENODEV;
183 return ata_pci_init_one(pdev, ppi);
186 static const struct pci_device_id cy82c693[] = {
187 { PCI_VDEVICE(CONTAQ, PCI_DEVICE_ID_CONTAQ_82C693), },
189 { },
192 static struct pci_driver cy82c693_pci_driver = {
193 .name = DRV_NAME,
194 .id_table = cy82c693,
195 .probe = cy82c693_init_one,
196 .remove = ata_pci_remove_one,
197 #ifdef CONFIG_PM
198 .suspend = ata_pci_device_suspend,
199 .resume = ata_pci_device_resume,
200 #endif
203 static int __init cy82c693_init(void)
205 return pci_register_driver(&cy82c693_pci_driver);
209 static void __exit cy82c693_exit(void)
211 pci_unregister_driver(&cy82c693_pci_driver);
215 MODULE_AUTHOR("Alan Cox");
216 MODULE_DESCRIPTION("low-level driver for the CY82C693 PATA controller");
217 MODULE_LICENSE("GPL");
218 MODULE_DEVICE_TABLE(pci, cy82c693);
219 MODULE_VERSION(DRV_VERSION);
221 module_init(cy82c693_init);
222 module_exit(cy82c693_exit);