include/asm-sh/pgtable.h

   1 #ifndef __ASM_SH_PGTABLE_H
   2 #define __ASM_SH_PGTABLE_H
   3
   4 #include <asm-generic/4level-fixup.h>
   5
   6 /*
   7  * Copyright (C) 1999 Niibe Yutaka
   8  * Copyright (C) 2002, 2003, 2004 Paul Mundt
   9  */
  10
  11 #include <asm/pgtable-2level.h>
  12
  13 /*
  14  * This file contains the functions and defines necessary to modify and use
  15  * the SuperH page table tree.
  16  */
  17 #ifndef __ASSEMBLY__
  18 #include <asm/processor.h>
  19 #include <asm/addrspace.h>
  20 #include <asm/fixmap.h>
  21 #include <linux/threads.h>
  22
  23 extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
  24 extern void paging_init(void);
  25
  26 /*
  27  * Basically we have the same two-level (which is the logical three level
  28  * Linux page table layout folded) page tables as the i386.
  29  */
  30
  31 /*
  32  * ZERO_PAGE is a global shared page that is always zero: used
  33  * for zero-mapped memory areas etc..
  34  */
  35 extern unsigned long empty_zero_page[1024];
  36 #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
  37
  38 #endif /* !__ASSEMBLY__ */
  39
  40 #define PMD_SIZE        (1UL << PMD_SHIFT)
  41 #define PMD_MASK        (~(PMD_SIZE-1))
  42 #define PGDIR_SIZE      (1UL << PGDIR_SHIFT)
  43 #define PGDIR_MASK      (~(PGDIR_SIZE-1))
  44
  45 #define USER_PTRS_PER_PGD       (TASK_SIZE/PGDIR_SIZE)
  46 #define FIRST_USER_ADDRESS      0
  47
  48 #define PTE_PHYS_MASK   0x1ffff000
  49
  50 #ifndef __ASSEMBLY__
  51 /*
  52  * First 1MB map is used by fixed purpose.
  53  * Currently only 4-enty (16kB) is used (see arch/sh/mm/cache.c)
  54  */
  55 #define VMALLOC_START   (P3SEG+0x00100000)
  56 #define VMALLOC_END     (FIXADDR_START-2*PAGE_SIZE)
  57
  58 #define _PAGE_WT        0x001  /* WT-bit on SH-4, 0 on SH-3 */
  59 #define _PAGE_HW_SHARED 0x002  /* SH-bit  : page is shared among processes */
  60 #define _PAGE_DIRTY     0x004  /* D-bit   : page changed */
  61 #define _PAGE_CACHABLE  0x008  /* C-bit   : cachable */
  62 #define _PAGE_SZ0       0x010  /* SZ0-bit : Size of page */
  63 #define _PAGE_RW        0x020  /* PR0-bit : write access allowed */
  64 #define _PAGE_USER      0x040  /* PR1-bit : user space access allowed */
  65 #define _PAGE_SZ1       0x080  /* SZ1-bit : Size of page (on SH-4) */
  66 #define _PAGE_PRESENT   0x100  /* V-bit   : page is valid */
  67 #define _PAGE_PROTNONE  0x200  /* software: if not present  */
  68 #define _PAGE_ACCESSED  0x400  /* software: page referenced */
  69 #define _PAGE_U0_SHARED 0x800  /* software: page is shared in user space */
  70
  71 #define _PAGE_FILE      _PAGE_WT  /* software: pagecache or swap? */
  72
  73 /* software: moves to PTEA.TC (Timing Control) */
  74 #define _PAGE_PCC_AREA5 0x00000000      /* use BSC registers for area5 */
  75 #define _PAGE_PCC_AREA6 0x80000000      /* use BSC registers for area6 */
  76
  77 /* software: moves to PTEA.SA[2:0] (Space Attributes) */
  78 #define _PAGE_PCC_IODYN 0x00000001      /* IO space, dynamically sized bus */
  79 #define _PAGE_PCC_IO8   0x20000000      /* IO space, 8 bit bus */
  80 #define _PAGE_PCC_IO16  0x20000001      /* IO space, 16 bit bus */
  81 #define _PAGE_PCC_COM8  0x40000000      /* Common Memory space, 8 bit bus */
  82 #define _PAGE_PCC_COM16 0x40000001      /* Common Memory space, 16 bit bus */
  83 #define _PAGE_PCC_ATR8  0x60000000      /* Attribute Memory space, 8 bit bus */
  84 #define _PAGE_PCC_ATR16 0x60000001      /* Attribute Memory space, 6 bit bus */
  85
  86
  87 /* Mask which drop software flags
  88  * We also drop WT bit since it is used for _PAGE_FILE
  89  * bit in this implementation.
  90  */
  91 #define _PAGE_CLEAR_FLAGS       (_PAGE_WT | _PAGE_PROTNONE | _PAGE_ACCESSED | _PAGE_U0_SHARED)
  92
  93 #if defined(CONFIG_CPU_SH3)
  94 /*
  95  * MMU on SH-3 has bug on SH-bit: We can't use it if MMUCR.IX=1.
  96  * Work around: Just drop SH-bit.
  97  */
  98 #define _PAGE_FLAGS_HARDWARE_MASK       (0x1fffffff & ~(_PAGE_CLEAR_FLAGS | _PAGE_HW_SHARED))
  99 #else
 100 #define _PAGE_FLAGS_HARDWARE_MASK       (0x1fffffff & ~(_PAGE_CLEAR_FLAGS))
 101 #endif
 102
 103 /* Hardware flags: SZ0=1 (4k-byte) */
 104 #define _PAGE_FLAGS_HARD        _PAGE_SZ0
 105
 106 #if defined(CONFIG_HUGETLB_PAGE_SIZE_64K)
 107 #define _PAGE_SZHUGE    (_PAGE_SZ1)
 108 #elif defined(CONFIG_HUGETLB_PAGE_SIZE_1MB)
 109 #define _PAGE_SZHUGE    (_PAGE_SZ0 | _PAGE_SZ1)
 110 #endif
 111
 112 #define _PAGE_SHARED    _PAGE_U0_SHARED
 113
 114 #define _PAGE_TABLE     (_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_ACCESSED | _PAGE_DIRTY)
 115 #define _KERNPG_TABLE   (_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED | _PAGE_DIRTY)
 116 #define _PAGE_CHG_MASK  (PTE_MASK | _PAGE_ACCESSED | _PAGE_CACHABLE | _PAGE_DIRTY | _PAGE_SHARED)
 117
 118 #ifdef CONFIG_MMU
 119 #define PAGE_NONE       __pgprot(_PAGE_PROTNONE | _PAGE_CACHABLE |_PAGE_ACCESSED | _PAGE_FLAGS_HARD)
 120 #define PAGE_SHARED     __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_CACHABLE |_PAGE_ACCESSED | _PAGE_SHARED | _PAGE_FLAGS_HARD)
 121 #define PAGE_COPY       __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_CACHABLE | _PAGE_ACCESSED | _PAGE_FLAGS_HARD)
 122 #define PAGE_READONLY   __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_CACHABLE | _PAGE_ACCESSED | _PAGE_FLAGS_HARD)
 123 #define PAGE_KERNEL     __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_CACHABLE | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_HW_SHARED | _PAGE_FLAGS_HARD)
 124 #define PAGE_KERNEL_NOCACHE \
 125                         __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_HW_SHARED | _PAGE_FLAGS_HARD)
 126 #define PAGE_KERNEL_RO  __pgprot(_PAGE_PRESENT | _PAGE_CACHABLE | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_HW_SHARED | _PAGE_FLAGS_HARD)
 127 #define PAGE_KERNEL_PCC(slot, type) \
 128                         __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_FLAGS_HARD | (slot ? _PAGE_PCC_AREA5 : _PAGE_PCC_AREA6) | (type))
 129 #else /* no mmu */
 130 #define PAGE_NONE               __pgprot(0)
 131 #define PAGE_SHARED             __pgprot(0)
 132 #define PAGE_COPY               __pgprot(0)
 133 #define PAGE_READONLY           __pgprot(0)
 134 #define PAGE_KERNEL             __pgprot(0)
 135 #define PAGE_KERNEL_NOCACHE     __pgprot(0)
 136 #define PAGE_KERNEL_RO          __pgprot(0)
 137 #define PAGE_KERNEL_PCC         __pgprot(0)
 138 #endif
 139
 140 /*
 141  * As i386 and MIPS, SuperH can't do page protection for execute, and
 142  * considers that the same as a read.  Also, write permissions imply
 143  * read permissions. This is the closest we can get..
 144  */
 145
 146 #define __P000  PAGE_NONE
 147 #define __P001  PAGE_READONLY
 148 #define __P010  PAGE_COPY
 149 #define __P011  PAGE_COPY
 150 #define __P100  PAGE_READONLY
 151 #define __P101  PAGE_READONLY
 152 #define __P110  PAGE_COPY
 153 #define __P111  PAGE_COPY
 154
 155 #define __S000  PAGE_NONE
 156 #define __S001  PAGE_READONLY
 157 #define __S010  PAGE_SHARED
 158 #define __S011  PAGE_SHARED
 159 #define __S100  PAGE_READONLY
 160 #define __S101  PAGE_READONLY
 161 #define __S110  PAGE_SHARED
 162 #define __S111  PAGE_SHARED
 163
 164 #define pte_none(x)     (!pte_val(x))
 165 #define pte_present(x)  (pte_val(x) & (_PAGE_PRESENT | _PAGE_PROTNONE))
 166 #define pte_clear(mm,addr,xp)   do { set_pte_at(mm, addr, xp, __pte(0)); } while (0)
 167
 168 #define pmd_none(x)     (!pmd_val(x))
 169 #define pmd_present(x)  (pmd_val(x) & _PAGE_PRESENT)
 170 #define pmd_clear(xp)   do { set_pmd(xp, __pmd(0)); } while (0)
 171 #define pmd_bad(x)      ((pmd_val(x) & (~PAGE_MASK & ~_PAGE_USER)) != _KERNPG_TABLE)
 172
 173 #define pages_to_mb(x)  ((x) >> (20-PAGE_SHIFT))
 174 #define pte_page(x)     phys_to_page(pte_val(x)&PTE_PHYS_MASK)
 175
 176 /*
 177  * The following only work if pte_present() is true.
 178  * Undefined behaviour if not..
 179  */
 180 static inline int pte_read(pte_t pte) { return pte_val(pte) & _PAGE_USER; }
 181 static inline int pte_exec(pte_t pte) { return pte_val(pte) & _PAGE_USER; }
 182 static inline int pte_dirty(pte_t pte){ return pte_val(pte) & _PAGE_DIRTY; }
 183 static inline int pte_young(pte_t pte){ return pte_val(pte) & _PAGE_ACCESSED; }
 184 static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE; }
 185 static inline int pte_write(pte_t pte){ return pte_val(pte) & _PAGE_RW; }
 186 static inline int pte_not_present(pte_t pte){ return !(pte_val(pte) & _PAGE_PRESENT); }
 187
 188 static inline pte_t pte_rdprotect(pte_t pte)    { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_USER)); return pte; }
 189 static inline pte_t pte_exprotect(pte_t pte)    { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_USER)); return pte; }
 190 static inline pte_t pte_mkclean(pte_t pte)      { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_DIRTY)); return pte; }
 191 static inline pte_t pte_mkold(pte_t pte)        { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_ACCESSED)); return pte; }
 192 static inline pte_t pte_wrprotect(pte_t pte)    { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_RW)); return pte; }
 193 static inline pte_t pte_mkread(pte_t pte)       { set_pte(&pte, __pte(pte_val(pte) | _PAGE_USER)); return pte; }
 194 static inline pte_t pte_mkexec(pte_t pte)       { set_pte(&pte, __pte(pte_val(pte) | _PAGE_USER)); return pte; }
 195 static inline pte_t pte_mkdirty(pte_t pte)      { set_pte(&pte, __pte(pte_val(pte) | _PAGE_DIRTY)); return pte; }
 196 static inline pte_t pte_mkyoung(pte_t pte)      { set_pte(&pte, __pte(pte_val(pte) | _PAGE_ACCESSED)); return pte; }
 197 static inline pte_t pte_mkwrite(pte_t pte)      { set_pte(&pte, __pte(pte_val(pte) | _PAGE_RW)); return pte; }
 198 #ifdef CONFIG_HUGETLB_PAGE
 199 static inline pte_t pte_mkhuge(pte_t pte)       { set_pte(&pte, __pte(pte_val(pte) | _PAGE_SZHUGE)); return pte; }
 200 #endif
 201
 202 /*
 203  * Macro and implementation to make a page protection as uncachable.
 204  */
 205 #define pgprot_noncached pgprot_noncached
 206
 207 static inline pgprot_t pgprot_noncached(pgprot_t _prot)
 208 {
 209         unsigned long prot = pgprot_val(_prot);
 210
 211         prot &= ~_PAGE_CACHABLE;
 212         return __pgprot(prot);
 213 }
 214
 215 #define pgprot_writecombine(prot) __pgprot(pgprot_val(prot) & ~_PAGE_CACHABLE)
 216
 217 /*
 218  * Conversion functions: convert a page and protection to a page entry,
 219  * and a page entry and page directory to the page they refer to.
 220  *
 221  * extern pte_t mk_pte(struct page *page, pgprot_t pgprot)
 222  */
 223 #define mk_pte(page, pgprot)    pfn_pte(page_to_pfn(page), (pgprot))
 224
 225 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
 226 { set_pte(&pte, __pte((pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot))); return pte; }
 227
 228 #define pmd_page_kernel(pmd) \
 229 ((unsigned long) __va(pmd_val(pmd) & PAGE_MASK))
 230
 231 #define pmd_page(pmd) \
 232         (phys_to_page(pmd_val(pmd)))
 233
 234 /* to find an entry in a page-table-directory. */
 235 #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
 236 #define pgd_offset(mm, address) ((mm)->pgd+pgd_index(address))
 237
 238 /* to find an entry in a kernel page-table-directory */
 239 #define pgd_offset_k(address) pgd_offset(&init_mm, address)
 240
 241 /* Find an entry in the third-level page table.. */
 242 #define pte_index(address) \
 243                 ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
 244 #define pte_offset_kernel(dir, address) \
 245         ((pte_t *) pmd_page_kernel(*(dir)) + pte_index(address))
 246 #define pte_offset_map(dir, address) pte_offset_kernel(dir, address)
 247 #define pte_offset_map_nested(dir, address) pte_offset_kernel(dir, address)
 248 #define pte_unmap(pte)          do { } while (0)
 249 #define pte_unmap_nested(pte)   do { } while (0)
 250
 251 struct vm_area_struct;
 252 extern void update_mmu_cache(struct vm_area_struct * vma,
 253                              unsigned long address, pte_t pte);
 254
 255 /* Encode and de-code a swap entry */
 256 /*
 257  * NOTE: We should set ZEROs at the position of _PAGE_PRESENT
 258  *       and _PAGE_PROTNONE bits
 259  */
 260 #define __swp_type(x)           ((x).val & 0xff)
 261 #define __swp_offset(x)         ((x).val >> 10)
 262 #define __swp_entry(type, offset) ((swp_entry_t) { (type) | ((offset) << 10) })
 263 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) >> 1 })
 264 #define __swp_entry_to_pte(x)   ((pte_t) { (x).val << 1 })
 265
 266 /*
 267  * Encode and decode a nonlinear file mapping entry
 268  */
 269 #define PTE_FILE_MAX_BITS       29
 270 #define pte_to_pgoff(pte)       (pte_val(pte) >> 1)
 271 #define pgoff_to_pte(off)       ((pte_t) { ((off) << 1) | _PAGE_FILE })
 272
 273 typedef pte_t *pte_addr_t;
 274
 275 #endif /* !__ASSEMBLY__ */
 276
 277 #define kern_addr_valid(addr)   (1)
 278
 279 #define io_remap_pfn_range(vma, vaddr, pfn, size, prot)         \
 280                 remap_pfn_range(vma, vaddr, pfn, size, prot)
 281
 282 #define MK_IOSPACE_PFN(space, pfn)      (pfn)
 283 #define GET_IOSPACE(pfn)                0
 284 #define GET_PFN(pfn)                    (pfn)
 285
 286 struct mm_struct;
 287
 288 /*
 289  * No page table caches to initialise
 290  */
 291 #define pgtable_cache_init()    do { } while (0)
 292
 293 #ifndef CONFIG_MMU
 294 extern unsigned int kobjsize(const void *objp);
 295 #endif /* !CONFIG_MMU */
 296
 297 #if defined(CONFIG_CPU_SH4) || defined(CONFIG_SH7705_CACHE_32KB)
 298 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR
 299 extern pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep);
 300 #endif
 301
 302 #include <asm-generic/pgtable.h>
 303
 304 #endif /* __ASM_SH_PAGE_H */
 305