[SCSI] sparc: Port esp to new SBUS driver layer.
[linux-2.6.22.y-op.git] / drivers / scsi / esp.c
blob8e8fc43c1d227c568f9f274ad625b8bc7f8fd72b
1 /* esp.c: ESP Sun SCSI driver.
3 * Copyright (C) 1995, 1998, 2006 David S. Miller (davem@davemloft.net)
4 */
6 /* TODO:
8 * 1) Maybe disable parity checking in config register one for SCSI1
9 * targets. (Gilmore says parity error on the SBus can lock up
10 * old sun4c's)
11 * 2) Add support for DMA2 pipelining.
12 * 3) Add tagged queueing.
15 #include <linux/config.h>
16 #include <linux/kernel.h>
17 #include <linux/delay.h>
18 #include <linux/types.h>
19 #include <linux/string.h>
20 #include <linux/slab.h>
21 #include <linux/blkdev.h>
22 #include <linux/proc_fs.h>
23 #include <linux/stat.h>
24 #include <linux/init.h>
25 #include <linux/spinlock.h>
26 #include <linux/interrupt.h>
27 #include <linux/module.h>
29 #include "esp.h"
31 #include <asm/sbus.h>
32 #include <asm/dma.h>
33 #include <asm/system.h>
34 #include <asm/ptrace.h>
35 #include <asm/pgtable.h>
36 #include <asm/oplib.h>
37 #include <asm/io.h>
38 #include <asm/irq.h>
39 #ifndef __sparc_v9__
40 #include <asm/machines.h>
41 #include <asm/idprom.h>
42 #endif
44 #include <scsi/scsi.h>
45 #include <scsi/scsi_cmnd.h>
46 #include <scsi/scsi_device.h>
47 #include <scsi/scsi_eh.h>
48 #include <scsi/scsi_host.h>
49 #include <scsi/scsi_tcq.h>
51 #define DRV_VERSION "1.101"
53 #define DEBUG_ESP
54 /* #define DEBUG_ESP_HME */
55 /* #define DEBUG_ESP_DATA */
56 /* #define DEBUG_ESP_QUEUE */
57 /* #define DEBUG_ESP_DISCONNECT */
58 /* #define DEBUG_ESP_STATUS */
59 /* #define DEBUG_ESP_PHASES */
60 /* #define DEBUG_ESP_WORKBUS */
61 /* #define DEBUG_STATE_MACHINE */
62 /* #define DEBUG_ESP_CMDS */
63 /* #define DEBUG_ESP_IRQS */
64 /* #define DEBUG_SDTR */
65 /* #define DEBUG_ESP_SG */
67 /* Use the following to sprinkle debugging messages in a way which
68 * suits you if combinations of the above become too verbose when
69 * trying to track down a specific problem.
71 /* #define DEBUG_ESP_MISC */
73 #if defined(DEBUG_ESP)
74 #define ESPLOG(foo) printk foo
75 #else
76 #define ESPLOG(foo)
77 #endif /* (DEBUG_ESP) */
79 #if defined(DEBUG_ESP_HME)
80 #define ESPHME(foo) printk foo
81 #else
82 #define ESPHME(foo)
83 #endif
85 #if defined(DEBUG_ESP_DATA)
86 #define ESPDATA(foo) printk foo
87 #else
88 #define ESPDATA(foo)
89 #endif
91 #if defined(DEBUG_ESP_QUEUE)
92 #define ESPQUEUE(foo) printk foo
93 #else
94 #define ESPQUEUE(foo)
95 #endif
97 #if defined(DEBUG_ESP_DISCONNECT)
98 #define ESPDISC(foo) printk foo
99 #else
100 #define ESPDISC(foo)
101 #endif
103 #if defined(DEBUG_ESP_STATUS)
104 #define ESPSTAT(foo) printk foo
105 #else
106 #define ESPSTAT(foo)
107 #endif
109 #if defined(DEBUG_ESP_PHASES)
110 #define ESPPHASE(foo) printk foo
111 #else
112 #define ESPPHASE(foo)
113 #endif
115 #if defined(DEBUG_ESP_WORKBUS)
116 #define ESPBUS(foo) printk foo
117 #else
118 #define ESPBUS(foo)
119 #endif
121 #if defined(DEBUG_ESP_IRQS)
122 #define ESPIRQ(foo) printk foo
123 #else
124 #define ESPIRQ(foo)
125 #endif
127 #if defined(DEBUG_SDTR)
128 #define ESPSDTR(foo) printk foo
129 #else
130 #define ESPSDTR(foo)
131 #endif
133 #if defined(DEBUG_ESP_MISC)
134 #define ESPMISC(foo) printk foo
135 #else
136 #define ESPMISC(foo)
137 #endif
139 /* Command phase enumeration. */
140 enum {
141 not_issued = 0x00, /* Still in the issue_SC queue. */
143 /* Various forms of selecting a target. */
144 #define in_slct_mask 0x10
145 in_slct_norm = 0x10, /* ESP is arbitrating, normal selection */
146 in_slct_stop = 0x11, /* ESP will select, then stop with IRQ */
147 in_slct_msg = 0x12, /* select, then send a message */
148 in_slct_tag = 0x13, /* select and send tagged queue msg */
149 in_slct_sneg = 0x14, /* select and acquire sync capabilities */
151 /* Any post selection activity. */
152 #define in_phases_mask 0x20
153 in_datain = 0x20, /* Data is transferring from the bus */
154 in_dataout = 0x21, /* Data is transferring to the bus */
155 in_data_done = 0x22, /* Last DMA data operation done (maybe) */
156 in_msgin = 0x23, /* Eating message from target */
157 in_msgincont = 0x24, /* Eating more msg bytes from target */
158 in_msgindone = 0x25, /* Decide what to do with what we got */
159 in_msgout = 0x26, /* Sending message to target */
160 in_msgoutdone = 0x27, /* Done sending msg out */
161 in_cmdbegin = 0x28, /* Sending cmd after abnormal selection */
162 in_cmdend = 0x29, /* Done sending slow cmd */
163 in_status = 0x2a, /* Was in status phase, finishing cmd */
164 in_freeing = 0x2b, /* freeing the bus for cmd cmplt or disc */
165 in_the_dark = 0x2c, /* Don't know what bus phase we are in */
167 /* Special states, ie. not normal bus transitions... */
168 #define in_spec_mask 0x80
169 in_abortone = 0x80, /* Aborting one command currently */
170 in_abortall = 0x81, /* Blowing away all commands we have */
171 in_resetdev = 0x82, /* SCSI target reset in progress */
172 in_resetbus = 0x83, /* SCSI bus reset in progress */
173 in_tgterror = 0x84, /* Target did something stupid */
176 enum {
177 /* Zero has special meaning, see skipahead[12]. */
178 /*0*/ do_never,
180 /*1*/ do_phase_determine,
181 /*2*/ do_reset_bus,
182 /*3*/ do_reset_complete,
183 /*4*/ do_work_bus,
184 /*5*/ do_intr_end
187 /* Forward declarations. */
188 static irqreturn_t esp_intr(int irq, void *dev_id, struct pt_regs *pregs);
190 /* Debugging routines */
191 struct esp_cmdstrings {
192 u8 cmdchar;
193 char *text;
194 } esp_cmd_strings[] = {
195 /* Miscellaneous */
196 { ESP_CMD_NULL, "ESP_NOP", },
197 { ESP_CMD_FLUSH, "FIFO_FLUSH", },
198 { ESP_CMD_RC, "RSTESP", },
199 { ESP_CMD_RS, "RSTSCSI", },
200 /* Disconnected State Group */
201 { ESP_CMD_RSEL, "RESLCTSEQ", },
202 { ESP_CMD_SEL, "SLCTNATN", },
203 { ESP_CMD_SELA, "SLCTATN", },
204 { ESP_CMD_SELAS, "SLCTATNSTOP", },
205 { ESP_CMD_ESEL, "ENSLCTRESEL", },
206 { ESP_CMD_DSEL, "DISSELRESEL", },
207 { ESP_CMD_SA3, "SLCTATN3", },
208 { ESP_CMD_RSEL3, "RESLCTSEQ", },
209 /* Target State Group */
210 { ESP_CMD_SMSG, "SNDMSG", },
211 { ESP_CMD_SSTAT, "SNDSTATUS", },
212 { ESP_CMD_SDATA, "SNDDATA", },
213 { ESP_CMD_DSEQ, "DISCSEQ", },
214 { ESP_CMD_TSEQ, "TERMSEQ", },
215 { ESP_CMD_TCCSEQ, "TRGTCMDCOMPSEQ", },
216 { ESP_CMD_DCNCT, "DISC", },
217 { ESP_CMD_RMSG, "RCVMSG", },
218 { ESP_CMD_RCMD, "RCVCMD", },
219 { ESP_CMD_RDATA, "RCVDATA", },
220 { ESP_CMD_RCSEQ, "RCVCMDSEQ", },
221 /* Initiator State Group */
222 { ESP_CMD_TI, "TRANSINFO", },
223 { ESP_CMD_ICCSEQ, "INICMDSEQCOMP", },
224 { ESP_CMD_MOK, "MSGACCEPTED", },
225 { ESP_CMD_TPAD, "TPAD", },
226 { ESP_CMD_SATN, "SATN", },
227 { ESP_CMD_RATN, "RATN", },
229 #define NUM_ESP_COMMANDS ((sizeof(esp_cmd_strings)) / (sizeof(struct esp_cmdstrings)))
231 /* Print textual representation of an ESP command */
232 static inline void esp_print_cmd(u8 espcmd)
234 u8 dma_bit = espcmd & ESP_CMD_DMA;
235 int i;
237 espcmd &= ~dma_bit;
238 for (i = 0; i < NUM_ESP_COMMANDS; i++)
239 if (esp_cmd_strings[i].cmdchar == espcmd)
240 break;
241 if (i == NUM_ESP_COMMANDS)
242 printk("ESP_Unknown");
243 else
244 printk("%s%s", esp_cmd_strings[i].text,
245 ((dma_bit) ? "+DMA" : ""));
248 /* Print the status register's value */
249 static inline void esp_print_statreg(u8 statreg)
251 u8 phase;
253 printk("STATUS<");
254 phase = statreg & ESP_STAT_PMASK;
255 printk("%s,", (phase == ESP_DOP ? "DATA-OUT" :
256 (phase == ESP_DIP ? "DATA-IN" :
257 (phase == ESP_CMDP ? "COMMAND" :
258 (phase == ESP_STATP ? "STATUS" :
259 (phase == ESP_MOP ? "MSG-OUT" :
260 (phase == ESP_MIP ? "MSG_IN" :
261 "unknown")))))));
262 if (statreg & ESP_STAT_TDONE)
263 printk("TRANS_DONE,");
264 if (statreg & ESP_STAT_TCNT)
265 printk("TCOUNT_ZERO,");
266 if (statreg & ESP_STAT_PERR)
267 printk("P_ERROR,");
268 if (statreg & ESP_STAT_SPAM)
269 printk("SPAM,");
270 if (statreg & ESP_STAT_INTR)
271 printk("IRQ,");
272 printk(">");
275 /* Print the interrupt register's value */
276 static inline void esp_print_ireg(u8 intreg)
278 printk("INTREG< ");
279 if (intreg & ESP_INTR_S)
280 printk("SLCT_NATN ");
281 if (intreg & ESP_INTR_SATN)
282 printk("SLCT_ATN ");
283 if (intreg & ESP_INTR_RSEL)
284 printk("RSLCT ");
285 if (intreg & ESP_INTR_FDONE)
286 printk("FDONE ");
287 if (intreg & ESP_INTR_BSERV)
288 printk("BSERV ");
289 if (intreg & ESP_INTR_DC)
290 printk("DISCNCT ");
291 if (intreg & ESP_INTR_IC)
292 printk("ILL_CMD ");
293 if (intreg & ESP_INTR_SR)
294 printk("SCSI_BUS_RESET ");
295 printk(">");
298 /* Print the sequence step registers contents */
299 static inline void esp_print_seqreg(u8 stepreg)
301 stepreg &= ESP_STEP_VBITS;
302 printk("STEP<%s>",
303 (stepreg == ESP_STEP_ASEL ? "SLCT_ARB_CMPLT" :
304 (stepreg == ESP_STEP_SID ? "1BYTE_MSG_SENT" :
305 (stepreg == ESP_STEP_NCMD ? "NOT_IN_CMD_PHASE" :
306 (stepreg == ESP_STEP_PPC ? "CMD_BYTES_LOST" :
307 (stepreg == ESP_STEP_FINI4 ? "CMD_SENT_OK" :
308 "UNKNOWN"))))));
311 static char *phase_string(int phase)
313 switch (phase) {
314 case not_issued:
315 return "UNISSUED";
316 case in_slct_norm:
317 return "SLCTNORM";
318 case in_slct_stop:
319 return "SLCTSTOP";
320 case in_slct_msg:
321 return "SLCTMSG";
322 case in_slct_tag:
323 return "SLCTTAG";
324 case in_slct_sneg:
325 return "SLCTSNEG";
326 case in_datain:
327 return "DATAIN";
328 case in_dataout:
329 return "DATAOUT";
330 case in_data_done:
331 return "DATADONE";
332 case in_msgin:
333 return "MSGIN";
334 case in_msgincont:
335 return "MSGINCONT";
336 case in_msgindone:
337 return "MSGINDONE";
338 case in_msgout:
339 return "MSGOUT";
340 case in_msgoutdone:
341 return "MSGOUTDONE";
342 case in_cmdbegin:
343 return "CMDBEGIN";
344 case in_cmdend:
345 return "CMDEND";
346 case in_status:
347 return "STATUS";
348 case in_freeing:
349 return "FREEING";
350 case in_the_dark:
351 return "CLUELESS";
352 case in_abortone:
353 return "ABORTONE";
354 case in_abortall:
355 return "ABORTALL";
356 case in_resetdev:
357 return "RESETDEV";
358 case in_resetbus:
359 return "RESETBUS";
360 case in_tgterror:
361 return "TGTERROR";
362 default:
363 return "UNKNOWN";
367 #ifdef DEBUG_STATE_MACHINE
368 static inline void esp_advance_phase(struct scsi_cmnd *s, int newphase)
370 ESPLOG(("<%s>", phase_string(newphase)));
371 s->SCp.sent_command = s->SCp.phase;
372 s->SCp.phase = newphase;
374 #else
375 #define esp_advance_phase(__s, __newphase) \
376 (__s)->SCp.sent_command = (__s)->SCp.phase; \
377 (__s)->SCp.phase = (__newphase);
378 #endif
380 #ifdef DEBUG_ESP_CMDS
381 static inline void esp_cmd(struct esp *esp, u8 cmd)
383 esp->espcmdlog[esp->espcmdent] = cmd;
384 esp->espcmdent = (esp->espcmdent + 1) & 31;
385 sbus_writeb(cmd, esp->eregs + ESP_CMD);
387 #else
388 #define esp_cmd(__esp, __cmd) \
389 sbus_writeb((__cmd), ((__esp)->eregs) + ESP_CMD)
390 #endif
392 #define ESP_INTSOFF(__dregs) \
393 sbus_writel(sbus_readl((__dregs)+DMA_CSR)&~(DMA_INT_ENAB), (__dregs)+DMA_CSR)
394 #define ESP_INTSON(__dregs) \
395 sbus_writel(sbus_readl((__dregs)+DMA_CSR)|DMA_INT_ENAB, (__dregs)+DMA_CSR)
396 #define ESP_IRQ_P(__dregs) \
397 (sbus_readl((__dregs)+DMA_CSR) & (DMA_HNDL_INTR|DMA_HNDL_ERROR))
399 /* How we use the various Linux SCSI data structures for operation.
401 * struct scsi_cmnd:
403 * We keep track of the synchronous capabilities of a target
404 * in the device member, using sync_min_period and
405 * sync_max_offset. These are the values we directly write
406 * into the ESP registers while running a command. If offset
407 * is zero the ESP will use asynchronous transfers.
408 * If the borken flag is set we assume we shouldn't even bother
409 * trying to negotiate for synchronous transfer as this target
410 * is really stupid. If we notice the target is dropping the
411 * bus, and we have been allowing it to disconnect, we clear
412 * the disconnect flag.
416 /* Manipulation of the ESP command queues. Thanks to the aha152x driver
417 * and its author, Juergen E. Fischer, for the methods used here.
418 * Note that these are per-ESP queues, not global queues like
419 * the aha152x driver uses.
421 static inline void append_SC(struct scsi_cmnd **SC, struct scsi_cmnd *new_SC)
423 struct scsi_cmnd *end;
425 new_SC->host_scribble = (unsigned char *) NULL;
426 if (!*SC)
427 *SC = new_SC;
428 else {
429 for (end=*SC;end->host_scribble;end=(struct scsi_cmnd *)end->host_scribble)
431 end->host_scribble = (unsigned char *) new_SC;
435 static inline void prepend_SC(struct scsi_cmnd **SC, struct scsi_cmnd *new_SC)
437 new_SC->host_scribble = (unsigned char *) *SC;
438 *SC = new_SC;
441 static inline struct scsi_cmnd *remove_first_SC(struct scsi_cmnd **SC)
443 struct scsi_cmnd *ptr;
444 ptr = *SC;
445 if (ptr)
446 *SC = (struct scsi_cmnd *) (*SC)->host_scribble;
447 return ptr;
450 static inline struct scsi_cmnd *remove_SC(struct scsi_cmnd **SC, int target, int lun)
452 struct scsi_cmnd *ptr, *prev;
454 for (ptr = *SC, prev = NULL;
455 ptr && ((ptr->device->id != target) || (ptr->device->lun != lun));
456 prev = ptr, ptr = (struct scsi_cmnd *) ptr->host_scribble)
458 if (ptr) {
459 if (prev)
460 prev->host_scribble=ptr->host_scribble;
461 else
462 *SC=(struct scsi_cmnd *)ptr->host_scribble;
464 return ptr;
467 /* Resetting various pieces of the ESP scsi driver chipset/buses. */
468 static void esp_reset_dma(struct esp *esp)
470 int can_do_burst16, can_do_burst32, can_do_burst64;
471 int can_do_sbus64;
472 u32 tmp;
474 can_do_burst16 = (esp->bursts & DMA_BURST16) != 0;
475 can_do_burst32 = (esp->bursts & DMA_BURST32) != 0;
476 can_do_burst64 = 0;
477 can_do_sbus64 = 0;
478 if (sbus_can_dma_64bit(esp->sdev))
479 can_do_sbus64 = 1;
480 if (sbus_can_burst64(esp->sdev))
481 can_do_burst64 = (esp->bursts & DMA_BURST64) != 0;
483 /* Punt the DVMA into a known state. */
484 if (esp->dma->revision != dvmahme) {
485 tmp = sbus_readl(esp->dregs + DMA_CSR);
486 sbus_writel(tmp | DMA_RST_SCSI, esp->dregs + DMA_CSR);
487 sbus_writel(tmp & ~DMA_RST_SCSI, esp->dregs + DMA_CSR);
489 switch (esp->dma->revision) {
490 case dvmahme:
491 /* This is the HME DVMA gate array. */
493 sbus_writel(DMA_RESET_FAS366, esp->dregs + DMA_CSR);
494 sbus_writel(DMA_RST_SCSI, esp->dregs + DMA_CSR);
496 esp->prev_hme_dmacsr = (DMA_PARITY_OFF|DMA_2CLKS|DMA_SCSI_DISAB|DMA_INT_ENAB);
497 esp->prev_hme_dmacsr &= ~(DMA_ENABLE|DMA_ST_WRITE|DMA_BRST_SZ);
499 if (can_do_burst64)
500 esp->prev_hme_dmacsr |= DMA_BRST64;
501 else if (can_do_burst32)
502 esp->prev_hme_dmacsr |= DMA_BRST32;
504 if (can_do_sbus64) {
505 esp->prev_hme_dmacsr |= DMA_SCSI_SBUS64;
506 sbus_set_sbus64(esp->sdev, esp->bursts);
509 /* This chip is horrible. */
510 while (sbus_readl(esp->dregs + DMA_CSR) & DMA_PEND_READ)
511 udelay(1);
513 sbus_writel(0, esp->dregs + DMA_CSR);
514 sbus_writel(esp->prev_hme_dmacsr, esp->dregs + DMA_CSR);
516 /* This is necessary to avoid having the SCSI channel
517 * engine lock up on us.
519 sbus_writel(0, esp->dregs + DMA_ADDR);
521 break;
522 case dvmarev2:
523 /* This is the gate array found in the sun4m
524 * NCR SBUS I/O subsystem.
526 if (esp->erev != esp100) {
527 tmp = sbus_readl(esp->dregs + DMA_CSR);
528 sbus_writel(tmp | DMA_3CLKS, esp->dregs + DMA_CSR);
530 break;
531 case dvmarev3:
532 tmp = sbus_readl(esp->dregs + DMA_CSR);
533 tmp &= ~DMA_3CLKS;
534 tmp |= DMA_2CLKS;
535 if (can_do_burst32) {
536 tmp &= ~DMA_BRST_SZ;
537 tmp |= DMA_BRST32;
539 sbus_writel(tmp, esp->dregs + DMA_CSR);
540 break;
541 case dvmaesc1:
542 /* This is the DMA unit found on SCSI/Ether cards. */
543 tmp = sbus_readl(esp->dregs + DMA_CSR);
544 tmp |= DMA_ADD_ENABLE;
545 tmp &= ~DMA_BCNT_ENAB;
546 if (!can_do_burst32 && can_do_burst16) {
547 tmp |= DMA_ESC_BURST;
548 } else {
549 tmp &= ~(DMA_ESC_BURST);
551 sbus_writel(tmp, esp->dregs + DMA_CSR);
552 break;
553 default:
554 break;
556 ESP_INTSON(esp->dregs);
559 /* Reset the ESP chip, _not_ the SCSI bus. */
560 static void __init esp_reset_esp(struct esp *esp)
562 u8 family_code, version;
563 int i;
565 /* Now reset the ESP chip */
566 esp_cmd(esp, ESP_CMD_RC);
567 esp_cmd(esp, ESP_CMD_NULL | ESP_CMD_DMA);
568 esp_cmd(esp, ESP_CMD_NULL | ESP_CMD_DMA);
570 /* Reload the configuration registers */
571 sbus_writeb(esp->cfact, esp->eregs + ESP_CFACT);
572 esp->prev_stp = 0;
573 sbus_writeb(esp->prev_stp, esp->eregs + ESP_STP);
574 esp->prev_soff = 0;
575 sbus_writeb(esp->prev_soff, esp->eregs + ESP_SOFF);
576 sbus_writeb(esp->neg_defp, esp->eregs + ESP_TIMEO);
578 /* This is the only point at which it is reliable to read
579 * the ID-code for a fast ESP chip variants.
581 esp->max_period = ((35 * esp->ccycle) / 1000);
582 if (esp->erev == fast) {
583 version = sbus_readb(esp->eregs + ESP_UID);
584 family_code = (version & 0xf8) >> 3;
585 if (family_code == 0x02)
586 esp->erev = fas236;
587 else if (family_code == 0x0a)
588 esp->erev = fashme; /* Version is usually '5'. */
589 else
590 esp->erev = fas100a;
591 ESPMISC(("esp%d: FAST chip is %s (family=%d, version=%d)\n",
592 esp->esp_id,
593 (esp->erev == fas236) ? "fas236" :
594 ((esp->erev == fas100a) ? "fas100a" :
595 "fasHME"), family_code, (version & 7)));
597 esp->min_period = ((4 * esp->ccycle) / 1000);
598 } else {
599 esp->min_period = ((5 * esp->ccycle) / 1000);
601 esp->max_period = (esp->max_period + 3)>>2;
602 esp->min_period = (esp->min_period + 3)>>2;
604 sbus_writeb(esp->config1, esp->eregs + ESP_CFG1);
605 switch (esp->erev) {
606 case esp100:
607 /* nothing to do */
608 break;
609 case esp100a:
610 sbus_writeb(esp->config2, esp->eregs + ESP_CFG2);
611 break;
612 case esp236:
613 /* Slow 236 */
614 sbus_writeb(esp->config2, esp->eregs + ESP_CFG2);
615 esp->prev_cfg3 = esp->config3[0];
616 sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3);
617 break;
618 case fashme:
619 esp->config2 |= (ESP_CONFIG2_HME32 | ESP_CONFIG2_HMEFENAB);
620 /* fallthrough... */
621 case fas236:
622 /* Fast 236 or HME */
623 sbus_writeb(esp->config2, esp->eregs + ESP_CFG2);
624 for (i = 0; i < 16; i++) {
625 if (esp->erev == fashme) {
626 u8 cfg3;
628 cfg3 = ESP_CONFIG3_FCLOCK | ESP_CONFIG3_OBPUSH;
629 if (esp->scsi_id >= 8)
630 cfg3 |= ESP_CONFIG3_IDBIT3;
631 esp->config3[i] |= cfg3;
632 } else {
633 esp->config3[i] |= ESP_CONFIG3_FCLK;
636 esp->prev_cfg3 = esp->config3[0];
637 sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3);
638 if (esp->erev == fashme) {
639 esp->radelay = 80;
640 } else {
641 if (esp->diff)
642 esp->radelay = 0;
643 else
644 esp->radelay = 96;
646 break;
647 case fas100a:
648 /* Fast 100a */
649 sbus_writeb(esp->config2, esp->eregs + ESP_CFG2);
650 for (i = 0; i < 16; i++)
651 esp->config3[i] |= ESP_CONFIG3_FCLOCK;
652 esp->prev_cfg3 = esp->config3[0];
653 sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3);
654 esp->radelay = 32;
655 break;
656 default:
657 panic("esp: what could it be... I wonder...");
658 break;
661 /* Eat any bitrot in the chip */
662 sbus_readb(esp->eregs + ESP_INTRPT);
663 udelay(100);
666 /* This places the ESP into a known state at boot time. */
667 static void __init esp_bootup_reset(struct esp *esp)
669 u8 tmp;
671 /* Reset the DMA */
672 esp_reset_dma(esp);
674 /* Reset the ESP */
675 esp_reset_esp(esp);
677 /* Reset the SCSI bus, but tell ESP not to generate an irq */
678 tmp = sbus_readb(esp->eregs + ESP_CFG1);
679 tmp |= ESP_CONFIG1_SRRDISAB;
680 sbus_writeb(tmp, esp->eregs + ESP_CFG1);
682 esp_cmd(esp, ESP_CMD_RS);
683 udelay(400);
685 sbus_writeb(esp->config1, esp->eregs + ESP_CFG1);
687 /* Eat any bitrot in the chip and we are done... */
688 sbus_readb(esp->eregs + ESP_INTRPT);
691 static int __init esp_find_dvma(struct esp *esp, struct sbus_dev *dma_sdev)
693 struct sbus_dev *sdev = esp->sdev;
694 struct sbus_dma *dma;
696 if (dma_sdev != NULL) {
697 for_each_dvma(dma) {
698 if (dma->sdev == dma_sdev)
699 break;
701 } else {
702 for_each_dvma(dma) {
703 /* If allocated already, can't use it. */
704 if (dma->allocated)
705 continue;
707 if (dma->sdev == NULL)
708 break;
710 /* If bus + slot are the same and it has the
711 * correct OBP name, it's ours.
713 if (sdev->bus == dma->sdev->bus &&
714 sdev->slot == dma->sdev->slot &&
715 (!strcmp(dma->sdev->prom_name, "dma") ||
716 !strcmp(dma->sdev->prom_name, "espdma")))
717 break;
721 /* If we don't know how to handle the dvma,
722 * do not use this device.
724 if (dma == NULL) {
725 printk("Cannot find dvma for ESP%d's SCSI\n", esp->esp_id);
726 return -1;
728 if (dma->allocated) {
729 printk("esp%d: can't use my espdma\n", esp->esp_id);
730 return -1;
732 dma->allocated = 1;
733 esp->dma = dma;
734 esp->dregs = dma->regs;
736 return 0;
739 static int __init esp_map_regs(struct esp *esp, int hme)
741 struct sbus_dev *sdev = esp->sdev;
742 struct resource *res;
744 /* On HME, two reg sets exist, first is DVMA,
745 * second is ESP registers.
747 if (hme)
748 res = &sdev->resource[1];
749 else
750 res = &sdev->resource[0];
752 esp->eregs = sbus_ioremap(res, 0, ESP_REG_SIZE, "ESP Registers");
754 if (esp->eregs == 0)
755 return -1;
756 return 0;
759 static int __init esp_map_cmdarea(struct esp *esp)
761 struct sbus_dev *sdev = esp->sdev;
763 esp->esp_command = sbus_alloc_consistent(sdev, 16,
764 &esp->esp_command_dvma);
765 if (esp->esp_command == NULL ||
766 esp->esp_command_dvma == 0)
767 return -1;
768 return 0;
771 static int __init esp_register_irq(struct esp *esp)
773 esp->ehost->irq = esp->irq = esp->sdev->irqs[0];
775 /* We used to try various overly-clever things to
776 * reduce the interrupt processing overhead on
777 * sun4c/sun4m when multiple ESP's shared the
778 * same IRQ. It was too complex and messy to
779 * sanely maintain.
781 if (request_irq(esp->ehost->irq, esp_intr,
782 SA_SHIRQ, "ESP SCSI", esp)) {
783 printk("esp%d: Cannot acquire irq line\n",
784 esp->esp_id);
785 return -1;
788 printk("esp%d: IRQ %d ", esp->esp_id,
789 esp->ehost->irq);
791 return 0;
794 static void __init esp_get_scsi_id(struct esp *esp)
796 struct sbus_dev *sdev = esp->sdev;
797 struct device_node *dp = sdev->ofdev.node;
799 esp->scsi_id = of_getintprop_default(dp,
800 "initiator-id",
801 -1);
802 if (esp->scsi_id == -1)
803 esp->scsi_id = of_getintprop_default(dp,
804 "scsi-initiator-id",
805 -1);
806 if (esp->scsi_id == -1)
807 esp->scsi_id = (sdev->bus == NULL) ? 7 :
808 of_getintprop_default(sdev->bus->ofdev.node,
809 "scsi-initiator-id",
811 esp->ehost->this_id = esp->scsi_id;
812 esp->scsi_id_mask = (1 << esp->scsi_id);
816 static void __init esp_get_clock_params(struct esp *esp)
818 struct sbus_dev *sdev = esp->sdev;
819 int prom_node = esp->prom_node;
820 int sbus_prom_node;
821 unsigned int fmhz;
822 u8 ccf;
824 if (sdev != NULL && sdev->bus != NULL)
825 sbus_prom_node = sdev->bus->prom_node;
826 else
827 sbus_prom_node = 0;
829 /* This is getting messy but it has to be done
830 * correctly or else you get weird behavior all
831 * over the place. We are trying to basically
832 * figure out three pieces of information.
834 * a) Clock Conversion Factor
836 * This is a representation of the input
837 * crystal clock frequency going into the
838 * ESP on this machine. Any operation whose
839 * timing is longer than 400ns depends on this
840 * value being correct. For example, you'll
841 * get blips for arbitration/selection during
842 * high load or with multiple targets if this
843 * is not set correctly.
845 * b) Selection Time-Out
847 * The ESP isn't very bright and will arbitrate
848 * for the bus and try to select a target
849 * forever if you let it. This value tells
850 * the ESP when it has taken too long to
851 * negotiate and that it should interrupt
852 * the CPU so we can see what happened.
853 * The value is computed as follows (from
854 * NCR/Symbios chip docs).
856 * (Time Out Period) * (Input Clock)
857 * STO = ----------------------------------
858 * (8192) * (Clock Conversion Factor)
860 * You usually want the time out period to be
861 * around 250ms, I think we'll set it a little
862 * bit higher to account for fully loaded SCSI
863 * bus's and slow devices that don't respond so
864 * quickly to selection attempts. (yeah, I know
865 * this is out of spec. but there is a lot of
866 * buggy pieces of firmware out there so bite me)
868 * c) Imperical constants for synchronous offset
869 * and transfer period register values
871 * This entails the smallest and largest sync
872 * period we could ever handle on this ESP.
875 fmhz = prom_getintdefault(prom_node, "clock-frequency", -1);
876 if (fmhz == -1)
877 fmhz = (!sbus_prom_node) ? 0 :
878 prom_getintdefault(sbus_prom_node, "clock-frequency", -1);
880 if (fmhz <= (5000000))
881 ccf = 0;
882 else
883 ccf = (((5000000 - 1) + (fmhz))/(5000000));
885 if (!ccf || ccf > 8) {
886 /* If we can't find anything reasonable,
887 * just assume 20MHZ. This is the clock
888 * frequency of the older sun4c's where I've
889 * been unable to find the clock-frequency
890 * PROM property. All other machines provide
891 * useful values it seems.
893 ccf = ESP_CCF_F4;
894 fmhz = (20000000);
897 if (ccf == (ESP_CCF_F7 + 1))
898 esp->cfact = ESP_CCF_F0;
899 else if (ccf == ESP_CCF_NEVER)
900 esp->cfact = ESP_CCF_F2;
901 else
902 esp->cfact = ccf;
903 esp->raw_cfact = ccf;
905 esp->cfreq = fmhz;
906 esp->ccycle = ESP_MHZ_TO_CYCLE(fmhz);
907 esp->ctick = ESP_TICK(ccf, esp->ccycle);
908 esp->neg_defp = ESP_NEG_DEFP(fmhz, ccf);
909 esp->sync_defp = SYNC_DEFP_SLOW;
911 printk("SCSI ID %d Clk %dMHz CCYC=%d CCF=%d TOut %d ",
912 esp->scsi_id, (fmhz / 1000000),
913 (int)esp->ccycle, (int)ccf, (int) esp->neg_defp);
916 static void __init esp_get_bursts(struct esp *esp, struct sbus_dev *dma)
918 struct sbus_dev *sdev = esp->sdev;
919 u8 bursts;
921 bursts = prom_getintdefault(esp->prom_node, "burst-sizes", 0xff);
923 if (dma) {
924 u8 tmp = prom_getintdefault(dma->prom_node,
925 "burst-sizes", 0xff);
926 if (tmp != 0xff)
927 bursts &= tmp;
930 if (sdev->bus) {
931 u8 tmp = prom_getintdefault(sdev->bus->prom_node,
932 "burst-sizes", 0xff);
933 if (tmp != 0xff)
934 bursts &= tmp;
937 if (bursts == 0xff ||
938 (bursts & DMA_BURST16) == 0 ||
939 (bursts & DMA_BURST32) == 0)
940 bursts = (DMA_BURST32 - 1);
942 esp->bursts = bursts;
945 static void __init esp_get_revision(struct esp *esp)
947 u8 tmp;
949 esp->config1 = (ESP_CONFIG1_PENABLE | (esp->scsi_id & 7));
950 esp->config2 = (ESP_CONFIG2_SCSI2ENAB | ESP_CONFIG2_REGPARITY);
951 sbus_writeb(esp->config2, esp->eregs + ESP_CFG2);
953 tmp = sbus_readb(esp->eregs + ESP_CFG2);
954 tmp &= ~ESP_CONFIG2_MAGIC;
955 if (tmp != (ESP_CONFIG2_SCSI2ENAB | ESP_CONFIG2_REGPARITY)) {
956 /* If what we write to cfg2 does not come back, cfg2
957 * is not implemented, therefore this must be a plain
958 * esp100.
960 esp->erev = esp100;
961 printk("NCR53C90(esp100)\n");
962 } else {
963 esp->config2 = 0;
964 esp->prev_cfg3 = esp->config3[0] = 5;
965 sbus_writeb(esp->config2, esp->eregs + ESP_CFG2);
966 sbus_writeb(0, esp->eregs + ESP_CFG3);
967 sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3);
969 tmp = sbus_readb(esp->eregs + ESP_CFG3);
970 if (tmp != 5) {
971 /* The cfg2 register is implemented, however
972 * cfg3 is not, must be esp100a.
974 esp->erev = esp100a;
975 printk("NCR53C90A(esp100a)\n");
976 } else {
977 int target;
979 for (target = 0; target < 16; target++)
980 esp->config3[target] = 0;
981 esp->prev_cfg3 = 0;
982 sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3);
984 /* All of cfg{1,2,3} implemented, must be one of
985 * the fas variants, figure out which one.
987 if (esp->raw_cfact > ESP_CCF_F5) {
988 esp->erev = fast;
989 esp->sync_defp = SYNC_DEFP_FAST;
990 printk("NCR53C9XF(espfast)\n");
991 } else {
992 esp->erev = esp236;
993 printk("NCR53C9x(esp236)\n");
995 esp->config2 = 0;
996 sbus_writeb(esp->config2, esp->eregs + ESP_CFG2);
1001 static void __init esp_init_swstate(struct esp *esp)
1003 int i;
1005 /* Command queues... */
1006 esp->current_SC = NULL;
1007 esp->disconnected_SC = NULL;
1008 esp->issue_SC = NULL;
1010 /* Target and current command state... */
1011 esp->targets_present = 0;
1012 esp->resetting_bus = 0;
1013 esp->snip = 0;
1015 init_waitqueue_head(&esp->reset_queue);
1017 /* Debugging... */
1018 for(i = 0; i < 32; i++)
1019 esp->espcmdlog[i] = 0;
1020 esp->espcmdent = 0;
1022 /* MSG phase state... */
1023 for(i = 0; i < 16; i++) {
1024 esp->cur_msgout[i] = 0;
1025 esp->cur_msgin[i] = 0;
1027 esp->prevmsgout = esp->prevmsgin = 0;
1028 esp->msgout_len = esp->msgin_len = 0;
1030 /* Clear the one behind caches to hold unmatchable values. */
1031 esp->prev_soff = esp->prev_stp = esp->prev_cfg3 = 0xff;
1032 esp->prev_hme_dmacsr = 0xffffffff;
1035 static int __init detect_one_esp(struct scsi_host_template *tpnt,
1036 struct device *dev,
1037 struct sbus_dev *esp_dev,
1038 struct sbus_dev *espdma,
1039 struct sbus_bus *sbus,
1040 int hme)
1042 static int instance;
1043 struct Scsi_Host *esp_host = scsi_host_alloc(tpnt, sizeof(struct esp));
1044 struct esp *esp;
1046 if (!esp_host)
1047 return -ENOMEM;
1049 if (hme)
1050 esp_host->max_id = 16;
1051 esp = (struct esp *) esp_host->hostdata;
1052 esp->ehost = esp_host;
1053 esp->sdev = esp_dev;
1054 esp->esp_id = instance;
1055 esp->prom_node = esp_dev->prom_node;
1056 prom_getstring(esp->prom_node, "name", esp->prom_name,
1057 sizeof(esp->prom_name));
1059 if (esp_find_dvma(esp, espdma) < 0)
1060 goto fail_unlink;
1061 if (esp_map_regs(esp, hme) < 0) {
1062 printk("ESP registers unmappable");
1063 goto fail_dvma_release;
1065 if (esp_map_cmdarea(esp) < 0) {
1066 printk("ESP DVMA transport area unmappable");
1067 goto fail_unmap_regs;
1069 if (esp_register_irq(esp) < 0)
1070 goto fail_unmap_cmdarea;
1072 esp_get_scsi_id(esp);
1074 esp->diff = prom_getbool(esp->prom_node, "differential");
1075 if (esp->diff)
1076 printk("Differential ");
1078 esp_get_clock_params(esp);
1079 esp_get_bursts(esp, espdma);
1080 esp_get_revision(esp);
1081 esp_init_swstate(esp);
1083 esp_bootup_reset(esp);
1085 if (scsi_add_host(esp_host, dev))
1086 goto fail_free_irq;
1088 dev_set_drvdata(&esp_dev->ofdev.dev, esp);
1090 scsi_scan_host(esp_host);
1091 instance++;
1093 return 0;
1095 fail_free_irq:
1096 free_irq(esp->ehost->irq, esp);
1098 fail_unmap_cmdarea:
1099 sbus_free_consistent(esp->sdev, 16,
1100 (void *) esp->esp_command,
1101 esp->esp_command_dvma);
1103 fail_unmap_regs:
1104 sbus_iounmap(esp->eregs, ESP_REG_SIZE);
1106 fail_dvma_release:
1107 esp->dma->allocated = 0;
1109 fail_unlink:
1110 scsi_host_put(esp_host);
1111 return -1;
1114 /* Detecting ESP chips on the machine. This is the simple and easy
1115 * version.
1117 static int __devexit esp_remove_common(struct esp *esp)
1119 unsigned int irq = esp->ehost->irq;
1121 scsi_remove_host(esp->ehost);
1123 scsi_host_put(esp->ehost);
1124 esp->ehost = NULL;
1126 ESP_INTSOFF(esp->dregs);
1127 #if 0
1128 esp_reset_dma(esp);
1129 esp_reset_esp(esp);
1130 #endif
1132 free_irq(irq, esp);
1133 sbus_free_consistent(esp->sdev, 16,
1134 (void *) esp->esp_command, esp->esp_command_dvma);
1135 sbus_iounmap(esp->eregs, ESP_REG_SIZE);
1136 esp->dma->allocated = 0;
1138 kfree(esp);
1140 return 0;
1144 #ifdef CONFIG_SUN4
1146 #include <asm/sun4paddr.h>
1148 static struct sbus_dev sun4_esp_dev;
1150 static int __init esp_sun4_probe(struct scsi_host_template *tpnt)
1152 if (sun4_esp_physaddr) {
1153 memset(&sun4_esp_dev, 0, sizeof(esp_dev));
1154 sun4_esp_dev.reg_addrs[0].phys_addr = sun4_esp_physaddr;
1155 sun4_esp_dev.irqs[0] = 4;
1156 sun4_esp_dev.resource[0].start = sun4_esp_physaddr;
1157 sun4_esp_dev.resource[0].end =
1158 sun4_esp_physaddr + ESP_REG_SIZE - 1;
1159 sun4_esp_dev.resource[0].flags = IORESOURCE_IO;
1161 return detect_one_esp(tpnt, NULL,
1162 &sun4_esp_dev, NULL, NULL, 0);
1164 return 0;
1167 static int __devexit esp_sun4_remove(void)
1169 struct esp *esp = dev_get_drvdata(&dev->dev);
1171 return esp_remove_common(esp);
1174 #else /* !CONFIG_SUN4 */
1176 static int __devinit esp_sbus_probe(struct of_device *dev, const struct of_device_id *match)
1178 struct sbus_dev *sdev = to_sbus_device(&dev->dev);
1179 struct device_node *dp = dev->node;
1180 struct sbus_dev *dma_sdev = NULL;
1181 int hme = 0;
1183 if (dp->parent &&
1184 (!strcmp(dp->parent->name, "espdma") ||
1185 !strcmp(dp->parent->name, "dma")))
1186 dma_sdev = sdev->parent;
1187 else if (!strcmp(dp->name, "SUNW,fas")) {
1188 dma_sdev = sdev;
1189 hme = 1;
1192 return detect_one_esp(match->data, &dev->dev,
1193 sdev, dma_sdev, sdev->bus, hme);
1196 static int __devexit esp_sbus_remove(struct of_device *dev)
1198 struct esp *esp = dev_get_drvdata(&dev->dev);
1200 return esp_remove_common(esp);
1203 #endif /* !CONFIG_SUN4 */
1205 /* The info function will return whatever useful
1206 * information the developer sees fit. If not provided, then
1207 * the name field will be used instead.
1209 static const char *esp_info(struct Scsi_Host *host)
1211 struct esp *esp;
1213 esp = (struct esp *) host->hostdata;
1214 switch (esp->erev) {
1215 case esp100:
1216 return "Sparc ESP100 (NCR53C90)";
1217 case esp100a:
1218 return "Sparc ESP100A (NCR53C90A)";
1219 case esp236:
1220 return "Sparc ESP236";
1221 case fas236:
1222 return "Sparc ESP236-FAST";
1223 case fashme:
1224 return "Sparc ESP366-HME";
1225 case fas100a:
1226 return "Sparc ESP100A-FAST";
1227 default:
1228 return "Bogon ESP revision";
1232 /* From Wolfgang Stanglmeier's NCR scsi driver. */
1233 struct info_str
1235 char *buffer;
1236 int length;
1237 int offset;
1238 int pos;
1241 static void copy_mem_info(struct info_str *info, char *data, int len)
1243 if (info->pos + len > info->length)
1244 len = info->length - info->pos;
1246 if (info->pos + len < info->offset) {
1247 info->pos += len;
1248 return;
1250 if (info->pos < info->offset) {
1251 data += (info->offset - info->pos);
1252 len -= (info->offset - info->pos);
1255 if (len > 0) {
1256 memcpy(info->buffer + info->pos, data, len);
1257 info->pos += len;
1261 static int copy_info(struct info_str *info, char *fmt, ...)
1263 va_list args;
1264 char buf[81];
1265 int len;
1267 va_start(args, fmt);
1268 len = vsprintf(buf, fmt, args);
1269 va_end(args);
1271 copy_mem_info(info, buf, len);
1272 return len;
1275 static int esp_host_info(struct esp *esp, char *ptr, off_t offset, int len)
1277 struct scsi_device *sdev;
1278 struct info_str info;
1279 int i;
1281 info.buffer = ptr;
1282 info.length = len;
1283 info.offset = offset;
1284 info.pos = 0;
1286 copy_info(&info, "Sparc ESP Host Adapter:\n");
1287 copy_info(&info, "\tPROM node\t\t%08x\n", (unsigned int) esp->prom_node);
1288 copy_info(&info, "\tPROM name\t\t%s\n", esp->prom_name);
1289 copy_info(&info, "\tESP Model\t\t");
1290 switch (esp->erev) {
1291 case esp100:
1292 copy_info(&info, "ESP100\n");
1293 break;
1294 case esp100a:
1295 copy_info(&info, "ESP100A\n");
1296 break;
1297 case esp236:
1298 copy_info(&info, "ESP236\n");
1299 break;
1300 case fas236:
1301 copy_info(&info, "FAS236\n");
1302 break;
1303 case fas100a:
1304 copy_info(&info, "FAS100A\n");
1305 break;
1306 case fast:
1307 copy_info(&info, "FAST\n");
1308 break;
1309 case fashme:
1310 copy_info(&info, "Happy Meal FAS\n");
1311 break;
1312 case espunknown:
1313 default:
1314 copy_info(&info, "Unknown!\n");
1315 break;
1317 copy_info(&info, "\tDMA Revision\t\t");
1318 switch (esp->dma->revision) {
1319 case dvmarev0:
1320 copy_info(&info, "Rev 0\n");
1321 break;
1322 case dvmaesc1:
1323 copy_info(&info, "ESC Rev 1\n");
1324 break;
1325 case dvmarev1:
1326 copy_info(&info, "Rev 1\n");
1327 break;
1328 case dvmarev2:
1329 copy_info(&info, "Rev 2\n");
1330 break;
1331 case dvmarev3:
1332 copy_info(&info, "Rev 3\n");
1333 break;
1334 case dvmarevplus:
1335 copy_info(&info, "Rev 1+\n");
1336 break;
1337 case dvmahme:
1338 copy_info(&info, "Rev HME/FAS\n");
1339 break;
1340 default:
1341 copy_info(&info, "Unknown!\n");
1342 break;
1344 copy_info(&info, "\tLive Targets\t\t[ ");
1345 for (i = 0; i < 15; i++) {
1346 if (esp->targets_present & (1 << i))
1347 copy_info(&info, "%d ", i);
1349 copy_info(&info, "]\n\n");
1351 /* Now describe the state of each existing target. */
1352 copy_info(&info, "Target #\tconfig3\t\tSync Capabilities\tDisconnect\tWide\n");
1354 shost_for_each_device(sdev, esp->ehost) {
1355 struct esp_device *esp_dev = sdev->hostdata;
1356 uint id = sdev->id;
1358 if (!(esp->targets_present & (1 << id)))
1359 continue;
1361 copy_info(&info, "%d\t\t", id);
1362 copy_info(&info, "%08lx\t", esp->config3[id]);
1363 copy_info(&info, "[%02lx,%02lx]\t\t\t",
1364 esp_dev->sync_max_offset,
1365 esp_dev->sync_min_period);
1366 copy_info(&info, "%s\t\t",
1367 esp_dev->disconnect ? "yes" : "no");
1368 copy_info(&info, "%s\n",
1369 (esp->config3[id] & ESP_CONFIG3_EWIDE) ? "yes" : "no");
1371 return info.pos > info.offset? info.pos - info.offset : 0;
1374 /* ESP proc filesystem code. */
1375 static int esp_proc_info(struct Scsi_Host *host, char *buffer, char **start, off_t offset,
1376 int length, int inout)
1378 struct esp *esp = (struct esp *) host->hostdata;
1380 if (inout)
1381 return -EINVAL; /* not yet */
1383 if (start)
1384 *start = buffer;
1386 return esp_host_info(esp, buffer, offset, length);
1389 static void esp_get_dmabufs(struct esp *esp, struct scsi_cmnd *sp)
1391 if (sp->use_sg == 0) {
1392 sp->SCp.this_residual = sp->request_bufflen;
1393 sp->SCp.buffer = (struct scatterlist *) sp->request_buffer;
1394 sp->SCp.buffers_residual = 0;
1395 if (sp->request_bufflen) {
1396 sp->SCp.have_data_in = sbus_map_single(esp->sdev, sp->SCp.buffer,
1397 sp->SCp.this_residual,
1398 sp->sc_data_direction);
1399 sp->SCp.ptr = (char *) ((unsigned long)sp->SCp.have_data_in);
1400 } else {
1401 sp->SCp.ptr = NULL;
1403 } else {
1404 sp->SCp.buffer = (struct scatterlist *) sp->buffer;
1405 sp->SCp.buffers_residual = sbus_map_sg(esp->sdev,
1406 sp->SCp.buffer,
1407 sp->use_sg,
1408 sp->sc_data_direction);
1409 sp->SCp.this_residual = sg_dma_len(sp->SCp.buffer);
1410 sp->SCp.ptr = (char *) ((unsigned long)sg_dma_address(sp->SCp.buffer));
1414 static void esp_release_dmabufs(struct esp *esp, struct scsi_cmnd *sp)
1416 if (sp->use_sg) {
1417 sbus_unmap_sg(esp->sdev, sp->buffer, sp->use_sg,
1418 sp->sc_data_direction);
1419 } else if (sp->request_bufflen) {
1420 sbus_unmap_single(esp->sdev,
1421 sp->SCp.have_data_in,
1422 sp->request_bufflen,
1423 sp->sc_data_direction);
1427 static void esp_restore_pointers(struct esp *esp, struct scsi_cmnd *sp)
1429 struct esp_pointers *ep = &esp->data_pointers[sp->device->id];
1431 sp->SCp.ptr = ep->saved_ptr;
1432 sp->SCp.buffer = ep->saved_buffer;
1433 sp->SCp.this_residual = ep->saved_this_residual;
1434 sp->SCp.buffers_residual = ep->saved_buffers_residual;
1437 static void esp_save_pointers(struct esp *esp, struct scsi_cmnd *sp)
1439 struct esp_pointers *ep = &esp->data_pointers[sp->device->id];
1441 ep->saved_ptr = sp->SCp.ptr;
1442 ep->saved_buffer = sp->SCp.buffer;
1443 ep->saved_this_residual = sp->SCp.this_residual;
1444 ep->saved_buffers_residual = sp->SCp.buffers_residual;
1447 /* Some rules:
1449 * 1) Never ever panic while something is live on the bus.
1450 * If there is to be any chance of syncing the disks this
1451 * rule is to be obeyed.
1453 * 2) Any target that causes a foul condition will no longer
1454 * have synchronous transfers done to it, no questions
1455 * asked.
1457 * 3) Keep register accesses to a minimum. Think about some
1458 * day when we have Xbus machines this is running on and
1459 * the ESP chip is on the other end of the machine on a
1460 * different board from the cpu where this is running.
1463 /* Fire off a command. We assume the bus is free and that the only
1464 * case where we could see an interrupt is where we have disconnected
1465 * commands active and they are trying to reselect us.
1467 static inline void esp_check_cmd(struct esp *esp, struct scsi_cmnd *sp)
1469 switch (sp->cmd_len) {
1470 case 6:
1471 case 10:
1472 case 12:
1473 esp->esp_slowcmd = 0;
1474 break;
1476 default:
1477 esp->esp_slowcmd = 1;
1478 esp->esp_scmdleft = sp->cmd_len;
1479 esp->esp_scmdp = &sp->cmnd[0];
1480 break;
1484 static inline void build_sync_nego_msg(struct esp *esp, int period, int offset)
1486 esp->cur_msgout[0] = EXTENDED_MESSAGE;
1487 esp->cur_msgout[1] = 3;
1488 esp->cur_msgout[2] = EXTENDED_SDTR;
1489 esp->cur_msgout[3] = period;
1490 esp->cur_msgout[4] = offset;
1491 esp->msgout_len = 5;
1494 /* SIZE is in bits, currently HME only supports 16 bit wide transfers. */
1495 static inline void build_wide_nego_msg(struct esp *esp, int size)
1497 esp->cur_msgout[0] = EXTENDED_MESSAGE;
1498 esp->cur_msgout[1] = 2;
1499 esp->cur_msgout[2] = EXTENDED_WDTR;
1500 switch (size) {
1501 case 32:
1502 esp->cur_msgout[3] = 2;
1503 break;
1504 case 16:
1505 esp->cur_msgout[3] = 1;
1506 break;
1507 case 8:
1508 default:
1509 esp->cur_msgout[3] = 0;
1510 break;
1513 esp->msgout_len = 4;
1516 static void esp_exec_cmd(struct esp *esp)
1518 struct scsi_cmnd *SCptr;
1519 struct scsi_device *SDptr;
1520 struct esp_device *esp_dev;
1521 volatile u8 *cmdp = esp->esp_command;
1522 u8 the_esp_command;
1523 int lun, target;
1524 int i;
1526 /* Hold off if we have disconnected commands and
1527 * an IRQ is showing...
1529 if (esp->disconnected_SC && ESP_IRQ_P(esp->dregs))
1530 return;
1532 /* Grab first member of the issue queue. */
1533 SCptr = esp->current_SC = remove_first_SC(&esp->issue_SC);
1535 /* Safe to panic here because current_SC is null. */
1536 if (!SCptr)
1537 panic("esp: esp_exec_cmd and issue queue is NULL");
1539 SDptr = SCptr->device;
1540 esp_dev = SDptr->hostdata;
1541 lun = SCptr->device->lun;
1542 target = SCptr->device->id;
1544 esp->snip = 0;
1545 esp->msgout_len = 0;
1547 /* Send it out whole, or piece by piece? The ESP
1548 * only knows how to automatically send out 6, 10,
1549 * and 12 byte commands. I used to think that the
1550 * Linux SCSI code would never throw anything other
1551 * than that to us, but then again there is the
1552 * SCSI generic driver which can send us anything.
1554 esp_check_cmd(esp, SCptr);
1556 /* If arbitration/selection is successful, the ESP will leave
1557 * ATN asserted, causing the target to go into message out
1558 * phase. The ESP will feed the target the identify and then
1559 * the target can only legally go to one of command,
1560 * datain/out, status, or message in phase, or stay in message
1561 * out phase (should we be trying to send a sync negotiation
1562 * message after the identify). It is not allowed to drop
1563 * BSY, but some buggy targets do and we check for this
1564 * condition in the selection complete code. Most of the time
1565 * we'll make the command bytes available to the ESP and it
1566 * will not interrupt us until it finishes command phase, we
1567 * cannot do this for command sizes the ESP does not
1568 * understand and in this case we'll get interrupted right
1569 * when the target goes into command phase.
1571 * It is absolutely _illegal_ in the presence of SCSI-2 devices
1572 * to use the ESP select w/o ATN command. When SCSI-2 devices are
1573 * present on the bus we _must_ always go straight to message out
1574 * phase with an identify message for the target. Being that
1575 * selection attempts in SCSI-1 w/o ATN was an option, doing SCSI-2
1576 * selections should not confuse SCSI-1 we hope.
1579 if (esp_dev->sync) {
1580 /* this targets sync is known */
1581 #ifndef __sparc_v9__
1582 do_sync_known:
1583 #endif
1584 if (esp_dev->disconnect)
1585 *cmdp++ = IDENTIFY(1, lun);
1586 else
1587 *cmdp++ = IDENTIFY(0, lun);
1589 if (esp->esp_slowcmd) {
1590 the_esp_command = (ESP_CMD_SELAS | ESP_CMD_DMA);
1591 esp_advance_phase(SCptr, in_slct_stop);
1592 } else {
1593 the_esp_command = (ESP_CMD_SELA | ESP_CMD_DMA);
1594 esp_advance_phase(SCptr, in_slct_norm);
1596 } else if (!(esp->targets_present & (1<<target)) || !(esp_dev->disconnect)) {
1597 /* After the bootup SCSI code sends both the
1598 * TEST_UNIT_READY and INQUIRY commands we want
1599 * to at least attempt allowing the device to
1600 * disconnect.
1602 ESPMISC(("esp: Selecting device for first time. target=%d "
1603 "lun=%d\n", target, SCptr->device->lun));
1604 if (!SDptr->borken && !esp_dev->disconnect)
1605 esp_dev->disconnect = 1;
1607 *cmdp++ = IDENTIFY(0, lun);
1608 esp->prevmsgout = NOP;
1609 esp_advance_phase(SCptr, in_slct_norm);
1610 the_esp_command = (ESP_CMD_SELA | ESP_CMD_DMA);
1612 /* Take no chances... */
1613 esp_dev->sync_max_offset = 0;
1614 esp_dev->sync_min_period = 0;
1615 } else {
1616 /* Sorry, I have had way too many problems with
1617 * various CDROM devices on ESP. -DaveM
1619 int cdrom_hwbug_wkaround = 0;
1621 #ifndef __sparc_v9__
1622 /* Never allow disconnects or synchronous transfers on
1623 * SparcStation1 and SparcStation1+. Allowing those
1624 * to be enabled seems to lockup the machine completely.
1626 if ((idprom->id_machtype == (SM_SUN4C | SM_4C_SS1)) ||
1627 (idprom->id_machtype == (SM_SUN4C | SM_4C_SS1PLUS))) {
1628 /* But we are nice and allow tapes and removable
1629 * disks (but not CDROMs) to disconnect.
1631 if(SDptr->type == TYPE_TAPE ||
1632 (SDptr->type != TYPE_ROM && SDptr->removable))
1633 esp_dev->disconnect = 1;
1634 else
1635 esp_dev->disconnect = 0;
1636 esp_dev->sync_max_offset = 0;
1637 esp_dev->sync_min_period = 0;
1638 esp_dev->sync = 1;
1639 esp->snip = 0;
1640 goto do_sync_known;
1642 #endif /* !(__sparc_v9__) */
1644 /* We've talked to this guy before,
1645 * but never negotiated. Let's try,
1646 * need to attempt WIDE first, before
1647 * sync nego, as per SCSI 2 standard.
1649 if (esp->erev == fashme && !esp_dev->wide) {
1650 if (!SDptr->borken &&
1651 SDptr->type != TYPE_ROM &&
1652 SDptr->removable == 0) {
1653 build_wide_nego_msg(esp, 16);
1654 esp_dev->wide = 1;
1655 esp->wnip = 1;
1656 goto after_nego_msg_built;
1657 } else {
1658 esp_dev->wide = 1;
1659 /* Fall through and try sync. */
1663 if (!SDptr->borken) {
1664 if ((SDptr->type == TYPE_ROM)) {
1665 /* Nice try sucker... */
1666 ESPMISC(("esp%d: Disabling sync for buggy "
1667 "CDROM.\n", esp->esp_id));
1668 cdrom_hwbug_wkaround = 1;
1669 build_sync_nego_msg(esp, 0, 0);
1670 } else if (SDptr->removable != 0) {
1671 ESPMISC(("esp%d: Not negotiating sync/wide but "
1672 "allowing disconnect for removable media.\n",
1673 esp->esp_id));
1674 build_sync_nego_msg(esp, 0, 0);
1675 } else {
1676 build_sync_nego_msg(esp, esp->sync_defp, 15);
1678 } else {
1679 build_sync_nego_msg(esp, 0, 0);
1681 esp_dev->sync = 1;
1682 esp->snip = 1;
1684 after_nego_msg_built:
1685 /* A fix for broken SCSI1 targets, when they disconnect
1686 * they lock up the bus and confuse ESP. So disallow
1687 * disconnects for SCSI1 targets for now until we
1688 * find a better fix.
1690 * Addendum: This is funny, I figured out what was going
1691 * on. The blotzed SCSI1 target would disconnect,
1692 * one of the other SCSI2 targets or both would be
1693 * disconnected as well. The SCSI1 target would
1694 * stay disconnected long enough that we start
1695 * up a command on one of the SCSI2 targets. As
1696 * the ESP is arbitrating for the bus the SCSI1
1697 * target begins to arbitrate as well to reselect
1698 * the ESP. The SCSI1 target refuses to drop it's
1699 * ID bit on the data bus even though the ESP is
1700 * at ID 7 and is the obvious winner for any
1701 * arbitration. The ESP is a poor sport and refuses
1702 * to lose arbitration, it will continue indefinitely
1703 * trying to arbitrate for the bus and can only be
1704 * stopped via a chip reset or SCSI bus reset.
1705 * Therefore _no_ disconnects for SCSI1 targets
1706 * thank you very much. ;-)
1708 if(((SDptr->scsi_level < 3) &&
1709 (SDptr->type != TYPE_TAPE) &&
1710 SDptr->removable == 0) ||
1711 cdrom_hwbug_wkaround || SDptr->borken) {
1712 ESPMISC((KERN_INFO "esp%d: Disabling DISCONNECT for target %d "
1713 "lun %d\n", esp->esp_id, SCptr->device->id, SCptr->device->lun));
1714 esp_dev->disconnect = 0;
1715 *cmdp++ = IDENTIFY(0, lun);
1716 } else {
1717 *cmdp++ = IDENTIFY(1, lun);
1720 /* ESP fifo is only so big...
1721 * Make this look like a slow command.
1723 esp->esp_slowcmd = 1;
1724 esp->esp_scmdleft = SCptr->cmd_len;
1725 esp->esp_scmdp = &SCptr->cmnd[0];
1727 the_esp_command = (ESP_CMD_SELAS | ESP_CMD_DMA);
1728 esp_advance_phase(SCptr, in_slct_msg);
1731 if (!esp->esp_slowcmd)
1732 for (i = 0; i < SCptr->cmd_len; i++)
1733 *cmdp++ = SCptr->cmnd[i];
1735 /* HME sucks... */
1736 if (esp->erev == fashme)
1737 sbus_writeb((target & 0xf) | (ESP_BUSID_RESELID | ESP_BUSID_CTR32BIT),
1738 esp->eregs + ESP_BUSID);
1739 else
1740 sbus_writeb(target & 7, esp->eregs + ESP_BUSID);
1741 if (esp->prev_soff != esp_dev->sync_max_offset ||
1742 esp->prev_stp != esp_dev->sync_min_period ||
1743 (esp->erev > esp100a &&
1744 esp->prev_cfg3 != esp->config3[target])) {
1745 esp->prev_soff = esp_dev->sync_max_offset;
1746 esp->prev_stp = esp_dev->sync_min_period;
1747 sbus_writeb(esp->prev_soff, esp->eregs + ESP_SOFF);
1748 sbus_writeb(esp->prev_stp, esp->eregs + ESP_STP);
1749 if (esp->erev > esp100a) {
1750 esp->prev_cfg3 = esp->config3[target];
1751 sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3);
1754 i = (cmdp - esp->esp_command);
1756 if (esp->erev == fashme) {
1757 esp_cmd(esp, ESP_CMD_FLUSH); /* Grrr! */
1759 /* Set up the DMA and HME counters */
1760 sbus_writeb(i, esp->eregs + ESP_TCLOW);
1761 sbus_writeb(0, esp->eregs + ESP_TCMED);
1762 sbus_writeb(0, esp->eregs + FAS_RLO);
1763 sbus_writeb(0, esp->eregs + FAS_RHI);
1764 esp_cmd(esp, the_esp_command);
1766 /* Talk about touchy hardware... */
1767 esp->prev_hme_dmacsr = ((esp->prev_hme_dmacsr |
1768 (DMA_SCSI_DISAB | DMA_ENABLE)) &
1769 ~(DMA_ST_WRITE));
1770 sbus_writel(16, esp->dregs + DMA_COUNT);
1771 sbus_writel(esp->esp_command_dvma, esp->dregs + DMA_ADDR);
1772 sbus_writel(esp->prev_hme_dmacsr, esp->dregs + DMA_CSR);
1773 } else {
1774 u32 tmp;
1776 /* Set up the DMA and ESP counters */
1777 sbus_writeb(i, esp->eregs + ESP_TCLOW);
1778 sbus_writeb(0, esp->eregs + ESP_TCMED);
1779 tmp = sbus_readl(esp->dregs + DMA_CSR);
1780 tmp &= ~DMA_ST_WRITE;
1781 tmp |= DMA_ENABLE;
1782 sbus_writel(tmp, esp->dregs + DMA_CSR);
1783 if (esp->dma->revision == dvmaesc1) {
1784 if (i) /* Workaround ESC gate array SBUS rerun bug. */
1785 sbus_writel(PAGE_SIZE, esp->dregs + DMA_COUNT);
1787 sbus_writel(esp->esp_command_dvma, esp->dregs + DMA_ADDR);
1789 /* Tell ESP to "go". */
1790 esp_cmd(esp, the_esp_command);
1794 /* Queue a SCSI command delivered from the mid-level Linux SCSI code. */
1795 static int esp_queue(struct scsi_cmnd *SCpnt, void (*done)(struct scsi_cmnd *))
1797 struct esp *esp;
1799 /* Set up func ptr and initial driver cmd-phase. */
1800 SCpnt->scsi_done = done;
1801 SCpnt->SCp.phase = not_issued;
1803 /* We use the scratch area. */
1804 ESPQUEUE(("esp_queue: target=%d lun=%d ", SCpnt->device->id, SCpnt->device->lun));
1805 ESPDISC(("N<%02x,%02x>", SCpnt->device->id, SCpnt->device->lun));
1807 esp = (struct esp *) SCpnt->device->host->hostdata;
1808 esp_get_dmabufs(esp, SCpnt);
1809 esp_save_pointers(esp, SCpnt); /* FIXME for tag queueing */
1811 SCpnt->SCp.Status = CHECK_CONDITION;
1812 SCpnt->SCp.Message = 0xff;
1813 SCpnt->SCp.sent_command = 0;
1815 /* Place into our queue. */
1816 if (SCpnt->cmnd[0] == REQUEST_SENSE) {
1817 ESPQUEUE(("RQSENSE\n"));
1818 prepend_SC(&esp->issue_SC, SCpnt);
1819 } else {
1820 ESPQUEUE(("\n"));
1821 append_SC(&esp->issue_SC, SCpnt);
1824 /* Run it now if we can. */
1825 if (!esp->current_SC && !esp->resetting_bus)
1826 esp_exec_cmd(esp);
1828 return 0;
1831 /* Dump driver state. */
1832 static void esp_dump_cmd(struct scsi_cmnd *SCptr)
1834 ESPLOG(("[tgt<%02x> lun<%02x> "
1835 "pphase<%s> cphase<%s>]",
1836 SCptr->device->id, SCptr->device->lun,
1837 phase_string(SCptr->SCp.sent_command),
1838 phase_string(SCptr->SCp.phase)));
1841 static void esp_dump_state(struct esp *esp)
1843 struct scsi_cmnd *SCptr = esp->current_SC;
1844 #ifdef DEBUG_ESP_CMDS
1845 int i;
1846 #endif
1848 ESPLOG(("esp%d: dumping state\n", esp->esp_id));
1849 ESPLOG(("esp%d: dma -- cond_reg<%08x> addr<%08x>\n",
1850 esp->esp_id,
1851 sbus_readl(esp->dregs + DMA_CSR),
1852 sbus_readl(esp->dregs + DMA_ADDR)));
1853 ESPLOG(("esp%d: SW [sreg<%02x> sstep<%02x> ireg<%02x>]\n",
1854 esp->esp_id, esp->sreg, esp->seqreg, esp->ireg));
1855 ESPLOG(("esp%d: HW reread [sreg<%02x> sstep<%02x> ireg<%02x>]\n",
1856 esp->esp_id,
1857 sbus_readb(esp->eregs + ESP_STATUS),
1858 sbus_readb(esp->eregs + ESP_SSTEP),
1859 sbus_readb(esp->eregs + ESP_INTRPT)));
1860 #ifdef DEBUG_ESP_CMDS
1861 printk("esp%d: last ESP cmds [", esp->esp_id);
1862 i = (esp->espcmdent - 1) & 31;
1863 printk("<"); esp_print_cmd(esp->espcmdlog[i]); printk(">");
1864 i = (i - 1) & 31;
1865 printk("<"); esp_print_cmd(esp->espcmdlog[i]); printk(">");
1866 i = (i - 1) & 31;
1867 printk("<"); esp_print_cmd(esp->espcmdlog[i]); printk(">");
1868 i = (i - 1) & 31;
1869 printk("<"); esp_print_cmd(esp->espcmdlog[i]); printk(">");
1870 printk("]\n");
1871 #endif /* (DEBUG_ESP_CMDS) */
1873 if (SCptr) {
1874 ESPLOG(("esp%d: current command ", esp->esp_id));
1875 esp_dump_cmd(SCptr);
1877 ESPLOG(("\n"));
1878 SCptr = esp->disconnected_SC;
1879 ESPLOG(("esp%d: disconnected ", esp->esp_id));
1880 while (SCptr) {
1881 esp_dump_cmd(SCptr);
1882 SCptr = (struct scsi_cmnd *) SCptr->host_scribble;
1884 ESPLOG(("\n"));
1887 /* Abort a command. The host_lock is acquired by caller. */
1888 static int esp_abort(struct scsi_cmnd *SCptr)
1890 struct esp *esp = (struct esp *) SCptr->device->host->hostdata;
1891 int don;
1893 ESPLOG(("esp%d: Aborting command\n", esp->esp_id));
1894 esp_dump_state(esp);
1896 /* Wheee, if this is the current command on the bus, the
1897 * best we can do is assert ATN and wait for msgout phase.
1898 * This should even fix a hung SCSI bus when we lose state
1899 * in the driver and timeout because the eventual phase change
1900 * will cause the ESP to (eventually) give an interrupt.
1902 if (esp->current_SC == SCptr) {
1903 esp->cur_msgout[0] = ABORT;
1904 esp->msgout_len = 1;
1905 esp->msgout_ctr = 0;
1906 esp_cmd(esp, ESP_CMD_SATN);
1907 return SUCCESS;
1910 /* If it is still in the issue queue then we can safely
1911 * call the completion routine and report abort success.
1913 don = (sbus_readl(esp->dregs + DMA_CSR) & DMA_INT_ENAB);
1914 if (don) {
1915 ESP_INTSOFF(esp->dregs);
1917 if (esp->issue_SC) {
1918 struct scsi_cmnd **prev, *this;
1919 for (prev = (&esp->issue_SC), this = esp->issue_SC;
1920 this != NULL;
1921 prev = (struct scsi_cmnd **) &(this->host_scribble),
1922 this = (struct scsi_cmnd *) this->host_scribble) {
1924 if (this == SCptr) {
1925 *prev = (struct scsi_cmnd *) this->host_scribble;
1926 this->host_scribble = NULL;
1928 esp_release_dmabufs(esp, this);
1929 this->result = DID_ABORT << 16;
1930 this->scsi_done(this);
1932 if (don)
1933 ESP_INTSON(esp->dregs);
1935 return SUCCESS;
1940 /* Yuck, the command to abort is disconnected, it is not
1941 * worth trying to abort it now if something else is live
1942 * on the bus at this time. So, we let the SCSI code wait
1943 * a little bit and try again later.
1945 if (esp->current_SC) {
1946 if (don)
1947 ESP_INTSON(esp->dregs);
1948 return FAILED;
1951 /* It's disconnected, we have to reconnect to re-establish
1952 * the nexus and tell the device to abort. However, we really
1953 * cannot 'reconnect' per se. Don't try to be fancy, just
1954 * indicate failure, which causes our caller to reset the whole
1955 * bus.
1958 if (don)
1959 ESP_INTSON(esp->dregs);
1961 return FAILED;
1964 /* We've sent ESP_CMD_RS to the ESP, the interrupt had just
1965 * arrived indicating the end of the SCSI bus reset. Our job
1966 * is to clean out the command queues and begin re-execution
1967 * of SCSI commands once more.
1969 static int esp_finish_reset(struct esp *esp)
1971 struct scsi_cmnd *sp = esp->current_SC;
1973 /* Clean up currently executing command, if any. */
1974 if (sp != NULL) {
1975 esp->current_SC = NULL;
1977 esp_release_dmabufs(esp, sp);
1978 sp->result = (DID_RESET << 16);
1980 sp->scsi_done(sp);
1983 /* Clean up disconnected queue, they have been invalidated
1984 * by the bus reset.
1986 if (esp->disconnected_SC) {
1987 while ((sp = remove_first_SC(&esp->disconnected_SC)) != NULL) {
1988 esp_release_dmabufs(esp, sp);
1989 sp->result = (DID_RESET << 16);
1991 sp->scsi_done(sp);
1995 /* SCSI bus reset is complete. */
1996 esp->resetting_bus = 0;
1997 wake_up(&esp->reset_queue);
1999 /* Ok, now it is safe to get commands going once more. */
2000 if (esp->issue_SC)
2001 esp_exec_cmd(esp);
2003 return do_intr_end;
2006 static int esp_do_resetbus(struct esp *esp)
2008 ESPLOG(("esp%d: Resetting scsi bus\n", esp->esp_id));
2009 esp->resetting_bus = 1;
2010 esp_cmd(esp, ESP_CMD_RS);
2012 return do_intr_end;
2015 /* Reset ESP chip, reset hanging bus, then kill active and
2016 * disconnected commands for targets without soft reset.
2018 * The host_lock is acquired by caller.
2020 static int esp_reset(struct scsi_cmnd *SCptr)
2022 struct esp *esp = (struct esp *) SCptr->device->host->hostdata;
2024 spin_lock_irq(esp->ehost->host_lock);
2025 (void) esp_do_resetbus(esp);
2026 spin_unlock_irq(esp->ehost->host_lock);
2028 wait_event(esp->reset_queue, (esp->resetting_bus == 0));
2030 return SUCCESS;
2033 /* Internal ESP done function. */
2034 static void esp_done(struct esp *esp, int error)
2036 struct scsi_cmnd *done_SC = esp->current_SC;
2038 esp->current_SC = NULL;
2040 esp_release_dmabufs(esp, done_SC);
2041 done_SC->result = error;
2043 done_SC->scsi_done(done_SC);
2045 /* Bus is free, issue any commands in the queue. */
2046 if (esp->issue_SC && !esp->current_SC)
2047 esp_exec_cmd(esp);
2051 /* Wheee, ESP interrupt engine. */
2053 /* Forward declarations. */
2054 static int esp_do_phase_determine(struct esp *esp);
2055 static int esp_do_data_finale(struct esp *esp);
2056 static int esp_select_complete(struct esp *esp);
2057 static int esp_do_status(struct esp *esp);
2058 static int esp_do_msgin(struct esp *esp);
2059 static int esp_do_msgindone(struct esp *esp);
2060 static int esp_do_msgout(struct esp *esp);
2061 static int esp_do_cmdbegin(struct esp *esp);
2063 #define sreg_datainp(__sreg) (((__sreg) & ESP_STAT_PMASK) == ESP_DIP)
2064 #define sreg_dataoutp(__sreg) (((__sreg) & ESP_STAT_PMASK) == ESP_DOP)
2066 /* Read any bytes found in the FAS366 fifo, storing them into
2067 * the ESP driver software state structure.
2069 static void hme_fifo_read(struct esp *esp)
2071 u8 count = 0;
2072 u8 status = esp->sreg;
2074 /* Cannot safely frob the fifo for these following cases, but
2075 * we must always read the fifo when the reselect interrupt
2076 * is pending.
2078 if (((esp->ireg & ESP_INTR_RSEL) == 0) &&
2079 (sreg_datainp(status) ||
2080 sreg_dataoutp(status) ||
2081 (esp->current_SC &&
2082 esp->current_SC->SCp.phase == in_data_done))) {
2083 ESPHME(("<wkaround_skipped>"));
2084 } else {
2085 unsigned long fcnt = sbus_readb(esp->eregs + ESP_FFLAGS) & ESP_FF_FBYTES;
2087 /* The HME stores bytes in multiples of 2 in the fifo. */
2088 ESPHME(("hme_fifo[fcnt=%d", (int)fcnt));
2089 while (fcnt) {
2090 esp->hme_fifo_workaround_buffer[count++] =
2091 sbus_readb(esp->eregs + ESP_FDATA);
2092 esp->hme_fifo_workaround_buffer[count++] =
2093 sbus_readb(esp->eregs + ESP_FDATA);
2094 ESPHME(("<%02x,%02x>", esp->hme_fifo_workaround_buffer[count-2], esp->hme_fifo_workaround_buffer[count-1]));
2095 fcnt--;
2097 if (sbus_readb(esp->eregs + ESP_STATUS2) & ESP_STAT2_F1BYTE) {
2098 ESPHME(("<poke_byte>"));
2099 sbus_writeb(0, esp->eregs + ESP_FDATA);
2100 esp->hme_fifo_workaround_buffer[count++] =
2101 sbus_readb(esp->eregs + ESP_FDATA);
2102 ESPHME(("<%02x,0x00>", esp->hme_fifo_workaround_buffer[count-1]));
2103 ESPHME(("CMD_FLUSH"));
2104 esp_cmd(esp, ESP_CMD_FLUSH);
2105 } else {
2106 ESPHME(("no_xtra_byte"));
2109 ESPHME(("wkarnd_cnt=%d]", (int)count));
2110 esp->hme_fifo_workaround_count = count;
2113 static inline void hme_fifo_push(struct esp *esp, u8 *bytes, u8 count)
2115 esp_cmd(esp, ESP_CMD_FLUSH);
2116 while (count) {
2117 u8 tmp = *bytes++;
2118 sbus_writeb(tmp, esp->eregs + ESP_FDATA);
2119 sbus_writeb(0, esp->eregs + ESP_FDATA);
2120 count--;
2124 /* We try to avoid some interrupts by jumping ahead and see if the ESP
2125 * has gotten far enough yet. Hence the following.
2127 static inline int skipahead1(struct esp *esp, struct scsi_cmnd *scp,
2128 int prev_phase, int new_phase)
2130 if (scp->SCp.sent_command != prev_phase)
2131 return 0;
2132 if (ESP_IRQ_P(esp->dregs)) {
2133 /* Yes, we are able to save an interrupt. */
2134 if (esp->erev == fashme)
2135 esp->sreg2 = sbus_readb(esp->eregs + ESP_STATUS2);
2136 esp->sreg = (sbus_readb(esp->eregs + ESP_STATUS) & ~(ESP_STAT_INTR));
2137 esp->ireg = sbus_readb(esp->eregs + ESP_INTRPT);
2138 if (esp->erev == fashme) {
2139 /* This chip is really losing. */
2140 ESPHME(("HME["));
2141 /* Must latch fifo before reading the interrupt
2142 * register else garbage ends up in the FIFO
2143 * which confuses the driver utterly.
2144 * Happy Meal indeed....
2146 ESPHME(("fifo_workaround]"));
2147 if (!(esp->sreg2 & ESP_STAT2_FEMPTY) ||
2148 (esp->sreg2 & ESP_STAT2_F1BYTE))
2149 hme_fifo_read(esp);
2151 if (!(esp->ireg & ESP_INTR_SR))
2152 return 0;
2153 else
2154 return do_reset_complete;
2156 /* Ho hum, target is taking forever... */
2157 scp->SCp.sent_command = new_phase; /* so we don't recurse... */
2158 return do_intr_end;
2161 static inline int skipahead2(struct esp *esp, struct scsi_cmnd *scp,
2162 int prev_phase1, int prev_phase2, int new_phase)
2164 if (scp->SCp.sent_command != prev_phase1 &&
2165 scp->SCp.sent_command != prev_phase2)
2166 return 0;
2167 if (ESP_IRQ_P(esp->dregs)) {
2168 /* Yes, we are able to save an interrupt. */
2169 if (esp->erev == fashme)
2170 esp->sreg2 = sbus_readb(esp->eregs + ESP_STATUS2);
2171 esp->sreg = (sbus_readb(esp->eregs + ESP_STATUS) & ~(ESP_STAT_INTR));
2172 esp->ireg = sbus_readb(esp->eregs + ESP_INTRPT);
2173 if (esp->erev == fashme) {
2174 /* This chip is really losing. */
2175 ESPHME(("HME["));
2177 /* Must latch fifo before reading the interrupt
2178 * register else garbage ends up in the FIFO
2179 * which confuses the driver utterly.
2180 * Happy Meal indeed....
2182 ESPHME(("fifo_workaround]"));
2183 if (!(esp->sreg2 & ESP_STAT2_FEMPTY) ||
2184 (esp->sreg2 & ESP_STAT2_F1BYTE))
2185 hme_fifo_read(esp);
2187 if (!(esp->ireg & ESP_INTR_SR))
2188 return 0;
2189 else
2190 return do_reset_complete;
2192 /* Ho hum, target is taking forever... */
2193 scp->SCp.sent_command = new_phase; /* so we don't recurse... */
2194 return do_intr_end;
2197 /* Now some dma helpers. */
2198 static void dma_setup(struct esp *esp, __u32 addr, int count, int write)
2200 u32 nreg = sbus_readl(esp->dregs + DMA_CSR);
2202 if (write)
2203 nreg |= DMA_ST_WRITE;
2204 else
2205 nreg &= ~(DMA_ST_WRITE);
2206 nreg |= DMA_ENABLE;
2207 sbus_writel(nreg, esp->dregs + DMA_CSR);
2208 if (esp->dma->revision == dvmaesc1) {
2209 /* This ESC gate array sucks! */
2210 __u32 src = addr;
2211 __u32 dest = src + count;
2213 if (dest & (PAGE_SIZE - 1))
2214 count = PAGE_ALIGN(count);
2215 sbus_writel(count, esp->dregs + DMA_COUNT);
2217 sbus_writel(addr, esp->dregs + DMA_ADDR);
2220 static void dma_drain(struct esp *esp)
2222 u32 tmp;
2224 if (esp->dma->revision == dvmahme)
2225 return;
2226 if ((tmp = sbus_readl(esp->dregs + DMA_CSR)) & DMA_FIFO_ISDRAIN) {
2227 switch (esp->dma->revision) {
2228 default:
2229 tmp |= DMA_FIFO_STDRAIN;
2230 sbus_writel(tmp, esp->dregs + DMA_CSR);
2232 case dvmarev3:
2233 case dvmaesc1:
2234 while (sbus_readl(esp->dregs + DMA_CSR) & DMA_FIFO_ISDRAIN)
2235 udelay(1);
2240 static void dma_invalidate(struct esp *esp)
2242 u32 tmp;
2244 if (esp->dma->revision == dvmahme) {
2245 sbus_writel(DMA_RST_SCSI, esp->dregs + DMA_CSR);
2247 esp->prev_hme_dmacsr = ((esp->prev_hme_dmacsr |
2248 (DMA_PARITY_OFF | DMA_2CLKS |
2249 DMA_SCSI_DISAB | DMA_INT_ENAB)) &
2250 ~(DMA_ST_WRITE | DMA_ENABLE));
2252 sbus_writel(0, esp->dregs + DMA_CSR);
2253 sbus_writel(esp->prev_hme_dmacsr, esp->dregs + DMA_CSR);
2255 /* This is necessary to avoid having the SCSI channel
2256 * engine lock up on us.
2258 sbus_writel(0, esp->dregs + DMA_ADDR);
2259 } else {
2260 while ((tmp = sbus_readl(esp->dregs + DMA_CSR)) & DMA_PEND_READ)
2261 udelay(1);
2263 tmp &= ~(DMA_ENABLE | DMA_ST_WRITE | DMA_BCNT_ENAB);
2264 tmp |= DMA_FIFO_INV;
2265 sbus_writel(tmp, esp->dregs + DMA_CSR);
2266 tmp &= ~DMA_FIFO_INV;
2267 sbus_writel(tmp, esp->dregs + DMA_CSR);
2271 static inline void dma_flashclear(struct esp *esp)
2273 dma_drain(esp);
2274 dma_invalidate(esp);
2277 static int dma_can_transfer(struct esp *esp, struct scsi_cmnd *sp)
2279 __u32 base, end, sz;
2281 if (esp->dma->revision == dvmarev3) {
2282 sz = sp->SCp.this_residual;
2283 if (sz > 0x1000000)
2284 sz = 0x1000000;
2285 } else {
2286 base = ((__u32)((unsigned long)sp->SCp.ptr));
2287 base &= (0x1000000 - 1);
2288 end = (base + sp->SCp.this_residual);
2289 if (end > 0x1000000)
2290 end = 0x1000000;
2291 sz = (end - base);
2293 return sz;
2296 /* Misc. esp helper macros. */
2297 #define esp_setcount(__eregs, __cnt, __hme) \
2298 sbus_writeb(((__cnt)&0xff), (__eregs) + ESP_TCLOW); \
2299 sbus_writeb((((__cnt)>>8)&0xff), (__eregs) + ESP_TCMED); \
2300 if (__hme) { \
2301 sbus_writeb((((__cnt)>>16)&0xff), (__eregs) + FAS_RLO); \
2302 sbus_writeb(0, (__eregs) + FAS_RHI); \
2305 #define esp_getcount(__eregs, __hme) \
2306 ((sbus_readb((__eregs) + ESP_TCLOW)&0xff) | \
2307 ((sbus_readb((__eregs) + ESP_TCMED)&0xff) << 8) | \
2308 ((__hme) ? sbus_readb((__eregs) + FAS_RLO) << 16 : 0))
2310 #define fcount(__esp) \
2311 (((__esp)->erev == fashme) ? \
2312 (__esp)->hme_fifo_workaround_count : \
2313 sbus_readb(((__esp)->eregs) + ESP_FFLAGS) & ESP_FF_FBYTES)
2315 #define fnzero(__esp) \
2316 (((__esp)->erev == fashme) ? 0 : \
2317 sbus_readb(((__esp)->eregs) + ESP_FFLAGS) & ESP_FF_ONOTZERO)
2319 /* XXX speculative nops unnecessary when continuing amidst a data phase
2320 * XXX even on esp100!!! another case of flooding the bus with I/O reg
2321 * XXX writes...
2323 #define esp_maybe_nop(__esp) \
2324 if ((__esp)->erev == esp100) \
2325 esp_cmd((__esp), ESP_CMD_NULL)
2327 #define sreg_to_dataphase(__sreg) \
2328 ((((__sreg) & ESP_STAT_PMASK) == ESP_DOP) ? in_dataout : in_datain)
2330 /* The ESP100 when in synchronous data phase, can mistake a long final
2331 * REQ pulse from the target as an extra byte, it places whatever is on
2332 * the data lines into the fifo. For now, we will assume when this
2333 * happens that the target is a bit quirky and we don't want to
2334 * be talking synchronously to it anyways. Regardless, we need to
2335 * tell the ESP to eat the extraneous byte so that we can proceed
2336 * to the next phase.
2338 static int esp100_sync_hwbug(struct esp *esp, struct scsi_cmnd *sp, int fifocnt)
2340 /* Do not touch this piece of code. */
2341 if ((!(esp->erev == esp100)) ||
2342 (!(sreg_datainp((esp->sreg = sbus_readb(esp->eregs + ESP_STATUS))) &&
2343 !fifocnt) &&
2344 !(sreg_dataoutp(esp->sreg) && !fnzero(esp)))) {
2345 if (sp->SCp.phase == in_dataout)
2346 esp_cmd(esp, ESP_CMD_FLUSH);
2347 return 0;
2348 } else {
2349 /* Async mode for this guy. */
2350 build_sync_nego_msg(esp, 0, 0);
2352 /* Ack the bogus byte, but set ATN first. */
2353 esp_cmd(esp, ESP_CMD_SATN);
2354 esp_cmd(esp, ESP_CMD_MOK);
2355 return 1;
2359 /* This closes the window during a selection with a reselect pending, because
2360 * we use DMA for the selection process the FIFO should hold the correct
2361 * contents if we get reselected during this process. So we just need to
2362 * ack the possible illegal cmd interrupt pending on the esp100.
2364 static inline int esp100_reconnect_hwbug(struct esp *esp)
2366 u8 tmp;
2368 if (esp->erev != esp100)
2369 return 0;
2370 tmp = sbus_readb(esp->eregs + ESP_INTRPT);
2371 if (tmp & ESP_INTR_SR)
2372 return 1;
2373 return 0;
2376 /* This verifies the BUSID bits during a reselection so that we know which
2377 * target is talking to us.
2379 static inline int reconnect_target(struct esp *esp)
2381 int it, me = esp->scsi_id_mask, targ = 0;
2383 if (2 != fcount(esp))
2384 return -1;
2385 if (esp->erev == fashme) {
2386 /* HME does not latch it's own BUS ID bits during
2387 * a reselection. Also the target number is given
2388 * as an unsigned char, not as a sole bit number
2389 * like the other ESP's do.
2390 * Happy Meal indeed....
2392 targ = esp->hme_fifo_workaround_buffer[0];
2393 } else {
2394 it = sbus_readb(esp->eregs + ESP_FDATA);
2395 if (!(it & me))
2396 return -1;
2397 it &= ~me;
2398 if (it & (it - 1))
2399 return -1;
2400 while (!(it & 1))
2401 targ++, it >>= 1;
2403 return targ;
2406 /* This verifies the identify from the target so that we know which lun is
2407 * being reconnected.
2409 static inline int reconnect_lun(struct esp *esp)
2411 int lun;
2413 if ((esp->sreg & ESP_STAT_PMASK) != ESP_MIP)
2414 return -1;
2415 if (esp->erev == fashme)
2416 lun = esp->hme_fifo_workaround_buffer[1];
2417 else
2418 lun = sbus_readb(esp->eregs + ESP_FDATA);
2420 /* Yes, you read this correctly. We report lun of zero
2421 * if we see parity error. ESP reports parity error for
2422 * the lun byte, and this is the only way to hope to recover
2423 * because the target is connected.
2425 if (esp->sreg & ESP_STAT_PERR)
2426 return 0;
2428 /* Check for illegal bits being set in the lun. */
2429 if ((lun & 0x40) || !(lun & 0x80))
2430 return -1;
2432 return lun & 7;
2435 /* This puts the driver in a state where it can revitalize a command that
2436 * is being continued due to reselection.
2438 static inline void esp_connect(struct esp *esp, struct scsi_cmnd *sp)
2440 struct esp_device *esp_dev = sp->device->hostdata;
2442 if (esp->prev_soff != esp_dev->sync_max_offset ||
2443 esp->prev_stp != esp_dev->sync_min_period ||
2444 (esp->erev > esp100a &&
2445 esp->prev_cfg3 != esp->config3[sp->device->id])) {
2446 esp->prev_soff = esp_dev->sync_max_offset;
2447 esp->prev_stp = esp_dev->sync_min_period;
2448 sbus_writeb(esp->prev_soff, esp->eregs + ESP_SOFF);
2449 sbus_writeb(esp->prev_stp, esp->eregs + ESP_STP);
2450 if (esp->erev > esp100a) {
2451 esp->prev_cfg3 = esp->config3[sp->device->id];
2452 sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3);
2455 esp->current_SC = sp;
2458 /* This will place the current working command back into the issue queue
2459 * if we are to receive a reselection amidst a selection attempt.
2461 static inline void esp_reconnect(struct esp *esp, struct scsi_cmnd *sp)
2463 if (!esp->disconnected_SC)
2464 ESPLOG(("esp%d: Weird, being reselected but disconnected "
2465 "command queue is empty.\n", esp->esp_id));
2466 esp->snip = 0;
2467 esp->current_SC = NULL;
2468 sp->SCp.phase = not_issued;
2469 append_SC(&esp->issue_SC, sp);
2472 /* Begin message in phase. */
2473 static int esp_do_msgin(struct esp *esp)
2475 /* Must be very careful with the fifo on the HME */
2476 if ((esp->erev != fashme) ||
2477 !(sbus_readb(esp->eregs + ESP_STATUS2) & ESP_STAT2_FEMPTY))
2478 esp_cmd(esp, ESP_CMD_FLUSH);
2479 esp_maybe_nop(esp);
2480 esp_cmd(esp, ESP_CMD_TI);
2481 esp->msgin_len = 1;
2482 esp->msgin_ctr = 0;
2483 esp_advance_phase(esp->current_SC, in_msgindone);
2484 return do_work_bus;
2487 /* This uses various DMA csr fields and the fifo flags count value to
2488 * determine how many bytes were successfully sent/received by the ESP.
2490 static inline int esp_bytes_sent(struct esp *esp, int fifo_count)
2492 int rval = sbus_readl(esp->dregs + DMA_ADDR) - esp->esp_command_dvma;
2494 if (esp->dma->revision == dvmarev1)
2495 rval -= (4 - ((sbus_readl(esp->dregs + DMA_CSR) & DMA_READ_AHEAD)>>11));
2496 return rval - fifo_count;
2499 static inline void advance_sg(struct scsi_cmnd *sp)
2501 ++sp->SCp.buffer;
2502 --sp->SCp.buffers_residual;
2503 sp->SCp.this_residual = sg_dma_len(sp->SCp.buffer);
2504 sp->SCp.ptr = (char *)((unsigned long)sg_dma_address(sp->SCp.buffer));
2507 /* Please note that the way I've coded these routines is that I _always_
2508 * check for a disconnect during any and all information transfer
2509 * phases. The SCSI standard states that the target _can_ cause a BUS
2510 * FREE condition by dropping all MSG/CD/IO/BSY signals. Also note
2511 * that during information transfer phases the target controls every
2512 * change in phase, the only thing the initiator can do is "ask" for
2513 * a message out phase by driving ATN true. The target can, and sometimes
2514 * will, completely ignore this request so we cannot assume anything when
2515 * we try to force a message out phase to abort/reset a target. Most of
2516 * the time the target will eventually be nice and go to message out, so
2517 * we may have to hold on to our state about what we want to tell the target
2518 * for some period of time.
2521 /* I think I have things working here correctly. Even partial transfers
2522 * within a buffer or sub-buffer should not upset us at all no matter
2523 * how bad the target and/or ESP fucks things up.
2525 static int esp_do_data(struct esp *esp)
2527 struct scsi_cmnd *SCptr = esp->current_SC;
2528 int thisphase, hmuch;
2530 ESPDATA(("esp_do_data: "));
2531 esp_maybe_nop(esp);
2532 thisphase = sreg_to_dataphase(esp->sreg);
2533 esp_advance_phase(SCptr, thisphase);
2534 ESPDATA(("newphase<%s> ", (thisphase == in_datain) ? "DATAIN" : "DATAOUT"));
2535 hmuch = dma_can_transfer(esp, SCptr);
2536 if (hmuch > (64 * 1024) && (esp->erev != fashme))
2537 hmuch = (64 * 1024);
2538 ESPDATA(("hmuch<%d> ", hmuch));
2539 esp->current_transfer_size = hmuch;
2541 if (esp->erev == fashme) {
2542 u32 tmp = esp->prev_hme_dmacsr;
2544 /* Always set the ESP count registers first. */
2545 esp_setcount(esp->eregs, hmuch, 1);
2547 /* Get the DMA csr computed. */
2548 tmp |= (DMA_SCSI_DISAB | DMA_ENABLE);
2549 if (thisphase == in_datain)
2550 tmp |= DMA_ST_WRITE;
2551 else
2552 tmp &= ~(DMA_ST_WRITE);
2553 esp->prev_hme_dmacsr = tmp;
2555 ESPDATA(("DMA|TI --> do_intr_end\n"));
2556 if (thisphase == in_datain) {
2557 sbus_writel(hmuch, esp->dregs + DMA_COUNT);
2558 esp_cmd(esp, ESP_CMD_DMA | ESP_CMD_TI);
2559 } else {
2560 esp_cmd(esp, ESP_CMD_DMA | ESP_CMD_TI);
2561 sbus_writel(hmuch, esp->dregs + DMA_COUNT);
2563 sbus_writel((__u32)((unsigned long)SCptr->SCp.ptr), esp->dregs+DMA_ADDR);
2564 sbus_writel(esp->prev_hme_dmacsr, esp->dregs + DMA_CSR);
2565 } else {
2566 esp_setcount(esp->eregs, hmuch, 0);
2567 dma_setup(esp, ((__u32)((unsigned long)SCptr->SCp.ptr)),
2568 hmuch, (thisphase == in_datain));
2569 ESPDATA(("DMA|TI --> do_intr_end\n"));
2570 esp_cmd(esp, ESP_CMD_DMA | ESP_CMD_TI);
2572 return do_intr_end;
2575 /* See how successful the data transfer was. */
2576 static int esp_do_data_finale(struct esp *esp)
2578 struct scsi_cmnd *SCptr = esp->current_SC;
2579 struct esp_device *esp_dev = SCptr->device->hostdata;
2580 int bogus_data = 0, bytes_sent = 0, fifocnt, ecount = 0;
2582 ESPDATA(("esp_do_data_finale: "));
2584 if (SCptr->SCp.phase == in_datain) {
2585 if (esp->sreg & ESP_STAT_PERR) {
2586 /* Yuck, parity error. The ESP asserts ATN
2587 * so that we can go to message out phase
2588 * immediately and inform the target that
2589 * something bad happened.
2591 ESPLOG(("esp%d: data bad parity detected.\n",
2592 esp->esp_id));
2593 esp->cur_msgout[0] = INITIATOR_ERROR;
2594 esp->msgout_len = 1;
2596 dma_drain(esp);
2598 dma_invalidate(esp);
2600 /* This could happen for the above parity error case. */
2601 if (esp->ireg != ESP_INTR_BSERV) {
2602 /* Please go to msgout phase, please please please... */
2603 ESPLOG(("esp%d: !BSERV after data, probably to msgout\n",
2604 esp->esp_id));
2605 return esp_do_phase_determine(esp);
2608 /* Check for partial transfers and other horrible events.
2609 * Note, here we read the real fifo flags register even
2610 * on HME broken adapters because we skip the HME fifo
2611 * workaround code in esp_handle() if we are doing data
2612 * phase things. We don't want to fuck directly with
2613 * the fifo like that, especially if doing synchronous
2614 * transfers! Also, will need to double the count on
2615 * HME if we are doing wide transfers, as the HME fifo
2616 * will move and count 16-bit quantities during wide data.
2617 * SMCC _and_ Qlogic can both bite me.
2619 fifocnt = (sbus_readb(esp->eregs + ESP_FFLAGS) & ESP_FF_FBYTES);
2620 if (esp->erev != fashme)
2621 ecount = esp_getcount(esp->eregs, 0);
2622 bytes_sent = esp->current_transfer_size;
2624 ESPDATA(("trans_sz(%d), ", bytes_sent));
2625 if (esp->erev == fashme) {
2626 if (!(esp->sreg & ESP_STAT_TCNT)) {
2627 ecount = esp_getcount(esp->eregs, 1);
2628 bytes_sent -= ecount;
2631 /* Always subtract any cruft remaining in the FIFO. */
2632 if (esp->prev_cfg3 & ESP_CONFIG3_EWIDE)
2633 fifocnt <<= 1;
2634 if (SCptr->SCp.phase == in_dataout)
2635 bytes_sent -= fifocnt;
2637 /* I have an IBM disk which exhibits the following
2638 * behavior during writes to it. It disconnects in
2639 * the middle of a partial transfer, the current sglist
2640 * buffer is 1024 bytes, the disk stops data transfer
2641 * at 512 bytes.
2643 * However the FAS366 reports that 32 more bytes were
2644 * transferred than really were. This is precisely
2645 * the size of a fully loaded FIFO in wide scsi mode.
2646 * The FIFO state recorded indicates that it is empty.
2648 * I have no idea if this is a bug in the FAS366 chip
2649 * or a bug in the firmware on this IBM disk. In any
2650 * event the following seems to be a good workaround. -DaveM
2652 if (bytes_sent != esp->current_transfer_size &&
2653 SCptr->SCp.phase == in_dataout) {
2654 int mask = (64 - 1);
2656 if ((esp->prev_cfg3 & ESP_CONFIG3_EWIDE) == 0)
2657 mask >>= 1;
2659 if (bytes_sent & mask)
2660 bytes_sent -= (bytes_sent & mask);
2662 } else {
2663 if (!(esp->sreg & ESP_STAT_TCNT))
2664 bytes_sent -= ecount;
2665 if (SCptr->SCp.phase == in_dataout)
2666 bytes_sent -= fifocnt;
2669 ESPDATA(("bytes_sent(%d), ", bytes_sent));
2671 /* If we were in synchronous mode, check for peculiarities. */
2672 if (esp->erev == fashme) {
2673 if (esp_dev->sync_max_offset) {
2674 if (SCptr->SCp.phase == in_dataout)
2675 esp_cmd(esp, ESP_CMD_FLUSH);
2676 } else {
2677 esp_cmd(esp, ESP_CMD_FLUSH);
2679 } else {
2680 if (esp_dev->sync_max_offset)
2681 bogus_data = esp100_sync_hwbug(esp, SCptr, fifocnt);
2682 else
2683 esp_cmd(esp, ESP_CMD_FLUSH);
2686 /* Until we are sure of what has happened, we are certainly
2687 * in the dark.
2689 esp_advance_phase(SCptr, in_the_dark);
2691 if (bytes_sent < 0) {
2692 /* I've seen this happen due to lost state in this
2693 * driver. No idea why it happened, but allowing
2694 * this value to be negative caused things to
2695 * lock up. This allows greater chance of recovery.
2696 * In fact every time I've seen this, it has been
2697 * a driver bug without question.
2699 ESPLOG(("esp%d: yieee, bytes_sent < 0!\n", esp->esp_id));
2700 ESPLOG(("esp%d: csz=%d fifocount=%d ecount=%d\n",
2701 esp->esp_id,
2702 esp->current_transfer_size, fifocnt, ecount));
2703 ESPLOG(("esp%d: use_sg=%d ptr=%p this_residual=%d\n",
2704 esp->esp_id,
2705 SCptr->use_sg, SCptr->SCp.ptr, SCptr->SCp.this_residual));
2706 ESPLOG(("esp%d: Forcing async for target %d\n", esp->esp_id,
2707 SCptr->device->id));
2708 SCptr->device->borken = 1;
2709 esp_dev->sync = 0;
2710 bytes_sent = 0;
2713 /* Update the state of our transfer. */
2714 SCptr->SCp.ptr += bytes_sent;
2715 SCptr->SCp.this_residual -= bytes_sent;
2716 if (SCptr->SCp.this_residual < 0) {
2717 /* shit */
2718 ESPLOG(("esp%d: Data transfer overrun.\n", esp->esp_id));
2719 SCptr->SCp.this_residual = 0;
2722 /* Maybe continue. */
2723 if (!bogus_data) {
2724 ESPDATA(("!bogus_data, "));
2726 /* NO MATTER WHAT, we advance the scatterlist,
2727 * if the target should decide to disconnect
2728 * in between scatter chunks (which is common)
2729 * we could die horribly! I used to have the sg
2730 * advance occur only if we are going back into
2731 * (or are staying in) a data phase, you can
2732 * imagine the hell I went through trying to
2733 * figure this out.
2735 if (SCptr->use_sg && !SCptr->SCp.this_residual)
2736 advance_sg(SCptr);
2737 if (sreg_datainp(esp->sreg) || sreg_dataoutp(esp->sreg)) {
2738 ESPDATA(("to more data\n"));
2739 return esp_do_data(esp);
2741 ESPDATA(("to new phase\n"));
2742 return esp_do_phase_determine(esp);
2744 /* Bogus data, just wait for next interrupt. */
2745 ESPLOG(("esp%d: bogus_data during end of data phase\n",
2746 esp->esp_id));
2747 return do_intr_end;
2750 /* We received a non-good status return at the end of
2751 * running a SCSI command. This is used to decide if
2752 * we should clear our synchronous transfer state for
2753 * such a device when that happens.
2755 * The idea is that when spinning up a disk or rewinding
2756 * a tape, we don't want to go into a loop re-negotiating
2757 * synchronous capabilities over and over.
2759 static int esp_should_clear_sync(struct scsi_cmnd *sp)
2761 u8 cmd1 = sp->cmnd[0];
2762 u8 cmd2 = sp->data_cmnd[0];
2764 /* These cases are for spinning up a disk and
2765 * waiting for that spinup to complete.
2767 if (cmd1 == START_STOP ||
2768 cmd2 == START_STOP)
2769 return 0;
2771 if (cmd1 == TEST_UNIT_READY ||
2772 cmd2 == TEST_UNIT_READY)
2773 return 0;
2775 /* One more special case for SCSI tape drives,
2776 * this is what is used to probe the device for
2777 * completion of a rewind or tape load operation.
2779 if (sp->device->type == TYPE_TAPE) {
2780 if (cmd1 == MODE_SENSE ||
2781 cmd2 == MODE_SENSE)
2782 return 0;
2785 return 1;
2788 /* Either a command is completing or a target is dropping off the bus
2789 * to continue the command in the background so we can do other work.
2791 static int esp_do_freebus(struct esp *esp)
2793 struct scsi_cmnd *SCptr = esp->current_SC;
2794 struct esp_device *esp_dev = SCptr->device->hostdata;
2795 int rval;
2797 rval = skipahead2(esp, SCptr, in_status, in_msgindone, in_freeing);
2798 if (rval)
2799 return rval;
2800 if (esp->ireg != ESP_INTR_DC) {
2801 ESPLOG(("esp%d: Target will not disconnect\n", esp->esp_id));
2802 return do_reset_bus; /* target will not drop BSY... */
2804 esp->msgout_len = 0;
2805 esp->prevmsgout = NOP;
2806 if (esp->prevmsgin == COMMAND_COMPLETE) {
2807 /* Normal end of nexus. */
2808 if (esp->disconnected_SC || (esp->erev == fashme))
2809 esp_cmd(esp, ESP_CMD_ESEL);
2811 if (SCptr->SCp.Status != GOOD &&
2812 SCptr->SCp.Status != CONDITION_GOOD &&
2813 ((1<<SCptr->device->id) & esp->targets_present) &&
2814 esp_dev->sync &&
2815 esp_dev->sync_max_offset) {
2816 /* SCSI standard says that the synchronous capabilities
2817 * should be renegotiated at this point. Most likely
2818 * we are about to request sense from this target
2819 * in which case we want to avoid using sync
2820 * transfers until we are sure of the current target
2821 * state.
2823 ESPMISC(("esp: Status <%d> for target %d lun %d\n",
2824 SCptr->SCp.Status, SCptr->device->id, SCptr->device->lun));
2826 /* But don't do this when spinning up a disk at
2827 * boot time while we poll for completion as it
2828 * fills up the console with messages. Also, tapes
2829 * can report not ready many times right after
2830 * loading up a tape.
2832 if (esp_should_clear_sync(SCptr) != 0)
2833 esp_dev->sync = 0;
2835 ESPDISC(("F<%02x,%02x>", SCptr->device->id, SCptr->device->lun));
2836 esp_done(esp, ((SCptr->SCp.Status & 0xff) |
2837 ((SCptr->SCp.Message & 0xff)<<8) |
2838 (DID_OK << 16)));
2839 } else if (esp->prevmsgin == DISCONNECT) {
2840 /* Normal disconnect. */
2841 esp_cmd(esp, ESP_CMD_ESEL);
2842 ESPDISC(("D<%02x,%02x>", SCptr->device->id, SCptr->device->lun));
2843 append_SC(&esp->disconnected_SC, SCptr);
2844 esp->current_SC = NULL;
2845 if (esp->issue_SC)
2846 esp_exec_cmd(esp);
2847 } else {
2848 /* Driver bug, we do not expect a disconnect here
2849 * and should not have advanced the state engine
2850 * to in_freeing.
2852 ESPLOG(("esp%d: last msg not disc and not cmd cmplt.\n",
2853 esp->esp_id));
2854 return do_reset_bus;
2856 return do_intr_end;
2859 /* When a reselect occurs, and we cannot find the command to
2860 * reconnect to in our queues, we do this.
2862 static int esp_bad_reconnect(struct esp *esp)
2864 struct scsi_cmnd *sp;
2866 ESPLOG(("esp%d: Eieeee, reconnecting unknown command!\n",
2867 esp->esp_id));
2868 ESPLOG(("QUEUE DUMP\n"));
2869 sp = esp->issue_SC;
2870 ESPLOG(("esp%d: issue_SC[", esp->esp_id));
2871 while (sp) {
2872 ESPLOG(("<%02x,%02x>", sp->device->id, sp->device->lun));
2873 sp = (struct scsi_cmnd *) sp->host_scribble;
2875 ESPLOG(("]\n"));
2876 sp = esp->current_SC;
2877 ESPLOG(("esp%d: current_SC[", esp->esp_id));
2878 if (sp)
2879 ESPLOG(("<%02x,%02x>", sp->device->id, sp->device->lun));
2880 else
2881 ESPLOG(("<NULL>"));
2882 ESPLOG(("]\n"));
2883 sp = esp->disconnected_SC;
2884 ESPLOG(("esp%d: disconnected_SC[", esp->esp_id));
2885 while (sp) {
2886 ESPLOG(("<%02x,%02x>", sp->device->id, sp->device->lun));
2887 sp = (struct scsi_cmnd *) sp->host_scribble;
2889 ESPLOG(("]\n"));
2890 return do_reset_bus;
2893 /* Do the needy when a target tries to reconnect to us. */
2894 static int esp_do_reconnect(struct esp *esp)
2896 int lun, target;
2897 struct scsi_cmnd *SCptr;
2899 /* Check for all bogus conditions first. */
2900 target = reconnect_target(esp);
2901 if (target < 0) {
2902 ESPDISC(("bad bus bits\n"));
2903 return do_reset_bus;
2905 lun = reconnect_lun(esp);
2906 if (lun < 0) {
2907 ESPDISC(("target=%2x, bad identify msg\n", target));
2908 return do_reset_bus;
2911 /* Things look ok... */
2912 ESPDISC(("R<%02x,%02x>", target, lun));
2914 /* Must not flush FIFO or DVMA on HME. */
2915 if (esp->erev != fashme) {
2916 esp_cmd(esp, ESP_CMD_FLUSH);
2917 if (esp100_reconnect_hwbug(esp))
2918 return do_reset_bus;
2919 esp_cmd(esp, ESP_CMD_NULL);
2922 SCptr = remove_SC(&esp->disconnected_SC, (u8) target, (u8) lun);
2923 if (!SCptr)
2924 return esp_bad_reconnect(esp);
2926 esp_connect(esp, SCptr);
2927 esp_cmd(esp, ESP_CMD_MOK);
2929 if (esp->erev == fashme)
2930 sbus_writeb(((SCptr->device->id & 0xf) |
2931 (ESP_BUSID_RESELID | ESP_BUSID_CTR32BIT)),
2932 esp->eregs + ESP_BUSID);
2934 /* Reconnect implies a restore pointers operation. */
2935 esp_restore_pointers(esp, SCptr);
2937 esp->snip = 0;
2938 esp_advance_phase(SCptr, in_the_dark);
2939 return do_intr_end;
2942 /* End of NEXUS (hopefully), pick up status + message byte then leave if
2943 * all goes well.
2945 static int esp_do_status(struct esp *esp)
2947 struct scsi_cmnd *SCptr = esp->current_SC;
2948 int intr, rval;
2950 rval = skipahead1(esp, SCptr, in_the_dark, in_status);
2951 if (rval)
2952 return rval;
2953 intr = esp->ireg;
2954 ESPSTAT(("esp_do_status: "));
2955 if (intr != ESP_INTR_DC) {
2956 int message_out = 0; /* for parity problems */
2958 /* Ack the message. */
2959 ESPSTAT(("ack msg, "));
2960 esp_cmd(esp, ESP_CMD_MOK);
2962 if (esp->erev != fashme) {
2963 dma_flashclear(esp);
2965 /* Wait till the first bits settle. */
2966 while (esp->esp_command[0] == 0xff)
2967 udelay(1);
2968 } else {
2969 esp->esp_command[0] = esp->hme_fifo_workaround_buffer[0];
2970 esp->esp_command[1] = esp->hme_fifo_workaround_buffer[1];
2973 ESPSTAT(("got something, "));
2974 /* ESP chimes in with one of
2976 * 1) function done interrupt:
2977 * both status and message in bytes
2978 * are available
2980 * 2) bus service interrupt:
2981 * only status byte was acquired
2983 * 3) Anything else:
2984 * can't happen, but we test for it
2985 * anyways
2987 * ALSO: If bad parity was detected on either
2988 * the status _or_ the message byte then
2989 * the ESP has asserted ATN on the bus
2990 * and we must therefore wait for the
2991 * next phase change.
2993 if (intr & ESP_INTR_FDONE) {
2994 /* We got it all, hallejulia. */
2995 ESPSTAT(("got both, "));
2996 SCptr->SCp.Status = esp->esp_command[0];
2997 SCptr->SCp.Message = esp->esp_command[1];
2998 esp->prevmsgin = SCptr->SCp.Message;
2999 esp->cur_msgin[0] = SCptr->SCp.Message;
3000 if (esp->sreg & ESP_STAT_PERR) {
3001 /* There was bad parity for the
3002 * message byte, the status byte
3003 * was ok.
3005 message_out = MSG_PARITY_ERROR;
3007 } else if (intr == ESP_INTR_BSERV) {
3008 /* Only got status byte. */
3009 ESPLOG(("esp%d: got status only, ", esp->esp_id));
3010 if (!(esp->sreg & ESP_STAT_PERR)) {
3011 SCptr->SCp.Status = esp->esp_command[0];
3012 SCptr->SCp.Message = 0xff;
3013 } else {
3014 /* The status byte had bad parity.
3015 * we leave the scsi_pointer Status
3016 * field alone as we set it to a default
3017 * of CHECK_CONDITION in esp_queue.
3019 message_out = INITIATOR_ERROR;
3021 } else {
3022 /* This shouldn't happen ever. */
3023 ESPSTAT(("got bolixed\n"));
3024 esp_advance_phase(SCptr, in_the_dark);
3025 return esp_do_phase_determine(esp);
3028 if (!message_out) {
3029 ESPSTAT(("status=%2x msg=%2x, ", SCptr->SCp.Status,
3030 SCptr->SCp.Message));
3031 if (SCptr->SCp.Message == COMMAND_COMPLETE) {
3032 ESPSTAT(("and was COMMAND_COMPLETE\n"));
3033 esp_advance_phase(SCptr, in_freeing);
3034 return esp_do_freebus(esp);
3035 } else {
3036 ESPLOG(("esp%d: and _not_ COMMAND_COMPLETE\n",
3037 esp->esp_id));
3038 esp->msgin_len = esp->msgin_ctr = 1;
3039 esp_advance_phase(SCptr, in_msgindone);
3040 return esp_do_msgindone(esp);
3042 } else {
3043 /* With luck we'll be able to let the target
3044 * know that bad parity happened, it will know
3045 * which byte caused the problems and send it
3046 * again. For the case where the status byte
3047 * receives bad parity, I do not believe most
3048 * targets recover very well. We'll see.
3050 ESPLOG(("esp%d: bad parity somewhere mout=%2x\n",
3051 esp->esp_id, message_out));
3052 esp->cur_msgout[0] = message_out;
3053 esp->msgout_len = esp->msgout_ctr = 1;
3054 esp_advance_phase(SCptr, in_the_dark);
3055 return esp_do_phase_determine(esp);
3057 } else {
3058 /* If we disconnect now, all hell breaks loose. */
3059 ESPLOG(("esp%d: whoops, disconnect\n", esp->esp_id));
3060 esp_advance_phase(SCptr, in_the_dark);
3061 return esp_do_phase_determine(esp);
3065 static int esp_enter_status(struct esp *esp)
3067 u8 thecmd = ESP_CMD_ICCSEQ;
3069 esp_cmd(esp, ESP_CMD_FLUSH);
3070 if (esp->erev != fashme) {
3071 u32 tmp;
3073 esp->esp_command[0] = esp->esp_command[1] = 0xff;
3074 sbus_writeb(2, esp->eregs + ESP_TCLOW);
3075 sbus_writeb(0, esp->eregs + ESP_TCMED);
3076 tmp = sbus_readl(esp->dregs + DMA_CSR);
3077 tmp |= (DMA_ST_WRITE | DMA_ENABLE);
3078 sbus_writel(tmp, esp->dregs + DMA_CSR);
3079 if (esp->dma->revision == dvmaesc1)
3080 sbus_writel(0x100, esp->dregs + DMA_COUNT);
3081 sbus_writel(esp->esp_command_dvma, esp->dregs + DMA_ADDR);
3082 thecmd |= ESP_CMD_DMA;
3084 esp_cmd(esp, thecmd);
3085 esp_advance_phase(esp->current_SC, in_status);
3087 return esp_do_status(esp);
3090 static int esp_disconnect_amidst_phases(struct esp *esp)
3092 struct scsi_cmnd *sp = esp->current_SC;
3093 struct esp_device *esp_dev = sp->device->hostdata;
3095 /* This means real problems if we see this
3096 * here. Unless we were actually trying
3097 * to force the device to abort/reset.
3099 ESPLOG(("esp%d Disconnect amidst phases, ", esp->esp_id));
3100 ESPLOG(("pphase<%s> cphase<%s>, ",
3101 phase_string(sp->SCp.phase),
3102 phase_string(sp->SCp.sent_command)));
3104 if (esp->disconnected_SC != NULL || (esp->erev == fashme))
3105 esp_cmd(esp, ESP_CMD_ESEL);
3107 switch (esp->cur_msgout[0]) {
3108 default:
3109 /* We didn't expect this to happen at all. */
3110 ESPLOG(("device is bolixed\n"));
3111 esp_advance_phase(sp, in_tgterror);
3112 esp_done(esp, (DID_ERROR << 16));
3113 break;
3115 case BUS_DEVICE_RESET:
3116 ESPLOG(("device reset successful\n"));
3117 esp_dev->sync_max_offset = 0;
3118 esp_dev->sync_min_period = 0;
3119 esp_dev->sync = 0;
3120 esp_advance_phase(sp, in_resetdev);
3121 esp_done(esp, (DID_RESET << 16));
3122 break;
3124 case ABORT:
3125 ESPLOG(("device abort successful\n"));
3126 esp_advance_phase(sp, in_abortone);
3127 esp_done(esp, (DID_ABORT << 16));
3128 break;
3131 return do_intr_end;
3134 static int esp_enter_msgout(struct esp *esp)
3136 esp_advance_phase(esp->current_SC, in_msgout);
3137 return esp_do_msgout(esp);
3140 static int esp_enter_msgin(struct esp *esp)
3142 esp_advance_phase(esp->current_SC, in_msgin);
3143 return esp_do_msgin(esp);
3146 static int esp_enter_cmd(struct esp *esp)
3148 esp_advance_phase(esp->current_SC, in_cmdbegin);
3149 return esp_do_cmdbegin(esp);
3152 static int esp_enter_badphase(struct esp *esp)
3154 ESPLOG(("esp%d: Bizarre bus phase %2x.\n", esp->esp_id,
3155 esp->sreg & ESP_STAT_PMASK));
3156 return do_reset_bus;
3159 typedef int (*espfunc_t)(struct esp *);
3161 static espfunc_t phase_vector[] = {
3162 esp_do_data, /* ESP_DOP */
3163 esp_do_data, /* ESP_DIP */
3164 esp_enter_cmd, /* ESP_CMDP */
3165 esp_enter_status, /* ESP_STATP */
3166 esp_enter_badphase, /* ESP_STAT_PMSG */
3167 esp_enter_badphase, /* ESP_STAT_PMSG | ESP_STAT_PIO */
3168 esp_enter_msgout, /* ESP_MOP */
3169 esp_enter_msgin, /* ESP_MIP */
3172 /* The target has control of the bus and we have to see where it has
3173 * taken us.
3175 static int esp_do_phase_determine(struct esp *esp)
3177 if ((esp->ireg & ESP_INTR_DC) != 0)
3178 return esp_disconnect_amidst_phases(esp);
3179 return phase_vector[esp->sreg & ESP_STAT_PMASK](esp);
3182 /* First interrupt after exec'ing a cmd comes here. */
3183 static int esp_select_complete(struct esp *esp)
3185 struct scsi_cmnd *SCptr = esp->current_SC;
3186 struct esp_device *esp_dev = SCptr->device->hostdata;
3187 int cmd_bytes_sent, fcnt;
3189 if (esp->erev != fashme)
3190 esp->seqreg = (sbus_readb(esp->eregs + ESP_SSTEP) & ESP_STEP_VBITS);
3192 if (esp->erev == fashme)
3193 fcnt = esp->hme_fifo_workaround_count;
3194 else
3195 fcnt = (sbus_readb(esp->eregs + ESP_FFLAGS) & ESP_FF_FBYTES);
3197 cmd_bytes_sent = esp_bytes_sent(esp, fcnt);
3198 dma_invalidate(esp);
3200 /* Let's check to see if a reselect happened
3201 * while we we're trying to select. This must
3202 * be checked first.
3204 if (esp->ireg == (ESP_INTR_RSEL | ESP_INTR_FDONE)) {
3205 esp_reconnect(esp, SCptr);
3206 return esp_do_reconnect(esp);
3209 /* Looks like things worked, we should see a bus service &
3210 * a function complete interrupt at this point. Note we
3211 * are doing a direct comparison because we don't want to
3212 * be fooled into thinking selection was successful if
3213 * ESP_INTR_DC is set, see below.
3215 if (esp->ireg == (ESP_INTR_FDONE | ESP_INTR_BSERV)) {
3216 /* target speaks... */
3217 esp->targets_present |= (1<<SCptr->device->id);
3219 /* What if the target ignores the sdtr? */
3220 if (esp->snip)
3221 esp_dev->sync = 1;
3223 /* See how far, if at all, we got in getting
3224 * the information out to the target.
3226 switch (esp->seqreg) {
3227 default:
3229 case ESP_STEP_ASEL:
3230 /* Arbitration won, target selected, but
3231 * we are in some phase which is not command
3232 * phase nor is it message out phase.
3234 * XXX We've confused the target, obviously.
3235 * XXX So clear it's state, but we also end
3236 * XXX up clearing everyone elses. That isn't
3237 * XXX so nice. I'd like to just reset this
3238 * XXX target, but if I cannot even get it's
3239 * XXX attention and finish selection to talk
3240 * XXX to it, there is not much more I can do.
3241 * XXX If we have a loaded bus we're going to
3242 * XXX spend the next second or so renegotiating
3243 * XXX for synchronous transfers.
3245 ESPLOG(("esp%d: STEP_ASEL for tgt %d\n",
3246 esp->esp_id, SCptr->device->id));
3248 case ESP_STEP_SID:
3249 /* Arbitration won, target selected, went
3250 * to message out phase, sent one message
3251 * byte, then we stopped. ATN is asserted
3252 * on the SCSI bus and the target is still
3253 * there hanging on. This is a legal
3254 * sequence step if we gave the ESP a select
3255 * and stop command.
3257 * XXX See above, I could set the borken flag
3258 * XXX in the device struct and retry the
3259 * XXX command. But would that help for
3260 * XXX tagged capable targets?
3263 case ESP_STEP_NCMD:
3264 /* Arbitration won, target selected, maybe
3265 * sent the one message byte in message out
3266 * phase, but we did not go to command phase
3267 * in the end. Actually, we could have sent
3268 * only some of the message bytes if we tried
3269 * to send out the entire identify and tag
3270 * message using ESP_CMD_SA3.
3272 cmd_bytes_sent = 0;
3273 break;
3275 case ESP_STEP_PPC:
3276 /* No, not the powerPC pinhead. Arbitration
3277 * won, all message bytes sent if we went to
3278 * message out phase, went to command phase
3279 * but only part of the command was sent.
3281 * XXX I've seen this, but usually in conjunction
3282 * XXX with a gross error which appears to have
3283 * XXX occurred between the time I told the
3284 * XXX ESP to arbitrate and when I got the
3285 * XXX interrupt. Could I have misloaded the
3286 * XXX command bytes into the fifo? Actually,
3287 * XXX I most likely missed a phase, and therefore
3288 * XXX went into never never land and didn't even
3289 * XXX know it. That was the old driver though.
3290 * XXX What is even more peculiar is that the ESP
3291 * XXX showed the proper function complete and
3292 * XXX bus service bits in the interrupt register.
3295 case ESP_STEP_FINI4:
3296 case ESP_STEP_FINI5:
3297 case ESP_STEP_FINI6:
3298 case ESP_STEP_FINI7:
3299 /* Account for the identify message */
3300 if (SCptr->SCp.phase == in_slct_norm)
3301 cmd_bytes_sent -= 1;
3304 if (esp->erev != fashme)
3305 esp_cmd(esp, ESP_CMD_NULL);
3307 /* Be careful, we could really get fucked during synchronous
3308 * data transfers if we try to flush the fifo now.
3310 if ((esp->erev != fashme) && /* not a Happy Meal and... */
3311 !fcnt && /* Fifo is empty and... */
3312 /* either we are not doing synchronous transfers or... */
3313 (!esp_dev->sync_max_offset ||
3314 /* We are not going into data in phase. */
3315 ((esp->sreg & ESP_STAT_PMASK) != ESP_DIP)))
3316 esp_cmd(esp, ESP_CMD_FLUSH); /* flush is safe */
3318 /* See how far we got if this is not a slow command. */
3319 if (!esp->esp_slowcmd) {
3320 if (cmd_bytes_sent < 0)
3321 cmd_bytes_sent = 0;
3322 if (cmd_bytes_sent != SCptr->cmd_len) {
3323 /* Crapola, mark it as a slowcmd
3324 * so that we have some chance of
3325 * keeping the command alive with
3326 * good luck.
3328 * XXX Actually, if we didn't send it all
3329 * XXX this means either we didn't set things
3330 * XXX up properly (driver bug) or the target
3331 * XXX or the ESP detected parity on one of
3332 * XXX the command bytes. This makes much
3333 * XXX more sense, and therefore this code
3334 * XXX should be changed to send out a
3335 * XXX parity error message or if the status
3336 * XXX register shows no parity error then
3337 * XXX just expect the target to bring the
3338 * XXX bus into message in phase so that it
3339 * XXX can send us the parity error message.
3340 * XXX SCSI sucks...
3342 esp->esp_slowcmd = 1;
3343 esp->esp_scmdp = &(SCptr->cmnd[cmd_bytes_sent]);
3344 esp->esp_scmdleft = (SCptr->cmd_len - cmd_bytes_sent);
3348 /* Now figure out where we went. */
3349 esp_advance_phase(SCptr, in_the_dark);
3350 return esp_do_phase_determine(esp);
3353 /* Did the target even make it? */
3354 if (esp->ireg == ESP_INTR_DC) {
3355 /* wheee... nobody there or they didn't like
3356 * what we told it to do, clean up.
3359 /* If anyone is off the bus, but working on
3360 * a command in the background for us, tell
3361 * the ESP to listen for them.
3363 if (esp->disconnected_SC)
3364 esp_cmd(esp, ESP_CMD_ESEL);
3366 if (((1<<SCptr->device->id) & esp->targets_present) &&
3367 esp->seqreg != 0 &&
3368 (esp->cur_msgout[0] == EXTENDED_MESSAGE) &&
3369 (SCptr->SCp.phase == in_slct_msg ||
3370 SCptr->SCp.phase == in_slct_stop)) {
3371 /* shit */
3372 esp->snip = 0;
3373 ESPLOG(("esp%d: Failed synchronous negotiation for target %d "
3374 "lun %d\n", esp->esp_id, SCptr->device->id, SCptr->device->lun));
3375 esp_dev->sync_max_offset = 0;
3376 esp_dev->sync_min_period = 0;
3377 esp_dev->sync = 1; /* so we don't negotiate again */
3379 /* Run the command again, this time though we
3380 * won't try to negotiate for synchronous transfers.
3382 * XXX I'd like to do something like send an
3383 * XXX INITIATOR_ERROR or ABORT message to the
3384 * XXX target to tell it, "Sorry I confused you,
3385 * XXX please come back and I will be nicer next
3386 * XXX time". But that requires having the target
3387 * XXX on the bus, and it has dropped BSY on us.
3389 esp->current_SC = NULL;
3390 esp_advance_phase(SCptr, not_issued);
3391 prepend_SC(&esp->issue_SC, SCptr);
3392 esp_exec_cmd(esp);
3393 return do_intr_end;
3396 /* Ok, this is normal, this is what we see during boot
3397 * or whenever when we are scanning the bus for targets.
3398 * But first make sure that is really what is happening.
3400 if (((1<<SCptr->device->id) & esp->targets_present)) {
3401 ESPLOG(("esp%d: Warning, live target %d not responding to "
3402 "selection.\n", esp->esp_id, SCptr->device->id));
3404 /* This _CAN_ happen. The SCSI standard states that
3405 * the target is to _not_ respond to selection if
3406 * _it_ detects bad parity on the bus for any reason.
3407 * Therefore, we assume that if we've talked successfully
3408 * to this target before, bad parity is the problem.
3410 esp_done(esp, (DID_PARITY << 16));
3411 } else {
3412 /* Else, there really isn't anyone there. */
3413 ESPMISC(("esp: selection failure, maybe nobody there?\n"));
3414 ESPMISC(("esp: target %d lun %d\n",
3415 SCptr->device->id, SCptr->device->lun));
3416 esp_done(esp, (DID_BAD_TARGET << 16));
3418 return do_intr_end;
3421 ESPLOG(("esp%d: Selection failure.\n", esp->esp_id));
3422 printk("esp%d: Currently -- ", esp->esp_id);
3423 esp_print_ireg(esp->ireg); printk(" ");
3424 esp_print_statreg(esp->sreg); printk(" ");
3425 esp_print_seqreg(esp->seqreg); printk("\n");
3426 printk("esp%d: New -- ", esp->esp_id);
3427 esp->sreg = sbus_readb(esp->eregs + ESP_STATUS);
3428 esp->seqreg = sbus_readb(esp->eregs + ESP_SSTEP);
3429 esp->ireg = sbus_readb(esp->eregs + ESP_INTRPT);
3430 esp_print_ireg(esp->ireg); printk(" ");
3431 esp_print_statreg(esp->sreg); printk(" ");
3432 esp_print_seqreg(esp->seqreg); printk("\n");
3433 ESPLOG(("esp%d: resetting bus\n", esp->esp_id));
3434 return do_reset_bus; /* ugh... */
3437 /* Continue reading bytes for msgin phase. */
3438 static int esp_do_msgincont(struct esp *esp)
3440 if (esp->ireg & ESP_INTR_BSERV) {
3441 /* in the right phase too? */
3442 if ((esp->sreg & ESP_STAT_PMASK) == ESP_MIP) {
3443 /* phew... */
3444 esp_cmd(esp, ESP_CMD_TI);
3445 esp_advance_phase(esp->current_SC, in_msgindone);
3446 return do_intr_end;
3449 /* We changed phase but ESP shows bus service,
3450 * in this case it is most likely that we, the
3451 * hacker who has been up for 20hrs straight
3452 * staring at the screen, drowned in coffee
3453 * smelling like retched cigarette ashes
3454 * have miscoded something..... so, try to
3455 * recover as best we can.
3457 ESPLOG(("esp%d: message in mis-carriage.\n", esp->esp_id));
3459 esp_advance_phase(esp->current_SC, in_the_dark);
3460 return do_phase_determine;
3463 static int check_singlebyte_msg(struct esp *esp)
3465 esp->prevmsgin = esp->cur_msgin[0];
3466 if (esp->cur_msgin[0] & 0x80) {
3467 /* wheee... */
3468 ESPLOG(("esp%d: target sends identify amidst phases\n",
3469 esp->esp_id));
3470 esp_advance_phase(esp->current_SC, in_the_dark);
3471 return 0;
3472 } else if (((esp->cur_msgin[0] & 0xf0) == 0x20) ||
3473 (esp->cur_msgin[0] == EXTENDED_MESSAGE)) {
3474 esp->msgin_len = 2;
3475 esp_advance_phase(esp->current_SC, in_msgincont);
3476 return 0;
3478 esp_advance_phase(esp->current_SC, in_the_dark);
3479 switch (esp->cur_msgin[0]) {
3480 default:
3481 /* We don't want to hear about it. */
3482 ESPLOG(("esp%d: msg %02x which we don't know about\n", esp->esp_id,
3483 esp->cur_msgin[0]));
3484 return MESSAGE_REJECT;
3486 case NOP:
3487 ESPLOG(("esp%d: target %d sends a nop\n", esp->esp_id,
3488 esp->current_SC->device->id));
3489 return 0;
3491 case RESTORE_POINTERS:
3492 /* In this case we might also have to backup the
3493 * "slow command" pointer. It is rare to get such
3494 * a save/restore pointer sequence so early in the
3495 * bus transition sequences, but cover it.
3497 if (esp->esp_slowcmd) {
3498 esp->esp_scmdleft = esp->current_SC->cmd_len;
3499 esp->esp_scmdp = &esp->current_SC->cmnd[0];
3501 esp_restore_pointers(esp, esp->current_SC);
3502 return 0;
3504 case SAVE_POINTERS:
3505 esp_save_pointers(esp, esp->current_SC);
3506 return 0;
3508 case COMMAND_COMPLETE:
3509 case DISCONNECT:
3510 /* Freeing the bus, let it go. */
3511 esp->current_SC->SCp.phase = in_freeing;
3512 return 0;
3514 case MESSAGE_REJECT:
3515 ESPMISC(("msg reject, "));
3516 if (esp->prevmsgout == EXTENDED_MESSAGE) {
3517 struct esp_device *esp_dev = esp->current_SC->device->hostdata;
3519 /* Doesn't look like this target can
3520 * do synchronous or WIDE transfers.
3522 ESPSDTR(("got reject, was trying nego, clearing sync/WIDE\n"));
3523 esp_dev->sync = 1;
3524 esp_dev->wide = 1;
3525 esp_dev->sync_min_period = 0;
3526 esp_dev->sync_max_offset = 0;
3527 return 0;
3528 } else {
3529 ESPMISC(("not sync nego, sending ABORT\n"));
3530 return ABORT;
3535 /* Target negotiates for synchronous transfers before we do, this
3536 * is legal although very strange. What is even funnier is that
3537 * the SCSI2 standard specifically recommends against targets doing
3538 * this because so many initiators cannot cope with this occurring.
3540 static int target_with_ants_in_pants(struct esp *esp,
3541 struct scsi_cmnd *SCptr,
3542 struct esp_device *esp_dev)
3544 if (esp_dev->sync || SCptr->device->borken) {
3545 /* sorry, no can do */
3546 ESPSDTR(("forcing to async, "));
3547 build_sync_nego_msg(esp, 0, 0);
3548 esp_dev->sync = 1;
3549 esp->snip = 1;
3550 ESPLOG(("esp%d: hoping for msgout\n", esp->esp_id));
3551 esp_advance_phase(SCptr, in_the_dark);
3552 return EXTENDED_MESSAGE;
3555 /* Ok, we'll check them out... */
3556 return 0;
3559 static void sync_report(struct esp *esp)
3561 int msg3, msg4;
3562 char *type;
3564 msg3 = esp->cur_msgin[3];
3565 msg4 = esp->cur_msgin[4];
3566 if (msg4) {
3567 int hz = 1000000000 / (msg3 * 4);
3568 int integer = hz / 1000000;
3569 int fraction = (hz - (integer * 1000000)) / 10000;
3570 if ((esp->erev == fashme) &&
3571 (esp->config3[esp->current_SC->device->id] & ESP_CONFIG3_EWIDE)) {
3572 type = "FAST-WIDE";
3573 integer <<= 1;
3574 fraction <<= 1;
3575 } else if ((msg3 * 4) < 200) {
3576 type = "FAST";
3577 } else {
3578 type = "synchronous";
3581 /* Do not transform this back into one big printk
3582 * again, it triggers a bug in our sparc64-gcc272
3583 * sibling call optimization. -DaveM
3585 ESPLOG((KERN_INFO "esp%d: target %d ",
3586 esp->esp_id, esp->current_SC->device->id));
3587 ESPLOG(("[period %dns offset %d %d.%02dMHz ",
3588 (int) msg3 * 4, (int) msg4,
3589 integer, fraction));
3590 ESPLOG(("%s SCSI%s]\n", type,
3591 (((msg3 * 4) < 200) ? "-II" : "")));
3592 } else {
3593 ESPLOG((KERN_INFO "esp%d: target %d asynchronous\n",
3594 esp->esp_id, esp->current_SC->device->id));
3598 static int check_multibyte_msg(struct esp *esp)
3600 struct scsi_cmnd *SCptr = esp->current_SC;
3601 struct esp_device *esp_dev = SCptr->device->hostdata;
3602 u8 regval = 0;
3603 int message_out = 0;
3605 ESPSDTR(("chk multibyte msg: "));
3606 if (esp->cur_msgin[2] == EXTENDED_SDTR) {
3607 int period = esp->cur_msgin[3];
3608 int offset = esp->cur_msgin[4];
3610 ESPSDTR(("is sync nego response, "));
3611 if (!esp->snip) {
3612 int rval;
3614 /* Target negotiates first! */
3615 ESPSDTR(("target jumps the gun, "));
3616 message_out = EXTENDED_MESSAGE; /* we must respond */
3617 rval = target_with_ants_in_pants(esp, SCptr, esp_dev);
3618 if (rval)
3619 return rval;
3622 ESPSDTR(("examining sdtr, "));
3624 /* Offset cannot be larger than ESP fifo size. */
3625 if (offset > 15) {
3626 ESPSDTR(("offset too big %2x, ", offset));
3627 offset = 15;
3628 ESPSDTR(("sending back new offset\n"));
3629 build_sync_nego_msg(esp, period, offset);
3630 return EXTENDED_MESSAGE;
3633 if (offset && period > esp->max_period) {
3634 /* Yeee, async for this slow device. */
3635 ESPSDTR(("period too long %2x, ", period));
3636 build_sync_nego_msg(esp, 0, 0);
3637 ESPSDTR(("hoping for msgout\n"));
3638 esp_advance_phase(esp->current_SC, in_the_dark);
3639 return EXTENDED_MESSAGE;
3640 } else if (offset && period < esp->min_period) {
3641 ESPSDTR(("period too short %2x, ", period));
3642 period = esp->min_period;
3643 if (esp->erev > esp236)
3644 regval = 4;
3645 else
3646 regval = 5;
3647 } else if (offset) {
3648 int tmp;
3650 ESPSDTR(("period is ok, "));
3651 tmp = esp->ccycle / 1000;
3652 regval = (((period << 2) + tmp - 1) / tmp);
3653 if (regval && ((esp->erev == fas100a ||
3654 esp->erev == fas236 ||
3655 esp->erev == fashme))) {
3656 if (period >= 50)
3657 regval--;
3661 if (offset) {
3662 u8 bit;
3664 esp_dev->sync_min_period = (regval & 0x1f);
3665 esp_dev->sync_max_offset = (offset | esp->radelay);
3666 if (esp->erev == fas100a || esp->erev == fas236 || esp->erev == fashme) {
3667 if ((esp->erev == fas100a) || (esp->erev == fashme))
3668 bit = ESP_CONFIG3_FAST;
3669 else
3670 bit = ESP_CONFIG3_FSCSI;
3671 if (period < 50) {
3672 /* On FAS366, if using fast-20 synchronous transfers
3673 * we need to make sure the REQ/ACK assert/deassert
3674 * control bits are clear.
3676 if (esp->erev == fashme)
3677 esp_dev->sync_max_offset &= ~esp->radelay;
3678 esp->config3[SCptr->device->id] |= bit;
3679 } else {
3680 esp->config3[SCptr->device->id] &= ~bit;
3682 esp->prev_cfg3 = esp->config3[SCptr->device->id];
3683 sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3);
3685 esp->prev_soff = esp_dev->sync_max_offset;
3686 esp->prev_stp = esp_dev->sync_min_period;
3687 sbus_writeb(esp->prev_soff, esp->eregs + ESP_SOFF);
3688 sbus_writeb(esp->prev_stp, esp->eregs + ESP_STP);
3689 ESPSDTR(("soff=%2x stp=%2x cfg3=%2x\n",
3690 esp_dev->sync_max_offset,
3691 esp_dev->sync_min_period,
3692 esp->config3[SCptr->device->id]));
3694 esp->snip = 0;
3695 } else if (esp_dev->sync_max_offset) {
3696 u8 bit;
3698 /* back to async mode */
3699 ESPSDTR(("unaccaptable sync nego, forcing async\n"));
3700 esp_dev->sync_max_offset = 0;
3701 esp_dev->sync_min_period = 0;
3702 esp->prev_soff = 0;
3703 esp->prev_stp = 0;
3704 sbus_writeb(esp->prev_soff, esp->eregs + ESP_SOFF);
3705 sbus_writeb(esp->prev_stp, esp->eregs + ESP_STP);
3706 if (esp->erev == fas100a || esp->erev == fas236 || esp->erev == fashme) {
3707 if ((esp->erev == fas100a) || (esp->erev == fashme))
3708 bit = ESP_CONFIG3_FAST;
3709 else
3710 bit = ESP_CONFIG3_FSCSI;
3711 esp->config3[SCptr->device->id] &= ~bit;
3712 esp->prev_cfg3 = esp->config3[SCptr->device->id];
3713 sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3);
3717 sync_report(esp);
3719 ESPSDTR(("chk multibyte msg: sync is known, "));
3720 esp_dev->sync = 1;
3722 if (message_out) {
3723 ESPLOG(("esp%d: sending sdtr back, hoping for msgout\n",
3724 esp->esp_id));
3725 build_sync_nego_msg(esp, period, offset);
3726 esp_advance_phase(SCptr, in_the_dark);
3727 return EXTENDED_MESSAGE;
3730 ESPSDTR(("returning zero\n"));
3731 esp_advance_phase(SCptr, in_the_dark); /* ...or else! */
3732 return 0;
3733 } else if (esp->cur_msgin[2] == EXTENDED_WDTR) {
3734 int size = 8 << esp->cur_msgin[3];
3736 esp->wnip = 0;
3737 if (esp->erev != fashme) {
3738 ESPLOG(("esp%d: AIEEE wide msg received and not HME.\n",
3739 esp->esp_id));
3740 message_out = MESSAGE_REJECT;
3741 } else if (size > 16) {
3742 ESPLOG(("esp%d: AIEEE wide transfer for %d size "
3743 "not supported.\n", esp->esp_id, size));
3744 message_out = MESSAGE_REJECT;
3745 } else {
3746 /* Things look good; let's see what we got. */
3747 if (size == 16) {
3748 /* Set config 3 register for this target. */
3749 esp->config3[SCptr->device->id] |= ESP_CONFIG3_EWIDE;
3750 } else {
3751 /* Just make sure it was one byte sized. */
3752 if (size != 8) {
3753 ESPLOG(("esp%d: Aieee, wide nego of %d size.\n",
3754 esp->esp_id, size));
3755 message_out = MESSAGE_REJECT;
3756 goto finish;
3758 /* Pure paranoia. */
3759 esp->config3[SCptr->device->id] &= ~(ESP_CONFIG3_EWIDE);
3761 esp->prev_cfg3 = esp->config3[SCptr->device->id];
3762 sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3);
3764 /* Regardless, next try for sync transfers. */
3765 build_sync_nego_msg(esp, esp->sync_defp, 15);
3766 esp_dev->sync = 1;
3767 esp->snip = 1;
3768 message_out = EXTENDED_MESSAGE;
3770 } else if (esp->cur_msgin[2] == EXTENDED_MODIFY_DATA_POINTER) {
3771 ESPLOG(("esp%d: rejecting modify data ptr msg\n", esp->esp_id));
3772 message_out = MESSAGE_REJECT;
3774 finish:
3775 esp_advance_phase(SCptr, in_the_dark);
3776 return message_out;
3779 static int esp_do_msgindone(struct esp *esp)
3781 struct scsi_cmnd *SCptr = esp->current_SC;
3782 int message_out = 0, it = 0, rval;
3784 rval = skipahead1(esp, SCptr, in_msgin, in_msgindone);
3785 if (rval)
3786 return rval;
3787 if (SCptr->SCp.sent_command != in_status) {
3788 if (!(esp->ireg & ESP_INTR_DC)) {
3789 if (esp->msgin_len && (esp->sreg & ESP_STAT_PERR)) {
3790 message_out = MSG_PARITY_ERROR;
3791 esp_cmd(esp, ESP_CMD_FLUSH);
3792 } else if (esp->erev != fashme &&
3793 (it = (sbus_readb(esp->eregs + ESP_FFLAGS) & ESP_FF_FBYTES)) != 1) {
3794 /* We certainly dropped the ball somewhere. */
3795 message_out = INITIATOR_ERROR;
3796 esp_cmd(esp, ESP_CMD_FLUSH);
3797 } else if (!esp->msgin_len) {
3798 if (esp->erev == fashme)
3799 it = esp->hme_fifo_workaround_buffer[0];
3800 else
3801 it = sbus_readb(esp->eregs + ESP_FDATA);
3802 esp_advance_phase(SCptr, in_msgincont);
3803 } else {
3804 /* it is ok and we want it */
3805 if (esp->erev == fashme)
3806 it = esp->cur_msgin[esp->msgin_ctr] =
3807 esp->hme_fifo_workaround_buffer[0];
3808 else
3809 it = esp->cur_msgin[esp->msgin_ctr] =
3810 sbus_readb(esp->eregs + ESP_FDATA);
3811 esp->msgin_ctr++;
3813 } else {
3814 esp_advance_phase(SCptr, in_the_dark);
3815 return do_work_bus;
3817 } else {
3818 it = esp->cur_msgin[0];
3820 if (!message_out && esp->msgin_len) {
3821 if (esp->msgin_ctr < esp->msgin_len) {
3822 esp_advance_phase(SCptr, in_msgincont);
3823 } else if (esp->msgin_len == 1) {
3824 message_out = check_singlebyte_msg(esp);
3825 } else if (esp->msgin_len == 2) {
3826 if (esp->cur_msgin[0] == EXTENDED_MESSAGE) {
3827 if ((it + 2) >= 15) {
3828 message_out = MESSAGE_REJECT;
3829 } else {
3830 esp->msgin_len = (it + 2);
3831 esp_advance_phase(SCptr, in_msgincont);
3833 } else {
3834 message_out = MESSAGE_REJECT; /* foo on you */
3836 } else {
3837 message_out = check_multibyte_msg(esp);
3840 if (message_out < 0) {
3841 return -message_out;
3842 } else if (message_out) {
3843 if (((message_out != 1) &&
3844 ((message_out < 0x20) || (message_out & 0x80))))
3845 esp->msgout_len = 1;
3846 esp->cur_msgout[0] = message_out;
3847 esp_cmd(esp, ESP_CMD_SATN);
3848 esp_advance_phase(SCptr, in_the_dark);
3849 esp->msgin_len = 0;
3851 esp->sreg = sbus_readb(esp->eregs + ESP_STATUS);
3852 esp->sreg &= ~(ESP_STAT_INTR);
3853 if ((esp->sreg & (ESP_STAT_PMSG|ESP_STAT_PCD)) == (ESP_STAT_PMSG|ESP_STAT_PCD))
3854 esp_cmd(esp, ESP_CMD_MOK);
3855 if ((SCptr->SCp.sent_command == in_msgindone) &&
3856 (SCptr->SCp.phase == in_freeing))
3857 return esp_do_freebus(esp);
3858 return do_intr_end;
3861 static int esp_do_cmdbegin(struct esp *esp)
3863 struct scsi_cmnd *SCptr = esp->current_SC;
3865 esp_advance_phase(SCptr, in_cmdend);
3866 if (esp->erev == fashme) {
3867 u32 tmp = sbus_readl(esp->dregs + DMA_CSR);
3868 int i;
3870 for (i = 0; i < esp->esp_scmdleft; i++)
3871 esp->esp_command[i] = *esp->esp_scmdp++;
3872 esp->esp_scmdleft = 0;
3873 esp_cmd(esp, ESP_CMD_FLUSH);
3874 esp_setcount(esp->eregs, i, 1);
3875 esp_cmd(esp, (ESP_CMD_DMA | ESP_CMD_TI));
3876 tmp |= (DMA_SCSI_DISAB | DMA_ENABLE);
3877 tmp &= ~(DMA_ST_WRITE);
3878 sbus_writel(i, esp->dregs + DMA_COUNT);
3879 sbus_writel(esp->esp_command_dvma, esp->dregs + DMA_ADDR);
3880 sbus_writel(tmp, esp->dregs + DMA_CSR);
3881 } else {
3882 u8 tmp;
3884 esp_cmd(esp, ESP_CMD_FLUSH);
3885 tmp = *esp->esp_scmdp++;
3886 esp->esp_scmdleft--;
3887 sbus_writeb(tmp, esp->eregs + ESP_FDATA);
3888 esp_cmd(esp, ESP_CMD_TI);
3890 return do_intr_end;
3893 static int esp_do_cmddone(struct esp *esp)
3895 if (esp->erev == fashme)
3896 dma_invalidate(esp);
3897 else
3898 esp_cmd(esp, ESP_CMD_NULL);
3900 if (esp->ireg & ESP_INTR_BSERV) {
3901 esp_advance_phase(esp->current_SC, in_the_dark);
3902 return esp_do_phase_determine(esp);
3905 ESPLOG(("esp%d: in do_cmddone() but didn't get BSERV interrupt.\n",
3906 esp->esp_id));
3907 return do_reset_bus;
3910 static int esp_do_msgout(struct esp *esp)
3912 esp_cmd(esp, ESP_CMD_FLUSH);
3913 switch (esp->msgout_len) {
3914 case 1:
3915 if (esp->erev == fashme)
3916 hme_fifo_push(esp, &esp->cur_msgout[0], 1);
3917 else
3918 sbus_writeb(esp->cur_msgout[0], esp->eregs + ESP_FDATA);
3920 esp_cmd(esp, ESP_CMD_TI);
3921 break;
3923 case 2:
3924 esp->esp_command[0] = esp->cur_msgout[0];
3925 esp->esp_command[1] = esp->cur_msgout[1];
3927 if (esp->erev == fashme) {
3928 hme_fifo_push(esp, &esp->cur_msgout[0], 2);
3929 esp_cmd(esp, ESP_CMD_TI);
3930 } else {
3931 dma_setup(esp, esp->esp_command_dvma, 2, 0);
3932 esp_setcount(esp->eregs, 2, 0);
3933 esp_cmd(esp, ESP_CMD_DMA | ESP_CMD_TI);
3935 break;
3937 case 4:
3938 esp->esp_command[0] = esp->cur_msgout[0];
3939 esp->esp_command[1] = esp->cur_msgout[1];
3940 esp->esp_command[2] = esp->cur_msgout[2];
3941 esp->esp_command[3] = esp->cur_msgout[3];
3942 esp->snip = 1;
3944 if (esp->erev == fashme) {
3945 hme_fifo_push(esp, &esp->cur_msgout[0], 4);
3946 esp_cmd(esp, ESP_CMD_TI);
3947 } else {
3948 dma_setup(esp, esp->esp_command_dvma, 4, 0);
3949 esp_setcount(esp->eregs, 4, 0);
3950 esp_cmd(esp, ESP_CMD_DMA | ESP_CMD_TI);
3952 break;
3954 case 5:
3955 esp->esp_command[0] = esp->cur_msgout[0];
3956 esp->esp_command[1] = esp->cur_msgout[1];
3957 esp->esp_command[2] = esp->cur_msgout[2];
3958 esp->esp_command[3] = esp->cur_msgout[3];
3959 esp->esp_command[4] = esp->cur_msgout[4];
3960 esp->snip = 1;
3962 if (esp->erev == fashme) {
3963 hme_fifo_push(esp, &esp->cur_msgout[0], 5);
3964 esp_cmd(esp, ESP_CMD_TI);
3965 } else {
3966 dma_setup(esp, esp->esp_command_dvma, 5, 0);
3967 esp_setcount(esp->eregs, 5, 0);
3968 esp_cmd(esp, ESP_CMD_DMA | ESP_CMD_TI);
3970 break;
3972 default:
3973 /* whoops */
3974 ESPMISC(("bogus msgout sending NOP\n"));
3975 esp->cur_msgout[0] = NOP;
3977 if (esp->erev == fashme) {
3978 hme_fifo_push(esp, &esp->cur_msgout[0], 1);
3979 } else {
3980 sbus_writeb(esp->cur_msgout[0], esp->eregs + ESP_FDATA);
3983 esp->msgout_len = 1;
3984 esp_cmd(esp, ESP_CMD_TI);
3985 break;
3988 esp_advance_phase(esp->current_SC, in_msgoutdone);
3989 return do_intr_end;
3992 static int esp_do_msgoutdone(struct esp *esp)
3994 if (esp->msgout_len > 1) {
3995 /* XXX HME/FAS ATN deassert workaround required,
3996 * XXX no DMA flushing, only possible ESP_CMD_FLUSH
3997 * XXX to kill the fifo.
3999 if (esp->erev != fashme) {
4000 u32 tmp;
4002 while ((tmp = sbus_readl(esp->dregs + DMA_CSR)) & DMA_PEND_READ)
4003 udelay(1);
4004 tmp &= ~DMA_ENABLE;
4005 sbus_writel(tmp, esp->dregs + DMA_CSR);
4006 dma_invalidate(esp);
4007 } else {
4008 esp_cmd(esp, ESP_CMD_FLUSH);
4011 if (!(esp->ireg & ESP_INTR_DC)) {
4012 if (esp->erev != fashme)
4013 esp_cmd(esp, ESP_CMD_NULL);
4014 switch (esp->sreg & ESP_STAT_PMASK) {
4015 case ESP_MOP:
4016 /* whoops, parity error */
4017 ESPLOG(("esp%d: still in msgout, parity error assumed\n",
4018 esp->esp_id));
4019 if (esp->msgout_len > 1)
4020 esp_cmd(esp, ESP_CMD_SATN);
4021 esp_advance_phase(esp->current_SC, in_msgout);
4022 return do_work_bus;
4024 case ESP_DIP:
4025 break;
4027 default:
4028 /* Happy Meal fifo is touchy... */
4029 if ((esp->erev != fashme) &&
4030 !fcount(esp) &&
4031 !(((struct esp_device *)esp->current_SC->device->hostdata)->sync_max_offset))
4032 esp_cmd(esp, ESP_CMD_FLUSH);
4033 break;
4036 } else {
4037 ESPLOG(("esp%d: disconnect, resetting bus\n", esp->esp_id));
4038 return do_reset_bus;
4041 /* If we sent out a synchronous negotiation message, update
4042 * our state.
4044 if (esp->cur_msgout[2] == EXTENDED_MESSAGE &&
4045 esp->cur_msgout[4] == EXTENDED_SDTR) {
4046 esp->snip = 1; /* anal retentiveness... */
4049 esp->prevmsgout = esp->cur_msgout[0];
4050 esp->msgout_len = 0;
4051 esp_advance_phase(esp->current_SC, in_the_dark);
4052 return esp_do_phase_determine(esp);
4055 static int esp_bus_unexpected(struct esp *esp)
4057 ESPLOG(("esp%d: command in weird state %2x\n",
4058 esp->esp_id, esp->current_SC->SCp.phase));
4059 return do_reset_bus;
4062 static espfunc_t bus_vector[] = {
4063 esp_do_data_finale,
4064 esp_do_data_finale,
4065 esp_bus_unexpected,
4066 esp_do_msgin,
4067 esp_do_msgincont,
4068 esp_do_msgindone,
4069 esp_do_msgout,
4070 esp_do_msgoutdone,
4071 esp_do_cmdbegin,
4072 esp_do_cmddone,
4073 esp_do_status,
4074 esp_do_freebus,
4075 esp_do_phase_determine,
4076 esp_bus_unexpected,
4077 esp_bus_unexpected,
4078 esp_bus_unexpected,
4081 /* This is the second tier in our dual-level SCSI state machine. */
4082 static int esp_work_bus(struct esp *esp)
4084 struct scsi_cmnd *SCptr = esp->current_SC;
4085 unsigned int phase;
4087 ESPBUS(("esp_work_bus: "));
4088 if (!SCptr) {
4089 ESPBUS(("reconnect\n"));
4090 return esp_do_reconnect(esp);
4092 phase = SCptr->SCp.phase;
4093 if ((phase & 0xf0) == in_phases_mask)
4094 return bus_vector[(phase & 0x0f)](esp);
4095 else if ((phase & 0xf0) == in_slct_mask)
4096 return esp_select_complete(esp);
4097 else
4098 return esp_bus_unexpected(esp);
4101 static espfunc_t isvc_vector[] = {
4102 NULL,
4103 esp_do_phase_determine,
4104 esp_do_resetbus,
4105 esp_finish_reset,
4106 esp_work_bus
4109 /* Main interrupt handler for an esp adapter. */
4110 static void esp_handle(struct esp *esp)
4112 struct scsi_cmnd *SCptr;
4113 int what_next = do_intr_end;
4115 SCptr = esp->current_SC;
4117 /* Check for errors. */
4118 esp->sreg = sbus_readb(esp->eregs + ESP_STATUS);
4119 esp->sreg &= (~ESP_STAT_INTR);
4120 if (esp->erev == fashme) {
4121 esp->sreg2 = sbus_readb(esp->eregs + ESP_STATUS2);
4122 esp->seqreg = (sbus_readb(esp->eregs + ESP_SSTEP) & ESP_STEP_VBITS);
4125 if (esp->sreg & (ESP_STAT_SPAM)) {
4126 /* Gross error, could be due to one of:
4128 * - top of fifo overwritten, could be because
4129 * we tried to do a synchronous transfer with
4130 * an offset greater than ESP fifo size
4132 * - top of command register overwritten
4134 * - DMA setup to go in one direction, SCSI
4135 * bus points in the other, whoops
4137 * - weird phase change during asynchronous
4138 * data phase while we are initiator
4140 ESPLOG(("esp%d: Gross error sreg=%2x\n", esp->esp_id, esp->sreg));
4142 /* If a command is live on the bus we cannot safely
4143 * reset the bus, so we'll just let the pieces fall
4144 * where they may. Here we are hoping that the
4145 * target will be able to cleanly go away soon
4146 * so we can safely reset things.
4148 if (!SCptr) {
4149 ESPLOG(("esp%d: No current cmd during gross error, "
4150 "resetting bus\n", esp->esp_id));
4151 what_next = do_reset_bus;
4152 goto state_machine;
4156 if (sbus_readl(esp->dregs + DMA_CSR) & DMA_HNDL_ERROR) {
4157 /* A DMA gate array error. Here we must
4158 * be seeing one of two things. Either the
4159 * virtual to physical address translation
4160 * on the SBUS could not occur, else the
4161 * translation it did get pointed to a bogus
4162 * page. Ho hum...
4164 ESPLOG(("esp%d: DMA error %08x\n", esp->esp_id,
4165 sbus_readl(esp->dregs + DMA_CSR)));
4167 /* DMA gate array itself must be reset to clear the
4168 * error condition.
4170 esp_reset_dma(esp);
4172 what_next = do_reset_bus;
4173 goto state_machine;
4176 esp->ireg = sbus_readb(esp->eregs + ESP_INTRPT); /* Unlatch intr reg */
4178 if (esp->erev == fashme) {
4179 /* This chip is really losing. */
4180 ESPHME(("HME["));
4182 ESPHME(("sreg2=%02x,", esp->sreg2));
4183 /* Must latch fifo before reading the interrupt
4184 * register else garbage ends up in the FIFO
4185 * which confuses the driver utterly.
4187 if (!(esp->sreg2 & ESP_STAT2_FEMPTY) ||
4188 (esp->sreg2 & ESP_STAT2_F1BYTE)) {
4189 ESPHME(("fifo_workaround]"));
4190 hme_fifo_read(esp);
4191 } else {
4192 ESPHME(("no_fifo_workaround]"));
4196 /* No current cmd is only valid at this point when there are
4197 * commands off the bus or we are trying a reset.
4199 if (!SCptr && !esp->disconnected_SC && !(esp->ireg & ESP_INTR_SR)) {
4200 /* Panic is safe, since current_SC is null. */
4201 ESPLOG(("esp%d: no command in esp_handle()\n", esp->esp_id));
4202 panic("esp_handle: current_SC == penguin within interrupt!");
4205 if (esp->ireg & (ESP_INTR_IC)) {
4206 /* Illegal command fed to ESP. Outside of obvious
4207 * software bugs that could cause this, there is
4208 * a condition with esp100 where we can confuse the
4209 * ESP into an erroneous illegal command interrupt
4210 * because it does not scrape the FIFO properly
4211 * for reselection. See esp100_reconnect_hwbug()
4212 * to see how we try very hard to avoid this.
4214 ESPLOG(("esp%d: invalid command\n", esp->esp_id));
4216 esp_dump_state(esp);
4218 if (SCptr != NULL) {
4219 /* Devices with very buggy firmware can drop BSY
4220 * during a scatter list interrupt when using sync
4221 * mode transfers. We continue the transfer as
4222 * expected, the target drops the bus, the ESP
4223 * gets confused, and we get a illegal command
4224 * interrupt because the bus is in the disconnected
4225 * state now and ESP_CMD_TI is only allowed when
4226 * a nexus is alive on the bus.
4228 ESPLOG(("esp%d: Forcing async and disabling disconnect for "
4229 "target %d\n", esp->esp_id, SCptr->device->id));
4230 SCptr->device->borken = 1; /* foo on you */
4233 what_next = do_reset_bus;
4234 } else if (!(esp->ireg & ~(ESP_INTR_FDONE | ESP_INTR_BSERV | ESP_INTR_DC))) {
4235 if (SCptr) {
4236 unsigned int phase = SCptr->SCp.phase;
4238 if (phase & in_phases_mask) {
4239 what_next = esp_work_bus(esp);
4240 } else if (phase & in_slct_mask) {
4241 what_next = esp_select_complete(esp);
4242 } else {
4243 ESPLOG(("esp%d: interrupt for no good reason...\n",
4244 esp->esp_id));
4245 what_next = do_intr_end;
4247 } else {
4248 ESPLOG(("esp%d: BSERV or FDONE or DC while SCptr==NULL\n",
4249 esp->esp_id));
4250 what_next = do_reset_bus;
4252 } else if (esp->ireg & ESP_INTR_SR) {
4253 ESPLOG(("esp%d: SCSI bus reset interrupt\n", esp->esp_id));
4254 what_next = do_reset_complete;
4255 } else if (esp->ireg & (ESP_INTR_S | ESP_INTR_SATN)) {
4256 ESPLOG(("esp%d: AIEEE we have been selected by another initiator!\n",
4257 esp->esp_id));
4258 what_next = do_reset_bus;
4259 } else if (esp->ireg & ESP_INTR_RSEL) {
4260 if (SCptr == NULL) {
4261 /* This is ok. */
4262 what_next = esp_do_reconnect(esp);
4263 } else if (SCptr->SCp.phase & in_slct_mask) {
4264 /* Only selection code knows how to clean
4265 * up properly.
4267 ESPDISC(("Reselected during selection attempt\n"));
4268 what_next = esp_select_complete(esp);
4269 } else {
4270 ESPLOG(("esp%d: Reselected while bus is busy\n",
4271 esp->esp_id));
4272 what_next = do_reset_bus;
4276 /* This is tier-one in our dual level SCSI state machine. */
4277 state_machine:
4278 while (what_next != do_intr_end) {
4279 if (what_next >= do_phase_determine &&
4280 what_next < do_intr_end) {
4281 what_next = isvc_vector[what_next](esp);
4282 } else {
4283 /* state is completely lost ;-( */
4284 ESPLOG(("esp%d: interrupt engine loses state, resetting bus\n",
4285 esp->esp_id));
4286 what_next = do_reset_bus;
4291 /* Service only the ESP described by dev_id. */
4292 static irqreturn_t esp_intr(int irq, void *dev_id, struct pt_regs *pregs)
4294 struct esp *esp = dev_id;
4295 unsigned long flags;
4297 spin_lock_irqsave(esp->ehost->host_lock, flags);
4298 if (ESP_IRQ_P(esp->dregs)) {
4299 ESP_INTSOFF(esp->dregs);
4301 ESPIRQ(("I[%d:%d](", smp_processor_id(), esp->esp_id));
4302 esp_handle(esp);
4303 ESPIRQ((")"));
4305 ESP_INTSON(esp->dregs);
4307 spin_unlock_irqrestore(esp->ehost->host_lock, flags);
4309 return IRQ_HANDLED;
4312 static int esp_slave_alloc(struct scsi_device *SDptr)
4314 struct esp_device *esp_dev =
4315 kmalloc(sizeof(struct esp_device), GFP_ATOMIC);
4317 if (!esp_dev)
4318 return -ENOMEM;
4319 memset(esp_dev, 0, sizeof(struct esp_device));
4320 SDptr->hostdata = esp_dev;
4321 return 0;
4324 static void esp_slave_destroy(struct scsi_device *SDptr)
4326 struct esp *esp = (struct esp *) SDptr->host->hostdata;
4328 esp->targets_present &= ~(1 << SDptr->id);
4329 kfree(SDptr->hostdata);
4330 SDptr->hostdata = NULL;
4333 static struct scsi_host_template esp_template = {
4334 .module = THIS_MODULE,
4335 .name = "esp",
4336 .info = esp_info,
4337 .slave_alloc = esp_slave_alloc,
4338 .slave_destroy = esp_slave_destroy,
4339 .queuecommand = esp_queue,
4340 .eh_abort_handler = esp_abort,
4341 .eh_bus_reset_handler = esp_reset,
4342 .can_queue = 7,
4343 .this_id = 7,
4344 .sg_tablesize = SG_ALL,
4345 .cmd_per_lun = 1,
4346 .use_clustering = ENABLE_CLUSTERING,
4347 .proc_name = "esp",
4348 .proc_info = esp_proc_info,
4351 #ifndef CONFIG_SUN4
4352 static struct of_device_id esp_match[] = {
4354 .name = "SUNW,esp",
4355 .data = &esp_template,
4358 .name = "SUNW,fas",
4359 .data = &esp_template,
4362 .name = "esp",
4363 .data = &esp_template,
4367 MODULE_DEVICE_TABLE(of, esp_match);
4369 static struct of_platform_driver esp_sbus_driver = {
4370 .name = "esp",
4371 .match_table = esp_match,
4372 .probe = esp_sbus_probe,
4373 .remove = __devexit_p(esp_sbus_remove),
4375 #endif
4377 static int __init esp_init(void)
4379 #ifdef CONFIG_SUN4
4380 return esp_sun4_probe(&esp_template);
4381 #else
4382 return of_register_driver(&esp_sbus_driver, &sbus_bus_type);
4383 #endif
4386 static void __exit esp_exit(void)
4388 #ifdef CONFIG_SUN4
4389 esp_sun4_remove();
4390 #else
4391 of_unregister_driver(&esp_sbus_driver);
4392 #endif
4395 MODULE_DESCRIPTION("ESP Sun SCSI driver");
4396 MODULE_AUTHOR("David S. Miller (davem@davemloft.net)");
4397 MODULE_LICENSE("GPL");
4398 MODULE_VERSION(DRV_VERSION);
4400 module_init(esp_init);
4401 module_exit(esp_exit);