[PATCH] powerpc: Migrate Xilinx Vertex support from the OCP bus to the platfom bus.
[linux-2.6.22.y-op.git] / arch / ppc / boot / common / ns16550.c
blob4f00c93ac870240cac5807aadb8c29c15120198c
1 /*
2 * COM1 NS16550 support
3 */
5 #include <linux/config.h>
6 #include <linux/types.h>
7 #include <linux/serial.h>
8 #include <linux/serial_reg.h>
9 #include <asm/serial.h>
11 #if defined(CONFIG_XILINX_VIRTEX)
12 #include <platforms/4xx/xparameters/xparameters.h>
13 #endif
14 #include "nonstdio.h"
15 #include "serial.h"
17 #define SERIAL_BAUD 9600
19 extern unsigned long ISA_io;
21 static struct serial_state rs_table[RS_TABLE_SIZE] = {
22 SERIAL_PORT_DFNS /* Defined in <asm/serial.h> */
25 static int shift;
27 unsigned long serial_init(int chan, void *ignored)
29 unsigned long com_port, base_baud;
30 unsigned char lcr, dlm;
32 /* We need to find out which type io we're expecting. If it's
33 * 'SERIAL_IO_PORT', we get an offset from the isa_io_base.
34 * If it's 'SERIAL_IO_MEM', we can the exact location. -- Tom */
35 switch (rs_table[chan].io_type) {
36 case SERIAL_IO_PORT:
37 com_port = rs_table[chan].port;
38 break;
39 case SERIAL_IO_MEM:
40 com_port = (unsigned long)rs_table[chan].iomem_base;
41 break;
42 default:
43 /* We can't deal with it. */
44 return -1;
47 /* How far apart the registers are. */
48 shift = rs_table[chan].iomem_reg_shift;
49 /* Base baud.. */
50 base_baud = rs_table[chan].baud_base;
52 /* save the LCR */
53 lcr = inb(com_port + (UART_LCR << shift));
54 /* Access baud rate */
55 outb(com_port + (UART_LCR << shift), 0x80);
56 dlm = inb(com_port + (UART_DLM << shift));
58 * Test if serial port is unconfigured.
59 * We assume that no-one uses less than 110 baud or
60 * less than 7 bits per character these days.
61 * -- paulus.
64 if ((dlm <= 4) && (lcr & 2))
65 /* port is configured, put the old LCR back */
66 outb(com_port + (UART_LCR << shift), lcr);
67 else {
68 /* Input clock. */
69 outb(com_port + (UART_DLL << shift),
70 (base_baud / SERIAL_BAUD) & 0xFF);
71 outb(com_port + (UART_DLM << shift),
72 (base_baud / SERIAL_BAUD) >> 8);
73 /* 8 data, 1 stop, no parity */
74 outb(com_port + (UART_LCR << shift), 0x03);
75 /* RTS/DTR */
76 outb(com_port + (UART_MCR << shift), 0x03);
78 /* Clear & enable FIFOs */
79 outb(com_port + (UART_FCR << shift), 0x07);
81 return (com_port);
84 void
85 serial_putc(unsigned long com_port, unsigned char c)
87 while ((inb(com_port + (UART_LSR << shift)) & UART_LSR_THRE) == 0)
89 outb(com_port, c);
92 unsigned char
93 serial_getc(unsigned long com_port)
95 while ((inb(com_port + (UART_LSR << shift)) & UART_LSR_DR) == 0)
97 return inb(com_port);
101 serial_tstc(unsigned long com_port)
103 return ((inb(com_port + (UART_LSR << shift)) & UART_LSR_DR) != 0);