include/asm-arm/arch-s3c3410/irqs.h

   1 /*
   2  *  linux/include/asm-armnommu/arch-s3c3410/irqs.h
   3  *
   4  * 2003 Thomas Eschenbacher <thomas.eschenbacher@gmx.de>
   5  *
   6  * All IRQ numbers of the S3C3410X CPUs.
   7  *
   8  */
   9
  10 #ifndef __S3C3410_irqs_h
  11 #define __S3C3410_irqs_h                        1
  12
  13 #define NR_IRQS         32
  14
  15 #define S3C3410X_INTERRUPT_EINT0         0      /* External int. 0 */
  16 #define S3C3410X_INTERRUPT_EINT1         1      /* External int. 1 */
  17 #define S3C3410X_INTERRUPT_URX           2      /* UART receive */
  18 #define S3C3410X_INTERRUPT_UTX           3      /* UART transmit */
  19 #define S3C3410X_INTERRUPT_UERR          4      /* UART error */
  20 #define S3C3410X_INTERRUPT_DMA0          5      /* DMA 0 */
  21 #define S3C3410X_INTERRUPT_DMA1          6      /* DMA 1 */
  22 #define S3C3410X_INTERRUPT_TOF0          7      /* Timer 0 overflow */
  23 #define S3C3410X_INTERRUPT_TMC0          8      /* Timer 0 match/capture */
  24 #define S3C3410X_INTERRUPT_TOF1          9      /* Timer 1 overflow */
  25 #define S3C3410X_INTERRUPT_TMC1         10      /* Timer 1 match/capture */
  26 #define S3C3410X_INTERRUPT_TOF2         11      /* Timer 2 overflow */
  27 #define S3C3410X_INTERRUPT_TMC2         12      /* Timer 2 match/capture */
  28 #define S3C3410X_INTERRUPT_TOF3         13      /* Timer 3 overflow */
  29 #define S3C3410X_INTERRUPT_TMC3         14      /* Timer 3 match/capture */
  30 #define S3C3410X_INTERRUPT_TOF4         15      /* Timer 4 overflow */
  31 #define S3C3410X_INTERRUPT_TMC4         16      /* Timer 4 match/capture */
  32 #define S3C3410X_INTERRUPT_BT           17      /* Basic Timer */
  33 #define S3C3410X_INTERRUPT_SIO0         18      /* SIO 0 */
  34 #define S3C3410X_INTERRUPT_SIO1         19      /* SIO 1 */
  35 #define S3C3410X_INTERRUPT_IIC          20      /* IIC */
  36 #define S3C3410X_INTERRUPT_RTCA         21      /* RTC alarm */
  37 #define S3C3410X_INTERRUPT_RTCT         22      /* RTC time (SEC/MIN/HOUR) */
  38 #define S3C3410X_INTERRUPT_TF           23      /* Timer4 FIFO interrupt */
  39 #define S3C3410X_INTERRUPT_EINT2        24      /* External int. 2 */
  40 #define S3C3410X_INTERRUPT_EINT3        25      /* External int. 3 */
  41 #define S3C3410X_INTERRUPT_EINT4567     26      /* External int. 4/5/6/7 */
  42 #define S3C3410X_INTERRUPT_ADC          27      /* ADC interrupt */
  43 #define S3C3410X_INTERRUPT_EINT8        28      /* External int. 8 */
  44 #define S3C3410X_INTERRUPT_EINT9        29      /* External int. 9 */
  45 #define S3C3410X_INTERRUPT_EINT10       30      /* External int. 10 */
  46 #define S3C3410X_INTERRUPT_EINT11       31      /* External int. 11 */
  47
  48 #endif /* End of __irqs_h */