include/asm-arm/arch-lpc22xx/entry-macro.S

   1 /*
   2  *  include/arm/arch-lpc22xx/entry-macro.S
   3  *
   4  *  Copyright (C) 2004 Philips Semiconductors
   5  *
   6  *  defines machine dependent entry macros.
   7  *  included in the arch/armnommu/kernel/entry.S
   8  *
   9  */
  10 .EQU    VICIrqStatus,   0xFFFFF000
  11
  12 #if defined(CONFIG_ARCH_LPC22xx)
  13         .macro  disable_fiq
  14         .endm
  15
  16                 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
  17
  18                 ldr     \irqstat, =(VICIrqStatus)       @ load address of interrupt pending
  19                 ldr     \irqstat, [\irqstat]    @ get the register content
  20
  21                 mov     \irqnr, #0
  22 1001:
  23                 tst     \irqstat, #1
  24                 bne     1002f
  25                 add     \irqnr, \irqnr, #1
  26                 mov     \irqstat, \irqstat, lsr #1
  27                 cmp     \irqnr, #NR_IRQS
  28                 bcc     1001b
  29 1002:           /* EQ will be set if we reach 32 */
  30                 .endm
  31
  32                 .macro irq_prio_table
  33                 .endm
  34 #endif