Xilinx: ARM: added GPIO to DC2 and DC3 device tree.
[linux-2.6-xlnx.git] / arch / arm / boot / dts / zynq-zc770-xm012.dts
blob08e513fd7fab7b406c6c1fee1b690e209e56b922
1 /dts-v1/;
3 / {
4         model = "Xilinx Zynq ZC770 XM012 (DC3)";
5         compatible = "xlnx,zynq-zc770";
6         #address-cells = <0x1>;
7         #size-cells = <0x1>;
8         interrupt-parent = <0x1>;
10         memory {
11                 device_type = "memory";
12                 reg = <0x0 0x10000000>;
13         };
15         chosen {
16                 bootargs = "console=ttyPS0,115200 root=/dev/ram rw initrd=0x800000,8M earlyprintk";
17                 linux,stdout-path = "/amba@0/uart@E0001000";
18         };
20         amba@0 {
21                 compatible = "simple-bus";
22                 #address-cells = <0x1>;
23                 #size-cells = <0x1>;
24                 ranges;
26                 gic: intc@f8f01000 {
27                         interrupt-controller;
28                         compatible = "arm,cortex-a9-gic";
29                         #interrupt-cells = <3>;
30                         reg = < 0xf8f01000 0x1000 >,
31                                   < 0xf8f00100 0x0100 >;
32                 };
34                 pl310@f8f02000 {
35                                                 compatible = "arm,pl310-cache";
36                                                 cache-unified;
37                                                 cache-level = <2>;
38                                                 reg = <0xf8f02000 0x1000>;
39                                                 arm,data-latency = <3 2 2>;
40                                                 arm,tag-latency = <2 2 2>;
41                                                 interrupts = <0 34 4>;
42                                 };
44                 uart@e0001000 {
45                         compatible = "xlnx,ps7-uart-1.00.a";
46                         reg = <0xE0001000 0x1000>;
47                         interrupts = <0 50 0>;
48                         interrupt-parent = <&gic>;
49                         clock = <50000000>;
50                 };
52                 timer@0xf8001000 {
53                         compatible = "xlnx,ps7-ttc-1.00.a";
54                         reg = <0xf8001000 0x1000>;
55                         interrupts = <0 10 0>,<0 11 0>,<0 12 0>;
56                         interrupt-parent = <&gic>;
57                         clock-frequency-timer0 = <133000000>;
58                         clock-frequency-timer1 = <133000000>;
59                         clock-frequency-timer2 = <133000000>;
60                 };
62                 swdt@f8005000 {
63                         device_type = "watchdog";
64                         compatible = "xlnx,ps7-wdt-1.00.a";
65                         reg = <0xf8005000 0x100>;
66                         clock-frequency = <133000000>;
67                 };
69                 spi1: spi@e0007000 {
70                         compatible = "xlnx,ps7-spi-1.00.a";
71                         reg = <0xE0007000 0x1000>;
72                         interrupts = <0 49 0>;
73                         interrupt-parent = <&gic>;
74                         speed-hz = <166666700>;
75                         bus-num = <0>;
76                         num-chip-select = <4>;
77                 };
79                 i2c0: i2c@e0004000 {
80                         compatible = "xlnx,ps7-i2c-1.00.a";
81                         reg = <0xE0004000 0x1000>;
82                         interrupts = <0 25 0>;
83                         interrupt-parent = <&gic>;
84                         bus-id = <0>;
85                         input-clk = <133000000>;
86                         i2c-clk = <400000>;
88                         #address-cells = <1>;
89                         #size-cells = <0>;
90                         m24c02_eeprom@52 {
91                                 compatible = "at,24c02";
92                                 reg = <0x52>;
93                         };
94                 };
96                 nor: nor@e2000000 {
97                         compatible = "cfi-flash";
98                         bank-width = <1>;
99                         reg = <0xE2000000 0x2000000>; /* 32MB */
100                         #address-cells = <1>;
101                         #size-cells = <1>;
102                         partition@0 {
103                                 label = "nor-fsbl";
104                                 reg = <0x0 0x80000>; /* 512K */
105                         };
106                         partition@1 {
107                                 label = "nor-u-boot";
108                                 reg = <0x80000 0x80000>; /* 512K */
109                         };
110                         partition@2 {
111                                 label = "nor-linux";
112                                 reg = <0x100000 0x500000>; /* 5MB */
113                         };
114                         partition@3 {
115                                 label = "nor-device-tree";
116                                 reg = <0x600000 0x20000>; /* 128K */
117                         };
118                         partition@4 {
119                                 label = "nor-user";
120                                 reg = <0x620000 0x8E0000>; /* 8875K */
121                         };
122                         partition@5 {
123                                 label = "nor-scratch";
124                                 reg = <0xF00000 0x100000>; /* 1MB */
125                         };
126                         partition@6 {
127                                 label = "nor-rootfs";
128                                 reg = <0x1000000 0x1000000>; /* 16MB */
129                         };
130                 };
132                 gpio@e000a000 {
133                         compatible = "xlnx,ps7-gpio-1.00.a";
134                         reg = <0xe000a000 0x1000>;
135                         interrupts = <0 20 0>;
136                         interrupt-parent = <&gic>;
137                 };
138         };