serial: xilinx_uartps: fix bad register write in console_write
[linux-2.6-xlnx.git] / drivers / xilinx_common / xpacket_fifo_v2_00_a.h
blob5c6466685a8829ea90bda08e7703d774d39cc7d5
1 /* $Id: xpacket_fifo_v2_00_a.h,v 1.1 2006/12/13 14:23:19 imanuilov Exp $ */
2 /******************************************************************************
4 * XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS"
5 * AS A COURTESY TO YOU, SOLELY FOR USE IN DEVELOPING PROGRAMS AND
6 * SOLUTIONS FOR XILINX DEVICES. BY PROVIDING THIS DESIGN, CODE,
7 * OR INFORMATION AS ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE,
8 * APPLICATION OR STANDARD, XILINX IS MAKING NO REPRESENTATION
9 * THAT THIS IMPLEMENTATION IS FREE FROM ANY CLAIMS OF INFRINGEMENT,
10 * AND YOU ARE RESPONSIBLE FOR OBTAINING ANY RIGHTS YOU MAY REQUIRE
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12 * WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE
13 * IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR
14 * REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF
15 * INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
16 * FOR A PARTICULAR PURPOSE.
18 * (c) Copyright 2002-2004 Xilinx Inc.
19 * All rights reserved.
21 ******************************************************************************/
22 /*****************************************************************************/
23 /**
25 * @file xpacket_fifo_v2_00_a.h
27 * This component is a common component because it's primary purpose is to
28 * prevent code duplication in drivers. A driver which must handle a packet
29 * FIFO uses this component rather than directly manipulating a packet FIFO.
31 * A FIFO is a device which has dual port memory such that one user may be
32 * inserting data into the FIFO while another is consuming data from the FIFO.
33 * A packet FIFO is designed for use with packet protocols such as Ethernet and
34 * ATM. It is typically only used with devices when DMA and/or Scatter Gather
35 * is used. It differs from a nonpacket FIFO in that it does not provide any
36 * interrupts for thresholds of the FIFO such that it is less useful without
37 * DMA.
39 * @note
41 * This component has the capability to generate an interrupt when an error
42 * condition occurs. It is the user's responsibility to provide the interrupt
43 * processing to handle the interrupt. This component provides the ability to
44 * determine if that interrupt is active, a deadlock condition, and the ability
45 * to reset the FIFO to clear the condition. In this condition, the device which
46 * is using the FIFO should also be reset to prevent other problems. This error
47 * condition could occur as a normal part of operation if the size of the FIFO
48 * is not setup correctly. See the hardware IP specification for more details.
50 * <pre>
51 * MODIFICATION HISTORY:
53 * Ver Who Date Changes
54 * ----- ---- -------- -----------------------------------------------
55 * 2.00a ecm 12/30/02 First release
56 * 2.00a rpm 10/22/03 Created and made use of Level 0 driver
57 * 2.00a rmm 02/24/04 Added WriteDre function.
58 * 2.00a xd 10/27/04 Changed comments to support doxygen for API
59 * documentation.
60 * </pre>
62 *****************************************************************************/
63 #ifndef XPACKET_FIFO_V200A_H /* prevent circular inclusions */
64 #define XPACKET_FIFO_V200A_H /* by using protection macros */
66 #ifdef __cplusplus
67 extern "C" {
68 #endif
70 /***************************** Include Files *********************************/
72 #include "xbasic_types.h"
73 #include "xstatus.h"
74 #include "xpacket_fifo_l_v2_00_a.h"
76 /************************** Constant Definitions *****************************/
78 /* See the low-level header file for constant definitions */
80 /**************************** Type Definitions *******************************/
82 /**
83 * The XPacketFifo driver instance data. The driver is required to allocate a
84 * variable of this type for every packet FIFO in the device.
86 typedef struct {
87 u32 RegBaseAddress; /**< Base address of registers */
88 u32 IsReady; /**< Device is initialized and ready */
89 u32 DataBaseAddress;/**< Base address of data for FIFOs */
90 } XPacketFifoV200a;
92 /***************** Macros (Inline Functions) Definitions *********************/
94 /*****************************************************************************/
95 /**
97 * Reset the specified packet FIFO. Resetting a FIFO will cause any data
98 * contained in the FIFO to be lost.
100 * @param InstancePtr contains a pointer to the FIFO to operate on.
102 * @return None.
104 * @note C Signature: void XPF_V200A_RESET(XPacketFifoV200a *InstancePtr)
106 ******************************************************************************/
107 #define XPF_V200A_RESET(InstancePtr) \
108 XIo_Out32((InstancePtr)->RegBaseAddress + XPF_V200A_RESET_REG_OFFSET, XPF_V200A_RESET_FIFO_MASK);
111 /*****************************************************************************/
114 * Get the occupancy count for a read packet FIFO and the vacancy count for a
115 * write packet FIFO. These counts indicate the number of 32-bit words
116 * contained (occupancy) in the FIFO or the number of 32-bit words available
117 * to write (vacancy) in the FIFO.
119 * @param InstancePtr contains a pointer to the FIFO to operate on.
121 * @return The occupancy or vacancy count for the specified packet FIFO.
123 * @note
125 * C Signature: u32 XPF_V200A_GET_COUNT(XPacketFifoV200a *InstancePtr)
127 ******************************************************************************/
128 #define XPF_V200A_GET_COUNT(InstancePtr) \
129 (XIo_In32((InstancePtr)->RegBaseAddress + XPF_V200A_COUNT_STATUS_REG_OFFSET) & \
130 XPF_V200A_COUNT_MASK)
133 /*****************************************************************************/
136 * Determine if the specified packet FIFO is almost empty. Almost empty is
137 * defined for a read FIFO when there is only one data word in the FIFO.
139 * @param InstancePtr contains a pointer to the FIFO to operate on.
141 * @return
143 * TRUE if the packet FIFO is almost empty, FALSE otherwise.
145 * @note
147 * C Signature: u32 XPF_V200A_IS_ALMOST_EMPTY(XPacketFifoV200a *InstancePtr)
149 ******************************************************************************/
150 #define XPF_V200A_IS_ALMOST_EMPTY(InstancePtr) \
151 (XIo_In32((InstancePtr)->RegBaseAddress + XPF_V200A_COUNT_STATUS_REG_OFFSET) & \
152 XPF_V200A_ALMOST_EMPTY_FULL_MASK)
155 /*****************************************************************************/
158 * Determine if the specified packet FIFO is almost full. Almost full is
159 * defined for a write FIFO when there is only one available data word in the
160 * FIFO.
162 * @param InstancePtr contains a pointer to the FIFO to operate on.
164 * @return
166 * TRUE if the packet FIFO is almost full, FALSE otherwise.
168 * @note
170 * C Signature: u32 XPF_V200A_IS_ALMOST_FULL(XPacketFifoV200a *InstancePtr)
172 ******************************************************************************/
173 #define XPF_V200A_IS_ALMOST_FULL(InstancePtr) \
174 (XIo_In32((InstancePtr)->RegBaseAddress + XPF_V200A_COUNT_STATUS_REG_OFFSET) & \
175 XPF_V200A_ALMOST_EMPTY_FULL_MASK)
178 /*****************************************************************************/
181 * Determine if the specified packet FIFO is empty. This applies only to a
182 * read FIFO.
184 * @param InstancePtr contains a pointer to the FIFO to operate on.
186 * @return
188 * TRUE if the packet FIFO is empty, FALSE otherwise.
190 * @note
192 * C Signature: u32 XPF_V200A_IS_EMPTY(XPacketFifoV200a *InstancePtr)
194 ******************************************************************************/
195 #define XPF_V200A_IS_EMPTY(InstancePtr) \
196 (XIo_In32((InstancePtr)->RegBaseAddress + XPF_V200A_COUNT_STATUS_REG_OFFSET) & \
197 XPF_V200A_EMPTY_FULL_MASK)
200 /*****************************************************************************/
203 * Determine if the specified packet FIFO is full. This applies only to a
204 * write FIFO.
206 * @param InstancePtr contains a pointer to the FIFO to operate on.
208 * @return
210 * TRUE if the packet FIFO is full, FALSE otherwise.
212 * @note
214 * C Signature: u32 XPF_V200A_IS_FULL(XPacketFifoV200a *InstancePtr)
216 ******************************************************************************/
217 #define XPF_V200A_IS_FULL(InstancePtr) \
218 (XIo_In32((InstancePtr)->RegBaseAddress + XPF_V200A_COUNT_STATUS_REG_OFFSET) & \
219 XPF_V200A_EMPTY_FULL_MASK)
222 /*****************************************************************************/
225 * Determine if the specified packet FIFO is deadlocked. This condition occurs
226 * when the FIFO is full and empty at the same time and is caused by a packet
227 * being written to the FIFO which exceeds the total data capacity of the FIFO.
228 * It occurs because of the mark/restore features of the packet FIFO which allow
229 * retransmission of a packet. The software should reset the FIFO and any devices
230 * using the FIFO when this condition occurs.
232 * @param InstancePtr contains a pointer to the FIFO to operate on.
234 * @return
236 * TRUE if the packet FIFO is deadlocked, FALSE otherwise.
238 * @note
240 * This component has the capability to generate an interrupt when an error
241 * condition occurs. It is the user's responsibility to provide the interrupt
242 * processing to handle the interrupt. This function provides the ability to
243 * determine if a deadlock condition, and the ability to reset the FIFO to
244 * clear the condition.
245 * <br><br>
246 * In this condition, the device which is using the FIFO should also be reset
247 * to prevent other problems. This error condition could occur as a normal part
248 * of operation if the size of the FIFO is not setup correctly.
249 * <br><br>
250 * C Signature: u32 XPF_V200A_IS_DEADLOCKED(XPacketFifoV200a *InstancePtr)
252 ******************************************************************************/
253 #define XPF_V200A_IS_DEADLOCKED(InstancePtr) \
254 (XIo_In32((InstancePtr)->RegBaseAddress + XPF_V200A_COUNT_STATUS_REG_OFFSET) & \
255 XPF_V200A_DEADLOCK_MASK)
258 /************************** Function Prototypes ******************************/
261 * Standard functions
263 int XPacketFifoV200a_Initialize(XPacketFifoV200a * InstancePtr,
264 u32 RegBaseAddress, u32 DataBaseAddress);
265 int XPacketFifoV200a_SelfTest(XPacketFifoV200a * InstancePtr, u32 FifoType);
268 * Data functions
270 int XPacketFifoV200a_Read(XPacketFifoV200a * InstancePtr,
271 u8 *ReadBufferPtr, u32 ByteCount);
272 int XPacketFifoV200a_Write(XPacketFifoV200a * InstancePtr,
273 u8 *WriteBufferPtr, u32 ByteCount);
274 int XPacketFifoV200a_WriteDre(XPacketFifoV200a * InstancePtr,
275 u8 *WriteBufferPtr, u32 ByteCount);
277 #ifdef __cplusplus
279 #endif
281 #endif /* end of protection macro */