drivers/xilinx_common/xdmav3_simple.c

   1 /* $Id: */
   2 /******************************************************************************
   3 *
   4 *       XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS"
   5 *       AS A COURTESY TO YOU, SOLELY FOR USE IN DEVELOPING PROGRAMS AND
   6 *       SOLUTIONS FOR XILINX DEVICES.  BY PROVIDING THIS DESIGN, CODE,
   7 *       OR INFORMATION AS ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE,
   8 *       APPLICATION OR STANDARD, XILINX IS MAKING NO REPRESENTATION
   9 *       THAT THIS IMPLEMENTATION IS FREE FROM ANY CLAIMS OF INFRINGEMENT,
  10 *       AND YOU ARE RESPONSIBLE FOR OBTAINING ANY RIGHTS YOU MAY REQUIRE
  11 *       FOR YOUR IMPLEMENTATION.  XILINX EXPRESSLY DISCLAIMS ANY
  12 *       WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE
  13 *       IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR
  14 *       REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF
  15 *       INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  16 *       FOR A PARTICULAR PURPOSE.
  17 *
  18 *       (c) Copyright 2006 Xilinx Inc.
  19 *       All rights reserved.
  20 * This program is free software; you can redistribute it and/or modify it
  21 * under the terms of the GNU General Public License as published by the
  22 * Free Software Foundation; either version 2 of the License, or (at your
  23 * option) any later version.
  24 *
  25 * You should have received a copy of the GNU General Public License
  26 * along with this program; if not, write to the Free Software
  27 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
  28 *
  29 ******************************************************************************/
  30 /*****************************************************************************/
  31 /**
  32 *
  33 * @file xdmav3_simple.c
  34 *
  35 * This file implements Simple DMA related functions. For more
  36 * information on this driver, see xdmav3.h.
  37 *
  38 * <pre>
  39 * MODIFICATION HISTORY:
  40 *
  41 * Ver   Who  Date     Changes
  42 * ----- ---- -------- -------------------------------------------------------
  43 * 3.00a rmm  03/11/06 First release
  44 * </pre>
  45 ******************************************************************************/
  46
  47 /***************************** Include Files *********************************/
  48
  49 #include "xdmav3.h"
  50
  51 /************************** Constant Definitions *****************************/
  52
  53
  54 /**************************** Type Definitions *******************************/
  55
  56
  57 /***************** Macros (Inline Functions) Definitions *********************/
  58
  59
  60 /************************** Function Prototypes ******************************/
  61
  62
  63 /************************** Variable Definitions *****************************/
  64
  65
  66 /*****************************************************************************/
  67 /**
  68 * Initiate a simple DMA transfer. The BD argument sets the parameters of the
  69 * transfer. Since the BD is also used for SG DMA transfers, some fields of the
  70 * BD will be ignored. The following BD macros will have no effect on the
  71 * transfer:
  72 *
  73 * - XDmaBdV3_mSetLast()
  74 * - XDmaBdV3_mClearLast()
  75 * - XDmaBdV3_mSetBdPage()
  76 *
  77 * To determine when the transfer has completed, the user can poll the device
  78 * with XDmaV3_mGetStatus() and test the XDMAV3_DMASR_DMABSY_MASK bit, or wait for
  79 * an interrupt. When the DMA operation has completed, the outcome of the
  80 * transfer can be retrieved by calling XDmaV3_mGetStatus() and testing for DMA
  81 * bus errors bits.
  82 *
  83 * @param InstancePtr is a pointer to the instance to be worked on.
  84 * @param BdPtr sets the parameters of the transfer.
  85 *
  86 * @return
  87 * - XST_SUCCESS if the transfer was initated
  88 * - XST_DEVICE_BUSY if a transfer is already in progress
  89 *
  90 ******************************************************************************/
  91 int XDmaV3_SimpleTransfer(XDmaV3 * InstancePtr, XDmaBdV3 * BdPtr)
  92 {
  93         u32 Dmasr;
  94
  95         /* Is the channel busy */
  96         Dmasr = XDmaV3_mReadReg(InstancePtr->RegBase, XDMAV3_DMASR_OFFSET);
  97         if (Dmasr & (XDMAV3_DMASR_DMABSY_MASK | XDMAV3_DMASR_SGBSY_MASK)) {
  98                 return (XST_DEVICE_BUSY);
  99         }
 100
 101         /* Copy BdPtr fields into the appropriate HW registers */
 102
 103         /* DMACR: SGS bit is set always. This is done in case the transfer
 104          * occurs on a SGDMA channel and will prevent the HW from fetching the
 105          * next BD.
 106          */
 107         XDmaV3_mWriteReg(InstancePtr->RegBase, XDMAV3_DMACR_OFFSET,
 108                          XDmaV3_mReadBd(BdPtr, XDMAV3_BD_DMACR_OFFSET)
 109                          | XDMAV3_DMACR_SGS_MASK);
 110
 111         /* MSBA */
 112         XDmaV3_mWriteReg(InstancePtr->RegBase, XDMAV3_MSBA_OFFSET,
 113                          XDmaV3_mReadBd(BdPtr, XDMAV3_BD_MSBA_OFFSET));
 114
 115         /* LSBA */
 116         XDmaV3_mWriteReg(InstancePtr->RegBase, XDMAV3_LSBA_OFFSET,
 117                          XDmaV3_mReadBd(BdPtr, XDMAV3_BD_LSBA_OFFSET));
 118
 119         /* LENGTH: Writing this register starts HW */
 120         XDmaV3_mWriteReg(InstancePtr->RegBase, XDMAV3_LENGTH_OFFSET,
 121                          XDmaV3_mReadBd(BdPtr, XDMAV3_BD_LENGTH_OFFSET));
 122
 123         return (XST_SUCCESS);
 124 }