drivers/dma/dmatest.c.vdma

   1 /*
   2  * DMA Engine test module
   3  *
   4  * Copyright (C) 2007 Atmel Corporation
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  */
  10 #include <linux/delay.h>
  11 #include <linux/dmaengine.h>
  12 #include <linux/init.h>
  13 #include <linux/kthread.h>
  14 #include <linux/module.h>
  15 #include <linux/moduleparam.h>
  16 #include <linux/random.h>
  17 #include <linux/slab.h>
  18 #include <linux/wait.h>
  19 #include <linux/amba/xilinx_dma.h>
  20
  21 static unsigned int test_buf_size = 64;
  22 module_param(test_buf_size, uint, S_IRUGO);
  23 MODULE_PARM_DESC(test_buf_size, "Size of the memcpy test buffer");
  24
  25 static char test_channel[20];
  26 module_param_string(channel, test_channel, sizeof(test_channel), S_IRUGO);
  27 MODULE_PARM_DESC(channel, "Bus ID of the channel to test (default: any)");
  28
  29 static char test_device[20];
  30 module_param_string(device, test_device, sizeof(test_device), S_IRUGO);
  31 MODULE_PARM_DESC(device, "Bus ID of the DMA Engine to test (default: any)");
  32
  33 static unsigned int threads_per_chan = 1;
  34 module_param(threads_per_chan, uint, S_IRUGO);
  35 MODULE_PARM_DESC(threads_per_chan,
  36                 "Number of threads to start per channel (default: 1)");
  37
  38 static unsigned int max_channels;
  39 module_param(max_channels, uint, S_IRUGO);
  40 MODULE_PARM_DESC(max_channels,
  41                 "Maximum number of channels to use (default: all)");
  42
  43 static unsigned int iterations;
  44 module_param(iterations, uint, S_IRUGO);
  45 MODULE_PARM_DESC(iterations,
  46                 "Iterations before stopping test (default: infinite)");
  47
  48 static unsigned int xor_sources = 3;
  49 module_param(xor_sources, uint, S_IRUGO);
  50 MODULE_PARM_DESC(xor_sources,
  51                 "Number of xor source buffers (default: 3)");
  52
  53 static unsigned int pq_sources = 3;
  54 module_param(pq_sources, uint, S_IRUGO);
  55 MODULE_PARM_DESC(pq_sources,
  56                 "Number of p+q source buffers (default: 3)");
  57
  58 /*
  59  * Initialization patterns. All bytes in the source buffer has bit 7
  60  * set, all bytes in the destination buffer has bit 7 cleared.
  61  *
  62  * Bit 6 is set for all bytes which are to be copied by the DMA
  63  * engine. Bit 5 is set for all bytes which are to be overwritten by
  64  * the DMA engine.
  65  *
  66  * The remaining bits are the inverse of a counter which increments by
  67  * one for each byte address.
  68  */
  69 #define PATTERN_SRC             0x80
  70 #define PATTERN_DST             0x00
  71 #define PATTERN_COPY            0x40
  72 #define PATTERN_OVERWRITE       0x20
  73 #define PATTERN_COUNT_MASK      0x1f
  74
  75 struct dmatest_thread {
  76         struct list_head        node;
  77         struct task_struct      *task;
  78         struct dma_chan         *chan;
  79         u8                      **srcs;
  80         u8                      **dsts;
  81         enum dma_transaction_type type;
  82 };
  83
  84 struct dmatest_slave_thread {
  85         struct list_head        node;
  86         struct task_struct      *task;
  87         struct dma_chan         *tx_chan;
  88         struct dma_chan         *rx_chan;
  89         u8                      **srcs;
  90         u8                      **dsts;
  91         enum dma_transaction_type type;
  92 };
  93
  94 struct dmatest_chan {
  95         struct list_head        node;
  96         struct dma_chan         *chan;
  97         struct list_head        threads;
  98 };
  99
 100 /*
 101  * These are protected by dma_list_mutex since they're only used by
 102  * the DMA filter function callback
 103  */
 104 static LIST_HEAD(dmatest_channels);
 105 static unsigned int nr_channels;
 106
 107 static bool dmatest_match_channel(struct dma_chan *chan)
 108 {
 109         if (test_channel[0] == '\0')
 110                 return true;
 111         return strcmp(dma_chan_name(chan), test_channel) == 0;
 112 }
 113
 114 static bool dmatest_match_device(struct dma_device *device)
 115 {
 116         if (test_device[0] == '\0')
 117                 return true;
 118         return strcmp(dev_name(device->dev), test_device) == 0;
 119 }
 120
 121 static unsigned long dmatest_random(void)
 122 {
 123         unsigned long buf;
 124
 125         get_random_bytes(&buf, sizeof(buf));
 126         return buf;
 127 }
 128
 129 static void dmatest_init_srcs(u8 **bufs, unsigned int start, unsigned int len)
 130 {
 131         unsigned int i;
 132         u8 *buf;
 133
 134         for (; (buf = *bufs); bufs++) {
 135                 for (i = 0; i < start; i++)
 136                         buf[i] = PATTERN_SRC | (~i & PATTERN_COUNT_MASK);
 137                 for ( ; i < start + len; i++)
 138                         buf[i] = PATTERN_SRC | PATTERN_COPY
 139                                 | (~i & PATTERN_COUNT_MASK);
 140                 for ( ; i < test_buf_size; i++)
 141                         buf[i] = PATTERN_SRC | (~i & PATTERN_COUNT_MASK);
 142                 buf++;
 143         }
 144 }
 145
 146 static void dmatest_init_dsts(u8 **bufs, unsigned int start, unsigned int len)
 147 {
 148         unsigned int i;
 149         u8 *buf;
 150
 151         for (; (buf = *bufs); bufs++) {
 152                 for (i = 0; i < start; i++)
 153                         buf[i] = PATTERN_DST | (~i & PATTERN_COUNT_MASK);
 154                 for ( ; i < start + len; i++)
 155                         buf[i] = PATTERN_DST | PATTERN_OVERWRITE
 156                                 | (~i & PATTERN_COUNT_MASK);
 157                 for ( ; i < test_buf_size; i++)
 158                         buf[i] = PATTERN_DST | (~i & PATTERN_COUNT_MASK);
 159         }
 160 }
 161
 162 static void dmatest_mismatch(u8 actual, u8 pattern, unsigned int index,
 163                 unsigned int counter, bool is_srcbuf)
 164 {
 165         u8              diff = actual ^ pattern;
 166         u8              expected = pattern | (~counter & PATTERN_COUNT_MASK);
 167         const char      *thread_name = current->comm;
 168
 169         if (is_srcbuf)
 170                 pr_warning("%s: srcbuf[0x%x] overwritten!"
 171                                 " Expected %02x, got %02x\n",
 172                                 thread_name, index, expected, actual);
 173         else if ((pattern & PATTERN_COPY)
 174                         && (diff & (PATTERN_COPY | PATTERN_OVERWRITE)))
 175                 pr_warning("%s: dstbuf[0x%x] not copied!"
 176                                 " Expected %02x, got %02x\n",
 177                                 thread_name, index, expected, actual);
 178         else if (diff & PATTERN_SRC)
 179                 pr_warning("%s: dstbuf[0x%x] was copied!"
 180                                 " Expected %02x, got %02x\n",
 181                                 thread_name, index, expected, actual);
 182         else
 183                 pr_warning("%s: dstbuf[0x%x] mismatch!"
 184                                 " Expected %02x, got %02x\n",
 185                                 thread_name, index, expected, actual);
 186 }
 187
 188 static unsigned int dmatest_verify(u8 **bufs, unsigned int start,
 189                 unsigned int end, unsigned int counter, u8 pattern,
 190                 bool is_srcbuf)
 191 {
 192         unsigned int i;
 193         unsigned int error_count = 0;
 194         u8 actual;
 195         u8 expected;
 196         u8 *buf;
 197         unsigned int counter_orig = counter;
 198
 199         for (; (buf = *bufs); bufs++) {
 200                 counter = counter_orig;
 201                 for (i = start; i < end; i++) {
 202                         actual = buf[i];
 203                         expected = pattern | (~counter & PATTERN_COUNT_MASK);
 204                         if (actual != expected) {
 205                                 if (error_count < 32)
 206                                         dmatest_mismatch(actual, pattern, i,
 207                                                          counter, is_srcbuf);
 208                                 error_count++;
 209                         }
 210                         counter++;
 211                 }
 212         }
 213
 214         if (error_count > 32)
 215                 pr_warning("%s: %u errors suppressed\n",
 216                         current->comm, error_count - 32);
 217
 218         return error_count;
 219 }
 220
 221 static void dmatest_callback(void *completion)
 222 {
 223         complete(completion);
 224 }
 225
 226 static void dmatest_slave_tx_callback(void *completion)
 227 {
 228         pr_debug("Got tx callbakc\n");
 229         complete(completion);
 230 }
 231
 232 static void dmatest_slave_rx_callback(void *completion)
 233 {
 234         pr_debug("Got rx callbakc\n");
 235         complete(completion);
 236 }
 237
 238 /*
 239  * This function repeatedly tests DMA transfers of various lengths and
 240  * offsets for a given operation type until it is told to exit by
 241  * kthread_stop(). There may be multiple threads running this function
 242  * in parallel for a single channel, and there may be multiple channels
 243  * being tested in parallel.
 244  *
 245  * Before each test, the source and destination buffer is initialized
 246  * with a known pattern. This pattern is different depending on
 247  * whether it's in an area which is supposed to be copied or
 248  * overwritten, and different in the source and destination buffers.
 249  * So if the DMA engine doesn't copy exactly what we tell it to copy,
 250  * we'll notice.
 251  */
 252 static int dmatest_func(void *data)
 253 {
 254         struct dmatest_thread   *thread = data;
 255         struct dma_chan         *chan;
 256         const char              *thread_name;
 257         unsigned int            src_off, dst_off, len;
 258         unsigned int            error_count;
 259         unsigned int            failed_tests = 0;
 260         unsigned int            total_tests = 0;
 261         dma_cookie_t            cookie;
 262         enum dma_status         status;
 263         enum dma_ctrl_flags     flags;
 264         u8                      pq_coefs[pq_sources + 1];
 265         int                     ret;
 266         int                     src_cnt;
 267         int                     dst_cnt;
 268         int                     i;
 269
 270         thread_name = current->comm;
 271
 272         ret = -ENOMEM;
 273
 274         /* JZ: limit testing scope here */
 275         iterations = 5;
 276
 277         smp_rmb();
 278         chan = thread->chan;
 279         if (thread->type == DMA_MEMCPY)
 280                 src_cnt = dst_cnt = 1;
 281         else if (thread->type == DMA_XOR) {
 282                 src_cnt = xor_sources | 1; /* force odd to ensure dst = src */
 283                 dst_cnt = 1;
 284         } else if (thread->type == DMA_PQ) {
 285                 src_cnt = pq_sources | 1; /* force odd to ensure dst = src */
 286                 dst_cnt = 2;
 287                 for (i = 0; i < src_cnt; i++)
 288                         pq_coefs[i] = 1;
 289         } else
 290                 goto err_srcs;
 291
 292         thread->srcs = kcalloc(src_cnt+1, sizeof(u8 *), GFP_KERNEL);
 293         if (!thread->srcs)
 294                 goto err_srcs;
 295         for (i = 0; i < src_cnt; i++) {
 296                 thread->srcs[i] = kmalloc(test_buf_size, GFP_KERNEL);
 297                 if (!thread->srcs[i])
 298                         goto err_srcbuf;
 299         }
 300         thread->srcs[i] = NULL;
 301
 302         thread->dsts = kcalloc(dst_cnt+1, sizeof(u8 *), GFP_KERNEL);
 303         if (!thread->dsts)
 304                 goto err_dsts;
 305         for (i = 0; i < dst_cnt; i++) {
 306                 thread->dsts[i] = kmalloc(test_buf_size, GFP_KERNEL);
 307                 if (!thread->dsts[i])
 308                         goto err_dstbuf;
 309         }
 310         thread->dsts[i] = NULL;
 311
 312         set_user_nice(current, 10);
 313
 314         flags = DMA_CTRL_ACK | DMA_COMPL_SKIP_DEST_UNMAP | DMA_PREP_INTERRUPT;
 315
 316         while (!kthread_should_stop()
 317                && !(iterations && total_tests >= iterations)) {
 318                 struct dma_device *dev = chan->device;
 319                 struct dma_async_tx_descriptor *tx = NULL;
 320                 dma_addr_t dma_srcs[src_cnt];
 321                 dma_addr_t dma_dsts[dst_cnt];
 322                 struct completion cmp;
 323                 unsigned long tmo = msecs_to_jiffies(3000);
 324                 u8 align = 0;
 325
 326                 total_tests++;
 327
 328                 /* honor alignment restrictions */
 329                 if (thread->type == DMA_MEMCPY)
 330                         align = dev->copy_align;
 331                 else if (thread->type == DMA_XOR)
 332                         align = dev->xor_align;
 333                 else if (thread->type == DMA_PQ)
 334                         align = dev->pq_align;
 335
 336                 if (1 << align > test_buf_size) {
 337                         pr_err("%u-byte buffer too small for %d-byte alignment\n",
 338                                test_buf_size, 1 << align);
 339                         break;
 340                 }
 341
 342                 len = dmatest_random() % test_buf_size + 1;
 343                 len = (len >> align) << align;
 344                 if (!len)
 345                         len = 1 << align;
 346                 src_off = dmatest_random() % (test_buf_size - len + 1);
 347                 dst_off = dmatest_random() % (test_buf_size - len + 1);
 348
 349                 src_off = (src_off >> align) << align;
 350                 dst_off = (dst_off >> align) << align;
 351
 352                 dmatest_init_srcs(thread->srcs, src_off, len);
 353                 dmatest_init_dsts(thread->dsts, dst_off, len);
 354
 355                 for (i = 0; i < src_cnt; i++) {
 356                         u8 *buf = thread->srcs[i] + src_off;
 357
 358                         dma_srcs[i] = dma_map_single(dev->dev, buf, len,
 359                                                      DMA_TO_DEVICE);
 360                 }
 361                 /* map with DMA_BIDIRECTIONAL to force writeback/invalidate */
 362                 for (i = 0; i < dst_cnt; i++) {
 363
 364                         dma_dsts[i] = dma_map_single(dev->dev, thread->dsts[i],
 365                                                      test_buf_size,
 366                                                      DMA_BIDIRECTIONAL);
 367                 }
 368
 369
 370                 if (thread->type == DMA_MEMCPY) {
 371 #if 0
 372                         printk(KERN_INFO "To call prep_dma_memcpy %x/%x/%x/%x/%x\n",chan,
 373                                                          dma_dsts[0] + dst_off,
 374                                                          dma_srcs[0], len,
 375                                                          flags);
 376 #endif
 377                         tx = dev->device_prep_dma_memcpy(chan,
 378                                                          dma_dsts[0] + dst_off,
 379                                                          dma_srcs[0], len,
 380                                                          flags);
 381
 382                 }
 383                 else if (thread->type == DMA_XOR)
 384                         tx = dev->device_prep_dma_xor(chan,
 385                                                       dma_dsts[0] + dst_off,
 386                                                       dma_srcs, src_cnt,
 387                                                       len, flags);
 388                 else if (thread->type == DMA_PQ) {
 389                         dma_addr_t dma_pq[dst_cnt];
 390
 391                         for (i = 0; i < dst_cnt; i++)
 392                                 dma_pq[i] = dma_dsts[i] + dst_off;
 393                         tx = dev->device_prep_dma_pq(chan, dma_pq, dma_srcs,
 394                                                      src_cnt, pq_coefs,
 395                                                      len, flags);
 396                 }
 397
 398                 if (!tx) {
 399                         for (i = 0; i < src_cnt; i++)
 400                                 dma_unmap_single(dev->dev, dma_srcs[i], len,
 401                                                  DMA_TO_DEVICE);
 402                         for (i = 0; i < dst_cnt; i++)
 403                                 dma_unmap_single(dev->dev, dma_dsts[i],
 404                                                  test_buf_size,
 405                                                  DMA_BIDIRECTIONAL);
 406                         pr_warning("%s: #%u: prep error with src_off=0x%x "
 407                                         "dst_off=0x%x len=0x%x\n",
 408                                         thread_name, total_tests - 1,
 409                                         src_off, dst_off, len);
 410                         msleep(100);
 411                         failed_tests++;
 412                         continue;
 413                 }
 414
 415                 init_completion(&cmp);
 416                 tx->callback = dmatest_callback;
 417                 tx->callback_param = &cmp;
 418                 cookie = tx->tx_submit(tx);
 419
 420                 //printk(KERN_INFO "cookie from submit %d\n", cookie);
 421
 422                 if (dma_submit_error(cookie)) {
 423                         pr_warning("%s: #%u: submit error %d with src_off=0x%x "
 424                                         "dst_off=0x%x len=0x%x\n",
 425                                         thread_name, total_tests - 1, cookie,
 426                                         src_off, dst_off, len);
 427                         msleep(100);
 428                         failed_tests++;
 429                         continue;
 430                 }
 431                 dma_async_issue_pending(chan);
 432
 433                 tmo = wait_for_completion_timeout(&cmp, tmo);
 434                 status = dma_async_is_tx_complete(chan, cookie, NULL, NULL);
 435
 436                 if (tmo == 0) {
 437                         pr_warning("%s: #%u: test timed out\n",
 438                                    thread_name, total_tests - 1);
 439                         failed_tests++;
 440                         continue;
 441                 } else if (status != DMA_SUCCESS) {
 442                         pr_warning("%s: #%u: got completion callback,"
 443                                    " but status is \'%s\'\n",
 444                                    thread_name, total_tests - 1,
 445                                    status == DMA_ERROR ? "error" : "in progress");
 446                         failed_tests++;
 447                         continue;
 448                 }
 449
 450                 /* Unmap by myself (see DMA_COMPL_SKIP_DEST_UNMAP above) */
 451                 for (i = 0; i < dst_cnt; i++)
 452                         dma_unmap_single(dev->dev, dma_dsts[i], test_buf_size,
 453                                          DMA_BIDIRECTIONAL);
 454
 455                 error_count = 0;
 456
 457                 pr_debug("%s: verifying source buffer...\n", thread_name);
 458                 error_count += dmatest_verify(thread->srcs, 0, src_off,
 459                                 0, PATTERN_SRC, true);
 460                 error_count += dmatest_verify(thread->srcs, src_off,
 461                                 src_off + len, src_off,
 462                                 PATTERN_SRC | PATTERN_COPY, true);
 463                 error_count += dmatest_verify(thread->srcs, src_off + len,
 464                                 test_buf_size, src_off + len,
 465                                 PATTERN_SRC, true);
 466
 467                 pr_debug("%s: verifying dest buffer...\n",
 468                                 thread->task->comm);
 469                 error_count += dmatest_verify(thread->dsts, 0, dst_off,
 470                                 0, PATTERN_DST, false);
 471                 error_count += dmatest_verify(thread->dsts, dst_off,
 472                                 dst_off + len, src_off,
 473                                 PATTERN_SRC | PATTERN_COPY, false);
 474                 error_count += dmatest_verify(thread->dsts, dst_off + len,
 475                                 test_buf_size, dst_off + len,
 476                                 PATTERN_DST, false);
 477
 478                 if (error_count) {
 479                         pr_warning("%s: #%u: %u errors with "
 480                                 "src_off=0x%x dst_off=0x%x len=0x%x\n",
 481                                 thread_name, total_tests - 1, error_count,
 482                                 src_off, dst_off, len);
 483                         failed_tests++;
 484                 } else {
 485                         pr_debug("%s: #%u: No errors with "
 486                                 "src_off=0x%x dst_off=0x%x len=0x%x\n",
 487                                 thread_name, total_tests - 1,
 488                                 src_off, dst_off, len);
 489                 }
 490         }
 491
 492         ret = 0;
 493         for (i = 0; thread->dsts[i]; i++)
 494                 kfree(thread->dsts[i]);
 495 err_dstbuf:
 496         kfree(thread->dsts);
 497 err_dsts:
 498         for (i = 0; thread->srcs[i]; i++)
 499                 kfree(thread->srcs[i]);
 500 err_srcbuf:
 501         kfree(thread->srcs);
 502 err_srcs:
 503         pr_notice("%s: terminating after %u tests, %u failures (status %d)\n",
 504                         thread_name, total_tests, failed_tests, ret);
 505
 506         if (iterations > 0)
 507                 while (!kthread_should_stop()) {
 508                         DECLARE_WAIT_QUEUE_HEAD_ONSTACK(wait_dmatest_exit);
 509                         interruptible_sleep_on(&wait_dmatest_exit);
 510                 }
 511
 512         return ret;
 513 }
 514
 515 /* Function for slave transfers
 516  * Each thread requires 2 channels, one for transmit, and one for receive
 517  */
 518 static int dmatest_slave_func(void *data)
 519 {
 520         struct dmatest_slave_thread     *thread = data;
 521         struct dma_chan         *tx_chan;
 522         struct dma_chan         *rx_chan;
 523         const char              *thread_name;
 524         unsigned int            len;
 525         unsigned int            error_count;
 526         unsigned int            failed_tests = 0;
 527         unsigned int            total_tests = 0;
 528         dma_cookie_t            tx_cookie;
 529         dma_cookie_t            rx_cookie;
 530         enum dma_status         status;
 531         enum dma_ctrl_flags     flags;
 532         int                     ret;
 533         int frm_cnt = 3;
 534         int                     i;
 535         int hsize = 64;
 536         int vsize = 32;
 537         //int hsize = 1920;
 538         //int vsize = 1080;
 539         //struct {int direction; int vsize; int hsize;int stride;int num_frms;int frm_dly; int park;int gen_lock;int master;int frm_cnt_en; int park_frm; int coalesc;int delay;} config;
 540         struct xilinx_dma_config config;
 541         thread_name = current->comm;
 542
 543         ret = -ENOMEM;
 544
 545         /* JZ: limit testing scope here */
 546         iterations = 1;
 547         test_buf_size = hsize * vsize;
 548
 549         smp_rmb();
 550         tx_chan = thread->tx_chan;
 551         rx_chan = thread->rx_chan;
 552
 553         thread->srcs = kcalloc(frm_cnt+1, sizeof(u8 *), GFP_KERNEL);
 554         if (!thread->srcs)
 555                 goto err_srcs;
 556         for (i = 0; i < frm_cnt; i++) {
 557                 thread->srcs[i] = kmalloc(test_buf_size, GFP_KERNEL);
 558                 if (!thread->srcs[i])
 559                         goto err_srcbuf;
 560         }
 561         thread->srcs[i] = NULL;
 562
 563         thread->dsts = kcalloc(frm_cnt+1, sizeof(u8 *), GFP_KERNEL);
 564         if (!thread->dsts)
 565                 goto err_dsts;
 566         for (i = 0; i < frm_cnt; i++) {
 567                 thread->dsts[i] = kmalloc(test_buf_size, GFP_KERNEL);
 568                 if (!thread->dsts[i])
 569                         goto err_dstbuf;
 570         }
 571         thread->dsts[i] = NULL;
 572
 573         set_user_nice(current, 10);
 574
 575         flags = DMA_CTRL_ACK | DMA_COMPL_SKIP_DEST_UNMAP | DMA_PREP_INTERRUPT;
 576
 577         while (!kthread_should_stop()
 578                && !(iterations && total_tests >= iterations)) {
 579                 struct dma_device *tx_dev = tx_chan->device;
 580                 struct dma_device *rx_dev = rx_chan->device;
 581                 struct dma_async_tx_descriptor *txd = NULL;
 582                 struct dma_async_tx_descriptor *rxd = NULL;
 583                 dma_addr_t dma_srcs[frm_cnt];
 584                 dma_addr_t dma_dsts[frm_cnt];
 585                 struct completion rx_cmp;
 586                 struct completion tx_cmp;
 587                 unsigned long rx_tmo = msecs_to_jiffies(30000); /* RX takes longer */
 588                 unsigned long tx_tmo = msecs_to_jiffies(30000);
 589                 u8 align = 0;
 590                 struct scatterlist tx_sg[frm_cnt];
 591                 struct scatterlist rx_sg[frm_cnt];
 592
 593                 total_tests++;
 594
 595                 /* honor larger alignment restrictions */
 596                 align = tx_dev->copy_align;
 597                 if (rx_dev->copy_align > align) {
 598                         align = rx_dev->copy_align;
 599                 }
 600
 601                 if (1 << align > test_buf_size) {
 602                         pr_err("%u-byte buffer too small for %d-byte alignment\n",
 603                                test_buf_size, 1 << align);
 604                         break;
 605                 }
 606
 607                 len = test_buf_size;
 608                 dmatest_init_srcs(thread->srcs, 0, len);
 609                 dmatest_init_dsts(thread->dsts, 0, len);
 610
 611                 sg_init_table(tx_sg, frm_cnt);
 612                 sg_init_table(rx_sg, frm_cnt);
 613
 614                 for (i = 0; i < frm_cnt; i++) {
 615                         u8 *buf = thread->srcs[i];
 616
 617                         dma_srcs[i] = dma_map_single(tx_dev->dev, buf, len,
 618                                                      DMA_TO_DEVICE);
 619                         pr_debug("src buf %x dma %x\n", (unsigned int)buf, dma_srcs[i]);
 620                         sg_dma_address(&tx_sg[i]) = dma_srcs[i];
 621                         sg_dma_len(&tx_sg[i]) = len;
 622                 }
 623
 624                 for (i = 0; i < frm_cnt; i++) {
 625
 626                         dma_dsts[i] = dma_map_single(rx_dev->dev, thread->dsts[i],
 627                                                      test_buf_size,
 628                                                      DMA_FROM_DEVICE);
 629                         pr_debug("dst %x dma %x\n", thread->dsts[i], dma_dsts[i]);
 630                         sg_dma_address(&rx_sg[i]) = dma_dsts[i];
 631                         sg_dma_len(&rx_sg[i]) = len;
 632                 }
 633
 634                 /* Set up hardware configuration information */
 635                 config.direction = DMA_TO_DEVICE;
 636                 config.vsize = vsize;
 637                 config.hsize = hsize;
 638                 config.stride = hsize;
 639                 config.frm_cnt_en = 1;
 640                 config.coalesc = frm_cnt * 10;
 641                 config.delay = 0;
 642                 /* The following is do-not-care, need to set to 0 */
 643                 config.frm_dly = 0;
 644                 config.park = 1;
 645                 config.gen_lock = 0;
 646                 config.master = 0;
 647                 config.park_frm = 0;
 648                 config.disable_intr = 0;
 649                 tx_dev->device_control(tx_chan, DMA_SLAVE_CONFIG, (unsigned long)&config);
 650
 651                 config.direction = DMA_FROM_DEVICE;
 652                 config.park = 0;
 653                 rx_dev->device_control(rx_chan, DMA_SLAVE_CONFIG, (unsigned long)&config);
 654
 655                 rxd = rx_dev->device_prep_slave_sg(rx_chan, rx_sg, frm_cnt,
 656                                 DMA_FROM_DEVICE, flags);
 657
 658                 txd = tx_dev->device_prep_slave_sg(tx_chan, tx_sg, frm_cnt,
 659                                 DMA_TO_DEVICE, flags);
 660
 661                 if (!rxd || !txd) {
 662                         for (i = 0; i < frm_cnt; i++)
 663                                 dma_unmap_single(tx_dev->dev, dma_srcs[i], len,
 664                                                  DMA_TO_DEVICE);
 665                         for (i = 0; i < frm_cnt; i++)
 666                                 dma_unmap_single(rx_dev->dev, dma_dsts[i],
 667                                                  test_buf_size,
 668                                                  DMA_FROM_DEVICE);
 669                         pr_warning("%s: #%u: prep error with len=0x%x ",
 670                                         thread_name, total_tests - 1, len);
 671                         msleep(100);
 672                         failed_tests++;
 673                         continue;
 674                 }
 675
 676                 init_completion(&rx_cmp);
 677                 rxd->callback = dmatest_slave_rx_callback;
 678                 rxd->callback_param = &rx_cmp;
 679                 rx_cookie = rxd->tx_submit(rxd);
 680
 681                 init_completion(&tx_cmp);
 682                 txd->callback = dmatest_slave_tx_callback;
 683                 txd->callback_param = &tx_cmp;
 684                 tx_cookie = txd->tx_submit(txd);
 685
 686                 //printk(KERN_INFO "cookie from submit rx %d tx %d\n", rx_cookie,
 687                 //      tx_cookie);
 688
 689                 if (dma_submit_error(rx_cookie) || dma_submit_error(tx_cookie)) {
 690                         pr_warning("%s: #%u: submit error %d/%d with len=0x%x ",
 691                                         thread_name, total_tests - 1, rx_cookie, tx_cookie, len);
 692                         msleep(100);
 693                         failed_tests++;
 694                         continue;
 695                 }
 696                 dma_async_issue_pending(tx_chan);
 697                 dma_async_issue_pending(rx_chan);
 698
 699                 tx_tmo = wait_for_completion_timeout(&tx_cmp, tx_tmo);
 700
 701                 status = dma_async_is_tx_complete(tx_chan, tx_cookie, NULL, NULL);
 702
 703                 if (tx_tmo == 0) {
 704                         pr_warning("%s: #%u: tx test timed out\n",
 705                                    thread_name, total_tests - 1);
 706                         failed_tests++;
 707                         continue;
 708                 } else if (status != DMA_SUCCESS) {
 709                         pr_warning("%s: #%u: tx got completion callback,"
 710                                    " but status is \'%s\'\n",
 711                                    thread_name, total_tests - 1,
 712                                    status == DMA_ERROR ? "error" : "in progress");
 713                         failed_tests++;
 714                         continue;
 715                 }
 716
 717                 rx_tmo = wait_for_completion_timeout(&rx_cmp, rx_tmo);
 718                 status = dma_async_is_tx_complete(rx_chan, rx_cookie, NULL, NULL);
 719
 720                 if (rx_tmo == 0) {
 721                         pr_warning("%s: #%u: rx test timed out\n",
 722                                    thread_name, total_tests - 1);
 723                         failed_tests++;
 724                         continue;
 725                 } else if (status != DMA_SUCCESS) {
 726                         pr_warning("%s: #%u: rx got completion callback,"
 727                                    " but status is \'%s\'\n",
 728                                    thread_name, total_tests - 1,
 729                                    status == DMA_ERROR ? "error" : "in progress");
 730                         failed_tests++;
 731                         continue;
 732                 }
 733
 734                 /* Unmap by myself (see DMA_COMPL_SKIP_DEST_UNMAP above) */
 735                 for (i = 0; i < frm_cnt; i++)
 736                         dma_unmap_single(rx_dev->dev, dma_dsts[i], test_buf_size,
 737                                          DMA_FROM_DEVICE);
 738
 739                 error_count = 0;
 740
 741                 pr_debug("%s: verifying source buffer...\n", thread_name);
 742                 error_count += dmatest_verify(thread->srcs, 0, 0,
 743                                 0, PATTERN_SRC, true);
 744                 error_count += dmatest_verify(thread->srcs, 0,
 745                                 len, 0, PATTERN_SRC | PATTERN_COPY, true);
 746                 error_count += dmatest_verify(thread->srcs, len,
 747                                 test_buf_size, len,     PATTERN_SRC, true);
 748
 749                 pr_debug("%s: verifying dest buffer...\n",
 750                                 thread->task->comm);
 751                 error_count += dmatest_verify(thread->dsts, 0, 0,
 752                                 0, PATTERN_DST, false);
 753                 error_count += dmatest_verify(thread->dsts, 0,
 754                                 len, 0, PATTERN_SRC | PATTERN_COPY, false);
 755                 error_count += dmatest_verify(thread->dsts, len,
 756                                 test_buf_size, len, PATTERN_DST, false);
 757
 758                 if (error_count) {
 759                         pr_warning("%s: #%u: %u errors with len=0x%x\n",
 760                                 thread_name, total_tests - 1, error_count, len);
 761                         failed_tests++;
 762                 } else {
 763                         pr_debug("%s: #%u: No errors with len=0x%x\n",
 764                                 thread_name, total_tests - 1, len);
 765                 }
 766         }
 767
 768         ret = 0;
 769         for (i = 0; thread->dsts[i]; i++)
 770                 kfree(thread->dsts[i]);
 771 err_dstbuf:
 772         kfree(thread->dsts);
 773 err_dsts:
 774         for (i = 0; thread->srcs[i]; i++)
 775                 kfree(thread->srcs[i]);
 776 err_srcbuf:
 777         kfree(thread->srcs);
 778 err_srcs:
 779         pr_notice("%s: terminating after %u tests, %u failures (status %d)\n",
 780                         thread_name, total_tests, failed_tests, ret);
 781
 782         if (iterations > 0)
 783                 while (!kthread_should_stop()) {
 784                         DECLARE_WAIT_QUEUE_HEAD_ONSTACK(wait_dmatest_exit);
 785                         interruptible_sleep_on(&wait_dmatest_exit);
 786                 }
 787
 788         return ret;
 789 }
 790
 791 static void dmatest_cleanup_channel(struct dmatest_chan *dtc)
 792 {
 793         struct dmatest_thread   *thread;
 794         struct dmatest_thread   *_thread;
 795         int                     ret;
 796
 797         list_for_each_entry_safe(thread, _thread, &dtc->threads, node) {
 798                 ret = kthread_stop(thread->task);
 799                 pr_debug("dmatest: thread %s exited with status %d\n",
 800                                 thread->task->comm, ret);
 801                 list_del(&thread->node);
 802                 kfree(thread);
 803         }
 804         kfree(dtc);
 805 }
 806
 807 static int dmatest_add_threads(struct dmatest_chan *dtc, enum dma_transaction_type type)
 808 {
 809         struct dmatest_thread *thread;
 810         struct dma_chan *chan = dtc->chan;
 811         char *op;
 812         unsigned int i;
 813
 814         if (type == DMA_MEMCPY)
 815                 op = "copy";
 816         else if (type == DMA_XOR)
 817                 op = "xor";
 818         else if (type == DMA_PQ)
 819                 op = "pq";
 820         else
 821                 return -EINVAL;
 822
 823         for (i = 0; i < threads_per_chan; i++) {
 824                 thread = kzalloc(sizeof(struct dmatest_thread), GFP_KERNEL);
 825                 if (!thread) {
 826                         pr_warning("dmatest: No memory for %s-%s%u\n",
 827                                    dma_chan_name(chan), op, i);
 828
 829                         break;
 830                 }
 831                 thread->chan = dtc->chan;
 832                 thread->type = type;
 833                 smp_wmb();
 834                 thread->task = kthread_run(dmatest_func, thread, "%s-%s%u",
 835                                 dma_chan_name(chan), op, i);
 836                 if (IS_ERR(thread->task)) {
 837                         pr_warning("dmatest: Failed to run thread %s-%s%u\n",
 838                                         dma_chan_name(chan), op, i);
 839                         kfree(thread);
 840                         break;
 841                 }
 842
 843                 /* srcbuf and dstbuf are allocated by the thread itself */
 844
 845                 list_add_tail(&thread->node, &dtc->threads);
 846         }
 847
 848         return i;
 849 }
 850
 851 static int dmatest_add_slave_threads(struct dmatest_chan *tx_dtc, struct dmatest_chan *rx_dtc)
 852 {
 853         struct dmatest_slave_thread *thread;
 854         struct dma_chan *tx_chan = tx_dtc->chan;
 855         struct dma_chan *rx_chan = rx_dtc->chan;
 856
 857         thread = kzalloc(sizeof(struct dmatest_slave_thread), GFP_KERNEL);
 858         if (!thread) {
 859                 pr_warning("dmatest: No memory for slave thread %s-%s\n",
 860                            dma_chan_name(tx_chan), dma_chan_name(rx_chan));
 861
 862         }
 863
 864         thread->tx_chan = tx_chan;
 865         thread->rx_chan = rx_chan;
 866         thread->type = (enum dma_transaction_type)DMA_SLAVE;
 867         smp_wmb();
 868         thread->task = kthread_run(dmatest_slave_func, thread, "%s-%s",
 869                 dma_chan_name(tx_chan), dma_chan_name(rx_chan));
 870         if (IS_ERR(thread->task)) {
 871                 pr_warning("dmatest: Failed to run thread %s-%s\n",
 872                                 dma_chan_name(tx_chan), dma_chan_name(rx_chan));
 873                 kfree(thread);
 874         }
 875
 876         /* srcbuf and dstbuf are allocated by the thread itself */
 877
 878         list_add_tail(&thread->node, &tx_dtc->threads);
 879
 880         /* Added one thread with 2 channels */
 881         return 1;
 882 }
 883
 884 static int dmatest_add_channel(struct dma_chan *chan)
 885 {
 886         struct dmatest_chan     *dtc;
 887         struct dma_device       *dma_dev = chan->device;
 888         unsigned int            thread_count = 0;
 889         int cnt;
 890
 891         dtc = kmalloc(sizeof(struct dmatest_chan), GFP_KERNEL);
 892         if (!dtc) {
 893                 pr_warning("dmatest: No memory for %s\n", dma_chan_name(chan));
 894                 return -ENOMEM;
 895         }
 896
 897         dtc->chan = chan;
 898         INIT_LIST_HEAD(&dtc->threads);
 899
 900         if (dma_has_cap(DMA_MEMCPY, dma_dev->cap_mask)) {
 901                 cnt = dmatest_add_threads(dtc, DMA_MEMCPY);
 902                 thread_count += cnt > 0 ? cnt : 0;
 903         }
 904         if (dma_has_cap(DMA_XOR, dma_dev->cap_mask)) {
 905                 cnt = dmatest_add_threads(dtc, DMA_XOR);
 906                 thread_count += cnt > 0 ? cnt : 0;
 907         }
 908         if (dma_has_cap(DMA_PQ, dma_dev->cap_mask)) {
 909                 cnt = dmatest_add_threads(dtc, DMA_PQ);
 910                 thread_count += cnt > 0 ?: 0;
 911         }
 912
 913         pr_info("dmatest: Started %u threads using %s\n",
 914                 thread_count, dma_chan_name(chan));
 915
 916         list_add_tail(&dtc->node, &dmatest_channels);
 917         nr_channels++;
 918
 919         return 0;
 920 }
 921
 922 static int dmatest_add_slave_channels(struct dma_chan *tx_chan, struct dma_chan *rx_chan)
 923 {
 924         struct dmatest_chan     *tx_dtc;
 925         struct dmatest_chan     *rx_dtc;
 926         unsigned int            thread_count = 0;
 927
 928         tx_dtc = kmalloc(sizeof(struct dmatest_chan), GFP_KERNEL);
 929         if (!tx_dtc) {
 930                 pr_warning("dmatest: No memory for tx %s\n", dma_chan_name(tx_chan));
 931                 return -ENOMEM;
 932         }
 933
 934         rx_dtc = kmalloc(sizeof(struct dmatest_chan), GFP_KERNEL);
 935         if (!rx_dtc) {
 936                 pr_warning("dmatest: No memory for rx %s\n", dma_chan_name(rx_chan));
 937                 return -ENOMEM;
 938         }
 939
 940         tx_dtc->chan = tx_chan;
 941         rx_dtc->chan = rx_chan;
 942         INIT_LIST_HEAD(&tx_dtc->threads);
 943         INIT_LIST_HEAD(&rx_dtc->threads);
 944
 945         dmatest_add_slave_threads(tx_dtc, rx_dtc);
 946         thread_count += 1;
 947
 948         pr_info("dmatest: Started %u threads using %s %s\n",
 949                 thread_count, dma_chan_name(tx_chan), dma_chan_name(rx_chan));
 950
 951         list_add_tail(&tx_dtc->node, &dmatest_channels);
 952         list_add_tail(&rx_dtc->node, &dmatest_channels);
 953         nr_channels += 2;
 954
 955         return 0;
 956 }
 957
 958 static bool filter(struct dma_chan *chan, void *param)
 959 {
 960         if (!dmatest_match_channel(chan) || !dmatest_match_device(chan->device))
 961                 return false;
 962         else
 963                 return true;
 964 }
 965
 966 static bool xdma_filter(struct dma_chan *chan, void *param)
 967 {
 968         if (*((int *)chan->private) == *(int *)param) {
 969                 return true;
 970         }
 971
 972         return false;
 973 }
 974
 975 static int __init dmatest_init(void)
 976 {
 977         dma_cap_mask_t mask;
 978         struct dma_chan *chan;
 979         int err = 0;
 980
 981         dma_cap_zero(mask);
 982         dma_cap_set(DMA_MEMCPY, mask);
 983         for (;;) {
 984                 chan = dma_request_channel(mask, filter, NULL);
 985
 986                 if (chan) {
 987                         err = dmatest_add_channel(chan);
 988                         if (err) {
 989                                 dma_release_channel(chan);
 990                                 break; /* add_channel failed, punt */
 991                         }
 992                 } else
 993                         break; /* no more channels available */
 994                 if (max_channels && nr_channels >= max_channels)
 995                         break; /* we have all we need */
 996         }
 997
 998 #if 1
 999         {
1000                 enum dma_data_direction direction;
1001                 u32 match;
1002                 struct dma_chan *rx_chan;
1003
1004                 dma_cap_zero(mask);
1005                 dma_cap_set(DMA_SLAVE | DMA_PRIVATE, mask);
1006
1007                 direction = DMA_TO_DEVICE;
1008                 match = (direction & 0xFF) | XILINX_DMA_IP_VDMA;
1009                 pr_info("match is %x\n", match);
1010
1011                 chan = dma_request_channel(mask, xdma_filter, (void *)&match);
1012
1013                 if (chan) {
1014                         pr_info("Found tx device\n");
1015                 } else {
1016                         pr_info("Did not find tx device\n");
1017                 }
1018
1019                 direction = DMA_FROM_DEVICE;
1020                 match = (direction & 0xFF) | XILINX_DMA_IP_VDMA;
1021                 rx_chan = dma_request_channel(mask, xdma_filter, &match);
1022
1023                 if (rx_chan) {
1024                         pr_info("Found rx device\n");
1025                 } else {
1026                         pr_info("Did not find rx device\n");
1027                 }
1028
1029                 if(chan && rx_chan) {
1030                         err = dmatest_add_slave_channels(chan, rx_chan);
1031                         if (err) {
1032                                 dma_release_channel(chan);
1033                                 dma_release_channel(rx_chan);
1034                         }
1035                 }
1036         }
1037 #endif
1038         return err;
1039 }
1040 /* when compiled-in wait for drivers to load first */
1041 late_initcall(dmatest_init);
1042
1043 static void __exit dmatest_exit(void)
1044 {
1045         struct dmatest_chan *dtc, *_dtc;
1046         struct dma_chan *chan;
1047
1048         list_for_each_entry_safe(dtc, _dtc, &dmatest_channels, node) {
1049                 list_del(&dtc->node);
1050                 chan = dtc->chan;
1051                 dmatest_cleanup_channel(dtc);
1052                 pr_debug("dmatest: dropped channel %s\n",
1053                          dma_chan_name(chan));
1054                 dma_release_channel(chan);
1055         }
1056 }
1057 module_exit(dmatest_exit);
1058
1059 MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
1060 MODULE_LICENSE("GPL v2");