2 # DMA engine configuration
6 bool "DMA Engine support"
9 DMA engines can do asynchronous data transfers without
10 involving the host CPU. Currently, this framework can be
11 used to offload memory copies in the network stack and
12 RAID operations in the MD driver. This menu only presents
13 DMA Device drivers supported by the configured arch, it may
14 be empty in some cases.
16 config DMADEVICES_DEBUG
17 bool "DMA Engine debugging"
18 depends on DMADEVICES != n
20 This is an option for use by developers; most people should
21 say N here. This enables DMA engine core and driver debugging.
23 config DMADEVICES_VDEBUG
24 bool "DMA Engine verbose debugging"
25 depends on DMADEVICES_DEBUG != n
27 This is an option for use by developers; most people should
28 say N here. This enables deeper (more verbose) debugging of
29 the DMA engine core and drivers.
37 tristate "Xilinx DMA engines support"
40 Enable support for the Xilinx DMA controllers. It supports three DMA
41 engines: Axi Central DMA (memory to memory transfer), Axi DMA (memory and
42 device transfer), and Axi VDMA (memory and video device transfer).
45 tristate "Intel MID DMA support for Peripheral DMA controllers"
50 Enable support for the Intel(R) MID DMA engine present
51 in Intel MID chipsets.
53 Say Y here if you have such a chipset.
57 config ASYNC_TX_ENABLE_CHANNEL_SWITCH
61 bool "ARM PrimeCell PL080 or PL081 support"
62 depends on ARM_AMBA && EXPERIMENTAL
65 Platform has a PL08x DMAC device
66 which can provide DMA engine support
69 tristate "Intel I/OAT DMA support"
73 select ASYNC_TX_DISABLE_PQ_VAL_DMA
74 select ASYNC_TX_DISABLE_XOR_VAL_DMA
76 Enable support for the Intel(R) I/OAT DMA engine present
77 in recent Intel Xeon chipsets.
79 Say Y here if you have such a chipset.
84 tristate "Intel IOP ADMA support"
85 depends on ARCH_IOP32X || ARCH_IOP33X || ARCH_IOP13XX
87 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
89 Enable support for the Intel(R) IOP Series RAID engines.
92 tristate "Synopsys DesignWare AHB DMA support"
95 default y if CPU_AT32AP7000
97 Support the Synopsys DesignWare AHB DMA controller. This
98 can be integrated in chips such as the Atmel AT32ap7000.
101 tristate "Atmel AHB DMA support"
105 Support the Atmel AHB DMA controller.
108 tristate "Freescale Elo and Elo Plus DMA support"
111 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
113 Enable support for the Freescale Elo and Elo Plus DMA controllers.
114 The Elo is the DMA controller on some 82xx and 83xx parts, and the
115 Elo Plus is the DMA controller on 85xx and 86xx parts.
118 tristate "Freescale MPC512x built-in DMA engine support"
119 depends on PPC_MPC512x || PPC_MPC831x
122 Enable support for the Freescale MPC512x built-in DMA engine.
125 bool "Marvell XOR engine support"
126 depends on PLAT_ORION
128 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
130 Enable support for the Marvell XOR engine.
133 bool "MX3x Image Processing Unit support"
138 If you plan to use the Image Processing unit in the i.MX3x, say
139 Y here. If unsure, select Y.
142 int "Number of dynamically mapped interrupts for IPU"
147 Out of 137 interrupt sources on i.MX31 IPU only very few are used.
148 To avoid bloating the irq_desc[] array we allocate a sufficient
149 number of IRQ slots and map them dynamically to specific sources.
152 tristate "Toshiba TXx9 SoC DMA support"
153 depends on MACH_TX49XX || MACH_TX39XX
156 Support the TXx9 SoC internal DMA controller. This can be
157 integrated in chips such as the Toshiba TX4927/38/39.
160 tristate "Renesas SuperH DMAC support"
161 depends on (SUPERH && SH_DMA) || (ARM && ARCH_SHMOBILE)
162 depends on !SH_DMA_API
165 Enable support for the Renesas SuperH DMA controllers.
168 bool "ST-Ericsson COH901318 DMA support"
172 Enable support for ST-Ericsson COH 901 318 DMA.
175 bool "ST-Ericsson DMA40 support"
176 depends on ARCH_U8500
179 Support for ST-Ericsson DMA40 controller
181 config AMCC_PPC440SPE_ADMA
182 tristate "AMCC PPC440SPe ADMA support"
183 depends on 440SPe || 440SP
185 select ARCH_HAS_ASYNC_TX_FIND_CHANNEL
186 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
188 Enable support for the AMCC PPC440SPe RAID engines.
191 tristate "Timberdale FPGA DMA support"
192 depends on MFD_TIMBERDALE || HAS_IOMEM
195 Enable support for the Timberdale FPGA DMA engine.
198 tristate "CSR SiRFprimaII DMA support"
199 depends on ARCH_PRIMA2
202 Enable support for the CSR SiRFprimaII DMA engine.
204 config ARCH_HAS_ASYNC_TX_FIND_CHANNEL
208 tristate "DMA API Driver for PL330"
212 Select if your platform has one or more PL330 DMACs.
213 You need to provide platform specific settings via
214 platform_data for a dma-pl330 device.
217 tristate "Intel EG20T PCH / LAPIS Semicon IOH(ML7213/ML7223/ML7831) DMA"
218 depends on PCI && X86
221 Enable support for Intel EG20T PCH DMA engine.
223 This driver also can be used for LAPIS Semiconductor IOH(Input/
224 Output Hub), ML7213, ML7223 and ML7831.
225 ML7213 IOH is for IVI(In-Vehicle Infotainment) use, ML7223 IOH is
226 for MP(Media Phone) use and ML7831 IOH is for general purpose use.
227 ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series.
228 ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH.
231 tristate "i.MX SDMA support"
235 Support the i.MX SDMA engine. This engine is integrated into
236 Freescale i.MX25/31/35/51/53 chips.
239 tristate "i.MX DMA support"
243 Support the i.MX DMA engine. This engine is integrated into
244 Freescale i.MX1/21/27 chips.
247 tristate "Xilinx DMA engines support"
250 Enable support for the Xilinx DMA controllers. It supports three DMA
251 engines: Axi Central DMA (memory to memory transfer), Axi DMA (memory and
252 device transfer), and Axi VDMA (memory and video device transfer).
255 bool "MXS DMA support"
256 depends on SOC_IMX23 || SOC_IMX28
260 Support the MXS DMA engine. This engine including APBH-DMA
261 and APBX-DMA is integrated into Freescale i.MX23/28 chips.
264 bool "Cirrus Logic EP93xx DMA support"
265 depends on ARCH_EP93XX
268 Enable support for the Cirrus Logic EP93xx M2P/M2M DMA controller.
271 tristate "SA-11x0 DMA support"
272 depends on ARCH_SA1100
275 Support the DMA engine found on Intel StrongARM SA-1100 and
276 SA-1110 SoCs. This DMA engine can only be used with on-chip
282 comment "DMA Clients"
283 depends on DMA_ENGINE
286 bool "Network: TCP receive copy offload"
287 depends on DMA_ENGINE && NET
288 default (INTEL_IOATDMA || FSL_DMA)
290 This enables the use of DMA engines in the network stack to
291 offload receive copy-to-user operations, freeing CPU cycles.
293 Say Y here if you enabled INTEL_IOATDMA or FSL_DMA, otherwise
297 bool "Async_tx: Offload support for the async_tx api"
298 depends on DMA_ENGINE
300 This allows the async_tx api to take advantage of offload engines for
301 memcpy, memset, xor, and raid6 p+q operations. If your platform has
302 a dma engine that can perform raid operations and you have enabled
308 tristate "DMA Test client"
309 depends on DMA_ENGINE
311 Simple DMA test client. Say N unless you're debugging a