2 * drivers/serial/sh-sci.c
4 * SuperH on-chip serial module support. (SCI with no FIFO / with FIFO)
6 * Copyright (C) 2002 - 2008 Paul Mundt
7 * Modified to support SH7720 SCIF. Markus Brunner, Mark Jonas (Jul 2007).
9 * based off of the old drivers/char/sh-sci.c by:
11 * Copyright (C) 1999, 2000 Niibe Yutaka
12 * Copyright (C) 2000 Sugioka Toshinobu
13 * Modified to support multiple serial ports. Stuart Menefy (May 2000).
14 * Modified to support SecureEdge. David McCullough (2002)
15 * Modified to support SH7300 SCIF. Takashi Kusuda (Jun 2003).
16 * Removed SH7300 support (Jul 2007).
18 * This file is subject to the terms and conditions of the GNU General Public
19 * License. See the file "COPYING" in the main directory of this archive
22 #if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
28 #include <linux/module.h>
29 #include <linux/errno.h>
30 #include <linux/timer.h>
31 #include <linux/interrupt.h>
32 #include <linux/tty.h>
33 #include <linux/tty_flip.h>
34 #include <linux/serial.h>
35 #include <linux/major.h>
36 #include <linux/string.h>
37 #include <linux/sysrq.h>
38 #include <linux/ioport.h>
40 #include <linux/init.h>
41 #include <linux/delay.h>
42 #include <linux/console.h>
43 #include <linux/platform_device.h>
44 #include <linux/serial_sci.h>
45 #include <linux/notifier.h>
46 #include <linux/cpufreq.h>
47 #include <linux/clk.h>
48 #include <linux/ctype.h>
49 #include <linux/err.h>
50 #include <linux/list.h>
53 #include <asm/clock.h>
54 #include <asm/sh_bios.h>
60 struct uart_port port
;
65 /* Port IRQs: ERI, RXI, TXI, BRI (optional) */
66 unsigned int irqs
[SCIx_NR_IRQS
];
68 /* Port enable callback */
69 void (*enable
)(struct uart_port
*port
);
71 /* Port disable callback */
72 void (*disable
)(struct uart_port
*port
);
75 struct timer_list break_timer
;
78 #ifdef CONFIG_HAVE_CLK
82 struct list_head node
;
87 struct list_head ports
;
89 #ifdef CONFIG_HAVE_CLK
90 struct notifier_block clk_nb
;
94 /* Function prototypes */
95 static void sci_stop_tx(struct uart_port
*port
);
97 #define SCI_NPORTS CONFIG_SERIAL_SH_SCI_NR_UARTS
99 static struct sci_port sci_ports
[SCI_NPORTS
];
100 static struct uart_driver sci_uart_driver
;
102 static inline struct sci_port
*
103 to_sci_port(struct uart_port
*uart
)
105 return container_of(uart
, struct sci_port
, port
);
108 #if defined(CONFIG_CONSOLE_POLL) || defined(CONFIG_SERIAL_SH_SCI_CONSOLE)
110 #ifdef CONFIG_CONSOLE_POLL
111 static inline void handle_error(struct uart_port
*port
)
113 /* Clear error flags */
114 sci_out(port
, SCxSR
, SCxSR_ERROR_CLEAR(port
));
117 static int sci_poll_get_char(struct uart_port
*port
)
119 unsigned short status
;
123 status
= sci_in(port
, SCxSR
);
124 if (status
& SCxSR_ERRORS(port
)) {
128 } while (!(status
& SCxSR_RDxF(port
)));
130 c
= sci_in(port
, SCxRDR
);
134 sci_out(port
, SCxSR
, SCxSR_RDxF_CLEAR(port
));
140 static void sci_poll_put_char(struct uart_port
*port
, unsigned char c
)
142 unsigned short status
;
145 status
= sci_in(port
, SCxSR
);
146 } while (!(status
& SCxSR_TDxE(port
)));
148 sci_in(port
, SCxSR
); /* Dummy read */
149 sci_out(port
, SCxSR
, SCxSR_TDxE_CLEAR(port
) & ~SCxSR_TEND(port
));
150 sci_out(port
, SCxTDR
, c
);
152 #endif /* CONFIG_CONSOLE_POLL || CONFIG_SERIAL_SH_SCI_CONSOLE */
154 #if defined(__H8300S__)
155 enum { sci_disable
, sci_enable
};
157 static void h8300_sci_config(struct uart_port
*port
, unsigned int ctrl
)
159 volatile unsigned char *mstpcrl
= (volatile unsigned char *)MSTPCRL
;
160 int ch
= (port
->mapbase
- SMR0
) >> 3;
161 unsigned char mask
= 1 << (ch
+1);
163 if (ctrl
== sci_disable
)
169 static inline void h8300_sci_enable(struct uart_port
*port
)
171 h8300_sci_config(port
, sci_enable
);
174 static inline void h8300_sci_disable(struct uart_port
*port
)
176 h8300_sci_config(port
, sci_disable
);
180 #if defined(__H8300H__) || defined(__H8300S__)
181 static void sci_init_pins(struct uart_port
*port
, unsigned int cflag
)
183 int ch
= (port
->mapbase
- SMR0
) >> 3;
186 H8300_GPIO_DDR(h8300_sci_pins
[ch
].port
,
187 h8300_sci_pins
[ch
].rx
,
189 H8300_GPIO_DDR(h8300_sci_pins
[ch
].port
,
190 h8300_sci_pins
[ch
].tx
,
194 H8300_SCI_DR(ch
) |= h8300_sci_pins
[ch
].tx
;
196 #elif defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712)
197 static inline void sci_init_pins(struct uart_port
*port
, unsigned int cflag
)
199 if (port
->mapbase
== 0xA4400000) {
200 __raw_writew(__raw_readw(PACR
) & 0xffc0, PACR
);
201 __raw_writew(__raw_readw(PBCR
) & 0x0fff, PBCR
);
202 } else if (port
->mapbase
== 0xA4410000)
203 __raw_writew(__raw_readw(PBCR
) & 0xf003, PBCR
);
205 #elif defined(CONFIG_CPU_SUBTYPE_SH7720) || defined(CONFIG_CPU_SUBTYPE_SH7721)
206 static inline void sci_init_pins(struct uart_port
*port
, unsigned int cflag
)
210 if (cflag
& CRTSCTS
) {
212 if (port
->mapbase
== 0xa4430000) { /* SCIF0 */
213 /* Clear PTCR bit 9-2; enable all scif pins but sck */
214 data
= __raw_readw(PORT_PTCR
);
215 __raw_writew((data
& 0xfc03), PORT_PTCR
);
216 } else if (port
->mapbase
== 0xa4438000) { /* SCIF1 */
217 /* Clear PVCR bit 9-2 */
218 data
= __raw_readw(PORT_PVCR
);
219 __raw_writew((data
& 0xfc03), PORT_PVCR
);
222 if (port
->mapbase
== 0xa4430000) { /* SCIF0 */
223 /* Clear PTCR bit 5-2; enable only tx and rx */
224 data
= __raw_readw(PORT_PTCR
);
225 __raw_writew((data
& 0xffc3), PORT_PTCR
);
226 } else if (port
->mapbase
== 0xa4438000) { /* SCIF1 */
227 /* Clear PVCR bit 5-2 */
228 data
= __raw_readw(PORT_PVCR
);
229 __raw_writew((data
& 0xffc3), PORT_PVCR
);
233 #elif defined(CONFIG_CPU_SH3)
234 /* For SH7705, SH7706, SH7707, SH7709, SH7709A, SH7729 */
235 static inline void sci_init_pins(struct uart_port
*port
, unsigned int cflag
)
239 /* We need to set SCPCR to enable RTS/CTS */
240 data
= __raw_readw(SCPCR
);
241 /* Clear out SCP7MD1,0, SCP6MD1,0, SCP4MD1,0*/
242 __raw_writew(data
& 0x0fcf, SCPCR
);
244 if (!(cflag
& CRTSCTS
)) {
245 /* We need to set SCPCR to enable RTS/CTS */
246 data
= __raw_readw(SCPCR
);
247 /* Clear out SCP7MD1,0, SCP4MD1,0,
248 Set SCP6MD1,0 = {01} (output) */
249 __raw_writew((data
& 0x0fcf) | 0x1000, SCPCR
);
251 data
= ctrl_inb(SCPDR
);
252 /* Set /RTS2 (bit6) = 0 */
253 ctrl_outb(data
& 0xbf, SCPDR
);
256 #elif defined(CONFIG_CPU_SUBTYPE_SH7722)
257 static inline void sci_init_pins(struct uart_port
*port
, unsigned int cflag
)
261 if (port
->mapbase
== 0xffe00000) {
262 data
= __raw_readw(PSCR
);
264 if (!(cflag
& CRTSCTS
))
267 __raw_writew(data
, PSCR
);
270 #elif defined(CONFIG_CPU_SUBTYPE_SH7763) || \
271 defined(CONFIG_CPU_SUBTYPE_SH7780) || \
272 defined(CONFIG_CPU_SUBTYPE_SH7785) || \
273 defined(CONFIG_CPU_SUBTYPE_SH7786) || \
274 defined(CONFIG_CPU_SUBTYPE_SHX3)
275 static inline void sci_init_pins(struct uart_port
*port
, unsigned int cflag
)
277 if (!(cflag
& CRTSCTS
))
278 __raw_writew(0x0080, SCSPTR0
); /* Set RTS = 1 */
280 #elif defined(CONFIG_CPU_SH4) && !defined(CONFIG_CPU_SH4A)
281 static inline void sci_init_pins(struct uart_port
*port
, unsigned int cflag
)
283 if (!(cflag
& CRTSCTS
))
284 __raw_writew(0x0080, SCSPTR2
); /* Set RTS = 1 */
287 static inline void sci_init_pins(struct uart_port
*port
, unsigned int cflag
)
293 #if defined(CONFIG_CPU_SUBTYPE_SH7760) || \
294 defined(CONFIG_CPU_SUBTYPE_SH7780) || \
295 defined(CONFIG_CPU_SUBTYPE_SH7785) || \
296 defined(CONFIG_CPU_SUBTYPE_SH7786)
297 static inline int scif_txroom(struct uart_port
*port
)
299 return SCIF_TXROOM_MAX
- (sci_in(port
, SCTFDR
) & 0xff);
302 static inline int scif_rxroom(struct uart_port
*port
)
304 return sci_in(port
, SCRFDR
) & 0xff;
306 #elif defined(CONFIG_CPU_SUBTYPE_SH7763)
307 static inline int scif_txroom(struct uart_port
*port
)
309 if ((port
->mapbase
== 0xffe00000) ||
310 (port
->mapbase
== 0xffe08000)) {
312 return SCIF_TXROOM_MAX
- (sci_in(port
, SCTFDR
) & 0xff);
315 return SCIF2_TXROOM_MAX
- (sci_in(port
, SCFDR
) >> 8);
319 static inline int scif_rxroom(struct uart_port
*port
)
321 if ((port
->mapbase
== 0xffe00000) ||
322 (port
->mapbase
== 0xffe08000)) {
324 return sci_in(port
, SCRFDR
) & 0xff;
327 return sci_in(port
, SCFDR
) & SCIF2_RFDC_MASK
;
331 static inline int scif_txroom(struct uart_port
*port
)
333 return SCIF_TXROOM_MAX
- (sci_in(port
, SCFDR
) >> 8);
336 static inline int scif_rxroom(struct uart_port
*port
)
338 return sci_in(port
, SCFDR
) & SCIF_RFDC_MASK
;
342 static inline int sci_txroom(struct uart_port
*port
)
344 return (sci_in(port
, SCxSR
) & SCI_TDRE
) != 0;
347 static inline int sci_rxroom(struct uart_port
*port
)
349 return (sci_in(port
, SCxSR
) & SCxSR_RDxF(port
)) != 0;
352 /* ********************************************************************** *
353 * the interrupt related routines *
354 * ********************************************************************** */
356 static void sci_transmit_chars(struct uart_port
*port
)
358 struct circ_buf
*xmit
= &port
->info
->xmit
;
359 unsigned int stopped
= uart_tx_stopped(port
);
360 unsigned short status
;
364 status
= sci_in(port
, SCxSR
);
365 if (!(status
& SCxSR_TDxE(port
))) {
366 ctrl
= sci_in(port
, SCSCR
);
367 if (uart_circ_empty(xmit
))
368 ctrl
&= ~SCI_CTRL_FLAGS_TIE
;
370 ctrl
|= SCI_CTRL_FLAGS_TIE
;
371 sci_out(port
, SCSCR
, ctrl
);
375 if (port
->type
== PORT_SCI
)
376 count
= sci_txroom(port
);
378 count
= scif_txroom(port
);
386 } else if (!uart_circ_empty(xmit
) && !stopped
) {
387 c
= xmit
->buf
[xmit
->tail
];
388 xmit
->tail
= (xmit
->tail
+ 1) & (UART_XMIT_SIZE
- 1);
393 sci_out(port
, SCxTDR
, c
);
396 } while (--count
> 0);
398 sci_out(port
, SCxSR
, SCxSR_TDxE_CLEAR(port
));
400 if (uart_circ_chars_pending(xmit
) < WAKEUP_CHARS
)
401 uart_write_wakeup(port
);
402 if (uart_circ_empty(xmit
)) {
405 ctrl
= sci_in(port
, SCSCR
);
407 if (port
->type
!= PORT_SCI
) {
408 sci_in(port
, SCxSR
); /* Dummy read */
409 sci_out(port
, SCxSR
, SCxSR_TDxE_CLEAR(port
));
412 ctrl
|= SCI_CTRL_FLAGS_TIE
;
413 sci_out(port
, SCSCR
, ctrl
);
417 /* On SH3, SCIF may read end-of-break as a space->mark char */
418 #define STEPFN(c) ({int __c = (c); (((__c-1)|(__c)) == -1); })
420 static inline void sci_receive_chars(struct uart_port
*port
)
422 struct sci_port
*sci_port
= to_sci_port(port
);
423 struct tty_struct
*tty
= port
->info
->port
.tty
;
424 int i
, count
, copied
= 0;
425 unsigned short status
;
428 status
= sci_in(port
, SCxSR
);
429 if (!(status
& SCxSR_RDxF(port
)))
433 if (port
->type
== PORT_SCI
)
434 count
= sci_rxroom(port
);
436 count
= scif_rxroom(port
);
438 /* Don't copy more bytes than there is room for in the buffer */
439 count
= tty_buffer_request_room(tty
, count
);
441 /* If for any reason we can't copy more data, we're done! */
445 if (port
->type
== PORT_SCI
) {
446 char c
= sci_in(port
, SCxRDR
);
447 if (uart_handle_sysrq_char(port
, c
) ||
448 sci_port
->break_flag
)
451 tty_insert_flip_char(tty
, c
, TTY_NORMAL
);
453 for (i
= 0; i
< count
; i
++) {
454 char c
= sci_in(port
, SCxRDR
);
455 status
= sci_in(port
, SCxSR
);
456 #if defined(CONFIG_CPU_SH3)
457 /* Skip "chars" during break */
458 if (sci_port
->break_flag
) {
460 (status
& SCxSR_FER(port
))) {
465 /* Nonzero => end-of-break */
466 dev_dbg(port
->dev
, "debounce<%02x>\n", c
);
467 sci_port
->break_flag
= 0;
474 #endif /* CONFIG_CPU_SH3 */
475 if (uart_handle_sysrq_char(port
, c
)) {
480 /* Store data and status */
481 if (status
&SCxSR_FER(port
)) {
483 dev_notice(port
->dev
, "frame error\n");
484 } else if (status
&SCxSR_PER(port
)) {
486 dev_notice(port
->dev
, "parity error\n");
490 tty_insert_flip_char(tty
, c
, flag
);
494 sci_in(port
, SCxSR
); /* dummy read */
495 sci_out(port
, SCxSR
, SCxSR_RDxF_CLEAR(port
));
498 port
->icount
.rx
+= count
;
502 /* Tell the rest of the system the news. New characters! */
503 tty_flip_buffer_push(tty
);
505 sci_in(port
, SCxSR
); /* dummy read */
506 sci_out(port
, SCxSR
, SCxSR_RDxF_CLEAR(port
));
510 #define SCI_BREAK_JIFFIES (HZ/20)
511 /* The sci generates interrupts during the break,
512 * 1 per millisecond or so during the break period, for 9600 baud.
513 * So dont bother disabling interrupts.
514 * But dont want more than 1 break event.
515 * Use a kernel timer to periodically poll the rx line until
516 * the break is finished.
518 static void sci_schedule_break_timer(struct sci_port
*port
)
520 port
->break_timer
.expires
= jiffies
+ SCI_BREAK_JIFFIES
;
521 add_timer(&port
->break_timer
);
523 /* Ensure that two consecutive samples find the break over. */
524 static void sci_break_timer(unsigned long data
)
526 struct sci_port
*port
= (struct sci_port
*)data
;
528 if (sci_rxd_in(&port
->port
) == 0) {
529 port
->break_flag
= 1;
530 sci_schedule_break_timer(port
);
531 } else if (port
->break_flag
== 1) {
533 port
->break_flag
= 2;
534 sci_schedule_break_timer(port
);
536 port
->break_flag
= 0;
539 static inline int sci_handle_errors(struct uart_port
*port
)
542 unsigned short status
= sci_in(port
, SCxSR
);
543 struct tty_struct
*tty
= port
->info
->port
.tty
;
545 if (status
& SCxSR_ORER(port
)) {
547 if (tty_insert_flip_char(tty
, 0, TTY_OVERRUN
))
550 dev_notice(port
->dev
, "overrun error");
553 if (status
& SCxSR_FER(port
)) {
554 if (sci_rxd_in(port
) == 0) {
555 /* Notify of BREAK */
556 struct sci_port
*sci_port
= to_sci_port(port
);
558 if (!sci_port
->break_flag
) {
559 sci_port
->break_flag
= 1;
560 sci_schedule_break_timer(sci_port
);
562 /* Do sysrq handling. */
563 if (uart_handle_break(port
))
566 dev_dbg(port
->dev
, "BREAK detected\n");
568 if (tty_insert_flip_char(tty
, 0, TTY_BREAK
))
574 if (tty_insert_flip_char(tty
, 0, TTY_FRAME
))
577 dev_notice(port
->dev
, "frame error\n");
581 if (status
& SCxSR_PER(port
)) {
583 if (tty_insert_flip_char(tty
, 0, TTY_PARITY
))
586 dev_notice(port
->dev
, "parity error");
590 tty_flip_buffer_push(tty
);
595 static inline int sci_handle_fifo_overrun(struct uart_port
*port
)
597 struct tty_struct
*tty
= port
->info
->port
.tty
;
600 if (port
->type
!= PORT_SCIF
)
603 if ((sci_in(port
, SCLSR
) & SCIF_ORER
) != 0) {
604 sci_out(port
, SCLSR
, 0);
606 tty_insert_flip_char(tty
, 0, TTY_OVERRUN
);
607 tty_flip_buffer_push(tty
);
609 dev_notice(port
->dev
, "overrun error\n");
616 static inline int sci_handle_breaks(struct uart_port
*port
)
619 unsigned short status
= sci_in(port
, SCxSR
);
620 struct tty_struct
*tty
= port
->info
->port
.tty
;
621 struct sci_port
*s
= to_sci_port(port
);
623 if (uart_handle_break(port
))
626 if (!s
->break_flag
&& status
& SCxSR_BRK(port
)) {
627 #if defined(CONFIG_CPU_SH3)
631 /* Notify of BREAK */
632 if (tty_insert_flip_char(tty
, 0, TTY_BREAK
))
635 dev_dbg(port
->dev
, "BREAK detected\n");
639 tty_flip_buffer_push(tty
);
641 copied
+= sci_handle_fifo_overrun(port
);
646 static irqreturn_t
sci_rx_interrupt(int irq
, void *port
)
648 /* I think sci_receive_chars has to be called irrespective
649 * of whether the I_IXOFF is set, otherwise, how is the interrupt
652 sci_receive_chars(port
);
657 static irqreturn_t
sci_tx_interrupt(int irq
, void *ptr
)
659 struct uart_port
*port
= ptr
;
661 spin_lock_irq(&port
->lock
);
662 sci_transmit_chars(port
);
663 spin_unlock_irq(&port
->lock
);
668 static irqreturn_t
sci_er_interrupt(int irq
, void *ptr
)
670 struct uart_port
*port
= ptr
;
673 if (port
->type
== PORT_SCI
) {
674 if (sci_handle_errors(port
)) {
675 /* discard character in rx buffer */
677 sci_out(port
, SCxSR
, SCxSR_RDxF_CLEAR(port
));
680 sci_handle_fifo_overrun(port
);
681 sci_rx_interrupt(irq
, ptr
);
684 sci_out(port
, SCxSR
, SCxSR_ERROR_CLEAR(port
));
686 /* Kick the transmission */
687 sci_tx_interrupt(irq
, ptr
);
692 static irqreturn_t
sci_br_interrupt(int irq
, void *ptr
)
694 struct uart_port
*port
= ptr
;
697 sci_handle_breaks(port
);
698 sci_out(port
, SCxSR
, SCxSR_BREAK_CLEAR(port
));
703 static irqreturn_t
sci_mpxed_interrupt(int irq
, void *ptr
)
705 unsigned short ssr_status
, scr_status
;
706 struct uart_port
*port
= ptr
;
707 irqreturn_t ret
= IRQ_NONE
;
709 ssr_status
= sci_in(port
, SCxSR
);
710 scr_status
= sci_in(port
, SCSCR
);
713 if ((ssr_status
& 0x0020) && (scr_status
& SCI_CTRL_FLAGS_TIE
))
714 ret
= sci_tx_interrupt(irq
, ptr
);
716 if ((ssr_status
& 0x0002) && (scr_status
& SCI_CTRL_FLAGS_RIE
))
717 ret
= sci_rx_interrupt(irq
, ptr
);
718 /* Error Interrupt */
719 if ((ssr_status
& 0x0080) && (scr_status
& SCI_CTRL_FLAGS_REIE
))
720 ret
= sci_er_interrupt(irq
, ptr
);
721 /* Break Interrupt */
722 if ((ssr_status
& 0x0010) && (scr_status
& SCI_CTRL_FLAGS_REIE
))
723 ret
= sci_br_interrupt(irq
, ptr
);
728 #ifdef CONFIG_HAVE_CLK
730 * Here we define a transistion notifier so that we can update all of our
731 * ports' baud rate when the peripheral clock changes.
733 static int sci_notifier(struct notifier_block
*self
,
734 unsigned long phase
, void *p
)
736 struct sh_sci_priv
*priv
= container_of(self
,
737 struct sh_sci_priv
, clk_nb
);
738 struct sci_port
*sci_port
;
741 if ((phase
== CPUFREQ_POSTCHANGE
) ||
742 (phase
== CPUFREQ_RESUMECHANGE
)) {
743 spin_lock_irqsave(&priv
->lock
, flags
);
744 list_for_each_entry(sci_port
, &priv
->ports
, node
)
745 sci_port
->port
.uartclk
= clk_get_rate(sci_port
->clk
);
747 spin_unlock_irqrestore(&priv
->lock
, flags
);
754 static int sci_request_irq(struct sci_port
*port
)
757 irqreturn_t (*handlers
[4])(int irq
, void *ptr
) = {
758 sci_er_interrupt
, sci_rx_interrupt
, sci_tx_interrupt
,
761 const char *desc
[] = { "SCI Receive Error", "SCI Receive Data Full",
762 "SCI Transmit Data Empty", "SCI Break" };
764 if (port
->irqs
[0] == port
->irqs
[1]) {
765 if (unlikely(!port
->irqs
[0]))
768 if (request_irq(port
->irqs
[0], sci_mpxed_interrupt
,
769 IRQF_DISABLED
, "sci", port
)) {
770 dev_err(port
->port
.dev
, "Can't allocate IRQ\n");
774 for (i
= 0; i
< ARRAY_SIZE(handlers
); i
++) {
775 if (unlikely(!port
->irqs
[i
]))
778 if (request_irq(port
->irqs
[i
], handlers
[i
],
779 IRQF_DISABLED
, desc
[i
], port
)) {
780 dev_err(port
->port
.dev
, "Can't allocate IRQ\n");
789 static void sci_free_irq(struct sci_port
*port
)
793 if (port
->irqs
[0] == port
->irqs
[1])
794 free_irq(port
->irqs
[0], port
);
796 for (i
= 0; i
< ARRAY_SIZE(port
->irqs
); i
++) {
800 free_irq(port
->irqs
[i
], port
);
805 static unsigned int sci_tx_empty(struct uart_port
*port
)
811 static void sci_set_mctrl(struct uart_port
*port
, unsigned int mctrl
)
813 /* This routine is used for seting signals of: DTR, DCD, CTS/RTS */
814 /* We use SCIF's hardware for CTS/RTS, so don't need any for that. */
815 /* If you have signals for DTR and DCD, please implement here. */
818 static unsigned int sci_get_mctrl(struct uart_port
*port
)
820 /* This routine is used for geting signals of: DTR, DCD, DSR, RI,
823 return TIOCM_DTR
| TIOCM_RTS
| TIOCM_DSR
;
826 static void sci_start_tx(struct uart_port
*port
)
830 /* Set TIE (Transmit Interrupt Enable) bit in SCSCR */
831 ctrl
= sci_in(port
, SCSCR
);
832 ctrl
|= SCI_CTRL_FLAGS_TIE
;
833 sci_out(port
, SCSCR
, ctrl
);
836 static void sci_stop_tx(struct uart_port
*port
)
840 /* Clear TIE (Transmit Interrupt Enable) bit in SCSCR */
841 ctrl
= sci_in(port
, SCSCR
);
842 ctrl
&= ~SCI_CTRL_FLAGS_TIE
;
843 sci_out(port
, SCSCR
, ctrl
);
846 static void sci_start_rx(struct uart_port
*port
, unsigned int tty_start
)
850 /* Set RIE (Receive Interrupt Enable) bit in SCSCR */
851 ctrl
= sci_in(port
, SCSCR
);
852 ctrl
|= SCI_CTRL_FLAGS_RIE
| SCI_CTRL_FLAGS_REIE
;
853 sci_out(port
, SCSCR
, ctrl
);
856 static void sci_stop_rx(struct uart_port
*port
)
860 /* Clear RIE (Receive Interrupt Enable) bit in SCSCR */
861 ctrl
= sci_in(port
, SCSCR
);
862 ctrl
&= ~(SCI_CTRL_FLAGS_RIE
| SCI_CTRL_FLAGS_REIE
);
863 sci_out(port
, SCSCR
, ctrl
);
866 static void sci_enable_ms(struct uart_port
*port
)
868 /* Nothing here yet .. */
871 static void sci_break_ctl(struct uart_port
*port
, int break_state
)
873 /* Nothing here yet .. */
876 static int sci_startup(struct uart_port
*port
)
878 struct sci_port
*s
= to_sci_port(port
);
883 #ifdef CONFIG_HAVE_CLK
884 s
->clk
= clk_get(NULL
, "module_clk");
889 sci_start_rx(port
, 1);
894 static void sci_shutdown(struct uart_port
*port
)
896 struct sci_port
*s
= to_sci_port(port
);
905 #ifdef CONFIG_HAVE_CLK
911 static void sci_set_termios(struct uart_port
*port
, struct ktermios
*termios
,
912 struct ktermios
*old
)
914 unsigned int status
, baud
, smr_val
;
917 baud
= uart_get_baud_rate(port
, termios
, old
, 0, port
->uartclk
/16);
919 t
= SCBRR_VALUE(baud
, port
->uartclk
);
922 status
= sci_in(port
, SCxSR
);
923 } while (!(status
& SCxSR_TEND(port
)));
925 sci_out(port
, SCSCR
, 0x00); /* TE=0, RE=0, CKE1=0 */
927 if (port
->type
!= PORT_SCI
)
928 sci_out(port
, SCFCR
, SCFCR_RFRST
| SCFCR_TFRST
);
930 smr_val
= sci_in(port
, SCSMR
) & 3;
931 if ((termios
->c_cflag
& CSIZE
) == CS7
)
933 if (termios
->c_cflag
& PARENB
)
935 if (termios
->c_cflag
& PARODD
)
937 if (termios
->c_cflag
& CSTOPB
)
940 uart_update_timeout(port
, termios
->c_cflag
, baud
);
942 sci_out(port
, SCSMR
, smr_val
);
946 sci_out(port
, SCSMR
, (sci_in(port
, SCSMR
) & ~3) | 1);
949 sci_out(port
, SCSMR
, sci_in(port
, SCSMR
) & ~3);
951 sci_out(port
, SCBRR
, t
);
952 udelay((1000000+(baud
-1)) / baud
); /* Wait one bit interval */
955 sci_init_pins(port
, termios
->c_cflag
);
956 sci_out(port
, SCFCR
, (termios
->c_cflag
& CRTSCTS
) ? SCFCR_MCE
: 0);
958 sci_out(port
, SCSCR
, SCSCR_INIT(port
));
960 if ((termios
->c_cflag
& CREAD
) != 0)
961 sci_start_rx(port
, 0);
964 static const char *sci_type(struct uart_port
*port
)
966 switch (port
->type
) {
980 static void sci_release_port(struct uart_port
*port
)
982 /* Nothing here yet .. */
985 static int sci_request_port(struct uart_port
*port
)
987 /* Nothing here yet .. */
991 static void sci_config_port(struct uart_port
*port
, int flags
)
993 struct sci_port
*s
= to_sci_port(port
);
995 port
->type
= s
->type
;
997 if (port
->flags
& UPF_IOREMAP
&& !port
->membase
) {
998 port
->membase
= ioremap_nocache(port
->mapbase
, 0x40);
999 dev_err(port
->dev
, "can't remap port#%d\n", port
->line
);
1003 static int sci_verify_port(struct uart_port
*port
, struct serial_struct
*ser
)
1005 struct sci_port
*s
= to_sci_port(port
);
1007 if (ser
->irq
!= s
->irqs
[SCIx_TXI_IRQ
] || ser
->irq
> nr_irqs
)
1009 if (ser
->baud_base
< 2400)
1010 /* No paper tape reader for Mitch.. */
1016 static struct uart_ops sci_uart_ops
= {
1017 .tx_empty
= sci_tx_empty
,
1018 .set_mctrl
= sci_set_mctrl
,
1019 .get_mctrl
= sci_get_mctrl
,
1020 .start_tx
= sci_start_tx
,
1021 .stop_tx
= sci_stop_tx
,
1022 .stop_rx
= sci_stop_rx
,
1023 .enable_ms
= sci_enable_ms
,
1024 .break_ctl
= sci_break_ctl
,
1025 .startup
= sci_startup
,
1026 .shutdown
= sci_shutdown
,
1027 .set_termios
= sci_set_termios
,
1029 .release_port
= sci_release_port
,
1030 .request_port
= sci_request_port
,
1031 .config_port
= sci_config_port
,
1032 .verify_port
= sci_verify_port
,
1033 #ifdef CONFIG_CONSOLE_POLL
1034 .poll_get_char
= sci_poll_get_char
,
1035 .poll_put_char
= sci_poll_put_char
,
1039 static void __init
sci_init_ports(void)
1041 static int first
= 1;
1049 for (i
= 0; i
< SCI_NPORTS
; i
++) {
1050 sci_ports
[i
].port
.ops
= &sci_uart_ops
;
1051 sci_ports
[i
].port
.iotype
= UPIO_MEM
;
1052 sci_ports
[i
].port
.line
= i
;
1053 sci_ports
[i
].port
.fifosize
= 1;
1055 #if defined(__H8300H__) || defined(__H8300S__)
1057 sci_ports
[i
].enable
= h8300_sci_enable
;
1058 sci_ports
[i
].disable
= h8300_sci_disable
;
1060 sci_ports
[i
].port
.uartclk
= CONFIG_CPU_CLOCK
;
1061 #elif defined(CONFIG_HAVE_CLK)
1063 * XXX: We should use a proper SCI/SCIF clock
1066 struct clk
*clk
= clk_get(NULL
, "module_clk");
1067 sci_ports
[i
].port
.uartclk
= clk_get_rate(clk
);
1071 #error "Need a valid uartclk"
1074 sci_ports
[i
].break_timer
.data
= (unsigned long)&sci_ports
[i
];
1075 sci_ports
[i
].break_timer
.function
= sci_break_timer
;
1077 init_timer(&sci_ports
[i
].break_timer
);
1081 #ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
1082 static struct tty_driver
*serial_console_device(struct console
*co
, int *index
)
1084 struct uart_driver
*p
= &sci_uart_driver
;
1086 return p
->tty_driver
;
1089 static void serial_console_putchar(struct uart_port
*port
, int ch
)
1091 sci_poll_put_char(port
, ch
);
1095 * Print a string to the serial port trying not to disturb
1096 * any possible real use of the port...
1098 static void serial_console_write(struct console
*co
, const char *s
,
1101 struct uart_port
*port
= co
->data
;
1102 unsigned short bits
;
1104 uart_console_write(co
->data
, s
, count
, serial_console_putchar
);
1106 /* wait until fifo is empty and last bit has been transmitted */
1107 bits
= SCxSR_TDxE(port
) | SCxSR_TEND(port
);
1108 while ((sci_in(port
, SCxSR
) & bits
) != bits
)
1112 static int __init
serial_console_setup(struct console
*co
, char *options
)
1114 struct sci_port
*sci_port
;
1115 struct uart_port
*port
;
1123 * Check whether an invalid uart number has been specified, and
1124 * if so, search for the first available port that does have
1127 if (co
->index
>= SCI_NPORTS
)
1130 sci_port
= &sci_ports
[co
->index
];
1131 port
= &sci_port
->port
;
1135 * Also need to check port->type, we don't actually have any
1136 * UPIO_PORT ports, but uart_report_port() handily misreports
1137 * it anyways if we don't have a port available by the time this is
1143 #ifdef CONFIG_HAVE_CLK
1145 sci_port
->clk
= clk_get(NULL
, "module_clk");
1148 if (port
->flags
& UPF_IOREMAP
)
1149 sci_config_port(port
, 0);
1151 if (sci_port
->enable
)
1152 sci_port
->enable(port
);
1155 uart_parse_options(options
, &baud
, &parity
, &bits
, &flow
);
1157 ret
= uart_set_options(port
, co
, baud
, parity
, bits
, flow
);
1158 #if defined(__H8300H__) || defined(__H8300S__)
1159 /* disable rx interrupt */
1166 static struct console serial_console
= {
1168 .device
= serial_console_device
,
1169 .write
= serial_console_write
,
1170 .setup
= serial_console_setup
,
1171 .flags
= CON_PRINTBUFFER
,
1175 static int __init
sci_console_init(void)
1178 register_console(&serial_console
);
1181 console_initcall(sci_console_init
);
1182 #endif /* CONFIG_SERIAL_SH_SCI_CONSOLE */
1184 #if defined(CONFIG_SERIAL_SH_SCI_CONSOLE)
1185 #define SCI_CONSOLE (&serial_console)
1187 #define SCI_CONSOLE 0
1190 static char banner
[] __initdata
=
1191 KERN_INFO
"SuperH SCI(F) driver initialized\n";
1193 static struct uart_driver sci_uart_driver
= {
1194 .owner
= THIS_MODULE
,
1195 .driver_name
= "sci",
1196 .dev_name
= "ttySC",
1198 .minor
= SCI_MINOR_START
,
1200 .cons
= SCI_CONSOLE
,
1204 static int __devexit
sci_remove(struct platform_device
*dev
)
1206 struct sh_sci_priv
*priv
= platform_get_drvdata(dev
);
1208 unsigned long flags
;
1210 #ifdef CONFIG_HAVE_CLK
1211 cpufreq_unregister_notifier(&priv
->clk_nb
, CPUFREQ_TRANSITION_NOTIFIER
);
1214 spin_lock_irqsave(&priv
->lock
, flags
);
1215 list_for_each_entry(p
, &priv
->ports
, node
)
1216 uart_remove_one_port(&sci_uart_driver
, &p
->port
);
1218 spin_unlock_irqrestore(&priv
->lock
, flags
);
1224 static int __devinit
sci_probe_single(struct platform_device
*dev
,
1226 struct plat_sci_port
*p
,
1227 struct sci_port
*sciport
)
1229 struct sh_sci_priv
*priv
= platform_get_drvdata(dev
);
1230 unsigned long flags
;
1234 if (unlikely(index
>= SCI_NPORTS
)) {
1235 dev_notice(&dev
->dev
, "Attempting to register port "
1236 "%d when only %d are available.\n",
1237 index
+1, SCI_NPORTS
);
1238 dev_notice(&dev
->dev
, "Consider bumping "
1239 "CONFIG_SERIAL_SH_SCI_NR_UARTS!\n");
1243 sciport
->port
.mapbase
= p
->mapbase
;
1245 if (p
->mapbase
&& !p
->membase
) {
1246 if (p
->flags
& UPF_IOREMAP
) {
1247 p
->membase
= ioremap_nocache(p
->mapbase
, 0x40);
1248 if (IS_ERR(p
->membase
))
1249 return PTR_ERR(p
->membase
);
1252 * For the simple (and majority of) cases
1253 * where we don't need to do any remapping,
1254 * just cast the cookie directly.
1256 p
->membase
= (void __iomem
*)p
->mapbase
;
1260 sciport
->port
.membase
= p
->membase
;
1262 sciport
->port
.irq
= p
->irqs
[SCIx_TXI_IRQ
];
1263 sciport
->port
.flags
= p
->flags
;
1264 sciport
->port
.dev
= &dev
->dev
;
1266 sciport
->type
= sciport
->port
.type
= p
->type
;
1268 memcpy(&sciport
->irqs
, &p
->irqs
, sizeof(p
->irqs
));
1270 ret
= uart_add_one_port(&sci_uart_driver
, &sciport
->port
);
1273 if (p
->flags
& UPF_IOREMAP
)
1274 iounmap(p
->membase
);
1279 INIT_LIST_HEAD(&sciport
->node
);
1281 spin_lock_irqsave(&priv
->lock
, flags
);
1282 list_add(&sciport
->node
, &priv
->ports
);
1283 spin_unlock_irqrestore(&priv
->lock
, flags
);
1289 * Register a set of serial devices attached to a platform device. The
1290 * list is terminated with a zero flags entry, which means we expect
1291 * all entries to have at least UPF_BOOT_AUTOCONF set. Platforms that need
1292 * remapping (such as sh64) should also set UPF_IOREMAP.
1294 static int __devinit
sci_probe(struct platform_device
*dev
)
1296 struct plat_sci_port
*p
= dev
->dev
.platform_data
;
1297 struct sh_sci_priv
*priv
;
1298 int i
, ret
= -EINVAL
;
1300 priv
= kzalloc(sizeof(*priv
), GFP_KERNEL
);
1304 INIT_LIST_HEAD(&priv
->ports
);
1305 spin_lock_init(&priv
->lock
);
1306 platform_set_drvdata(dev
, priv
);
1308 #ifdef CONFIG_HAVE_CLK
1309 priv
->clk_nb
.notifier_call
= sci_notifier
;
1310 cpufreq_register_notifier(&priv
->clk_nb
, CPUFREQ_TRANSITION_NOTIFIER
);
1313 if (dev
->id
!= -1) {
1314 ret
= sci_probe_single(dev
, dev
->id
, p
, &sci_ports
[dev
->id
]);
1318 for (i
= 0; p
&& p
->flags
!= 0; p
++, i
++) {
1319 ret
= sci_probe_single(dev
, i
, p
, &sci_ports
[i
]);
1325 #ifdef CONFIG_SH_STANDARD_BIOS
1326 sh_bios_gdb_detach();
1336 static int sci_suspend(struct platform_device
*dev
, pm_message_t state
)
1338 struct sh_sci_priv
*priv
= platform_get_drvdata(dev
);
1340 unsigned long flags
;
1342 spin_lock_irqsave(&priv
->lock
, flags
);
1343 list_for_each_entry(p
, &priv
->ports
, node
)
1344 uart_suspend_port(&sci_uart_driver
, &p
->port
);
1346 spin_unlock_irqrestore(&priv
->lock
, flags
);
1351 static int sci_resume(struct platform_device
*dev
)
1353 struct sh_sci_priv
*priv
= platform_get_drvdata(dev
);
1355 unsigned long flags
;
1357 spin_lock_irqsave(&priv
->lock
, flags
);
1358 list_for_each_entry(p
, &priv
->ports
, node
)
1359 uart_resume_port(&sci_uart_driver
, &p
->port
);
1361 spin_unlock_irqrestore(&priv
->lock
, flags
);
1366 static struct platform_driver sci_driver
= {
1368 .remove
= __devexit_p(sci_remove
),
1369 .suspend
= sci_suspend
,
1370 .resume
= sci_resume
,
1373 .owner
= THIS_MODULE
,
1377 static int __init
sci_init(void)
1385 ret
= uart_register_driver(&sci_uart_driver
);
1386 if (likely(ret
== 0)) {
1387 ret
= platform_driver_register(&sci_driver
);
1389 uart_unregister_driver(&sci_uart_driver
);
1395 static void __exit
sci_exit(void)
1397 platform_driver_unregister(&sci_driver
);
1398 uart_unregister_driver(&sci_uart_driver
);
1401 module_init(sci_init
);
1402 module_exit(sci_exit
);
1404 MODULE_LICENSE("GPL");
1405 MODULE_ALIAS("platform:sh-sci");