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don't do a DVD_Mount for GC-mode on Wii, add ifdef for Wii-only SMB code
[libogc.git] / libogc / gx.c
blob263ec259368063a30bb33874f61e40f6a2636453
1 #include <stdlib.h>
2 #include <string.h>
3 #include <errno.h>
4 #include <math.h>
5 #include "asm.h"
6 #include "processor.h"
7 #include "irq.h"
8 #include "lwp.h"
9 #include "system.h"
10 #include "video.h"
11 #include "video_types.h"
12 #include "lwp_watchdog.h"
13 #include "gx.h"
14 #include "gx_regdef.h"
15
16 //#define _GP_DEBUG
17 #define TEXCACHE_TESTING
18
19
20 #define GX_FINISH 2
21
22 #if defined(HW_DOL)
23 #define LARGE_NUMBER (1024*1024)
24 #elif defined(HW_RVL)
25 #define LARGE_NUMBER (1.0e+18f)
26 #endif
27
28 #define _SHIFTL(v, s, w) \
29 ((u32) (((u32)(v) & ((0x01 << (w)) - 1)) << (s)))
30 #define _SHIFTR(v, s, w) \
31 ((u32)(((u32)(v) >> (s)) & ((0x01 << (w)) - 1)))
32
33 #define GX_LOAD_BP_REG(x) \
34 do { \
35 wgPipe->U8 = 0x61; \
36 wgPipe->U32 = (u32)(x); \
37 } while(0)
38
39 #define GX_LOAD_CP_REG(x, y) \
40 do { \
41 wgPipe->U8 = 0x08; \
42 wgPipe->U8 = (u8)(x); \
43 wgPipe->U32 = (u32)(y); \
44 } while(0)
45
46 #define GX_LOAD_XF_REG(x, y) \
47 do { \
48 wgPipe->U8 = 0x10; \
49 wgPipe->U32 = (u32)((x)&0xffff); \
50 wgPipe->U32 = (u32)(y); \
51 } while(0)
52
53 #define GX_LOAD_XF_REGS(x, n) \
54 do { \
55 wgPipe->U8 = 0x10; \
56 wgPipe->U32 = (u32)(((((n)&0xffff)-1)<<16)|((x)&0xffff)); \
57 } while(0)
58
59 #define XY(x, y) (((y) << 10) | (x))
60
61 #define GX_DEFAULT_BG {64,64,64,255}
62 #define BLACK {0,0,0,0}
63 #define WHITE {255,255,255,255}
64
65 WGPipe* const wgPipe = (WGPipe*)0xCC008000;
66
67 static GXFifoObj _gpfifo;
68 static GXFifoObj _cpufifo;
69 static GXFifoObj _gxfifoobj;
70 static GXFifoObj _gx_dl_fifoobj;
71 static GXFifoObj _gx_old_cpufifo;
72 static void *_gxcurrbp = NULL;
73 static lwp_t _gxcurrentlwp = LWP_THREAD_NULL;
74
75 static u32 _gxcpufifoready = 0;
76 static u32 _gxgpfifoready = 0;
77 static u32 _cpgplinked = 0;
78 static u16 _gxgpstatus = 0;
79 static vu32 _gxoverflowsuspend = 0;
80 static vu32 _gxoverflowcount = 0;
81 static vu32 _gxfinished = 0;
82 static lwpq_t _gxwaitfinish;
83
84 static GXBreakPtCallback breakPtCB = NULL;
85 static GXDrawDoneCallback drawDoneCB = NULL;
86 static GXDrawSyncCallback tokenCB = NULL;
87
88 static GXTexRegionCallback regionCB = NULL;
89 static GXTlutRegionCallback tlut_regionCB = NULL;
90
91 static vu32* const _piReg = (u32*)0xCC003000;
92 static vu16* const _cpReg = (u16*)0xCC000000;
93 static vu16* const _peReg = (u16*)0xCC001000;
94 static vu16* const _memReg = (u16*)0xCC004000;
95
96 static u8 _gxtevcolid[9] = {0,1,0,1,0,1,7,5,6};
97 static u8 _gxtexmode0ids[8] = {0x80,0x81,0x82,0x83,0xA0,0xA1,0xA2,0xA3};
98 static u8 _gxtexmode1ids[8] = {0x84,0x85,0x86,0x87,0xA4,0xA5,0xA6,0xA7};
99 static u8 _gxteximg0ids[8] = {0x88,0x89,0x8A,0x8B,0xA8,0xA9,0xAA,0xAB};
100 static u8 _gxteximg1ids[8] = {0x8C,0x8D,0x8E,0x8F,0xAC,0xAD,0xAE,0xAF};
101 static u8 _gxteximg2ids[8] = {0x90,0x91,0x92,0x93,0xB0,0xB1,0xB2,0xB3};
102 static u8 _gxteximg3ids[8] = {0x94,0x95,0x96,0x97,0xB4,0xB5,0xB6,0xB7};
103 static u8 _gxtextlutids[8] = {0x98,0x99,0x9A,0x9B,0xB8,0xB9,0xBA,0xBB};
104
105 #if defined(HW_RVL)
106 static u32 _gxtexregionaddrtable[48] =
107 {
108 0x00000000,0x00010000,0x00020000,0x00030000,
109 0x00040000,0x00050000,0x00060000,0x00070000,
110 0x00008000,0x00018000,0x00028000,0x00038000,
111 0x00048000,0x00058000,0x00068000,0x00078000,
112 0x00000000,0x00090000,0x00020000,0x000B0000,
113 0x00040000,0x00098000,0x00060000,0x000B8000,
114 0x00080000,0x00010000,0x000A0000,0x00030000,
115 0x00088000,0x00050000,0x000A8000,0x00070000,
116 0x00000000,0x00090000,0x00020000,0x000B0000,
117 0x00040000,0x00090000,0x00060000,0x000B0000,
118 0x00080000,0x00010000,0x000A0000,0x00030000,
119 0x00080000,0x00050000,0x000A0000,0x00070000
120 };
121 #endif
122
123
124 extern u8 __gxregs[];
125 static struct __gx_regdef *__gx = (struct __gx_regdef*)__gxregs;
126 static u8 _gx_saved_data[STRUCT_REGDEF_SIZE] ATTRIBUTE_ALIGN(32);
127
128 static s32 __gx_onreset(s32 final);
129
130 static sys_resetinfo __gx_resetinfo = {
131 {},
132 __gx_onreset,
133 127
134 };
135
136 #ifdef _GP_DEBUG
137 extern int printk(const char *fmt,...);
138 #endif
139
140 static __inline__ BOOL IsWriteGatherBufferEmpty()
141 {
142 return !(mfwpar()&1);
143 }
144
145 static __inline__ void DisableWriteGatherPipe()
146 {
147 mthid2((mfhid2()&~0x40000000));
148 }
149
150 static __inline__ void EnableWriteGatherPipe()
151 {
152 mtwpar(0x0C008000);
153 mthid2((mfhid2()|0x40000000));
154 }
155
156 static __inline__ void __GX_ResetWriteGatherPipe()
157 {
158 while(mfwpar()&1);
159 mtwpar(0x0C008000);
160 }
161
162 static __inline__ void __GX_FifoLink(u8 enable)
163 {
164 __gx->cpCRreg = ((__gx->cpCRreg&~0x10)|(_SHIFTL(enable,4,1)));
165 _cpReg[1] = __gx->cpCRreg;
166 }
167
168 static __inline__ void __GX_WriteFifoIntReset(u8 inthi,u8 intlo)
169 {
170 __gx->cpCLreg = ((__gx->cpCLreg&~0x03)|(_SHIFTL(intlo,1,1))|(inthi&1));
171 _cpReg[2] = __gx->cpCLreg;
172 }
173
174 static __inline__ void __GX_WriteFifoIntEnable(u8 inthi, u8 intlo)
175 {
176 __gx->cpCRreg = ((__gx->cpCRreg&~0x0C)|(_SHIFTL(intlo,3,1))|(_SHIFTL(inthi,2,1)));
177 _cpReg[1] = __gx->cpCRreg;
178 }
179
180 static __inline__ void __GX_FifoReadEnable()
181 {
182 __gx->cpCRreg = ((__gx->cpCRreg&~0x01)|1);
183 _cpReg[1] = __gx->cpCRreg;
184 }
185
186 static __inline__ void __GX_FifoReadDisable()
187 {
188 __gx->cpCRreg = ((__gx->cpCRreg&~0x01)|0);
189 _cpReg[1] = __gx->cpCRreg;
190 }
191
192 static s32 __gx_onreset(s32 final)
193 {
194 if(final==FALSE) {
195 GX_Flush();
196 GX_AbortFrame();
197 }
198 return 1;
199 }
200
201 static u32 __GX_IsGPCPUFifoLinked()
202 {
203 return _cpgplinked;
204 }
205
206 static u32 __GX_IsGPFifoReady()
207 {
208 return _gxgpfifoready;
209 }
210
211 static u32 __GX_IsCPUFifoReady()
212 {
213 return _gxcpufifoready;
214 }
215
216 static u32 __GX_CPGPLinkCheck()
217 {
218 struct __gxfifo *gpfifo = (struct __gxfifo*)&_gpfifo;
219 struct __gxfifo *cpufifo = (struct __gxfifo*)&_cpufifo;
220
221 if(!_gxcpufifoready || !_gxgpfifoready) return 0;
222
223 if((cpufifo->buf_start==gpfifo->buf_start)&&(cpufifo->buf_end==gpfifo->buf_end)) return 1;
224
225 return 0;
226 }
227
228 static void __GX_InitRevBits()
229 {
230 s32 i;
231
232 i=0;
233 while(i<8) {
234 __gx->VAT0reg[i] = 0x40000000;
235 __gx->VAT1reg[i] = 0x80000000;
236 GX_LOAD_CP_REG((0x0080|i),__gx->VAT1reg[i]);
237 i++;
238 }
239
240 GX_LOAD_XF_REG(0x1000,0x3f);
241 GX_LOAD_XF_REG(0x1012,0x01);
242
243 GX_LOAD_BP_REG(0x5800000f);
244
245 }
246
247 static void __GX_WaitAbort(u32 delay)
248 {
249 u64 start,end;
250
251 start = gettime();
252 while(1) {
253 end = gettime();
254 if(diff_ticks(start,end)>=(u64)delay) break;
255 };
256 }
257
258 static u32 __GX_ReadMemCounterU32(u32 reg)
259 {
260 u16 lcnt,ucnt,tmp;
261
262 tmp = _memReg[reg];
263 do {
264 ucnt = tmp;
265 lcnt = _memReg[reg+1];
266 tmp = _memReg[reg];
267 } while(tmp!=ucnt);
268 return (u32)((ucnt<<16)|lcnt);
269 }
270
271 static void __GX_WaitAbortPixelEngine()
272 {
273 u32 cnt,tmp;
274
275 cnt = __GX_ReadMemCounterU32(39);
276 do {
277 tmp = cnt;
278 __GX_WaitAbort(8);
279 cnt = __GX_ReadMemCounterU32(39);
280 } while(cnt!=tmp);
281 }
282
283 static void __GX_Abort()
284 {
285 if(__gx->gxFifoInited && __GX_IsGPFifoReady())
286 __GX_WaitAbortPixelEngine();
287
288 _piReg[6] = 1;
289 __GX_WaitAbort(50);
290
291 _piReg[6] = 0;
292 __GX_WaitAbort(5);
293 }
294
295 static void __GX_SaveFifo()
296 {
297 s32 rdwt_dst;
298 u32 level,val;
299 struct __gxfifo *cpufifo = (struct __gxfifo*)&_cpufifo;
300 struct __gxfifo *gpfifo = (struct __gxfifo*)&_gpfifo;
301
302 _CPU_ISR_Disable(level);
303
304 if(_gxcpufifoready) {
305 val = _piReg[0x05];
306 cpufifo->wt_ptr = (u32)MEM_PHYSICAL_TO_K0((val&0x1FFFFFE0));
307 cpufifo->fifo_wrap = ((val&0x20000000)==0x20000000);
308 }
309
310 if(_gxgpfifoready) {
311 gpfifo->rd_ptr = (u32)MEM_PHYSICAL_TO_K0(_SHIFTL(_cpReg[29],16,16)|(_cpReg[28]&0xffff));
312 gpfifo->rdwt_dst = (_SHIFTL(_cpReg[25],16,16)|(_cpReg[24]&0xffff));
313 }
314
315 if(_cpgplinked) {
316 cpufifo->rd_ptr = gpfifo->rd_ptr;
317 cpufifo->rdwt_dst = gpfifo->rdwt_dst;
318 gpfifo->wt_ptr = cpufifo->wt_ptr;
319 } else if(_gxcpufifoready) {
320 rdwt_dst = (cpufifo->wt_ptr - cpufifo->rd_ptr);
321 if(rdwt_dst<0) cpufifo->rdwt_dst = (cpufifo->rdwt_dst + cpufifo->size);
322 else cpufifo->rdwt_dst = rdwt_dst;
323 }
324
325 _CPU_ISR_Restore(level);
326 }
327
328 static void __GX_CleanGPFifo()
329 {
330 u32 level;
331 struct __gxfifo *gpfifo = (struct __gxfifo*)&_gpfifo;
332 struct __gxfifo *cpufifo = (struct __gxfifo*)&_cpufifo;
333
334 if(!_gxgpfifoready) return;
335
336 _CPU_ISR_Disable(level);
337 __GX_FifoReadDisable();
338 __GX_WriteFifoIntEnable(FALSE,FALSE);
339
340 gpfifo->rd_ptr = gpfifo->wt_ptr;
341 gpfifo->rdwt_dst = 0;
342
343 /* setup rd<->wd dist */
344 _cpReg[24] = _SHIFTL(gpfifo->rdwt_dst,0,16);
345 _cpReg[25] = _SHIFTR(gpfifo->rdwt_dst,16,16);
346
347 /* setup wt ptr */
348 _cpReg[26] = _SHIFTL(MEM_VIRTUAL_TO_PHYSICAL(gpfifo->wt_ptr),0,16);
349 _cpReg[27] = _SHIFTR(MEM_VIRTUAL_TO_PHYSICAL(gpfifo->wt_ptr),16,16);
350
351 /* setup rd ptr */
352 _cpReg[28] = _SHIFTL(MEM_VIRTUAL_TO_PHYSICAL(gpfifo->rd_ptr),0,16);
353 _cpReg[29] = _SHIFTR(MEM_VIRTUAL_TO_PHYSICAL(gpfifo->rd_ptr),16,16);
354 ppcsync();
355
356 if(_cpgplinked) {
357 cpufifo->rd_ptr = gpfifo->rd_ptr;
358 cpufifo->wt_ptr = gpfifo->wt_ptr;
359 cpufifo->rdwt_dst = gpfifo->rdwt_dst;
360
361 _piReg[5] = (cpufifo->wt_ptr&0x1FFFFFE0);
362 __GX_WriteFifoIntEnable(TRUE,FALSE);
363 __GX_FifoLink(TRUE);
364 }
365 __gx->cpCRreg &= ~0x22;
366 _cpReg[1] = __gx->cpCRreg;
367 breakPtCB = NULL;
368
369 __GX_WriteFifoIntReset(TRUE,TRUE);
370 __GX_FifoReadEnable();
371 _CPU_ISR_Restore(level);
372 }
373
374 static void __GXOverflowHandler()
375 {
376 if(!_gxoverflowsuspend) {
377 _gxoverflowsuspend = 1;
378 _gxoverflowcount++;
379 __GX_WriteFifoIntEnable(GX_DISABLE,GX_ENABLE);
380 __GX_WriteFifoIntReset(GX_TRUE,GX_FALSE);
381 LWP_SuspendThread(_gxcurrentlwp);
382 }
383 }
384
385 static void __GXUnderflowHandler()
386 {
387 if(_gxoverflowsuspend) {
388 _gxoverflowsuspend = 0;
389 LWP_ResumeThread(_gxcurrentlwp);
390 __GX_WriteFifoIntReset(GX_TRUE,GX_TRUE);
391 __GX_WriteFifoIntEnable(GX_ENABLE,GX_DISABLE);
392 }
393 }
394
395 static void __GXCPInterruptHandler(u32 irq,void *ctx)
396 {
397 __gx->cpSRreg = _cpReg[0];
398
399 if((__gx->cpCRreg&0x08) && (__gx->cpSRreg&0x02))
400 __GXUnderflowHandler();
401
402 if((__gx->cpCRreg&0x04) && (__gx->cpSRreg&0x01))
403 __GXOverflowHandler();
404
405 if((__gx->cpCRreg&0x20) && (__gx->cpSRreg&0x10)) {
406 __gx->cpCRreg &= ~0x20;
407 _cpReg[1] = __gx->cpCRreg;
408 if(breakPtCB)
409 breakPtCB();
410 }
411 }
412
413 static void __GXTokenInterruptHandler(u32 irq,void *ctx)
414 {
415 u16 token = _peReg[7];
416
417 if(tokenCB)
418 tokenCB(token);
419
420 _peReg[5] = (_peReg[5]&~0x04)|0x04;
421 }
422
423 static void __GXFinishInterruptHandler(u32 irq,void *ctx)
424 {
425 #ifdef _GP_DEBUG
426 printf("__GXFinishInterruptHandler()\n");
427 #endif
428 _peReg[5] = (_peReg[5]&~0x08)|0x08;
429 _gxfinished = 1;
430
431 if(drawDoneCB)
432 drawDoneCB();
433
434 LWP_ThreadBroadcast(_gxwaitfinish);
435 }
436
437 static void __GX_PEInit()
438 {
439 IRQ_Request(IRQ_PI_PETOKEN,__GXTokenInterruptHandler,NULL);
440 __UnmaskIrq(IRQMASK(IRQ_PI_PETOKEN));
441
442 IRQ_Request(IRQ_PI_PEFINISH,__GXFinishInterruptHandler,NULL);
443 __UnmaskIrq(IRQMASK(IRQ_PI_PEFINISH));
444
445 _peReg[5] = 0x0F;
446 }
447
448 static void __GX_FifoInit()
449 {
450 IRQ_Request(IRQ_PI_CP,__GXCPInterruptHandler,NULL);
451 __UnmaskIrq(IRQMASK(IRQ_PI_CP));
452
453 memset(&_cpufifo,0,sizeof(GXFifoObj));
454 memset(&_gpfifo,0,sizeof(GXFifoObj));
455
456 _gxcpufifoready = 0;
457 _gxgpfifoready = 0;
458 _cpgplinked = 0;
459 _gxoverflowsuspend = 0;
460 _gxcurrentlwp = LWP_GetSelf();
461 }
462
463 static void __GX_SetTmemConfig(u8 nr)
464 {
465 if(nr==0) {
466 // Set_TextureImage0-3, GXTexMapID=0-3 tmem_offset=00000000, cache_width=32 kb, cache_height=32 kb, image_type=cached
467 GX_LOAD_BP_REG(0x8c0d8000);
468 GX_LOAD_BP_REG(0x900dc000);
469 GX_LOAD_BP_REG(0x8d0d8400);
470 GX_LOAD_BP_REG(0x910dc400);
471 GX_LOAD_BP_REG(0x8e0d8800);
472 GX_LOAD_BP_REG(0x920dc800);
473 GX_LOAD_BP_REG(0x8f0d8c00);
474 GX_LOAD_BP_REG(0x930dcc00);
475
476 // Set_TextureImage0-3, GXTexMapID=4-7 tmem_offset=00010000, cache_width=32 kb, cache_height=32 kb, image_type=cached
477 GX_LOAD_BP_REG(0xac0d9000);
478 GX_LOAD_BP_REG(0xb00dd000);
479 GX_LOAD_BP_REG(0xad0d9400);
480 GX_LOAD_BP_REG(0xb10dd400);
481 GX_LOAD_BP_REG(0xae0d9800);
482 GX_LOAD_BP_REG(0xb20dd800);
483 GX_LOAD_BP_REG(0xaf0d9c00);
484 GX_LOAD_BP_REG(0xb30ddc00);
485
486 return;
487 }
488
489 if(nr==1) {
490 // Set_TextureImage0-3, GXTexMapID=0-3 tmem_offset=00000000, cache_width=32 kb, cache_height=32 kb, image_type=cached
491 GX_LOAD_BP_REG(0x8c0d8000);
492 GX_LOAD_BP_REG(0x900dc000);
493 GX_LOAD_BP_REG(0x8d0d8800);
494 GX_LOAD_BP_REG(0x910dc800);
495 GX_LOAD_BP_REG(0x8e0d9000);
496 GX_LOAD_BP_REG(0x920dd000);
497 GX_LOAD_BP_REG(0x8f0d9800);
498 GX_LOAD_BP_REG(0x930dd800);
499
500 // Set_TextureImage0-3, GXTexMapID=4-7 tmem_offset=00010000, cache_width=32 kb, cache_height=32 kb, image_type=cached
501 GX_LOAD_BP_REG(0xac0da000);
502 GX_LOAD_BP_REG(0xb00de000);
503 GX_LOAD_BP_REG(0xad0da800);
504 GX_LOAD_BP_REG(0xb10de800);
505 GX_LOAD_BP_REG(0xae0db000);
506 GX_LOAD_BP_REG(0xb20df000);
507 GX_LOAD_BP_REG(0xaf0db800);
508 GX_LOAD_BP_REG(0xb30df800);
509
510 return;
511 }
512
513 if(nr==2) {
514 // Set_TextureImage0-3, GXTexMapID=0-3 tmem_offset=00000000, cache_width=32 kb, cache_height=32 kb, image_type=cached
515 GX_LOAD_BP_REG(0x8c0d8000);
516 GX_LOAD_BP_REG(0x900dc000);
517 GX_LOAD_BP_REG(0x8d0d8800);
518 GX_LOAD_BP_REG(0x910dc800);
519 GX_LOAD_BP_REG(0x8e0d9000);
520 GX_LOAD_BP_REG(0x920dd000);
521 GX_LOAD_BP_REG(0x8f0d9800);
522 GX_LOAD_BP_REG(0x930dd800);
523
524 // Set_TextureImage0-3, GXTexMapID=4-7 tmem_offset=00010000, cache_width=32 kb, cache_height=32 kb, image_type=cached
525 GX_LOAD_BP_REG(0xac0da000);
526 GX_LOAD_BP_REG(0xb00dc400);
527 GX_LOAD_BP_REG(0xad0da800);
528 GX_LOAD_BP_REG(0xb10dcc00);
529 GX_LOAD_BP_REG(0xae0db000);
530 GX_LOAD_BP_REG(0xb20dd400);
531 GX_LOAD_BP_REG(0xaf0db800);
532 GX_LOAD_BP_REG(0xb30ddc00);
533
534 return;
535 }
536 }
537
538 #if defined(HW_RVL)
539 static GXTexRegion* __GXDefTexRegionCallback(GXTexObj *obj,u8 mapid)
540 {
541 u32 fmt,mipmap;
542 GXTexRegion *ret = NULL;
543
544 fmt = GX_GetTexObjFmt(obj);
545 mipmap = GX_GetTexObjMipMap(obj);
546 if(fmt>=GX_TF_CI4 && fmt<=GX_TF_CI14)
547 return &__gx->texRegion[mapid];
548 else if(fmt==GX_TF_CMPR)
549 ret = &__gx->texRegion[mapid];
550 else
551 ret = &__gx->texRegion[mapid+8];
552
553 if(mipmap) ret = &__gx->texRegion[mapid+16];
554
555 return ret;
556 }
557 #else
558 static GXTexRegion* __GXDefTexRegionCallback(GXTexObj *obj,u8 mapid)
559 {
560 u32 fmt;
561 u32 idx;
562 static u32 regionA = 0;
563 static u32 regionB = 0;
564 GXTexRegion *ret = NULL;
565
566 fmt = GX_GetTexObjFmt(obj);
567 if(fmt==0x0008 || fmt==0x0009 || fmt==0x000a) {
568 idx = regionB++;
569 ret = &__gx->texRegion[(idx&3)+8];
570 } else {
571 idx = regionA++;
572 ret = &__gx->texRegion[(idx&7)];
573 }
574 return ret;
575 }
576 #endif
577
578 static GXTlutRegion* __GXDefTlutRegionCallback(u32 tlut_name)
579 {
580 return &__gx->tlutRegion[tlut_name];
581 }
582
583 static void __GX_InitGX()
584 {
585 s32 i;
586 u32 flag;
587 GXRModeObj *rmode;
588 Mtx identity_matrix =
589 {
590 {1,0,0,0},
591 {0,1,0,0},
592 {0,0,1,0}
593 };
594
595 rmode = VIDEO_GetPreferredMode(NULL);
596
597 GX_SetCopyClear((GXColor)BLACK,0xffffff);
598 GX_SetTexCoordGen(GX_TEXCOORD0,GX_TG_MTX2x4,GX_TG_TEX0,GX_IDENTITY);
599 GX_SetTexCoordGen(GX_TEXCOORD1,GX_TG_MTX2x4,GX_TG_TEX1,GX_IDENTITY);
600 GX_SetTexCoordGen(GX_TEXCOORD2,GX_TG_MTX2x4,GX_TG_TEX2,GX_IDENTITY);
601 GX_SetTexCoordGen(GX_TEXCOORD3,GX_TG_MTX2x4,GX_TG_TEX3,GX_IDENTITY);
602 GX_SetTexCoordGen(GX_TEXCOORD4,GX_TG_MTX2x4,GX_TG_TEX4,GX_IDENTITY);
603 GX_SetTexCoordGen(GX_TEXCOORD5,GX_TG_MTX2x4,GX_TG_TEX5,GX_IDENTITY);
604 GX_SetTexCoordGen(GX_TEXCOORD6,GX_TG_MTX2x4,GX_TG_TEX6,GX_IDENTITY);
605 GX_SetTexCoordGen(GX_TEXCOORD7,GX_TG_MTX2x4,GX_TG_TEX7,GX_IDENTITY);
606 GX_SetNumTexGens(1);
607 GX_ClearVtxDesc();
608 GX_InvVtxCache();
609
610 GX_SetLineWidth(6,GX_TO_ZERO);
611 GX_SetPointSize(6,GX_TO_ZERO);
612
613 GX_EnableTexOffsets(GX_TEXCOORD0,GX_DISABLE,GX_DISABLE);
614 GX_EnableTexOffsets(GX_TEXCOORD1,GX_DISABLE,GX_DISABLE);
615 GX_EnableTexOffsets(GX_TEXCOORD2,GX_DISABLE,GX_DISABLE);
616 GX_EnableTexOffsets(GX_TEXCOORD3,GX_DISABLE,GX_DISABLE);
617 GX_EnableTexOffsets(GX_TEXCOORD4,GX_DISABLE,GX_DISABLE);
618 GX_EnableTexOffsets(GX_TEXCOORD5,GX_DISABLE,GX_DISABLE);
619 GX_EnableTexOffsets(GX_TEXCOORD6,GX_DISABLE,GX_DISABLE);
620 GX_EnableTexOffsets(GX_TEXCOORD7,GX_DISABLE,GX_DISABLE);
621
622 GX_LoadPosMtxImm(identity_matrix,GX_PNMTX0);
623 GX_LoadNrmMtxImm(identity_matrix,GX_PNMTX0);
624 GX_SetCurrentMtx(GX_PNMTX0);
625 GX_LoadTexMtxImm(identity_matrix,GX_IDENTITY,GX_MTX3x4);
626 GX_LoadTexMtxImm(identity_matrix,GX_DTTIDENTITY,GX_MTX3x4);
627
628 GX_SetViewport(0,0,rmode->fbWidth,rmode->efbHeight,0,1);
629 GX_SetCoPlanar(GX_DISABLE);
630 GX_SetCullMode(GX_CULL_BACK);
631 GX_SetClipMode(GX_CLIP_ENABLE);
632
633 GX_SetScissor(0,0,rmode->fbWidth,rmode->efbHeight);
634 GX_SetScissorBoxOffset(0,0);
635
636 GX_SetNumChans(0);
637
638 GX_SetChanCtrl(GX_COLOR0A0,GX_DISABLE,GX_SRC_REG,GX_SRC_VTX,GX_LIGHTNULL,GX_DF_NONE,GX_AF_NONE);
639 GX_SetChanAmbColor(GX_COLOR0A0,(GXColor)BLACK);
640 GX_SetChanMatColor(GX_COLOR0A0,(GXColor)WHITE);
641
642 GX_SetChanCtrl(GX_COLOR1A1,GX_DISABLE,GX_SRC_REG,GX_SRC_VTX,GX_LIGHTNULL,GX_DF_NONE,GX_AF_NONE);
643 GX_SetChanAmbColor(GX_COLOR1A1,(GXColor)BLACK);
644 GX_SetChanMatColor(GX_COLOR1A1,(GXColor)WHITE);
645
646 GX_InvalidateTexAll();
647 GX_SetTexRegionCallback(__GXDefTexRegionCallback);
648 GX_SetTlutRegionCallback(__GXDefTlutRegionCallback);
649
650 GX_SetTevOrder(GX_TEVSTAGE0,GX_TEXCOORD0,GX_TEXMAP0,GX_COLOR0A0);
651 GX_SetTevOrder(GX_TEVSTAGE1,GX_TEXCOORD1,GX_TEXMAP1,GX_COLOR0A0);
652 GX_SetTevOrder(GX_TEVSTAGE2,GX_TEXCOORD2,GX_TEXMAP2,GX_COLOR0A0);
653 GX_SetTevOrder(GX_TEVSTAGE3,GX_TEXCOORD3,GX_TEXMAP3,GX_COLOR0A0);
654 GX_SetTevOrder(GX_TEVSTAGE4,GX_TEXCOORD4,GX_TEXMAP4,GX_COLOR0A0);
655 GX_SetTevOrder(GX_TEVSTAGE5,GX_TEXCOORD5,GX_TEXMAP5,GX_COLOR0A0);
656 GX_SetTevOrder(GX_TEVSTAGE6,GX_TEXCOORD6,GX_TEXMAP6,GX_COLOR0A0);
657 GX_SetTevOrder(GX_TEVSTAGE7,GX_TEXCOORD7,GX_TEXMAP7,GX_COLOR0A0);
658 GX_SetTevOrder(GX_TEVSTAGE8,GX_TEXCOORDNULL,GX_TEXMAP_NULL,GX_COLORNULL);
659 GX_SetTevOrder(GX_TEVSTAGE9,GX_TEXCOORDNULL,GX_TEXMAP_NULL,GX_COLORNULL);
660 GX_SetTevOrder(GX_TEVSTAGE10,GX_TEXCOORDNULL,GX_TEXMAP_NULL,GX_COLORNULL);
661 GX_SetTevOrder(GX_TEVSTAGE11,GX_TEXCOORDNULL,GX_TEXMAP_NULL,GX_COLORNULL);
662 GX_SetTevOrder(GX_TEVSTAGE12,GX_TEXCOORDNULL,GX_TEXMAP_NULL,GX_COLORNULL);
663 GX_SetTevOrder(GX_TEVSTAGE13,GX_TEXCOORDNULL,GX_TEXMAP_NULL,GX_COLORNULL);
664 GX_SetTevOrder(GX_TEVSTAGE14,GX_TEXCOORDNULL,GX_TEXMAP_NULL,GX_COLORNULL);
665 GX_SetTevOrder(GX_TEVSTAGE15,GX_TEXCOORDNULL,GX_TEXMAP_NULL,GX_COLORNULL);
666 GX_SetNumTevStages(1);
667 GX_SetTevOp(GX_TEVSTAGE0,GX_REPLACE);
668 GX_SetAlphaCompare(GX_ALWAYS,0,GX_AOP_AND,GX_ALWAYS,0);
669 GX_SetZTexture(GX_ZT_DISABLE,GX_TF_Z8,0);
670 for(i=0;i<GX_MAX_TEVSTAGE;i++) {
671 GX_SetTevKColorSel(i,GX_TEV_KCSEL_1_4);
672 GX_SetTevKAlphaSel(i,GX_TEV_KASEL_1);
673 GX_SetTevSwapMode(i,GX_TEV_SWAP0,GX_TEV_SWAP0);
674 }
675
676 GX_SetTevSwapModeTable(GX_TEV_SWAP0,GX_CH_RED,GX_CH_GREEN,GX_CH_BLUE,GX_CH_ALPHA);
677 GX_SetTevSwapModeTable(GX_TEV_SWAP1,GX_CH_RED,GX_CH_RED,GX_CH_RED,GX_CH_ALPHA);
678 GX_SetTevSwapModeTable(GX_TEV_SWAP2,GX_CH_GREEN,GX_CH_GREEN,GX_CH_GREEN,GX_CH_ALPHA);
679 GX_SetTevSwapModeTable(GX_TEV_SWAP3,GX_CH_BLUE,GX_CH_BLUE,GX_CH_BLUE,GX_CH_ALPHA);
680 for(i=0;i<GX_MAX_TEVSTAGE;i++) {
681 GX_SetTevDirect(i);
682 }
683
684 GX_SetNumIndStages(0);
685 GX_SetIndTexCoordScale(GX_INDTEXSTAGE0,GX_ITS_1,GX_ITS_1);
686 GX_SetIndTexCoordScale(GX_INDTEXSTAGE1,GX_ITS_1,GX_ITS_1);
687 GX_SetIndTexCoordScale(GX_INDTEXSTAGE2,GX_ITS_1,GX_ITS_1);
688 GX_SetIndTexCoordScale(GX_INDTEXSTAGE3,GX_ITS_1,GX_ITS_1);
689
690 GX_SetFog(GX_FOG_NONE,0,1,0.1,1,(GXColor)BLACK);
691 GX_SetFogRangeAdj(GX_DISABLE,0,NULL);
692
693 GX_SetBlendMode(GX_BM_NONE,GX_BL_SRCALPHA,GX_BL_INVSRCALPHA,GX_LO_CLEAR);
694 GX_SetColorUpdate(GX_ENABLE);
695 GX_SetAlphaUpdate(GX_ENABLE);
696 GX_SetZMode(GX_ENABLE,GX_LEQUAL,GX_TRUE);
697 GX_SetZCompLoc(GX_TRUE);
698 GX_SetDither(GX_ENABLE);
699 GX_SetDstAlpha(GX_DISABLE,0);
700 GX_SetPixelFmt(GX_PF_RGB8_Z24,GX_ZC_LINEAR);
701
702 GX_SetFieldMask(GX_ENABLE,GX_ENABLE);
703
704 flag = 0;
705 if(rmode->viHeight==(rmode->xfbHeight<<1)) flag = 1;
706 GX_SetFieldMode(rmode->field_rendering,flag);
707
708 GX_SetCopyClear((GXColor)GX_DEFAULT_BG,0x00ffffff);
709 GX_SetDispCopySrc(0,0,rmode->fbWidth,rmode->efbHeight);
710 GX_SetDispCopyDst(rmode->fbWidth,rmode->efbHeight);
711 GX_SetDispCopyYScale(1.0);
712 GX_SetCopyClamp(GX_CLAMP_TOP|GX_CLAMP_BOTTOM);
713 GX_SetCopyFilter(GX_FALSE,NULL,GX_FALSE,NULL);
714 GX_SetDispCopyGamma(GX_GM_1_0);
715 GX_SetDispCopyFrame2Field(GX_COPY_PROGRESSIVE);
716 GX_ClearBoundingBox();
717
718 GX_PokeColorUpdate(GX_TRUE);
719 GX_PokeAlphaUpdate(GX_TRUE);
720 GX_PokeDither(GX_FALSE);
721 GX_PokeBlendMode(GX_BM_NONE,GX_BL_ZERO,GX_BL_ONE,GX_LO_SET);
722 GX_PokeAlphaMode(GX_ALWAYS,0);
723 GX_PokeAlphaRead(GX_READ_FF);
724 GX_PokeDstAlpha(GX_DISABLE,0);
725 GX_PokeZMode(GX_TRUE,GX_ALWAYS,GX_TRUE);
726
727 GX_SetGPMetric(GX_PERF0_NONE,GX_PERF1_NONE);
728 GX_ClearGPMetric();
729 }
730
731 static void __GX_FlushTextureState()
732 {
733 GX_LOAD_BP_REG(__gx->tevIndMask);
734 }
735
736 static void __GX_XfVtxSpecs()
737 {
738 u32 xfvtxspecs = 0;
739 u32 nrms,texs,cols;
740
741 cols = 0;
742 if(__gx->vcdLo&0x6000) cols++;
743 if(__gx->vcdLo&0x18000) cols++;
744
745 nrms = 0;
746 if(__gx->vcdNrms==1) nrms = 1;
747 else if(__gx->vcdNrms==2) nrms = 2;
748
749 texs = 0;
750 if(__gx->vcdHi&0x3) texs++;
751 if(__gx->vcdHi&0xc) texs++;
752 if(__gx->vcdHi&0x30) texs++;
753 if(__gx->vcdHi&0xc0) texs++;
754 if(__gx->vcdHi&0x300) texs++;
755 if(__gx->vcdHi&0xc00) texs++;
756 if(__gx->vcdHi&0x3000) texs++;
757 if(__gx->vcdHi&0xc000) texs++;
758
759 xfvtxspecs = (_SHIFTL(texs,4,4))|(_SHIFTL(nrms,2,2))|(cols&0x3);
760 GX_LOAD_XF_REG(0x1008,xfvtxspecs);
761 }
762
763 static void __GX_SetMatrixIndex(u32 mtx)
764 {
765 if(mtx<5) {
766 GX_LOAD_CP_REG(0x30,__gx->mtxIdxLo);
767 GX_LOAD_XF_REG(0x1018,__gx->mtxIdxLo);
768 } else {
769 GX_LOAD_CP_REG(0x40,__gx->mtxIdxHi);
770 GX_LOAD_XF_REG(0x1019,__gx->mtxIdxHi);
771 }
772 }
773
774 static void __GX_SendFlushPrim()
775 {
776 u32 tmp,tmp2,cnt;
777
778 tmp = (__gx->xfFlush*__gx->xfFlushExp);
779
780 wgPipe->U8 = 0x98;
781 wgPipe->U16 = __gx->xfFlush;
782
783 tmp2 = (tmp+3)/4;
784 if(tmp>0) {
785 cnt = tmp2/8;
786 while(cnt) {
787 wgPipe->U32 = 0;
788 wgPipe->U32 = 0;
789 wgPipe->U32 = 0;
790 wgPipe->U32 = 0;
791 wgPipe->U32 = 0;
792 wgPipe->U32 = 0;
793 wgPipe->U32 = 0;
794 wgPipe->U32 = 0;
795 cnt--;
796 }
797 tmp2 &= 0x0007;
798 if(tmp2) {
799 while(tmp2) {
800 wgPipe->U32 = 0;
801 tmp2--;
802 }
803 }
804 }
805 __gx->xfFlush = 1;
806 }
807
808 static void __GX_SetVCD()
809 {
810 GX_LOAD_CP_REG(0x50,__gx->vcdLo);
811 GX_LOAD_CP_REG(0x60,__gx->vcdHi);
812 __GX_XfVtxSpecs();
813 }
814
815 static void __GX_SetVAT()
816 {
817 u8 setvtx = 0;
818 s32 i;
819
820 for(i=0;i<8;i++) {
821 setvtx = (1<<i);
822 if(__gx->VATTable&setvtx) {
823 GX_LOAD_CP_REG((0x70+(i&7)),__gx->VAT0reg[i]);
824 GX_LOAD_CP_REG((0x80+(i&7)),__gx->VAT1reg[i]);
825 GX_LOAD_CP_REG((0x90+(i&7)),__gx->VAT2reg[i]);
826 }
827 }
828 __gx->VATTable = 0;
829 }
830
831 static void __SetSURegs(u8 texmap,u8 texcoord)
832 {
833 u32 reg;
834 u16 wd,ht;
835 u8 wrap_s,wrap_t;
836
837 wd = __gx->texMapSize[texmap]&0x3ff;
838 ht = _SHIFTR(__gx->texMapSize[texmap],10,10);
839 wrap_s = __gx->texMapWrap[texmap]&3;
840 wrap_t = _SHIFTR(__gx->texMapWrap[texmap],2,2);
841
842 reg = (texcoord&0x7);
843 __gx->suSsize[reg] = (__gx->suSsize[reg]&~0x0000ffff)|wd;
844 __gx->suTsize[reg] = (__gx->suTsize[reg]&~0x0000ffff)|ht;
845 __gx->suSsize[reg] = (__gx->suSsize[reg]&~0x00010000)|(_SHIFTL(wrap_s,16,1));
846 __gx->suTsize[reg] = (__gx->suTsize[reg]&~0x00010000)|(_SHIFTL(wrap_t,16,1));
847
848 GX_LOAD_BP_REG(__gx->suSsize[reg]);
849 GX_LOAD_BP_REG(__gx->suTsize[reg]);
850 }
851
852 static void __GX_SetSUTexRegs()
853 {
854 u32 i;
855 u32 indtev,dirtev;
856 u8 texcoord,texmap;
857 u32 tevreg,tevm,texcm;
858
859 dirtev = (_SHIFTR(__gx->genMode,10,4))+1;
860 indtev = _SHIFTR(__gx->genMode,16,3);
861
862 //indirect texture order
863 for(i=0;i<indtev;i++) {
864 switch(i) {
865 case GX_INDTEXSTAGE0:
866 texmap = __gx->tevRasOrder[2]&7;
867 texcoord = _SHIFTR(__gx->tevRasOrder[2],3,3);
868 break;
869 case GX_INDTEXSTAGE1:
870 texmap = _SHIFTR(__gx->tevRasOrder[2],6,3);
871 texcoord = _SHIFTR(__gx->tevRasOrder[2],9,3);
872 break;
873 case GX_INDTEXSTAGE2:
874 texmap = _SHIFTR(__gx->tevRasOrder[2],12,3);
875 texcoord = _SHIFTR(__gx->tevRasOrder[2],15,3);
876 break;
877 case GX_INDTEXSTAGE3:
878 texmap = _SHIFTR(__gx->tevRasOrder[2],18,3);
879 texcoord = _SHIFTR(__gx->tevRasOrder[2],21,3);
880 break;
881 default:
882 texmap = 0;
883 texcoord = 0;
884 break;
885 }
886
887 texcm = _SHIFTL(1,texcoord,1);
888 if(!(__gx->texCoordManually&texcm))
889 __SetSURegs(texmap,texcoord);
890 }
891
892 //direct texture order
893 for(i=0;i<dirtev;i++) {
894 tevreg = 3+(_SHIFTR(i,1,3));
895 texmap = (__gx->tevTexMap[i]&0xff);
896
897 if(i&1) texcoord = _SHIFTR(__gx->tevRasOrder[tevreg],15,3);
898 else texcoord = _SHIFTR(__gx->tevRasOrder[tevreg],3,3);
899
900 tevm = _SHIFTL(1,i,1);
901 texcm = _SHIFTL(1,texcoord,1);
902 if(texmap!=0xff && (__gx->tevTexCoordEnable&tevm) && !(__gx->texCoordManually&texcm)) {
903 __SetSURegs(texmap,texcoord);
904 }
905 }
906 }
907
908 static void __GX_SetGenMode()
909 {
910 GX_LOAD_BP_REG(__gx->genMode);
911 __gx->xfFlush = 0;
912 }
913
914 static void __GX_UpdateBPMask()
915 {
916 #if defined(HW_DOL)
917 u32 i;
918 u32 nbmp,nres;
919 u8 ntexmap;
920
921 nbmp = _SHIFTR(__gx->genMode,16,3);
922
923 nres = 0;
924 for(i=0;i<nbmp;i++) {
925 switch(i) {
926 case GX_INDTEXSTAGE0:
927 ntexmap = __gx->tevRasOrder[2]&7;
928 break;
929 case GX_INDTEXSTAGE1:
930 ntexmap = _SHIFTR(__gx->tevRasOrder[2],6,3);
931 break;
932 case GX_INDTEXSTAGE2:
933 ntexmap = _SHIFTR(__gx->tevRasOrder[2],12,3);
934 break;
935 case GX_INDTEXSTAGE3:
936 ntexmap = _SHIFTR(__gx->tevRasOrder[2],18,3);
937 break;
938 default:
939 ntexmap = 0;
940 break;
941 }
942 nres |= (1<<ntexmap);
943 }
944
945 if((__gx->tevIndMask&0xff)!=nres) {
946 __gx->tevIndMask = (__gx->tevIndMask&~0xff)|(nres&0xff);
947 GX_LOAD_BP_REG(__gx->tevIndMask);
948 }
949 #endif
950 }
951
952 static void __GX_SetIndirectMask(u32 mask)
953 {
954 __gx->tevIndMask = ((__gx->tevIndMask&~0xff)|(mask&0xff));
955 GX_LOAD_BP_REG(__gx->tevIndMask);
956 }
957
958 static void __GX_SetTexCoordGen()
959 {
960 u32 i,mask;
961 u32 texcoord;
962
963 if(__gx->dirtyState&0x02000000) GX_LOAD_XF_REG(0x103f,(__gx->genMode&0xf));
964
965 i = 0;
966 texcoord = 0x1040;
967 mask = _SHIFTR(__gx->dirtyState,16,8);
968 while(mask) {
969 if(mask&0x0001) {
970 GX_LOAD_XF_REG(texcoord,__gx->texCoordGen[i]);
971 GX_LOAD_XF_REG((texcoord+0x10),__gx->texCoordGen2[i]);
972 }
973 mask >>= 1;
974 texcoord++;
975 i++;
976 }
977 }
978
979 static void __GX_SetChanColor()
980 {
981 if(__gx->dirtyState&0x0100)
982 GX_LOAD_XF_REG(0x100a,__gx->chnAmbColor[0]);
983 if(__gx->dirtyState&0x0200)
984 GX_LOAD_XF_REG(0x100b,__gx->chnAmbColor[1]);
985 if(__gx->dirtyState&0x0400)
986 GX_LOAD_XF_REG(0x100c,__gx->chnMatColor[0]);
987 if(__gx->dirtyState&0x0800)
988 GX_LOAD_XF_REG(0x100d,__gx->chnMatColor[1]);
989 }
990
991 static void __GX_SetChanCntrl()
992 {
993 u32 i,chan,mask;
994
995 if(__gx->dirtyState&0x01000000) GX_LOAD_XF_REG(0x1009,(_SHIFTR(__gx->genMode,4,3)));
996
997 i = 0;
998 chan = 0x100e;
999 mask = _SHIFTR(__gx->dirtyState,12,4);
1000 while(mask) {
1001 if(mask&0x0001) GX_LOAD_XF_REG(chan,__gx->chnCntrl[i]);
1002
1003 mask >>= 1;
1004 chan++;
1005 i++;
1006 }
1007 }
1008
1009 static void __GX_SetDirtyState()
1010 {
1011 if(__gx->dirtyState&0x0001) {
1012 __GX_SetSUTexRegs();
1013 }
1014 if(__gx->dirtyState&0x0002) {
1015 __GX_UpdateBPMask();
1016 }
1017 if(__gx->dirtyState&0x0004) {
1018 __GX_SetGenMode();
1019 }
1020 if(__gx->dirtyState&0x0008) {
1021 __GX_SetVCD();
1022 }
1023 if(__gx->dirtyState&0x0010) {
1024 __GX_SetVAT();
1025 }
1026 if(__gx->dirtyState&~0xff) {
1027 if(__gx->dirtyState&0x0f00) {
1028 __GX_SetChanColor();
1029 }
1030 if(__gx->dirtyState&0x0100f000) {
1031 __GX_SetChanCntrl();
1032 }
1033 if(__gx->dirtyState&0x02ff0000) {
1034 __GX_SetTexCoordGen();
1035 }
1036 if(__gx->dirtyState&0x04000000) {
1037 __GX_SetMatrixIndex(0);
1038 __GX_SetMatrixIndex(5);
1039 }
1040 }
1041 __gx->dirtyState = 0;
1042 }
1043
1044 static u32 __GX_GetNumXfbLines(u16 efbHeight,u32 yscale)
1045 {
1046 u32 tmp,tmp1;
1047
1048 tmp = (((efbHeight-1)<<8)/yscale)+1;
1049 if(yscale>128 && yscale<256) {
1050 while(yscale&0x01) yscale >>= 1;
1051 tmp1 = yscale*(efbHeight/yscale);
1052 if(!(efbHeight-tmp1)) tmp++;
1053 }
1054 if(tmp>1024) tmp = 1024;
1055
1056 return tmp;
1057 }
1058
1059 GXFifoObj* GX_Init(void *base,u32 size)
1060 {
1061 s32 i,re0,re1;
1062 #if defined(HW_RVL)
1063 u32 tmem;
1064 #else
1065 u32 tmem_even,tmem_odd;
1066 #endif
1067 u32 divis,res;
1068 u32 divid = TB_BUS_CLOCK;
1069 GXTexRegion *region = NULL;
1070 GXTlutRegion *tregion = NULL;
1071
1072 LWP_InitQueue(&_gxwaitfinish);
1073 SYS_RegisterResetFunc(&__gx_resetinfo);
1074
1075 memset(__gxregs,0,STRUCT_REGDEF_SIZE);
1076
1077 __GX_FifoInit();
1078 GX_InitFifoBase(&_gxfifoobj,base,size);
1079 GX_SetCPUFifo(&_gxfifoobj);
1080 GX_SetGPFifo(&_gxfifoobj);
1081 __GX_PEInit();
1082 EnableWriteGatherPipe();
1083
1084 __gx->gxFifoInited = 1;
1085
1086 __gx->tevIndMask = 0xff;
1087 __gx->tevIndMask = (__gx->tevIndMask&~0xff000000)|(_SHIFTL(0x0f,24,8));
1088
1089 i=0;
1090 re0 = 0xc0;
1091 re1 = 0xc1;
1092 while(i<16) {
1093 __gx->tevColorEnv[i] = (__gx->tevColorEnv[i]&~0xff000000)|(_SHIFTL(re0,24,8));
1094 __gx->tevAlphaEnv[i] = (__gx->tevAlphaEnv[i]&~0xff000000)|(_SHIFTL(re1,24,8));
1095 re0 += 2; re1 += 2; i++;
1096 }
1097
1098 __gx->texCoordManually = 0;
1099 __gx->dirtyState = 0;
1100
1101 __gx->saveDLctx = 1;
1102 __gx->gxFifoUnlinked = 0;
1103
1104 __gx->sciTLcorner = (__gx->sciTLcorner&~0xff000000)|(_SHIFTL(0x20,24,8));
1105 __gx->sciBRcorner = (__gx->sciBRcorner&~0xff000000)|(_SHIFTL(0x21,24,8));
1106 __gx->lpWidth = (__gx->lpWidth&~0xff000000)|(_SHIFTL(0x22,24,8));
1107 __gx->genMode = (__gx->genMode&~0xff000000)|(_SHIFTL(0x00,24,8));
1108
1109 i=0;
1110 re0 = 0x30;
1111 re1 = 0x31;
1112 while(i<8) {
1113 __gx->suSsize[i] = (__gx->suSsize[i]&~0xff000000)|(_SHIFTL(re0,24,8));
1114 __gx->suTsize[i] = (__gx->suTsize[i]&~0xff000000)|(_SHIFTL(re1,24,8));
1115 re0 += 2; re1 += 2; i++;
1116 }
1117
1118 __gx->peZMode = (__gx->peZMode&~0xff000000)|(_SHIFTL(0x40,24,8));
1119 __gx->peCMode0 = (__gx->peCMode0&~0xff000000)|(_SHIFTL(0x41,24,8));
1120 __gx->peCMode1 = (__gx->peCMode1&~0xff000000)|(_SHIFTL(0x42,24,8));
1121 __gx->peCntrl = (__gx->peCntrl&~0xff000000)|(_SHIFTL(0x43,24,8));
1122
1123 i=0;
1124 re0 = 0x25;
1125 while(i<11) {
1126 __gx->tevRasOrder[i] = (__gx->tevRasOrder[i]&~0xff000000)|(_SHIFTL(re0,24,8));
1127 re0++; i++;
1128 }
1129
1130 divis = 500;
1131 res = (u32)(divid/divis);
1132 __GX_FlushTextureState();
1133 GX_LOAD_BP_REG(0x69000000|((_SHIFTR(res,11,24))|0x0400));
1134
1135 divis = 4224;
1136 res = (u32)(res/divis);
1137 __GX_FlushTextureState();
1138 GX_LOAD_BP_REG(0x46000000|(res|0x0200));
1139
1140 i=0;
1141 re0 = 0xf6;
1142 while(i<8) {
1143 __gx->tevSwapModeTable[i] = (__gx->tevSwapModeTable[i]&~0xff000000)|(_SHIFTL(re0,24,8));
1144 re0++; i++;
1145 }
1146
1147 __gx->tevTexCoordEnable = 0;
1148 __gx->perf0Mode = GX_PERF0_NONE;
1149 __gx->perf1Mode = GX_PERF1_NONE;
1150 __gx->cpPerfMode = 0;
1151
1152 __GX_InitRevBits();
1153
1154 i=0;
1155 while(i<16) {
1156 __gx->tevTexMap[i] = 0xff;
1157 i++;
1158 }
1159
1160 #if defined(HW_RVL)
1161 i = 0;
1162 while(i<8) {
1163 region = &__gx->texRegion[i];
1164 GX_InitTexCacheRegion(region,GX_FALSE,_gxtexregionaddrtable[i+0],GX_TEXCACHE_32K,_gxtexregionaddrtable[i+8],GX_TEXCACHE_32K);
1165
1166 region = &__gx->texRegion[i+8];
1167 GX_InitTexCacheRegion(region,GX_FALSE,_gxtexregionaddrtable[i+16],GX_TEXCACHE_32K,_gxtexregionaddrtable[i+24],GX_TEXCACHE_32K);
1168
1169 region = &__gx->texRegion[i+16];
1170 GX_InitTexCacheRegion(region,GX_TRUE,_gxtexregionaddrtable[i+32],GX_TEXCACHE_32K,_gxtexregionaddrtable[i+40],GX_TEXCACHE_32K);
1171
1172 i++;
1173 }
1174
1175 i=0;
1176 while(i<16) {
1177 tmem = 0x000C0000+(i<<13);
1178 tregion = &__gx->tlutRegion[i];
1179 GX_InitTlutRegion(tregion,tmem,GX_TLUT_256);
1180 i++;
1181 }
1182
1183 i=0;
1184 while(i<4) {
1185 tmem = 0x000E0000+(i<<15);
1186 tregion = &__gx->tlutRegion[i+16];
1187 GX_InitTlutRegion(tregion,tmem,GX_TLUT_1K);
1188 i++;
1189 }
1190 #else
1191 for(i=0;i<8;i++) {
1192 tmem_even = tmem_odd = (i<<15);
1193 region = &__gx->texRegion[i];
1194 GX_InitTexCacheRegion(region,GX_FALSE,tmem_even,GX_TEXCACHE_32K,(tmem_odd+0x00080000),GX_TEXCACHE_32K);
1195 }
1196 for(i=0;i<4;i++) {
1197 tmem_even = ((0x08+(i<<1))<<15);
1198 tmem_odd = ((0x09+(i<<1))<<15);
1199 region = &__gx->texRegion[i+8];
1200 GX_InitTexCacheRegion(region,GX_FALSE,tmem_even,GX_TEXCACHE_32K,tmem_odd,GX_TEXCACHE_32K);
1201 }
1202 for(i=0;i<16;i++) {
1203 tmem_even = (i<<13)+0x000C0000;
1204 tregion = &__gx->tlutRegion[i];
1205 GX_InitTlutRegion(tregion,tmem_even,GX_TLUT_256);
1206 }
1207 for(i=0;i<4;i++) {
1208 tmem_even = (i<<15)+0x000E0000;
1209 tregion = &__gx->tlutRegion[i+16];
1210 GX_InitTlutRegion(tregion,tmem_even,GX_TLUT_1K);
1211 }
1212 #endif
1213 _cpReg[3] = 0;
1214 GX_LOAD_CP_REG(0x20,0x00000000);
1215 GX_LOAD_XF_REG(0x1006,0x0);
1216
1217 GX_LOAD_BP_REG(0x23000000);
1218 GX_LOAD_BP_REG(0x24000000);
1219 GX_LOAD_BP_REG(0x67000000);
1220
1221 __GX_SetIndirectMask(0);
1222 #if defined(HW_RVL)
1223 __GX_SetTmemConfig(2);
1224 #else
1225 __GX_SetTmemConfig(0);
1226 #endif
1227 __GX_InitGX();
1228
1229 return &_gxfifoobj;
1230 }
1231
1232 void GX_InitFifoBase(GXFifoObj *fifo,void *base,u32 size)
1233 {
1234 struct __gxfifo *ptr = (struct __gxfifo*)fifo;
1235
1236 if(!ptr || size<GX_FIFO_MINSIZE) return;
1237
1238 ptr->buf_start = (u32)base;
1239 ptr->buf_end = (u32)base + size - 4;
1240 ptr->size = size;
1241 ptr->rdwt_dst = 0;
1242
1243 GX_InitFifoLimits(fifo,(size-GX_FIFO_HIWATERMARK),((size>>1)&0x7fffffe0));
1244 GX_InitFifoPtrs(fifo,base,base);
1245 }
1246
1247 void GX_InitFifoLimits(GXFifoObj *fifo,u32 hiwatermark,u32 lowatermark)
1248 {
1249 struct __gxfifo *ptr = (struct __gxfifo*)fifo;
1250
1251 ptr->hi_mark = hiwatermark;
1252 ptr->lo_mark = lowatermark;
1253 }
1254
1255 void GX_InitFifoPtrs(GXFifoObj *fifo,void *rd_ptr,void *wt_ptr)
1256 {
1257 u32 level;
1258 s32 rdwt_dst;
1259 struct __gxfifo *ptr = (struct __gxfifo*)fifo;
1260
1261 _CPU_ISR_Disable(level);
1262 rdwt_dst = wt_ptr-rd_ptr;
1263 ptr->rd_ptr = (u32)rd_ptr;
1264 ptr->wt_ptr = (u32)wt_ptr;
1265 ptr->rdwt_dst = rdwt_dst;
1266 if(rdwt_dst<0) {
1267 rdwt_dst += ptr->size;
1268 ptr->rd_ptr = rdwt_dst;
1269 }
1270 _CPU_ISR_Restore(level);
1271 }
1272
1273 void GX_GetFifoPtrs(GXFifoObj *fifo,void **rd_ptr,void **wt_ptr)
1274 {
1275 struct __gxfifo *ptr = (struct __gxfifo*)fifo;
1276 *rd_ptr = (void*)ptr->rd_ptr;
1277 *wt_ptr = (void*)ptr->wt_ptr;
1278 }
1279
1280 void GX_SetCPUFifo(GXFifoObj *fifo)
1281 {
1282 u32 level;
1283 struct __gxfifo *ptr = (struct __gxfifo*)fifo;
1284 struct __gxfifo *cpufifo = (struct __gxfifo*)&_cpufifo;
1285
1286 _CPU_ISR_Disable(level);
1287 if(!fifo) {
1288 _gxcpufifoready = 0;
1289 _cpgplinked = 0;
1290 cpufifo->gpfifo_ready = 0;
1291 cpufifo->cpufifo_ready = 0;
1292 _CPU_ISR_Restore(level);
1293 return;
1294 }
1295
1296 cpufifo->buf_start = ptr->buf_start;
1297 cpufifo->buf_end = ptr->buf_end;
1298 cpufifo->size = ptr->size;
1299 cpufifo->hi_mark = ptr->hi_mark;
1300 cpufifo->lo_mark = ptr->lo_mark;
1301 cpufifo->rd_ptr = ptr->rd_ptr;
1302 cpufifo->wt_ptr = ptr->wt_ptr;
1303 cpufifo->rdwt_dst = ptr->rdwt_dst;
1304 cpufifo->fifo_wrap = ptr->fifo_wrap;
1305 cpufifo->gpfifo_ready = ptr->gpfifo_ready;
1306 cpufifo->cpufifo_ready = 1;
1307
1308 _gxcpufifoready = 1;
1309 if(__GX_CPGPLinkCheck()) {
1310 _cpgplinked = 1;
1311 cpufifo->gpfifo_ready = 1;
1312
1313 _piReg[3] = MEM_VIRTUAL_TO_PHYSICAL(cpufifo->buf_start);
1314 _piReg[4] = MEM_VIRTUAL_TO_PHYSICAL(cpufifo->buf_end);
1315 _piReg[5] = (cpufifo->wt_ptr&0x1FFFFFE0);
1316
1317 __GX_WriteFifoIntReset(GX_TRUE,GX_TRUE);
1318 __GX_WriteFifoIntEnable(GX_ENABLE,GX_DISABLE);
1319 __GX_FifoLink(GX_TRUE);
1320
1321 _CPU_ISR_Restore(level);
1322 return;
1323 }
1324
1325 if(_cpgplinked) {
1326 __GX_FifoLink(GX_FALSE);
1327 _cpgplinked = 0;
1328 }
1329
1330 __GX_WriteFifoIntEnable(GX_DISABLE,GX_DISABLE);
1331
1332 _piReg[3] = MEM_VIRTUAL_TO_PHYSICAL(cpufifo->buf_start);
1333 _piReg[4] = MEM_VIRTUAL_TO_PHYSICAL(cpufifo->buf_end);
1334 _piReg[5] = (cpufifo->wt_ptr&0x1FFFFFE0);
1335 ppcsync();
1336
1337 _CPU_ISR_Restore(level);
1338 }
1339
1340 void GX_GetCPUFifo(GXFifoObj *fifo)
1341 {
1342 struct __gxfifo* ptr = (struct __gxfifo*)fifo;
1343 struct __gxfifo* cpufifo = (struct __gxfifo*)&_cpufifo;
1344
1345 if(!_gxcpufifoready) return;
1346
1347 GX_Flush();
1348 __GX_SaveFifo();
1349
1350 ptr->buf_start = cpufifo->buf_start;
1351 ptr->buf_end = cpufifo->buf_end;
1352 ptr->size = cpufifo->size;
1353 ptr->rd_ptr = cpufifo->rd_ptr;
1354 ptr->wt_ptr = cpufifo->wt_ptr;
1355 ptr->rdwt_dst = cpufifo->rdwt_dst;
1356 ptr->hi_mark = cpufifo->hi_mark;
1357 ptr->lo_mark = cpufifo->lo_mark;
1358 ptr->fifo_wrap = cpufifo->fifo_wrap;
1359 ptr->cpufifo_ready = cpufifo->cpufifo_ready;
1360 ptr->gpfifo_ready = cpufifo->gpfifo_ready;
1361 }
1362
1363 void GX_SetGPFifo(GXFifoObj *fifo)
1364 {
1365 u32 level;
1366 struct __gxfifo *ptr = (struct __gxfifo*)fifo;
1367 struct __gxfifo *gpfifo = (struct __gxfifo*)&_gpfifo;
1368
1369 _CPU_ISR_Disable(level);
1370 __GX_FifoReadDisable();
1371 __GX_WriteFifoIntEnable(GX_DISABLE,GX_DISABLE);
1372
1373 if(!fifo) {
1374 _gxgpfifoready = 0;
1375 _cpgplinked = 0;
1376 gpfifo->cpufifo_ready = 0;
1377 gpfifo->gpfifo_ready = 0;
1378 __GX_FifoLink(GX_FALSE);
1379 _CPU_ISR_Restore(level);
1380 return;
1381 }
1382
1383 gpfifo->buf_start = ptr->buf_start;
1384 gpfifo->buf_end = ptr->buf_end;
1385 gpfifo->size = ptr->size;
1386 gpfifo->hi_mark = ptr->hi_mark;
1387 gpfifo->lo_mark = ptr->lo_mark;
1388 gpfifo->rd_ptr = ptr->rd_ptr;
1389 gpfifo->wt_ptr = ptr->wt_ptr;
1390 gpfifo->rdwt_dst = ptr->rdwt_dst;
1391 gpfifo->fifo_wrap = ptr->fifo_wrap;
1392 gpfifo->cpufifo_ready = ptr->cpufifo_ready;
1393 gpfifo->gpfifo_ready = 1;
1394 _gxgpfifoready = 1;
1395
1396 /* setup fifo base */
1397 _cpReg[16] = _SHIFTL(MEM_VIRTUAL_TO_PHYSICAL(gpfifo->buf_start),0,16);
1398 _cpReg[17] = _SHIFTR(MEM_VIRTUAL_TO_PHYSICAL(gpfifo->buf_start),16,16);
1399
1400 /* setup fifo end */
1401 _cpReg[18] = _SHIFTL(MEM_VIRTUAL_TO_PHYSICAL(gpfifo->buf_end),0,16);
1402 _cpReg[19] = _SHIFTR(MEM_VIRTUAL_TO_PHYSICAL(gpfifo->buf_end),16,16);
1403
1404 /* setup hiwater mark */
1405 _cpReg[20] = _SHIFTL(gpfifo->hi_mark,0,16);
1406 _cpReg[21] = _SHIFTR(gpfifo->hi_mark,16,16);
1407
1408 /* setup lowater mark */
1409 _cpReg[22] = _SHIFTL(gpfifo->lo_mark,0,16);
1410 _cpReg[23] = _SHIFTR(gpfifo->lo_mark,16,16);
1411
1412 /* setup rd<->wd dist */
1413 _cpReg[24] = _SHIFTL(gpfifo->rdwt_dst,0,16);
1414 _cpReg[25] = _SHIFTR(gpfifo->rdwt_dst,16,16);
1415
1416 /* setup wt ptr */
1417 _cpReg[26] = _SHIFTL(MEM_VIRTUAL_TO_PHYSICAL(gpfifo->wt_ptr),0,16);
1418 _cpReg[27] = _SHIFTR(MEM_VIRTUAL_TO_PHYSICAL(gpfifo->wt_ptr),16,16);
1419
1420 /* setup rd ptr */
1421 _cpReg[28] = _SHIFTL(MEM_VIRTUAL_TO_PHYSICAL(gpfifo->rd_ptr),0,16);
1422 _cpReg[29] = _SHIFTR(MEM_VIRTUAL_TO_PHYSICAL(gpfifo->rd_ptr),16,16);
1423 ppcsync();
1424
1425 if(__GX_CPGPLinkCheck()) {
1426 _cpgplinked = 1;
1427 gpfifo->cpufifo_ready = 1;
1428 __GX_WriteFifoIntEnable(GX_ENABLE,GX_DISABLE);
1429 __GX_FifoLink(GX_TRUE);
1430 } else {
1431 _cpgplinked = 0;
1432 gpfifo->cpufifo_ready = 0;
1433 __GX_WriteFifoIntEnable(GX_DISABLE,GX_DISABLE);
1434 __GX_FifoLink(GX_FALSE);
1435 }
1436
1437 __GX_WriteFifoIntReset(GX_TRUE,GX_TRUE);
1438 __GX_FifoReadEnable();
1439 _CPU_ISR_Restore(level);
1440 }
1441
1442 void GX_GetGPFifo(GXFifoObj *fifo)
1443 {
1444 struct __gxfifo* ptr = (struct __gxfifo*)fifo;
1445 struct __gxfifo* gpfifo = (struct __gxfifo*)&_gpfifo;
1446
1447 if(!_gxgpfifoready) return;
1448
1449 __GX_SaveFifo();
1450
1451 ptr->buf_start = gpfifo->buf_start;
1452 ptr->buf_end = gpfifo->buf_end;
1453 ptr->size = gpfifo->size;
1454 ptr->rd_ptr = gpfifo->rd_ptr;
1455 ptr->wt_ptr = gpfifo->wt_ptr;
1456 ptr->rdwt_dst = gpfifo->rdwt_dst;
1457 ptr->hi_mark = gpfifo->hi_mark;
1458 ptr->lo_mark = gpfifo->lo_mark;
1459 ptr->fifo_wrap = gpfifo->fifo_wrap;
1460 ptr->gpfifo_ready = gpfifo->gpfifo_ready;
1461 ptr->cpufifo_ready = gpfifo->cpufifo_ready;
1462 }
1463
1464 void* GX_GetFifoBase(GXFifoObj *fifo)
1465 {
1466 return (void*)((struct __gxfifo*)fifo)->buf_start;
1467 }
1468
1469 u32 GX_GetFifoSize(GXFifoObj *fifo)
1470 {
1471 return ((struct __gxfifo*)fifo)->size;
1472 }
1473
1474 u32 GX_GetFifoCount(GXFifoObj *fifo)
1475 {
1476 return ((struct __gxfifo*)fifo)->rdwt_dst;
1477 }
1478
1479 u8 GX_GetFifoWrap(GXFifoObj *fifo)
1480 {
1481 return ((struct __gxfifo*)fifo)->fifo_wrap;
1482 }
1483
1484 u32 GX_GetOverflowCount()
1485 {
1486 return _gxoverflowcount;
1487 }
1488
1489 u32 GX_ResetOverflowCount()
1490 {
1491 u32 ret = _gxoverflowcount;
1492 _gxoverflowcount = 0;
1493 return ret;
1494 }
1495
1496 lwp_t GX_GetCurrentGXThread()
1497 {
1498 return _gxcurrentlwp;
1499 }
1500
1501 lwp_t GX_SetCurrentGXThread()
1502 {
1503 u32 level;
1504
1505 _CPU_ISR_Disable(level);
1506 lwp_t ret = _gxcurrentlwp;
1507 _gxcurrentlwp = LWP_GetSelf();
1508 _CPU_ISR_Restore(level);
1509
1510 return ret;
1511 }
1512
1513 volatile void* GX_RedirectWriteGatherPipe(void *ptr)
1514 {
1515 u32 level;
1516 struct __gxfifo *cpufifo = (struct __gxfifo*)&_cpufifo;
1517
1518 _CPU_ISR_Disable(level);
1519 GX_Flush();
1520 while(!IsWriteGatherBufferEmpty());
1521
1522 mtwpar(0x0C008000);
1523 if(_cpgplinked) {
1524 __GX_FifoLink(GX_FALSE);
1525 __GX_WriteFifoIntEnable(GX_DISABLE,GX_DISABLE);
1526 }
1527 cpufifo->wt_ptr = (u32)MEM_PHYSICAL_TO_K0(_piReg[5]&~0x04000000);
1528
1529 _piReg[3] = 0;
1530 _piReg[4] = 0x04000000;
1531 _piReg[5] = (((u32)ptr&0x3FFFFFE0)&~0x04000000);
1532 _sync();
1533
1534 _CPU_ISR_Restore(level);
1535
1536 return (volatile void*)0x0C008000;
1537 }
1538
1539 void GX_RestoreWriteGatherPipe()
1540 {
1541 u32 level;
1542 struct __gxfifo *cpufifo = (struct __gxfifo*)&_cpufifo;
1543
1544 _CPU_ISR_Disable(level);
1545
1546 wgPipe->U32 = 0;
1547 wgPipe->U32 = 0;
1548 wgPipe->U32 = 0;
1549 wgPipe->U32 = 0;
1550 wgPipe->U32 = 0;
1551 wgPipe->U32 = 0;
1552 wgPipe->U32 = 0;
1553 wgPipe->U32 = 0;
1554
1555 ppcsync();
1556 while(!IsWriteGatherBufferEmpty());
1557
1558 mtwpar(0x0C008000);
1559 _piReg[3] = MEM_VIRTUAL_TO_PHYSICAL(cpufifo->buf_start);
1560 _piReg[4] = MEM_VIRTUAL_TO_PHYSICAL(cpufifo->buf_end);
1561 _piReg[5] = (((u32)cpufifo->wt_ptr&0x3FFFFFE0)&~0x04000000);
1562 if(_cpgplinked) {
1563 __GX_WriteFifoIntReset(GX_TRUE,GX_TRUE);
1564 __GX_WriteFifoIntEnable(GX_ENABLE,GX_DISABLE);
1565 __GX_FifoLink(GX_TRUE);
1566 }
1567 _CPU_ISR_Restore(level);
1568 }
1569
1570 void GX_Flush()
1571 {
1572 if(__gx->dirtyState)
1573 __GX_SetDirtyState();
1574
1575 wgPipe->U32 = 0;
1576 wgPipe->U32 = 0;
1577 wgPipe->U32 = 0;
1578 wgPipe->U32 = 0;
1579 wgPipe->U32 = 0;
1580 wgPipe->U32 = 0;
1581 wgPipe->U32 = 0;
1582 wgPipe->U32 = 0;
1583
1584 ppcsync();
1585 }
1586
1587 void GX_EnableBreakPt(void *break_pt)
1588 {
1589 u32 level = 0;
1590 _CPU_ISR_Disable(level);
1591 __GX_FifoReadDisable();
1592 _cpReg[30] = _SHIFTL(MEM_VIRTUAL_TO_PHYSICAL(break_pt),0,16);
1593 _cpReg[31] = _SHIFTR(MEM_VIRTUAL_TO_PHYSICAL(break_pt),16,16);
1594 __gx->cpCRreg = (__gx->cpCRreg&~0x22)|0x22;
1595 _cpReg[1] = __gx->cpCRreg;
1596 _gxcurrbp = break_pt;
1597 __GX_FifoReadEnable();
1598 _CPU_ISR_Restore(level);
1599 }
1600
1601 void GX_DisableBreakPt()
1602 {
1603 u32 level = 0;
1604 _CPU_ISR_Disable(level);
1605 __gx->cpCRreg = (__gx->cpCRreg&~0x22);
1606 _cpReg[1] = __gx->cpCRreg;
1607 _gxcurrbp = NULL;
1608 _CPU_ISR_Restore(level);
1609 }
1610
1611 #if defined(HW_DOL)
1612 void GX_AbortFrame()
1613 {
1614 _piReg[6] = 1;
1615 __GX_WaitAbort(50);
1616 _piReg[6] = 0;
1617 __GX_WaitAbort(5);
1618
1619 if(__GX_IsGPFifoReady())
1620 __GX_CleanGPFifo();
1621 }
1622 #elif defined(HW_RVL)
1623 void GX_AbortFrame()
1624 {
1625 __GX_Abort();
1626 if(__GX_IsGPFifoReady()) {
1627 __GX_CleanGPFifo();
1628 __GX_InitRevBits();
1629
1630 __gx->dirtyState = 0;
1631 GX_Flush();
1632 }
1633 }
1634 #endif
1635
1636 void GX_SetDrawSync(u16 token)
1637 {
1638 u32 level = 0;
1639 _CPU_ISR_Disable(level);
1640 GX_LOAD_BP_REG(0x48000000 | token);
1641 GX_LOAD_BP_REG(0x47000000 | token);
1642 GX_Flush();
1643 _CPU_ISR_Restore(level);
1644 }
1645
1646 u16 GX_GetDrawSync()
1647 {
1648 return _peReg[7];
1649 }
1650
1651 void GX_SetDrawDone()
1652 {
1653 u32 level;
1654 _CPU_ISR_Disable(level);
1655 GX_LOAD_BP_REG(0x45000002); // set draw done!
1656 GX_Flush();
1657 _gxfinished = 0;
1658 _CPU_ISR_Restore(level);
1659 }
1660
1661
1662 void GX_WaitDrawDone()
1663 {
1664 u32 level;
1665 #ifdef _GP_DEBUG
1666 printf("GX_WaitDrawDone()\n\n");
1667 #endif
1668 _CPU_ISR_Disable(level);
1669 while(!_gxfinished)
1670 LWP_ThreadSleep(_gxwaitfinish);
1671 _CPU_ISR_Restore(level);
1672 }
1673
1674 void GX_DrawDone()
1675 {
1676 u32 level;
1677
1678 _CPU_ISR_Disable(level);
1679 GX_LOAD_BP_REG(0x45000002); // set draw done!
1680 GX_Flush();
1681
1682 _gxfinished = 0;
1683 _CPU_ISR_Flash(level);
1684
1685 while(!_gxfinished)
1686 LWP_ThreadSleep(_gxwaitfinish);
1687 _CPU_ISR_Restore(level);
1688 }
1689
1690 GXDrawDoneCallback GX_SetDrawDoneCallback(GXDrawDoneCallback cb)
1691 {
1692 u32 level;
1693
1694 _CPU_ISR_Disable(level);
1695 GXDrawDoneCallback ret = drawDoneCB;
1696 drawDoneCB = cb;
1697 _CPU_ISR_Restore(level);
1698 return ret;
1699 }
1700
1701 GXDrawSyncCallback GX_SetDrawSyncCallback(GXDrawSyncCallback cb)
1702 {
1703 u32 level;
1704
1705 _CPU_ISR_Disable(level);
1706 GXDrawSyncCallback ret = tokenCB;
1707 tokenCB = cb;
1708 _CPU_ISR_Restore(level);
1709 return ret;
1710 }
1711
1712 GXBreakPtCallback GX_SetBreakPtCallback(GXBreakPtCallback cb)
1713 {
1714 u32 level;
1715
1716 _CPU_ISR_Disable(level);
1717 GXBreakPtCallback ret = breakPtCB;
1718 breakPtCB = cb;
1719 _CPU_ISR_Restore(level);
1720 return ret;
1721 }
1722
1723 void GX_PixModeSync()
1724 {
1725 GX_LOAD_BP_REG(__gx->peCntrl);
1726 }
1727
1728 void GX_TexModeSync()
1729 {
1730 GX_LOAD_BP_REG(0x63000000);
1731 }
1732
1733 void GX_SetMisc(u32 token,u32 value)
1734 {
1735 u32 cnt;
1736
1737 if(token==GX_MT_XF_FLUSH) {
1738 __gx->xfFlushSafe = value;
1739 cnt = cntlzw(__gx->xfFlushSafe);
1740 __gx->xfFlushExp = _SHIFTR(cnt,5,16);
1741
1742 __gx->xfFlush = 1;
1743 if(!__gx->xfFlushSafe) return;
1744
1745 __gx->dirtyState |= 0x0008;
1746 } else if(token==GX_MT_DL_SAVE_CTX) {
1747 __gx->saveDLctx = (value&0xff);
1748 }
1749 return;
1750 }
1751
1752 void GX_SetViewportJitter(f32 xOrig,f32 yOrig,f32 wd,f32 ht,f32 nearZ,f32 farZ,u32 field)
1753 {
1754 f32 x0,y0,x1,y1,n,f,z;
1755 static f32 Xfactor = 0.5;
1756 static f32 Yfactor = 342.0;
1757 static f32 Zfactor = 16777215.0;
1758
1759 if(!field) yOrig -= Xfactor;
1760
1761 x0 = wd*Xfactor;
1762 y0 = (-ht)*Xfactor;
1763 x1 = (xOrig+(wd*Xfactor))+Yfactor;
1764 y1 = (yOrig+(ht*Xfactor))+Yfactor;
1765 n = Zfactor*nearZ;
1766 f = Zfactor*farZ;
1767 z = f-n;
1768
1769 GX_LOAD_XF_REGS(0x101a,6);
1770 wgPipe->F32 = x0;
1771 wgPipe->F32 = y0;
1772 wgPipe->F32 = z;
1773 wgPipe->F32 = x1;
1774 wgPipe->F32 = y1;
1775 wgPipe->F32 = f;
1776 }
1777
1778 void GX_SetViewport(f32 xOrig,f32 yOrig,f32 wd,f32 ht,f32 nearZ,f32 farZ)
1779 {
1780 GX_SetViewportJitter(xOrig,yOrig,wd,ht,nearZ,farZ,1);
1781 }
1782
1783 void GX_LoadProjectionMtx(Mtx44 mt,u8 type)
1784 {
1785 f32 tmp[7];
1786
1787 ((u32*)((void*)tmp))[6] = (u32)type;
1788 tmp[0] = mt[0][0];
1789 tmp[2] = mt[1][1];
1790 tmp[4] = mt[2][2];
1791 tmp[5] = mt[2][3];
1792
1793 switch(type) {
1794 case GX_PERSPECTIVE:
1795 tmp[1] = mt[0][2];
1796 tmp[3] = mt[1][2];
1797 break;
1798 case GX_ORTHOGRAPHIC:
1799 tmp[1] = mt[0][3];
1800 tmp[3] = mt[1][3];
1801 break;
1802 }
1803
1804 GX_LOAD_XF_REGS(0x1020,7);
1805 wgPipe->F32 = tmp[0];
1806 wgPipe->F32 = tmp[1];
1807 wgPipe->F32 = tmp[2];
1808 wgPipe->F32 = tmp[3];
1809 wgPipe->F32 = tmp[4];
1810 wgPipe->F32 = tmp[5];
1811 wgPipe->F32 = tmp[6];
1812 }
1813
1814 static void __GetImageTileCount(u32 fmt,u16 wd,u16 ht,u32 *xtiles,u32 *ytiles,u32 *zplanes)
1815 {
1816 u32 xshift,yshift,tile;
1817
1818 switch(fmt) {
1819 case GX_TF_I4:
1820 case GX_TF_IA4:
1821 case GX_CTF_R4:
1822 case GX_CTF_RA4:
1823 case GX_CTF_Z4:
1824 xshift = 3;
1825 yshift = 3;
1826 break;
1827 case GX_TF_Z8:
1828 case GX_TF_I8:
1829 case GX_TF_IA8:
1830 case GX_CTF_RA8:
1831 case GX_CTF_A8:
1832 case GX_CTF_R8:
1833 case GX_CTF_G8:
1834 case GX_CTF_B8:
1835 case GX_CTF_RG8:
1836 case GX_CTF_GB8:
1837 case GX_CTF_Z8M:
1838 case GX_CTF_Z8L:
1839 xshift = 3;
1840 yshift = 2;
1841 break;
1842 case GX_TF_Z16:
1843 case GX_TF_Z24X8:
1844 case GX_CTF_Z16L:
1845 case GX_TF_RGB565:
1846 case GX_TF_RGB5A3:
1847 case GX_TF_RGBA8:
1848 xshift = 2;
1849 yshift = 2;
1850 break;
1851 default:
1852 xshift = 0;
1853 yshift = 0;
1854 break;
1855 }
1856
1857 if(!(wd&0xffff)) wd = 1;
1858 if(!(ht&0xffff)) ht = 1;
1859
1860 wd &= 0xffff;
1861 tile = (wd+((1<<xshift)-1))>>xshift;
1862 *xtiles = tile;
1863
1864 ht &= 0xffff;
1865 tile = (ht+((1<<yshift)-1))>>yshift;
1866 *ytiles = tile;
1867
1868 *zplanes = 1;
1869 if(fmt==GX_TF_RGBA8 || fmt==GX_TF_Z24X8) *zplanes = 2;
1870 }
1871
1872 void GX_SetCopyClear(GXColor color,u32 zvalue)
1873 {
1874 u32 val;
1875
1876 val = (_SHIFTL(color.a,8,8))|(color.r&0xff);
1877 GX_LOAD_BP_REG(0x4f000000|val);
1878
1879 val = (_SHIFTL(color.g,8,8))|(color.b&0xff);
1880 GX_LOAD_BP_REG(0x50000000|val);
1881
1882 val = zvalue&0x00ffffff;
1883 GX_LOAD_BP_REG(0x51000000|val);
1884 }
1885
1886 void GX_SetCopyClamp(u8 clamp)
1887 {
1888 __gx->dispCopyCntrl = (__gx->dispCopyCntrl&~1)|(clamp&1);
1889 __gx->dispCopyCntrl = (__gx->dispCopyCntrl&~2)|(clamp&2);
1890 }
1891
1892 void GX_SetDispCopyGamma(u8 gamma)
1893 {
1894 __gx->dispCopyCntrl = (__gx->dispCopyCntrl&~0x180)|(_SHIFTL(gamma,7,2));
1895 }
1896
1897 void GX_SetCopyFilter(u8 aa,u8 sample_pattern[12][2],u8 vf,u8 vfilter[7])
1898 {
1899 u32 reg01=0,reg02=0,reg03=0,reg04=0,reg53=0,reg54=0;
1900
1901 if(aa) {
1902 reg01 = sample_pattern[0][0]&0xf;
1903 reg01 = (reg01&~0xf0)|(_SHIFTL(sample_pattern[0][1],4,4));
1904 reg01 = (reg01&~0xf00)|(_SHIFTL(sample_pattern[1][0],8,4));
1905 reg01 = (reg01&~0xf000)|(_SHIFTL(sample_pattern[1][1],12,4));
1906 reg01 = (reg01&~0xf0000)|(_SHIFTL(sample_pattern[2][0],16,4));
1907 reg01 = (reg01&~0xf00000)|(_SHIFTL(sample_pattern[2][1],20,4));
1908 reg01 = (reg01&~0xff000000)|(_SHIFTL(0x01,24,8));
1909
1910 reg02 = sample_pattern[3][0]&0xf;
1911 reg02 = (reg02&~0xf0)|(_SHIFTL(sample_pattern[3][1],4,4));
1912 reg02 = (reg02&~0xf00)|(_SHIFTL(sample_pattern[4][0],8,4));
1913 reg02 = (reg02&~0xf000)|(_SHIFTL(sample_pattern[4][1],12,4));
1914 reg02 = (reg02&~0xf0000)|(_SHIFTL(sample_pattern[5][0],16,4));
1915 reg02 = (reg02&~0xf00000)|(_SHIFTL(sample_pattern[5][1],20,4));
1916 reg02 = (reg02&~0xff000000)|(_SHIFTL(0x02,24,8));
1917
1918 reg03 = sample_pattern[6][0]&0xf;
1919 reg03 = (reg03&~0xf0)|(_SHIFTL(sample_pattern[6][1],4,4));
1920 reg03 = (reg03&~0xf00)|(_SHIFTL(sample_pattern[7][0],8,4));
1921 reg03 = (reg03&~0xf000)|(_SHIFTL(sample_pattern[7][1],12,4));
1922 reg03 = (reg03&~0xf0000)|(_SHIFTL(sample_pattern[8][0],16,4));
1923 reg03 = (reg03&~0xf00000)|(_SHIFTL(sample_pattern[8][1],20,4));
1924 reg03 = (reg03&~0xff000000)|(_SHIFTL(0x03,24,8));
1925
1926 reg04 = sample_pattern[9][0]&0xf;
1927 reg04 = (reg04&~0xf0)|(_SHIFTL(sample_pattern[9][1],4,4));
1928 reg04 = (reg04&~0xf00)|(_SHIFTL(sample_pattern[10][0],8,4));
1929 reg04 = (reg04&~0xf000)|(_SHIFTL(sample_pattern[10][1],12,4));
1930 reg04 = (reg04&~0xf0000)|(_SHIFTL(sample_pattern[11][0],16,4));
1931 reg04 = (reg04&~0xf00000)|(_SHIFTL(sample_pattern[11][1],20,4));
1932 reg04 = (reg04&~0xff000000)|(_SHIFTL(0x04,24,8));
1933 } else {
1934 reg01 = 0x01666666;
1935 reg02 = 0x02666666;
1936 reg03 = 0x03666666;
1937 reg04 = 0x04666666;
1938 }
1939 GX_LOAD_BP_REG(reg01);
1940 GX_LOAD_BP_REG(reg02);
1941 GX_LOAD_BP_REG(reg03);
1942 GX_LOAD_BP_REG(reg04);
1943
1944 reg53 = 0x53595000;
1945 reg54 = 0x54000015;
1946 if(vf) {
1947 reg53 = 0x53000000|(vfilter[0]&0x3f);
1948 reg53 = (reg53&~0xfc0)|(_SHIFTL(vfilter[1],6,6));
1949 reg53 = (reg53&~0x3f000)|(_SHIFTL(vfilter[2],12,6));
1950 reg53 = (reg53&~0xfc0000)|(_SHIFTL(vfilter[3],18,6));
1951
1952 reg54 = 0x54000000|(vfilter[4]&0x3f);
1953 reg54 = (reg54&~0xfc0)|(_SHIFTL(vfilter[5],6,6));
1954 reg54 = (reg54&~0x3f000)|(_SHIFTL(vfilter[6],12,6));
1955 }
1956 GX_LOAD_BP_REG(reg53);
1957 GX_LOAD_BP_REG(reg54);
1958 }
1959
1960 void GX_SetDispCopyFrame2Field(u8 mode)
1961 {
1962 __gx->dispCopyCntrl = (__gx->dispCopyCntrl&~0x3000)|(_SHIFTL(mode,12,2));
1963 }
1964
1965 u32 GX_SetDispCopyYScale(f32 yscale)
1966 {
1967 u32 ht,yScale = 0;
1968
1969 yScale = ((u32)(256.0f/yscale))&0x1ff;
1970 GX_LOAD_BP_REG(0x4e000000|yScale);
1971
1972 __gx->dispCopyCntrl = (__gx->dispCopyCntrl&~0x400)|(_SHIFTL(((256-yScale)>0),10,1));
1973 ht = _SHIFTR(__gx->dispCopyWH,12,10)+1;
1974 return __GX_GetNumXfbLines(ht,yScale);
1975 }
1976
1977 void GX_SetDispCopyDst(u16 wd,u16 ht)
1978 {
1979 __gx->dispCopyDst = (__gx->dispCopyDst&~0x3ff)|(_SHIFTR(wd,4,10));
1980 __gx->dispCopyDst = (__gx->dispCopyDst&~0xff000000)|(_SHIFTL(0x4d,24,8));
1981 }
1982
1983 void GX_SetDispCopySrc(u16 left,u16 top,u16 wd,u16 ht)
1984 {
1985 __gx->dispCopyTL = (__gx->dispCopyTL&~0x00ffffff)|XY(left,top);
1986 __gx->dispCopyTL = (__gx->dispCopyTL&~0xff000000)|(_SHIFTL(0x49,24,8));
1987 __gx->dispCopyWH = (__gx->dispCopyWH&~0x00ffffff)|XY((wd-1),(ht-1));
1988 __gx->dispCopyWH = (__gx->dispCopyWH&~0xff000000)|(_SHIFTL(0x4a,24,8));
1989 }
1990
1991 void GX_CopyDisp(void *dest,u8 clear)
1992 {
1993 u8 clflag;
1994 u32 val;
1995
1996 if(clear) {
1997 val= (__gx->peZMode&~0xf)|0xf;
1998 GX_LOAD_BP_REG(val);
1999 val = (__gx->peCMode0&~0x3);
2000 GX_LOAD_BP_REG(val);
2001 }
2002
2003 clflag = 0;
2004 if(clear || (__gx->peCntrl&0x7)==0x0003) {
2005 if(__gx->peCntrl&0x40) {
2006 clflag = 1;
2007 val = (__gx->peCntrl&~0x40);
2008 GX_LOAD_BP_REG(val);
2009 }
2010 }
2011
2012 GX_LOAD_BP_REG(__gx->dispCopyTL); // set source top
2013 GX_LOAD_BP_REG(__gx->dispCopyWH);
2014
2015 GX_LOAD_BP_REG(__gx->dispCopyDst);
2016
2017 val = 0x4b000000|(_SHIFTR(MEM_VIRTUAL_TO_PHYSICAL(dest),5,24));
2018 GX_LOAD_BP_REG(val);
2019
2020 __gx->dispCopyCntrl = (__gx->dispCopyCntrl&~0x800)|(_SHIFTL(clear,11,1));
2021 __gx->dispCopyCntrl = (__gx->dispCopyCntrl&~0x4000)|0x4000;
2022 __gx->dispCopyCntrl = (__gx->dispCopyCntrl&~0xff000000)|(_SHIFTL(0x52,24,8));
2023
2024 GX_LOAD_BP_REG(__gx->dispCopyCntrl);
2025
2026 if(clear) {
2027 GX_LOAD_BP_REG(__gx->peZMode);
2028 GX_LOAD_BP_REG(__gx->peCMode0);
2029 }
2030 if(clflag) GX_LOAD_BP_REG(__gx->peCntrl);
2031 }
2032
2033 void GX_CopyTex(void *dest,u8 clear)
2034 {
2035 u8 clflag;
2036 u32 val;
2037
2038 if(clear) {
2039 val = (__gx->peZMode&~0xf)|0xf;
2040 GX_LOAD_BP_REG(val);
2041 val = (__gx->peCMode0&~0x3);
2042 GX_LOAD_BP_REG(val);
2043 }
2044
2045 clflag = 0;
2046 val = __gx->peCntrl;
2047 if(__gx->texCopyZTex && (val&0x7)!=0x0003) {
2048 clflag = 1;
2049 val = (val&~0x7)|0x0003;
2050 }
2051 if(clear || (val&0x7)==0x0003) {
2052 if(val&0x40) {
2053 clflag = 1;
2054 val = (val&~0x40);
2055 }
2056 }
2057 if(clflag) GX_LOAD_BP_REG(val);
2058
2059 val = 0x4b000000|(_SHIFTR(MEM_VIRTUAL_TO_PHYSICAL(dest),5,24));
2060
2061 GX_LOAD_BP_REG(__gx->texCopyTL);
2062 GX_LOAD_BP_REG(__gx->texCopyWH);
2063 GX_LOAD_BP_REG(__gx->texCopyDst);
2064 GX_LOAD_BP_REG(val);
2065
2066 __gx->texCopyCntrl = (__gx->texCopyCntrl&~0x800)|(_SHIFTL(clear,11,1));
2067 __gx->texCopyCntrl = (__gx->texCopyCntrl&~0x4000);
2068 __gx->texCopyCntrl = (__gx->texCopyCntrl&~0xff000000)|(_SHIFTL(0x52,24,8));
2069 GX_LOAD_BP_REG(__gx->texCopyCntrl);
2070
2071 if(clear) {
2072 GX_LOAD_BP_REG(__gx->peZMode);
2073 GX_LOAD_BP_REG(__gx->peCMode0);
2074 }
2075 if(clflag) GX_LOAD_BP_REG(__gx->peCntrl);
2076 }
2077
2078 void GX_SetTexCopySrc(u16 left,u16 top,u16 wd,u16 ht)
2079 {
2080 __gx->texCopyTL = (__gx->texCopyTL&~0x00ffffff)|XY(left,top);
2081 __gx->texCopyTL = (__gx->texCopyTL&~0xff000000)|(_SHIFTL(0x49,24,8));
2082 __gx->texCopyWH = (__gx->texCopyWH&~0x00ffffff)|XY((wd-1),(ht-1));
2083 __gx->texCopyWH = (__gx->texCopyWH&~0xff000000)|(_SHIFTL(0x4a,24,8));
2084 }
2085
2086 void GX_SetTexCopyDst(u16 wd,u16 ht,u32 fmt,u8 mipmap)
2087 {
2088 u8 lfmt = fmt&0xf;
2089 u32 xtiles,ytiles,zplanes;
2090
2091 __GetImageTileCount(fmt,wd,ht,&xtiles,&ytiles,&zplanes);
2092 __gx->texCopyDst = (__gx->texCopyDst&~0x3ff)|((xtiles*zplanes)&0x3ff);
2093
2094 if(fmt==GX_TF_Z16) lfmt = 11;
2095 if(fmt==GX_CTF_YUVA8 || (fmt>=GX_TF_I4 && fmt<GX_TF_RGB565)) __gx->texCopyCntrl = (__gx->texCopyCntrl&~0x18000)|0x18000;
2096 else __gx->texCopyCntrl = (__gx->texCopyCntrl&~0x18000)|0x10000;
2097
2098 __gx->texCopyCntrl = (__gx->texCopyCntrl&~0x8)|(lfmt&0x8);
2099 __gx->texCopyCntrl = (__gx->texCopyCntrl&~0x200)|(_SHIFTL(mipmap,9,1));
2100 __gx->texCopyCntrl = (__gx->texCopyCntrl&~0x70)|(_SHIFTL(lfmt,4,3));
2101
2102 __gx->texCopyDst = (__gx->texCopyDst&~0xff000000)|(_SHIFTL(0x4d,24,8));
2103
2104 __gx->texCopyZTex = ((fmt&_GX_TF_ZTF)==_GX_TF_ZTF);
2105 }
2106
2107 void GX_ClearBoundingBox()
2108 {
2109 GX_LOAD_BP_REG(0x550003ff);
2110 GX_LOAD_BP_REG(0x560003ff);
2111 }
2112
2113 void GX_BeginDispList(void *list,u32 size)
2114 {
2115 struct __gxfifo *fifo;
2116
2117 if(__gx->dirtyState)
2118 __GX_SetDirtyState();
2119
2120 if(__gx->saveDLctx)
2121 memcpy(_gx_saved_data,__gxregs,STRUCT_REGDEF_SIZE);
2122
2123 fifo = (struct __gxfifo*)&_gx_dl_fifoobj;
2124 fifo->buf_start = (u32)list;
2125 fifo->buf_end = (u32)list + size - 4;
2126 fifo->size = size;
2127
2128 fifo->rd_ptr = (u32)list;
2129 fifo->wt_ptr = (u32)list;
2130 fifo->rdwt_dst = 0;
2131
2132 __gx->gxFifoUnlinked = 1;
2133
2134 GX_GetCPUFifo(&_gx_old_cpufifo);
2135 GX_SetCPUFifo(&_gx_dl_fifoobj);
2136 __GX_ResetWriteGatherPipe();
2137 }
2138
2139 u32 GX_EndDispList()
2140 {
2141 u32 level;
2142 u8 wrap = 0;
2143
2144 GX_GetCPUFifo(&_gx_dl_fifoobj);
2145 GX_SetCPUFifo(&_gx_old_cpufifo);
2146
2147 if(__gx->saveDLctx) {
2148 _CPU_ISR_Disable(level);
2149 memcpy(__gxregs,_gx_saved_data,STRUCT_REGDEF_SIZE);
2150 _CPU_ISR_Restore(level);
2151 }
2152
2153 __gx->gxFifoUnlinked = 0;
2154
2155 wrap = GX_GetFifoWrap(&_gx_dl_fifoobj);
2156 if(wrap) return 0;
2157
2158 return GX_GetFifoCount(&_gx_dl_fifoobj);
2159 }
2160
2161 void GX_CallDispList(void *list,u32 nbytes)
2162 {
2163 if(__gx->dirtyState)
2164 __GX_SetDirtyState();
2165
2166 if(!__gx->vcdClear)
2167 __GX_SendFlushPrim();
2168
2169 wgPipe->U8 = 0x40; //call displaylist
2170 wgPipe->U32 = MEM_VIRTUAL_TO_PHYSICAL(list);
2171 wgPipe->U32 = nbytes;
2172 }
2173
2174 void GX_SetChanCtrl(s32 channel,u8 enable,u8 ambsrc,u8 matsrc,u8 litmask,u8 diff_fn,u8 attn_fn)
2175 {
2176 u32 reg,difffn = (attn_fn==GX_AF_SPEC)?GX_DF_NONE:diff_fn;
2177 u32 val = (matsrc&1)|(_SHIFTL(enable,1,1))|(_SHIFTL(litmask,2,4))|(_SHIFTL(ambsrc,6,1))|(_SHIFTL(difffn,7,2))|(_SHIFTL(((GX_AF_NONE-attn_fn)>0),9,1))|(_SHIFTL((attn_fn&1),10,1))|(_SHIFTL((_SHIFTR(litmask,4,4)),11,4));
2178
2179 reg = (channel&0x03);
2180 __gx->chnCntrl[reg] = val;
2181 __gx->dirtyState |= (0x1000<<reg);
2182
2183 if(channel==GX_COLOR0A0) {
2184 __gx->chnCntrl[2] = val;
2185 __gx->dirtyState |= 0x5000;
2186 } else {
2187 __gx->chnCntrl[3] = val;
2188 __gx->dirtyState |= 0xa000;
2189 }
2190 }
2191
2192 void GX_SetChanAmbColor(s32 channel,GXColor color)
2193 {
2194 u32 reg,val = (_SHIFTL(color.r,24,8))|(_SHIFTL(color.g,16,8))|(_SHIFTL(color.b,8,8))|0x00;
2195 switch(channel) {
2196 case GX_COLOR0:
2197 reg = 0;
2198 val |= (__gx->chnAmbColor[0]&0xff);
2199 break;
2200 case GX_COLOR1:
2201 reg = 1;
2202 val |= (__gx->chnAmbColor[1]&0xff);
2203 break;
2204 case GX_ALPHA0:
2205 reg = 0;
2206 val = ((__gx->chnAmbColor[0]&~0xff)|(color.a&0xff));
2207 break;
2208 case GX_ALPHA1:
2209 reg = 1;
2210 val = ((__gx->chnAmbColor[1]&~0xff)|(color.a&0xff));
2211 break;
2212 case GX_COLOR0A0:
2213 reg = 0;
2214 val |= (color.a&0xFF);
2215 break;
2216 case GX_COLOR1A1:
2217 reg = 1;
2218 val |= (color.a&0xFF);
2219 break;
2220 default:
2221 return;
2222 }
2223
2224 __gx->chnAmbColor[reg] = val;
2225 __gx->dirtyState |= (0x0100<<reg);
2226 }
2227
2228 void GX_SetChanMatColor(s32 channel,GXColor color)
2229 {
2230 u32 reg,val = (_SHIFTL(color.r,24,8))|(_SHIFTL(color.g,16,8))|(_SHIFTL(color.b,8,8))|0x00;
2231 switch(channel) {
2232 case GX_COLOR0:
2233 reg = 0;
2234 val |= (__gx->chnMatColor[0]&0xff);
2235 break;
2236 case GX_COLOR1:
2237 reg = 1;
2238 val |= (__gx->chnMatColor[1]&0xff);
2239 break;
2240 case GX_ALPHA0:
2241 reg = 0;
2242 val = ((__gx->chnMatColor[0]&~0xff)|(color.a&0xff));
2243 break;
2244 case GX_ALPHA1:
2245 reg = 1;
2246 val = ((__gx->chnMatColor[1]&~0xff)|(color.a&0xff));
2247 break;
2248 case GX_COLOR0A0:
2249 reg = 0;
2250 val |= (color.a&0xFF);
2251 break;
2252 case GX_COLOR1A1:
2253 reg = 1;
2254 val |= (color.a&0xFF);
2255 break;
2256 default:
2257 return;
2258 }
2259
2260 __gx->chnMatColor[reg] = val;
2261 __gx->dirtyState |= (0x0400<<reg);
2262 }
2263
2264 void GX_SetArray(u32 attr,void *ptr,u8 stride)
2265 {
2266 u32 idx = 0;
2267
2268 if(attr==GX_VA_NBT) attr = GX_VA_NRM;
2269 if(attr>=GX_VA_POS && attr<=GX_LIGHTARRAY) {
2270 idx = attr-GX_VA_POS;
2271 GX_LOAD_CP_REG((0xA0+idx),(u32)MEM_VIRTUAL_TO_PHYSICAL(ptr));
2272 GX_LOAD_CP_REG((0xB0+idx),(u32)stride);
2273 }
2274 }
2275
2276 static __inline__ void __SETVCDATTR(u8 attr,u8 type)
2277 {
2278 switch(attr) {
2279 case GX_VA_PTNMTXIDX:
2280 __gx->vcdLo = (__gx->vcdLo&~0x1)|(type&0x1);
2281 break;
2282 case GX_VA_TEX0MTXIDX:
2283 __gx->vcdLo = (__gx->vcdLo&~0x2)|(_SHIFTL(type,1,1));
2284 break;
2285 case GX_VA_TEX1MTXIDX:
2286 __gx->vcdLo = (__gx->vcdLo&~0x4)|(_SHIFTL(type,2,1));
2287 break;
2288 case GX_VA_TEX2MTXIDX:
2289 __gx->vcdLo = (__gx->vcdLo&~0x8)|(_SHIFTL(type,3,1));
2290 break;
2291 case GX_VA_TEX3MTXIDX:
2292 __gx->vcdLo = (__gx->vcdLo&~0x10)|(_SHIFTL(type,4,1));
2293 break;
2294 case GX_VA_TEX4MTXIDX:
2295 __gx->vcdLo = (__gx->vcdLo&~0x20)|(_SHIFTL(type,5,1));
2296 break;
2297 case GX_VA_TEX5MTXIDX:
2298 __gx->vcdLo = (__gx->vcdLo&~0x40)|(_SHIFTL(type,6,1));
2299 break;
2300 case GX_VA_TEX6MTXIDX:
2301 __gx->vcdLo = (__gx->vcdLo&~0x80)|(_SHIFTL(type,7,1));
2302 break;
2303 case GX_VA_TEX7MTXIDX:
2304 __gx->vcdLo = (__gx->vcdLo&~0x100)|(_SHIFTL(type,8,1));
2305 break;
2306 case GX_VA_POS:
2307 __gx->vcdLo = (__gx->vcdLo&~0x600)|(_SHIFTL(type,9,2));
2308 break;
2309 case GX_VA_NRM:
2310 __gx->vcdLo = (__gx->vcdLo&~0x1800)|(_SHIFTL(type,11,2));
2311 __gx->vcdNrms = 1;
2312 break;
2313 case GX_VA_NBT:
2314 __gx->vcdLo = (__gx->vcdLo&~0x1800)|(_SHIFTL(type,11,2));
2315 __gx->vcdNrms = 2;
2316 break;
2317 case GX_VA_CLR0:
2318 __gx->vcdLo = (__gx->vcdLo&~0x6000)|(_SHIFTL(type,13,2));
2319 break;
2320 case GX_VA_CLR1:
2321 __gx->vcdLo = (__gx->vcdLo&~0x18000)|(_SHIFTL(type,15,2));
2322 break;
2323 case GX_VA_TEX0:
2324 __gx->vcdHi = (__gx->vcdHi&~0x3)|(type&0x3);
2325 break;
2326 case GX_VA_TEX1:
2327 __gx->vcdHi = (__gx->vcdHi&~0xc)|(_SHIFTL(type,2,2));
2328 break;
2329 case GX_VA_TEX2:
2330 __gx->vcdHi = (__gx->vcdHi&~0x30)|(_SHIFTL(type,4,2));
2331 break;
2332 case GX_VA_TEX3:
2333 __gx->vcdHi = (__gx->vcdHi&~0xc0)|(_SHIFTL(type,6,2));
2334 break;
2335 case GX_VA_TEX4:
2336 __gx->vcdHi = (__gx->vcdHi&~0x300)|(_SHIFTL(type,8,2));
2337 break;
2338 case GX_VA_TEX5:
2339 __gx->vcdHi = (__gx->vcdHi&~0xc00)|(_SHIFTL(type,10,2));
2340 break;
2341 case GX_VA_TEX6:
2342 __gx->vcdHi = (__gx->vcdHi&~0x3000)|(_SHIFTL(type,12,2));
2343 break;
2344 case GX_VA_TEX7:
2345 __gx->vcdHi = (__gx->vcdHi&~0xc000)|(_SHIFTL(type,14,2));
2346 break;
2347 }
2348 }
2349
2350 void GX_SetVtxDesc(u8 attr,u8 type)
2351 {
2352 __SETVCDATTR(attr,type);
2353 __gx->dirtyState |= 0x0008;
2354 }
2355
2356 void GX_SetVtxDescv(GXVtxDesc *attr_list)
2357 {
2358 u32 i;
2359
2360 if(!attr_list) return;
2361
2362 for(i=0;i<GX_MAX_VTXDESC_LISTSIZE;i++){
2363 if(attr_list[i].attr==GX_VA_NULL) break;
2364
2365 __SETVCDATTR(attr_list[i].attr,attr_list[i].type);
2366 }
2367 __gx->dirtyState |= 0x0008;
2368 }
2369
2370 static __inline__ void __SETVCDFMT(u8 vtxfmt,u32 vtxattr,u32 comptype,u32 compsize,u32 frac)
2371 {
2372 u8 vat = (vtxfmt&7);
2373
2374 if(vtxattr==GX_VA_POS && (comptype==GX_POS_XY || comptype==GX_POS_XYZ)
2375 && (compsize>=GX_U8 && compsize<=GX_F32)) {
2376 __gx->VAT0reg[vat] = (__gx->VAT0reg[vat]&~0x1)|(comptype&1);
2377 __gx->VAT0reg[vat] = (__gx->VAT0reg[vat]&~0xe)|(_SHIFTL(compsize,1,3));
2378 __gx->VAT0reg[vat] = (__gx->VAT0reg[vat]&~0x1f0)|(_SHIFTL(frac,4,5));
2379 if(frac)
2380 __gx->VAT0reg[vat] = (__gx->VAT0reg[vat]&~0x40000000)|0x40000000;
2381 } else if(vtxattr==GX_VA_NRM && comptype==GX_NRM_XYZ
2382 && (compsize==GX_S8 || compsize==GX_S16 || compsize==GX_F32)) {
2383 __gx->VAT0reg[vat] = (__gx->VAT0reg[vat]&~0x200);
2384 __gx->VAT0reg[vat] = (__gx->VAT0reg[vat]&~0x1C00)|(_SHIFTL(compsize,10,3));
2385 __gx->VAT0reg[vat] = (__gx->VAT0reg[vat]&~0x80000000);
2386 } else if(vtxattr==GX_VA_NBT && (comptype==GX_NRM_NBT || comptype==GX_NRM_NBT3)
2387 && (compsize==GX_S8 || compsize==GX_S16 || compsize==GX_F32)) {
2388 __gx->VAT0reg[vat] = (__gx->VAT0reg[vat]&~0x200)|0x200;
2389 __gx->VAT0reg[vat] = (__gx->VAT0reg[vat]&~0x1C00)|(_SHIFTL(compsize,10,3));
2390 if(comptype==GX_NRM_NBT3)
2391 __gx->VAT0reg[vat] = (__gx->VAT0reg[vat]&~0x80000000)|0x80000000;
2392 } else if(vtxattr==GX_VA_CLR0 && (comptype==GX_CLR_RGB || comptype==GX_CLR_RGBA)
2393 && (compsize>=GX_RGB565 && compsize<=GX_RGBA8)) {
2394 __gx->VAT0reg[vat] = (__gx->VAT0reg[vat]&~0x2000)|(_SHIFTL(comptype,13,1));
2395 __gx->VAT0reg[vat] = (__gx->VAT0reg[vat]&~0x1C000)|(_SHIFTL(compsize,14,3));
2396 } else if(vtxattr==GX_VA_CLR1 && (comptype==GX_CLR_RGB || comptype==GX_CLR_RGBA)
2397 && (compsize>=GX_RGB565 && compsize<=GX_RGBA8)) {
2398 __gx->VAT0reg[vat] = (__gx->VAT0reg[vat]&~0x20000)|(_SHIFTL(comptype,17,1));
2399 __gx->VAT0reg[vat] = (__gx->VAT0reg[vat]&~0x1C0000)|(_SHIFTL(compsize,18,3));
2400 } else if(vtxattr==GX_VA_TEX0 && (comptype==GX_TEX_S || comptype==GX_TEX_ST)
2401 && (compsize>=GX_U8 && compsize<=GX_F32)) {
2402 __gx->VAT0reg[vat] = (__gx->VAT0reg[vat]&~0x200000)|(_SHIFTL(comptype,21,1));
2403 __gx->VAT0reg[vat] = (__gx->VAT0reg[vat]&~0x1C00000)|(_SHIFTL(compsize,22,3));
2404 __gx->VAT0reg[vat] = (__gx->VAT0reg[vat]&~0x3E000000)|(_SHIFTL(frac,25,5));
2405 if(frac)
2406 __gx->VAT0reg[vat] = (__gx->VAT0reg[vat]&~0x40000000)|0x40000000;
2407 } else if(vtxattr==GX_VA_TEX1 && (comptype==GX_TEX_S || comptype==GX_TEX_ST)
2408 && (compsize>=GX_U8 && compsize<=GX_F32)) {
2409 __gx->VAT1reg[vat] = (__gx->VAT1reg[vat]&~0x1)|(comptype&1);
2410 __gx->VAT1reg[vat] = (__gx->VAT1reg[vat]&~0xe)|(_SHIFTL(compsize,1,3));
2411 __gx->VAT1reg[vat] = (__gx->VAT1reg[vat]&~0x1F0)|(_SHIFTL(frac,4,5));
2412 if(frac)
2413 __gx->VAT0reg[vat] = (__gx->VAT0reg[vat]&~0x40000000)|0x40000000;
2414 } else if(vtxattr==GX_VA_TEX2 && (comptype==GX_TEX_S || comptype==GX_TEX_ST)
2415 && (compsize>=GX_U8 && compsize<=GX_F32)) {
2416 __gx->VAT1reg[vat] = (__gx->VAT1reg[vat]&~0x200)|(_SHIFTL(comptype,9,1));
2417 __gx->VAT1reg[vat] = (__gx->VAT1reg[vat]&~0x1C00)|(_SHIFTL(compsize,10,3));
2418 __gx->VAT1reg[vat] = (__gx->VAT1reg[vat]&~0x3E000)|(_SHIFTL(frac,13,5));
2419 if(frac)
2420 __gx->VAT0reg[vat] = (__gx->VAT0reg[vat]&~0x40000000)|0x40000000;
2421 } else if(vtxattr==GX_VA_TEX3 && (comptype==GX_TEX_S || comptype==GX_TEX_ST)
2422 && (compsize>=GX_U8 && compsize<=GX_F32)) {
2423 __gx->VAT1reg[vat] = (__gx->VAT1reg[vat]&~0x40000)|(_SHIFTL(comptype,18,1));
2424 __gx->VAT1reg[vat] = (__gx->VAT1reg[vat]&~0x380000)|(_SHIFTL(compsize,19,3));
2425 __gx->VAT1reg[vat] = (__gx->VAT1reg[vat]&~0x7C00000)|(_SHIFTL(frac,22,5));
2426 if(frac)
2427 __gx->VAT0reg[vat] = (__gx->VAT0reg[vat]&~0x40000000)|0x40000000;
2428 } else if(vtxattr==GX_VA_TEX4 && (comptype==GX_TEX_S || comptype==GX_TEX_ST)
2429 && (compsize>=GX_U8 && compsize<=GX_F32)) {
2430 __gx->VAT1reg[vat] = (__gx->VAT1reg[vat]&~0x8000000)|(_SHIFTL(comptype,27,1));
2431 __gx->VAT1reg[vat] = (__gx->VAT1reg[vat]&~0x70000000)|(_SHIFTL(compsize,28,3));
2432 __gx->VAT2reg[vat] = (__gx->VAT2reg[vat]&~0x1f)|(frac&0x1f);
2433 if(frac)
2434 __gx->VAT0reg[vat] = (__gx->VAT0reg[vat]&~0x40000000)|0x40000000;
2435 } else if(vtxattr==GX_VA_TEX5 && (comptype==GX_TEX_S || comptype==GX_TEX_ST)
2436 && (compsize>=GX_U8 && compsize<=GX_F32)) {
2437 __gx->VAT2reg[vat] = (__gx->VAT2reg[vat]&~0x20)|(_SHIFTL(comptype,5,1));
2438 __gx->VAT2reg[vat] = (__gx->VAT2reg[vat]&~0x1C0)|(_SHIFTL(compsize,6,3));
2439 __gx->VAT2reg[vat] = (__gx->VAT2reg[vat]&~0x3E00)|(_SHIFTL(frac,9,5));
2440 if(frac)
2441 __gx->VAT0reg[vat] = (__gx->VAT0reg[vat]&~0x40000000)|0x40000000;
2442 } else if(vtxattr==GX_VA_TEX6 && (comptype==GX_TEX_S || comptype==GX_TEX_ST)
2443 && (compsize>=GX_U8 && compsize<=GX_F32)) {
2444 __gx->VAT2reg[vat] = (__gx->VAT2reg[vat]&~0x4000)|(_SHIFTL(comptype,14,1));
2445 __gx->VAT2reg[vat] = (__gx->VAT2reg[vat]&~0x38000)|(_SHIFTL(compsize,15,3));
2446 __gx->VAT2reg[vat] = (__gx->VAT2reg[vat]&~0x7C0000)|(_SHIFTL(frac,18,5));
2447 if(frac)
2448 __gx->VAT0reg[vat] = (__gx->VAT0reg[vat]&~0x40000000)|0x40000000;
2449 } else if(vtxattr==GX_VA_TEX7 && (comptype==GX_TEX_S || comptype==GX_TEX_ST)
2450 && (compsize>=GX_U8 && compsize<=GX_F32)) {
2451 __gx->VAT2reg[vat] = (__gx->VAT2reg[vat]&~0x800000)|(_SHIFTL(comptype,23,1));
2452 __gx->VAT2reg[vat] = (__gx->VAT2reg[vat]&~0x7000000)|(_SHIFTL(compsize,24,3));
2453 __gx->VAT2reg[vat] = (__gx->VAT2reg[vat]&~0xF8000000)|(_SHIFTL(frac,27,5));
2454 if(frac)
2455 __gx->VAT0reg[vat] = (__gx->VAT0reg[vat]&~0x40000000)|0x40000000;
2456 }
2457 }
2458
2459 void GX_SetVtxAttrFmt(u8 vtxfmt,u32 vtxattr,u32 comptype,u32 compsize,u32 frac)
2460 {
2461 __SETVCDFMT(vtxfmt,vtxattr,comptype,compsize,frac);
2462 __gx->VATTable |= (1<<vtxfmt);
2463 __gx->dirtyState |= 0x0010;
2464 }
2465
2466 void GX_SetVtxAttrFmtv(u8 vtxfmt,GXVtxAttrFmt *attr_list)
2467 {
2468 u32 i;
2469
2470 for(i=0;i<GX_MAX_VTXATTRFMT_LISTSIZE;i++) {
2471 if(attr_list[i].vtxattr==GX_VA_NULL) break;
2472
2473 __SETVCDFMT(vtxfmt,attr_list[i].vtxattr,attr_list[i].comptype,attr_list[i].compsize,attr_list[i].frac);
2474 }
2475 __gx->VATTable |= (1<<vtxfmt);
2476 __gx->dirtyState |= 0x0010;
2477 }
2478
2479 void GX_Begin(u8 primitve,u8 vtxfmt,u16 vtxcnt)
2480 {
2481 u8 reg = primitve|(vtxfmt&7);
2482
2483 if(__gx->dirtyState)
2484 __GX_SetDirtyState();
2485
2486 wgPipe->U8 = reg;
2487 wgPipe->U16 = vtxcnt;
2488 }
2489
2490 void GX_SetTexCoordGen(u16 texcoord,u32 tgen_typ,u32 tgen_src,u32 mtxsrc)
2491 {
2492 GX_SetTexCoordGen2(texcoord,tgen_typ,tgen_src,mtxsrc,GX_FALSE,GX_DTTIDENTITY);
2493 }
2494
2495 void GX_SetTexCoordGen2(u16 texcoord,u32 tgen_typ,u32 tgen_src,u32 mtxsrc,u32 normalize,u32 postmtx)
2496 {
2497 u32 txc;
2498 u32 texcoords;
2499 u8 vtxrow,stq;
2500
2501 if(texcoord>=GX_MAXCOORD) return;
2502
2503 stq = 0;
2504 switch(tgen_src) {
2505 case GX_TG_POS:
2506 vtxrow = 0;
2507 stq = 1;
2508 break;
2509 case GX_TG_NRM:
2510 vtxrow = 1;
2511 stq = 1;
2512 break;
2513 case GX_TG_BINRM:
2514 vtxrow = 3;
2515 stq = 1;
2516 break;
2517 case GX_TG_TANGENT:
2518 vtxrow = 4;
2519 stq = 1;
2520 break;
2521 case GX_TG_COLOR0:
2522 vtxrow = 2;
2523 break;
2524 case GX_TG_COLOR1:
2525 vtxrow = 2;
2526 break;
2527 case GX_TG_TEX0:
2528 vtxrow = 5;
2529 break;
2530 case GX_TG_TEX1:
2531 vtxrow = 6;
2532 break;
2533 case GX_TG_TEX2:
2534 vtxrow = 7;
2535 break;
2536 case GX_TG_TEX3:
2537 vtxrow = 8;
2538 break;
2539 case GX_TG_TEX4:
2540 vtxrow = 9;
2541 break;
2542 case GX_TG_TEX5:
2543 vtxrow = 10;
2544 break;
2545 case GX_TG_TEX6:
2546 vtxrow = 11;
2547 break;
2548 case GX_TG_TEX7:
2549 vtxrow = 12;
2550 break;
2551 default:
2552 vtxrow = 5;
2553 break;
2554 }
2555
2556 texcoords = 0;
2557 txc = (texcoord&7);
2558 if((tgen_typ==GX_TG_MTX3x4 || tgen_typ==GX_TG_MTX2x4))
2559 {
2560 if(tgen_typ==GX_TG_MTX3x4) texcoords = 0x02;
2561
2562 texcoords |= (_SHIFTL(stq,2,1));
2563 texcoords |= (_SHIFTL(vtxrow,7,5));
2564 } else if((tgen_typ>=GX_TG_BUMP0 && tgen_typ<=GX_TG_BUMP7))
2565 {
2566 tgen_src -= GX_TG_TEXCOORD0;
2567 tgen_typ -= GX_TG_BUMP0;
2568
2569 texcoords = 0x10;
2570 texcoords |= (_SHIFTL(stq,2,1));
2571 texcoords |= (_SHIFTL(vtxrow,7,5));
2572 texcoords |= (_SHIFTL(tgen_src,12,3));
2573 texcoords |= (_SHIFTL(tgen_typ,15,3));
2574 } else if(tgen_typ==GX_TG_SRTG) {
2575 if(tgen_src==GX_TG_COLOR0) texcoords = 0x20;
2576 else if(tgen_src==GX_TG_COLOR1) texcoords = 0x30;
2577 texcoords |= (_SHIFTL(stq,2,1));
2578 texcoords |= (_SHIFTL(2,7,5));
2579 }
2580
2581 postmtx -= GX_DTTMTX0;
2582 __gx->texCoordGen[txc] = texcoords;
2583 __gx->texCoordGen2[txc] = ((_SHIFTL(normalize,8,1))|(postmtx&0x3f));
2584
2585 switch(texcoord) {
2586 case GX_TEXCOORD0:
2587 __gx->mtxIdxLo = (__gx->mtxIdxLo&~0xfc0)|(_SHIFTL(mtxsrc,6,6));
2588 break;
2589 case GX_TEXCOORD1:
2590 __gx->mtxIdxLo = (__gx->mtxIdxLo&~0x3f000)|(_SHIFTL(mtxsrc,12,6));
2591 break;
2592 case GX_TEXCOORD2:
2593 __gx->mtxIdxLo = (__gx->mtxIdxLo&~0xfc0000)|(_SHIFTL(mtxsrc,18,6));
2594 break;
2595 case GX_TEXCOORD3:
2596 __gx->mtxIdxLo = (__gx->mtxIdxLo&~0x3f000000)|(_SHIFTL(mtxsrc,24,6));
2597 break;
2598 case GX_TEXCOORD4:
2599 __gx->mtxIdxHi = (__gx->mtxIdxHi&~0x3f)|(mtxsrc&0x3f);
2600 break;
2601 case GX_TEXCOORD5:
2602 __gx->mtxIdxHi = (__gx->mtxIdxHi&~0xfc0)|(_SHIFTL(mtxsrc,6,6));
2603 break;
2604 case GX_TEXCOORD6:
2605 __gx->mtxIdxHi = (__gx->mtxIdxHi&~0x3f000)|(_SHIFTL(mtxsrc,12,6));
2606 break;
2607 case GX_TEXCOORD7:
2608 __gx->mtxIdxHi = (__gx->mtxIdxHi&~0xfc0000)|(_SHIFTL(mtxsrc,18,6));
2609 break;
2610 }
2611 __gx->dirtyState |= (0x04000000|(0x00010000<<texcoord));
2612 }
2613
2614 void GX_SetZTexture(u8 op,u8 fmt,u32 bias)
2615 {
2616 u32 val = 0;
2617
2618 if(fmt==GX_TF_Z8) fmt = 0;
2619 else if(fmt==GX_TF_Z16) fmt = 1;
2620 else fmt = 2;
2621
2622 val = (u32)(_SHIFTL(op,2,2))|(fmt&3);
2623 GX_LOAD_BP_REG(0xF4000000|(bias&0x00FFFFFF));
2624 GX_LOAD_BP_REG(0xF5000000|(val&0x00FFFFFF));
2625 }
2626
2627 static inline void WriteMtxPS4x3(register Mtx mt,register void *wgpipe)
2628 {
2629 register f32 tmp0,tmp1,tmp2,tmp3,tmp4,tmp5;
2630 __asm__ __volatile__ (
2631 "psq_l %0,0(%6),0,0\n\
2632 psq_l %1,8(%6),0,0\n\
2633 psq_l %2,16(%6),0,0\n\
2634 psq_l %3,24(%6),0,0\n\
2635 psq_l %4,32(%6),0,0\n\
2636 psq_l %5,40(%6),0,0\n\
2637 psq_st %0,0(%7),0,0\n\
2638 psq_st %1,0(%7),0,0\n\
2639 psq_st %2,0(%7),0,0\n\
2640 psq_st %3,0(%7),0,0\n\
2641 psq_st %4,0(%7),0,0\n\
2642 psq_st %5,0(%7),0,0"
2643 : "=&f"(tmp0),"=&f"(tmp1),"=&f"(tmp2),"=&f"(tmp3),"=&f"(tmp4),"=&f"(tmp5)
2644 : "b"(mt), "b"(wgpipe)
2645 : "memory"
2646 );
2647 }
2648
2649 static inline void WriteMtxPS3x3from4x3(register Mtx mt,register void *wgpipe)
2650 {
2651 register f32 tmp0,tmp1,tmp2,tmp3,tmp4,tmp5;
2652 __asm__ __volatile__
2653 ("psq_l %0,0(%6),0,0\n\
2654 lfs %1,8(%6)\n\
2655 psq_l %2,16(%6),0,0\n\
2656 lfs %3,24(%6)\n\
2657 psq_l %4,32(%6),0,0\n\
2658 lfs %5,40(%6)\n\
2659 psq_st %0,0(%7),0,0\n\
2660 stfs %1,0(%7)\n\
2661 psq_st %2,0(%7),0,0\n\
2662 stfs %3,0(%7)\n\
2663 psq_st %4,0(%7),0,0\n\
2664 stfs %5,0(%7)"
2665 : "=&f"(tmp0),"=&f"(tmp1),"=&f"(tmp2),"=&f"(tmp3),"=&f"(tmp4),"=&f"(tmp5)
2666 : "b"(mt), "b"(wgpipe)
2667 : "memory"
2668 );
2669 }
2670
2671 static inline void WriteMtxPS3x3(register Mtx33 mt,register void *wgpipe)
2672 {
2673 register f32 tmp0,tmp1,tmp2,tmp3,tmp4;
2674 __asm__ __volatile__
2675 ("psq_l %0,0(%5),0,0\n\
2676 psq_l %1,8(%5),0,0\n\
2677 psq_l %2,16(%5),0,0\n\
2678 psq_l %3,24(%5),0,0\n\
2679 lfs %4,32(%5)\n\
2680 psq_st %0,0(%6),0,0\n\
2681 psq_st %1,0(%6),0,0\n\
2682 psq_st %2,0(%6),0,0\n\
2683 psq_st %3,0(%6),0,0\n\
2684 stfs %4,0(%6)"
2685 : "=&f"(tmp0),"=&f"(tmp1),"=&f"(tmp2),"=&f"(tmp3),"=&f"(tmp4)
2686 : "b"(mt), "b"(wgpipe)
2687 : "memory"
2688 );
2689 }
2690
2691 static inline void WriteMtxPS4x2(register Mtx mt,register void *wgpipe)
2692 {
2693 register f32 tmp0,tmp1,tmp2,tmp3;
2694 __asm__ __volatile__
2695 ("psq_l %0,0(%4),0,0\n\
2696 psq_l %1,8(%4),0,0\n\
2697 psq_l %2,16(%4),0,0\n\
2698 psq_l %3,24(%4),0,0\n\
2699 psq_st %0,0(%5),0,0\n\
2700 psq_st %1,0(%5),0,0\n\
2701 psq_st %2,0(%5),0,0\n\
2702 psq_st %3,0(%5),0,0"
2703 : "=&f"(tmp0),"=&f"(tmp1),"=&f"(tmp2),"=&f"(tmp3)
2704 : "b"(mt), "b"(wgpipe)
2705 : "memory"
2706 );
2707 }
2708
2709 void GX_LoadPosMtxImm(Mtx mt,u32 pnidx)
2710 {
2711 GX_LOAD_XF_REGS((0x0000|(_SHIFTL(pnidx,2,8))),12);
2712 WriteMtxPS4x3(mt,(void*)wgPipe);
2713 }
2714
2715 void GX_LoadPosMtxIdx(u16 mtxidx,u32 pnidx)
2716 {
2717 wgPipe->U8 = 0x20;
2718 wgPipe->U32 = ((_SHIFTL(mtxidx,16,16))|0xb000|(_SHIFTL(pnidx,2,8)));
2719 }
2720
2721 void GX_LoadNrmMtxImm(Mtx mt,u32 pnidx)
2722 {
2723 GX_LOAD_XF_REGS((0x0400|(pnidx*3)),9);
2724 WriteMtxPS3x3from4x3(mt,(void*)wgPipe);
2725 }
2726
2727 void GX_LoadNrmMtxImm3x3(Mtx33 mt,u32 pnidx)
2728 {
2729 GX_LOAD_XF_REGS((0x0400|(pnidx*3)),9);
2730 WriteMtxPS3x3(mt,(void*)wgPipe);
2731 }
2732
2733 void GX_LoadNrmMtxIdx3x3(u16 mtxidx,u32 pnidx)
2734 {
2735 wgPipe->U8 = 0x28;
2736 wgPipe->U32 = ((_SHIFTL(mtxidx,16,16))|0x8000|(0x0400|(pnidx*3)));
2737 }
2738
2739 void GX_LoadTexMtxImm(Mtx mt,u32 texidx,u8 type)
2740 {
2741 u32 addr = 0;
2742 u32 rows = (type==GX_MTX2x4)?2:3;
2743
2744 if(texidx<GX_DTTMTX0) addr = (_SHIFTL(texidx,2,8));
2745 else {
2746 texidx -= GX_DTTMTX0;
2747 addr = 0x0500 + (_SHIFTL(texidx,2,8));
2748 }
2749
2750 GX_LOAD_XF_REGS(addr,(rows*4));
2751 if(type==GX_MTX2x4)
2752 WriteMtxPS4x2(mt,(void*)wgPipe);
2753 else
2754 WriteMtxPS4x3(mt,(void*)wgPipe);
2755 }
2756
2757 void GX_LoadTexMtxIdx(u16 mtxidx,u32 texidx,u8 type)
2758 {
2759 u32 addr,size = (type==GX_MTX2x4)?7:11;
2760
2761 if(texidx<GX_DTTMTX0) addr = 0x0000|(_SHIFTL(texidx,2,8));
2762 else addr = 0x0500|(_SHIFTL((texidx-GX_DTTMTX0),2,8));
2763
2764 wgPipe->U8 = 0x30;
2765 wgPipe->U32 = ((_SHIFTL(mtxidx,16,16))|(_SHIFTL(size,12,4))|addr);
2766 }
2767
2768 void GX_SetCurrentMtx(u32 mtx)
2769 {
2770 __gx->mtxIdxLo = (__gx->mtxIdxLo&~0x3f)|(mtx&0x3f);
2771 __gx->dirtyState |= 0x04000000;
2772 }
2773
2774 void GX_SetNumTexGens(u32 nr)
2775 {
2776 __gx->genMode = (__gx->genMode&~0xf)|(nr&0xf);
2777 __gx->dirtyState |= 0x02000004;
2778 }
2779
2780 void GX_InvVtxCache()
2781 {
2782 wgPipe->U8 = 0x48; // vertex cache weg
2783 }
2784
2785 void GX_SetZMode(u8 enable,u8 func,u8 update_enable)
2786 {
2787 __gx->peZMode = (__gx->peZMode&~0x1)|(enable&1);
2788 __gx->peZMode = (__gx->peZMode&~0xe)|(_SHIFTL(func,1,3));
2789 __gx->peZMode = (__gx->peZMode&~0x10)|(_SHIFTL(update_enable,4,1));
2790 GX_LOAD_BP_REG(__gx->peZMode);
2791 }
2792
2793 static void __GetTexTileShift(u32 fmt,u32 *xshift,u32 *yshift)
2794 {
2795 switch(fmt) {
2796 case GX_TF_I4:
2797 case GX_TF_IA4:
2798 case GX_CTF_R4:
2799 case GX_CTF_RA4:
2800 case GX_CTF_Z4:
2801 *xshift = 3;
2802 *yshift = 3;
2803 break;
2804 case GX_TF_Z8:
2805 case GX_TF_I8:
2806 case GX_TF_IA8:
2807 case GX_CTF_RA8:
2808 case GX_CTF_A8:
2809 case GX_CTF_R8:
2810 case GX_CTF_G8:
2811 case GX_CTF_B8:
2812 case GX_CTF_RG8:
2813 case GX_CTF_GB8:
2814 case GX_CTF_Z8M:
2815 case GX_CTF_Z8L:
2816 *xshift = 3;
2817 *yshift = 2;
2818 break;
2819 case GX_TF_Z16:
2820 case GX_TF_Z24X8:
2821 case GX_CTF_Z16L:
2822 case GX_TF_RGB565:
2823 case GX_TF_RGB5A3:
2824 case GX_TF_RGBA8:
2825 *xshift = 2;
2826 *yshift = 2;
2827 break;
2828 default:
2829 *xshift = 0;
2830 *yshift = 0;
2831 break;
2832 }
2833 }
2834
2835 u32 GX_GetTexObjFmt(GXTexObj *obj)
2836 {
2837 return ((struct __gx_texobj*)obj)->tex_fmt;
2838 }
2839
2840 u32 GX_GetTexObjMipMap(GXTexObj *obj)
2841 {
2842 return (((struct __gx_texobj*)obj)->tex_flag&0x01);
2843 }
2844
2845 u32 GX_GetTexBufferSize(u16 wd,u16 ht,u32 fmt,u8 mipmap,u8 maxlod)
2846 {
2847 u32 xshift,yshift,xtiles,ytiles,bitsize,size;
2848
2849 switch(fmt) {
2850 case GX_TF_I4:
2851 case GX_TF_IA4:
2852 case GX_TF_CMPR:
2853 case GX_CTF_R4:
2854 case GX_CTF_RA4:
2855 case GX_CTF_Z4:
2856 xshift = 3;
2857 yshift = 3;
2858 break;
2859 case GX_TF_Z8:
2860 case GX_TF_I8:
2861 case GX_CTF_RA8:
2862 case GX_CTF_A8:
2863 case GX_CTF_R8:
2864 case GX_CTF_G8:
2865 case GX_CTF_B8:
2866 case GX_CTF_RG8:
2867 case GX_CTF_GB8:
2868 case GX_CTF_Z8M:
2869 case GX_CTF_Z8L:
2870 xshift = 3;
2871 yshift = 2;
2872 break;
2873 case GX_TF_IA8:
2874 case GX_TF_Z16:
2875 case GX_TF_Z24X8:
2876 case GX_TF_RGB565:
2877 case GX_TF_RGB5A3:
2878 case GX_TF_RGBA8:
2879 case GX_CTF_Z16L:
2880 xshift = 2;
2881 yshift = 2;
2882 break;
2883 default:
2884 xshift = 2;
2885 yshift = 2;
2886 break;
2887 }
2888
2889 bitsize = 32;
2890 if(fmt==GX_TF_RGBA8 || fmt==GX_TF_Z24X8) bitsize = 64;
2891
2892 size = 0;
2893 if(mipmap) {
2894 u32 cnt = (maxlod&0xff);
2895 while(cnt) {
2896 u32 w = wd&0xffff;
2897 u32 h = ht&0xffff;
2898 xtiles = ((w+(1<<xshift))-1)>>xshift;
2899 ytiles = ((h+(1<<yshift))-1)>>yshift;
2900 if(cnt==0) return size;
2901
2902 size += ((xtiles*ytiles)*bitsize);
2903 if(w==0x0001 && h==0x0001) return size;
2904 if(wd>0x0001) wd = (w>>1);
2905 else wd = 0x0001;
2906 if(ht>0x0001) ht = (h>>1);
2907 else ht = 0x0001;
2908
2909 --cnt;
2910 }
2911 return size;
2912 }
2913
2914 wd &= 0xffff;
2915 xtiles = (wd+((1<<xshift)-1))>>xshift;
2916
2917 ht &= 0xffff;
2918 ytiles = (ht+((1<<yshift)-1))>>yshift;
2919
2920 size = ((xtiles*ytiles)*bitsize);
2921
2922 return size;
2923 }
2924
2925 void GX_InitTexCacheRegion(GXTexRegion *region,u8 is32bmipmap,u32 tmem_even,u8 size_even,u32 tmem_odd,u8 size_odd)
2926 {
2927 u32 sze = 0;
2928 struct __gx_texregion *ptr = (struct __gx_texregion*)region;
2929
2930 switch(size_even) {
2931 case GX_TEXCACHE_32K:
2932 sze = 3;
2933 break;
2934 case GX_TEXCACHE_128K:
2935 sze = 4;
2936 break;
2937 case GX_TEXCACHE_512K:
2938 sze = 5;
2939 break;
2940 default:
2941 sze = 3;
2942 break;
2943 }
2944 ptr->tmem_even = 0;
2945 ptr->tmem_even = (ptr->tmem_even&~0x7fff)|(_SHIFTR(tmem_even,5,15));
2946 ptr->tmem_even = (ptr->tmem_even&~0x38000)|(_SHIFTL(sze,15,3));
2947 ptr->tmem_even = (ptr->tmem_even&~0x1C0000)|(_SHIFTL(sze,18,3));
2948
2949 switch(size_odd) {
2950 case GX_TEXCACHE_32K:
2951 sze = 3;
2952 break;
2953 case GX_TEXCACHE_128K:
2954 sze = 4;
2955 break;
2956 case GX_TEXCACHE_512K:
2957 sze = 5;
2958 break;
2959 default:
2960 sze = 3;
2961 break;
2962 }
2963 ptr->tmem_odd = 0;
2964 ptr->tmem_odd = (ptr->tmem_odd&~0x7fff)|(_SHIFTR(tmem_odd,5,15));
2965 ptr->tmem_odd = (ptr->tmem_odd&~0x38000)|(_SHIFTL(sze,15,3));
2966 ptr->tmem_odd = (ptr->tmem_odd&~0x1C0000)|(_SHIFTL(sze,18,3));
2967
2968 ptr->ismipmap = is32bmipmap;
2969 ptr->iscached = 1;
2970 }
2971
2972 void GX_InitTexPreloadRegion(GXTexRegion *region,u32 tmem_even,u32 size_even,u32 tmem_odd,u32 size_odd)
2973 {
2974 struct __gx_texregion *ptr = (struct __gx_texregion*)region;
2975
2976 ptr->tmem_even = 0;
2977 ptr->tmem_even = (ptr->tmem_even&~0x7FFF)|(_SHIFTR(tmem_even,5,15));
2978 ptr->tmem_even = (ptr->tmem_even&~0x200000)|0x200000;
2979
2980 ptr->tmem_odd = 0;
2981 ptr->tmem_odd = (ptr->tmem_odd&~0x7FFF)|(_SHIFTR(tmem_odd,5,15));
2982
2983 ptr->size_even = _SHIFTR(size_even,5,16);
2984 ptr->size_odd = _SHIFTR(size_odd,5,16);
2985
2986 ptr->ismipmap = 0;
2987 ptr->iscached = 0;
2988 }
2989
2990 void GX_InitTlutRegion(GXTlutRegion *region,u32 tmem_addr,u8 tlut_sz)
2991 {
2992 struct __gx_tlutregion *ptr = (struct __gx_tlutregion*)region;
2993
2994 tmem_addr -= 0x80000;
2995
2996 ptr->tmem_addr_conf = 0;
2997 ptr->tmem_addr_conf = (ptr->tmem_addr_conf&~0x3ff)|(_SHIFTR(tmem_addr,9,10));
2998 ptr->tmem_addr_conf = (ptr->tmem_addr_conf&~0x1FFC00)|(_SHIFTL(tlut_sz,10,10));
2999 ptr->tmem_addr_conf = (ptr->tmem_addr_conf&~0xff000000)|(_SHIFTL(0x65,24,8));
3000 }
3001
3002 void GX_InitTexObj(GXTexObj *obj,void *img_ptr,u16 wd,u16 ht,u8 fmt,u8 wrap_s,u8 wrap_t,u8 mipmap)
3003 {
3004 u32 nwd,nht;
3005 u32 xshift,yshift;
3006 struct __gx_texobj *ptr = (struct __gx_texobj*)obj;
3007
3008 if(!obj) return;
3009
3010 memset(obj,0,sizeof(GXTexObj));
3011
3012 ptr->tex_filt = (ptr->tex_filt&~0x03)|(wrap_s&3);
3013 ptr->tex_filt = (ptr->tex_filt&~0x0c)|(_SHIFTL(wrap_t,2,2));
3014 ptr->tex_filt = (ptr->tex_filt&~0x10)|0x10;
3015
3016 if(mipmap) {
3017 ptr->tex_flag |= 0x01;
3018 if(fmt==GX_TF_CI4 || fmt==GX_TF_CI8 || fmt==GX_TF_CI14)
3019 ptr->tex_filt = (ptr->tex_filt&~0xe0)|0x00a0;
3020 else
3021 ptr->tex_filt = (ptr->tex_filt&~0xe0)|0x00c0;
3022 } else
3023 ptr->tex_filt= (ptr->tex_filt&~0xE0)|0x0080;
3024
3025 ptr->tex_fmt = fmt;
3026 ptr->tex_size = (ptr->tex_size&~0x3ff)|((wd-1)&0x3ff);
3027 ptr->tex_size = (ptr->tex_size&~0xFFC00)|(_SHIFTL((ht-1),10,10));
3028 ptr->tex_size = (ptr->tex_size&~0xF00000)|(_SHIFTL(fmt,20,4));
3029 ptr->tex_maddr = (ptr->tex_maddr&~0x01ffffff)|(_SHIFTR(MEM_VIRTUAL_TO_PHYSICAL(img_ptr),5,24));
3030
3031 switch(fmt) {
3032 case GX_TF_I4:
3033 case GX_TF_CI4:
3034 case GX_TF_IA4:
3035 xshift = 3;
3036 yshift = 3;
3037 ptr->tex_tile_type = 1;
3038 break;
3039 case GX_TF_I8:
3040 case GX_TF_CI8:
3041 xshift = 3;
3042 yshift = 2;
3043 ptr->tex_tile_type = 2;
3044 break;
3045 case GX_TF_IA8:
3046 case GX_TF_RGB565:
3047 case GX_TF_RGB5A3:
3048 case GX_TF_RGBA8:
3049 xshift = 2;
3050 yshift = 2;
3051 ptr->tex_tile_type = 2;
3052 break;
3053 case GX_TF_CI14:
3054 xshift = 2;
3055 yshift = 2;
3056 ptr->tex_tile_type = 3;
3057 break;
3058 case GX_TF_CMPR:
3059 xshift = 3;
3060 yshift = 3;
3061 ptr->tex_tile_type = 0;
3062 break;
3063 default:
3064 xshift = 2;
3065 yshift = 2;
3066 ptr->tex_tile_type = 2;
3067 break;
3068 }
3069
3070 nwd = ((wd+(1<<xshift))-1)>>xshift;
3071 nht = ((ht+(1<<yshift))-1)>>yshift;
3072 ptr->tex_tile_cnt = (nwd*nht)&0x7fff;
3073
3074 ptr->tex_flag |= 0x0002;
3075 }
3076
3077 void GX_InitTexObjCI(GXTexObj *obj,void *img_ptr,u16 wd,u16 ht,u8 fmt,u8 wrap_s,u8 wrap_t,u8 mipmap,u32 tlut_name)
3078 {
3079 struct __gx_texobj *ptr = (struct __gx_texobj*)obj;
3080
3081 GX_InitTexObj(obj,img_ptr,wd,ht,fmt,wrap_s,wrap_t,mipmap);
3082 ptr->tex_flag &= ~0x02;
3083 ptr->tex_tlut = tlut_name;
3084 }
3085
3086 void GX_InitTexObjLOD(GXTexObj *obj,u8 minfilt,u8 magfilt,f32 minlod,f32 maxlod,f32 lodbias,u8 biasclamp,u8 edgelod,u8 maxaniso)
3087 {
3088 struct __gx_texobj *ptr = (struct __gx_texobj*)obj;
3089 static u8 GX2HWFiltConv[] = {0x00,0x04,0x01,0x05,0x02,0x06,0x00,0x00};
3090 //static u8 HW2GXFiltConv[] = {0x00,0x02,0x04,0x00,0x01,0x03,0x05,0x00};
3091
3092 if(lodbias<-4.0f) lodbias = -4.0f;
3093 else if(lodbias==4.0f) lodbias = 3.99f;
3094
3095 ptr->tex_filt = (ptr->tex_filt&~0x1fe00)|(_SHIFTL(((u32)(32.0f*lodbias)),9,8));
3096 ptr->tex_filt = (ptr->tex_filt&~0x10)|(_SHIFTL((magfilt==GX_LINEAR?1:0),4,1));
3097 ptr->tex_filt = (ptr->tex_filt&~0xe0)|(_SHIFTL(GX2HWFiltConv[minfilt],5,3));
3098 ptr->tex_filt = (ptr->tex_filt&~0x100)|(_SHIFTL(!(edgelod&0xff),8,1));
3099 ptr->tex_filt = (ptr->tex_filt&~0x180000)|(_SHIFTL(maxaniso,19,2));
3100 ptr->tex_filt = (ptr->tex_filt&~0x200000)|(_SHIFTL(biasclamp,21,1));
3101
3102 if(minlod<0.0f) minlod = 0.0f;
3103 else if(minlod>10.0f) minlod = 10.0f;
3104
3105 if(maxlod<0.0f) maxlod = 0.0f;
3106 else if(maxlod>10.0f) maxlod = 10.0f;
3107
3108 ptr->tex_lod = (ptr->tex_lod&~0xff)|(((u32)(16.0f*minlod))&0xff);
3109 ptr->tex_lod = (ptr->tex_lod&~0xff00)|(_SHIFTL(((u32)(16.0f*maxlod)),8,8));
3110 }
3111
3112 void GX_InitTexObjData(GXTexObj *obj,void *img_ptr)
3113 {
3114 struct __gx_texobj *ptr = (struct __gx_texobj*)obj;
3115 ptr->tex_maddr = (ptr->tex_maddr&~0x01ffffff)|(_SHIFTR(MEM_VIRTUAL_TO_PHYSICAL(img_ptr),5,24));
3116 }
3117
3118 void GX_InitTexObjTlut(GXTexObj *obj,u32 tlut_name)
3119 {
3120 ((struct __gx_texobj*)obj)->tex_tlut = tlut_name;
3121 }
3122
3123 void GX_InitTexObjWrapMode(GXTexObj *obj,u8 wrap_s,u8 wrap_t)
3124 {
3125 struct __gx_texobj *ptr = (struct __gx_texobj*)obj;
3126
3127 ptr->tex_filt = (ptr->tex_filt&~0x03)|(wrap_s&3);
3128 ptr->tex_filt = (ptr->tex_filt&~0x0c)|(_SHIFTL(wrap_t,2,2));
3129 }
3130
3131 void GX_InitTexObjFilterMode(GXTexObj *obj,u8 minfilt,u8 magfilt)
3132 {
3133 struct __gx_texobj *ptr = (struct __gx_texobj*)obj;
3134 static u8 GX2HWFiltConv[] = {0x00,0x04,0x01,0x05,0x02,0x06,0x00,0x00};
3135
3136 ptr->tex_filt = (ptr->tex_filt&~0x10)|(_SHIFTL((magfilt==GX_LINEAR?1:0),4,1));
3137 ptr->tex_filt = (ptr->tex_filt&~0xe0)|(_SHIFTL(GX2HWFiltConv[minfilt],5,3));
3138 }
3139
3140 void GX_InitTexObjMinLOD(GXTexObj *obj,f32 minlod)
3141 {
3142 struct __gx_texobj *ptr = (struct __gx_texobj*)obj;
3143
3144 if(minlod<0.0f) minlod = 0.0f;
3145 else if(minlod>10.0f) minlod = 10.0f;
3146
3147 ptr->tex_lod = (ptr->tex_lod&~0xff)|(((u32)(16.0f*minlod))&0xff);
3148 }
3149
3150 void GX_InitTexObjMaxLOD(GXTexObj *obj,f32 maxlod)
3151 {
3152 struct __gx_texobj *ptr = (struct __gx_texobj*)obj;
3153
3154 if(maxlod<0.0f) maxlod = 0.0f;
3155 else if(maxlod>10.0f) maxlod = 10.0f;
3156
3157 ptr->tex_lod = (ptr->tex_lod&~0xff00)|(_SHIFTL(((u32)(16.0f*maxlod)),8,8));
3158 }
3159
3160 void GX_InitTexObjLODBias(GXTexObj *obj,f32 lodbias)
3161 {
3162 struct __gx_texobj *ptr = (struct __gx_texobj*)obj;
3163
3164 if(lodbias<-4.0f) lodbias = -4.0f;
3165 else if(lodbias==4.0f) lodbias = 3.99f;
3166
3167 ptr->tex_filt = (ptr->tex_filt&~0x1fe00)|(_SHIFTL(((u32)(32.0f*lodbias)),9,8));
3168 }
3169
3170 void GX_InitTexObjBiasClamp(GXTexObj *obj,u8 biasclamp)
3171 {
3172 struct __gx_texobj *ptr = (struct __gx_texobj*)obj;
3173 ptr->tex_filt = (ptr->tex_filt&~0x200000)|(_SHIFTL(biasclamp,21,1));
3174 }
3175
3176 void GX_InitTexObjEdgeLOD(GXTexObj *obj,u8 edgelod)
3177 {
3178 struct __gx_texobj *ptr = (struct __gx_texobj*)obj;
3179 ptr->tex_filt = (ptr->tex_filt&~0x100)|(_SHIFTL(!(edgelod&0xff),8,1));
3180 }
3181
3182 void GX_InitTexObjMaxAniso(GXTexObj *obj,u8 maxaniso)
3183 {
3184 struct __gx_texobj *ptr = (struct __gx_texobj*)obj;
3185 ptr->tex_filt = (ptr->tex_filt&~0x180000)|(_SHIFTL(maxaniso,19,2));
3186 }
3187
3188 void GX_InitTlutObj(GXTlutObj *obj,void *lut,u8 fmt,u16 entries)
3189 {
3190 struct __gx_tlutobj *ptr = (struct __gx_tlutobj*)obj;
3191
3192 memset(obj,0,sizeof(GXTlutObj));
3193
3194 ptr->tlut_fmt = _SHIFTL(fmt,10,2);
3195 ptr->tlut_maddr = (ptr->tlut_maddr&~0x00ffffff)|(_SHIFTR(MEM_VIRTUAL_TO_PHYSICAL(lut),5,24));
3196 ptr->tlut_maddr = (ptr->tlut_maddr&~0xff000000)|(_SHIFTL(0x64,24,8));
3197 ptr->tlut_nentries = entries;
3198 }
3199
3200 void GX_LoadTexObj(GXTexObj *obj,u8 mapid)
3201 {
3202 GXTexRegion *region = NULL;
3203
3204 if(regionCB)
3205 region = regionCB(obj,mapid);
3206
3207 GX_LoadTexObjPreloaded(obj,region,mapid);
3208 }
3209
3210 void GX_LoadTexObjPreloaded(GXTexObj *obj,GXTexRegion *region,u8 mapid)
3211 {
3212 u8 type;
3213 struct __gx_tlutregion *tlut = NULL;
3214 struct __gx_texobj *ptr = (struct __gx_texobj*)obj;
3215 struct __gx_texregion *reg = (struct __gx_texregion*)region;
3216
3217 ptr->tex_filt = (ptr->tex_filt&~0xff000000)|(_SHIFTL(_gxtexmode0ids[mapid],24,8));
3218 ptr->tex_lod = (ptr->tex_lod&~0xff000000)|(_SHIFTL(_gxtexmode1ids[mapid],24,8));
3219 ptr->tex_size = (ptr->tex_size&~0xff000000)|(_SHIFTL(_gxteximg0ids[mapid],24,8));
3220 ptr->tex_maddr = (ptr->tex_maddr&~0xff000000)|(_SHIFTL(_gxteximg3ids[mapid],24,8));
3221
3222 reg->tmem_even = (reg->tmem_even&~0xff000000)|(_SHIFTL(_gxteximg1ids[mapid],24,8));
3223 reg->tmem_odd = (reg->tmem_odd&~0xff000000)|(_SHIFTL(_gxteximg2ids[mapid],24,8));
3224
3225 GX_LOAD_BP_REG(ptr->tex_filt);
3226 GX_LOAD_BP_REG(ptr->tex_lod);
3227 GX_LOAD_BP_REG(ptr->tex_size);
3228
3229 GX_LOAD_BP_REG(reg->tmem_even);
3230 GX_LOAD_BP_REG(reg->tmem_odd);
3231
3232 GX_LOAD_BP_REG(ptr->tex_maddr);
3233
3234 type = ptr->tex_flag;
3235 if(!(type&0x02)) {
3236 if(tlut_regionCB)
3237 tlut = (struct __gx_tlutregion*)tlut_regionCB(ptr->tex_tlut);
3238 tlut->tmem_addr_base = (tlut->tmem_addr_base&~0xff000000)|(_SHIFTL(_gxtextlutids[mapid],24,8));
3239 GX_LOAD_BP_REG(tlut->tmem_addr_base);
3240 }
3241
3242 __gx->texMapSize[mapid] = ptr->tex_size;
3243 __gx->texMapWrap[mapid] = ptr->tex_filt;
3244
3245 __gx->dirtyState |= 0x0001;
3246 }
3247
3248 void GX_PreloadEntireTexture(GXTexObj *obj,GXTexRegion *region)
3249 {
3250 u32 i,fmt;
3251 s32 wd,ht;
3252 u16 cnt = 0;
3253 u32 regA = 0;
3254 u32 regB = 0;
3255 u32 regC = 0;
3256 u32 regD = 0;
3257 struct __gx_texobj *ptr = (struct __gx_texobj*)obj;
3258 struct __gx_texregion *reg = (struct __gx_texregion*)region;
3259
3260 regA = (regA&~0xff000000)|(_SHIFTL(0x60,24,8));
3261 regA = (regA&~0x00ffffff)|(ptr->tex_maddr&~0xff000000);
3262
3263 regB = (regB&~0xff000000)|(_SHIFTL(0x61,24,8));
3264 regB = (regB&~0x00007fff)|(reg->tmem_even&0x00007fff);
3265
3266 regC = (regC&~0xff000000)|(_SHIFTL(0x62,24,8));
3267 regC = (regC&~0x00007fff)|(reg->tmem_odd&0x00007fff);
3268
3269 regD = (regD&~0xff000000)|(_SHIFTL(0x63,24,8));
3270 regB = (regD&~0x00007fff)|(ptr->tex_tile_cnt&0x00007fff);
3271
3272 fmt = _SHIFTR(ptr->tex_size,20,4);
3273
3274 __GX_FlushTextureState();
3275 GX_LOAD_BP_REG(regA);
3276 GX_LOAD_BP_REG(regB);
3277 GX_LOAD_BP_REG(regC);
3278 GX_LOAD_BP_REG(regD);
3279
3280 if(ptr->tex_flag&0x01) {
3281 wd = (ptr->tex_size&0x3ff)+1;
3282 ht = _SHIFTR(ptr->tex_size,10,10)+1;
3283 if(wd>ht)
3284 cnt = (31 - (cntlzw(wd)));
3285 else
3286 cnt = (31 - (cntlzw(ht)));
3287 }
3288
3289 if(cnt>0) {
3290 u32 tmem_even,tmem_odd,maddr;
3291 u32 tile_cnt = ptr->tex_tile_cnt;
3292
3293 tmem_even = (reg->tmem_even&0xffff);
3294 tmem_odd = (reg->tmem_odd&0xffff);
3295 maddr = (ptr->tex_maddr&~0xff000000);
3296
3297 i = 0;
3298 while(cnt) {
3299 u32 w,h;
3300 u32 te,to;
3301 u32 xshift,yshift;
3302
3303 if(fmt==GX_TF_RGBA8) {
3304 tmem_even += tile_cnt;
3305 tmem_odd += tile_cnt;
3306 maddr += (tile_cnt<<1);
3307 } else {
3308 maddr += tile_cnt;
3309 if(i&1) tmem_odd += tile_cnt;
3310 else tmem_even += tile_cnt;
3311 }
3312
3313 te = tmem_even;
3314 to = tmem_odd;
3315 if(i&1) {
3316 te = tmem_odd;
3317 to = tmem_even;
3318 }
3319
3320 w = wd>>(i+1);
3321 h = wd>>(i+1);
3322 switch(ptr->tex_fmt) {
3323 case GX_TF_I4:
3324 case GX_TF_IA4:
3325 case GX_TF_CI4:
3326 case GX_TF_CMPR:
3327 xshift = 3;
3328 yshift = 3;
3329 break;
3330 case GX_TF_I8:
3331 case GX_TF_CI8:
3332 xshift = 3;
3333 yshift = 2;
3334 break;
3335 case GX_TF_IA8:
3336 case GX_TF_RGB5A3:
3337 case GX_TF_RGB565:
3338 case GX_TF_CI14:
3339 xshift = 2;
3340 yshift = 2;
3341 break;
3342 default:
3343 xshift = 0;
3344 yshift = 0;
3345 break;
3346 }
3347
3348 if(!w) w = 1;
3349 if(!h) h = 1;
3350
3351 regA = ((regA&~0x00ffffff)|(maddr&0x00ffffff));
3352 GX_LOAD_BP_REG(regA);
3353
3354 regB = ((regB&~0x00007fff)|(te&0x00007fff));
3355 GX_LOAD_BP_REG(regB);
3356
3357 regC = ((regC&~0x00007fff)|(to&0x00007fff));
3358 GX_LOAD_BP_REG(regC);
3359
3360 tile_cnt = (((w+(1<<xshift))-1)>>xshift)*(((h+(1<<yshift))-1)>>yshift);
3361 regD = ((regD&~0x00007fff)|(tile_cnt&0x00007fff));
3362 GX_LOAD_BP_REG(regD);
3363
3364 ++i;
3365 --cnt;
3366 }
3367 }
3368 __GX_FlushTextureState();
3369 }
3370
3371 void GX_InvalidateTexAll()
3372 {
3373 __GX_FlushTextureState();
3374 GX_LOAD_BP_REG(0x66001000);
3375 GX_LOAD_BP_REG(0x66001100);
3376 __GX_FlushTextureState();
3377 }
3378
3379 void GX_InvalidateTexRegion(GXTexRegion *region)
3380 {
3381 u8 ismipmap;
3382 s32 cw_e,ch_e,cw_o,ch_o;
3383 u32 size,tmp,regvalA = 0,regvalB = 0;
3384 struct __gx_texregion *ptr = (struct __gx_texregion*)region;
3385
3386 cw_e = (_SHIFTR(ptr->tmem_even,15,3))-1;
3387 ch_e = (_SHIFTR(ptr->tmem_even,18,3))-1;
3388
3389 cw_o = (_SHIFTR(ptr->tmem_odd,15,3))-1;
3390 ch_o = (_SHIFTR(ptr->tmem_odd,18,3))-1;
3391
3392 if(cw_e<0) cw_e = 0;
3393 if(ch_e<0) ch_e = 0;
3394 if(cw_o<0) cw_o = 0;
3395 if(ch_o<0) ch_o = 0;
3396
3397 ismipmap = ptr->ismipmap;
3398
3399 tmp = size = cw_e+ch_e;
3400 if(ismipmap) size = tmp+(cw_o+ch_o-2);
3401 regvalA = _SHIFTR((ptr->tmem_even&0x7fff),6,24)|(_SHIFTL(size,9,24))|(_SHIFTL(0x66,24,8));
3402
3403 if(cw_o!=0) {
3404 size = cw_o+ch_o;
3405 if(ismipmap) size += (tmp-2);
3406 regvalB = _SHIFTR((ptr->tmem_odd&0x7fff),6,24)|(_SHIFTL(size,9,24))|(_SHIFTL(0x66,24,8));
3407 }
3408 __GX_FlushTextureState();
3409 GX_LOAD_BP_REG(regvalA);
3410 if(ismipmap) GX_LOAD_BP_REG(regvalB);
3411 __GX_FlushTextureState();
3412 }
3413
3414 void GX_LoadTlut(GXTlutObj *obj,u32 tlut_name)
3415 {
3416 struct __gx_tlutregion *region = NULL;
3417 struct __gx_tlutobj *ptr = (struct __gx_tlutobj*)obj;
3418
3419 if(tlut_regionCB)
3420 region = (struct __gx_tlutregion*)tlut_regionCB(tlut_name);
3421
3422 __GX_FlushTextureState();
3423 GX_LOAD_BP_REG(ptr->tlut_maddr);
3424 GX_LOAD_BP_REG(region->tmem_addr_conf);
3425 __GX_FlushTextureState();
3426
3427 region->tmem_addr_base = (ptr->tlut_fmt&~0x3ff)|(region->tmem_addr_conf&0x3ff);
3428 region->tlut_maddr = ptr->tlut_maddr;
3429 region->tlut_nentries = ptr->tlut_nentries;
3430 }
3431
3432 void GX_SetTexCoorScaleManually(u8 texcoord,u8 enable,u16 ss,u16 ts)
3433 {
3434 u32 reg;
3435
3436 __gx->texCoordManually = (__gx->texCoordManually&~(_SHIFTL(1,texcoord,1)))|(_SHIFTL(enable,texcoord,1));
3437 if(!enable) return;
3438
3439 reg = (texcoord&0x7);
3440 __gx->suSsize[reg] = (__gx->suSsize[reg]&~0xffff)|((ss-1)&0xffff);
3441 __gx->suTsize[reg] = (__gx->suTsize[reg]&~0xffff)|((ts-1)&0xffff);
3442
3443 GX_LOAD_BP_REG(__gx->suSsize[reg]);
3444 GX_LOAD_BP_REG(__gx->suTsize[reg]);
3445 }
3446
3447 void GX_SetTexCoordCylWrap(u8 texcoord,u8 s_enable,u8 t_enable)
3448 {
3449 u32 reg;
3450
3451 reg = (texcoord&0x7);
3452 __gx->suSsize[reg] = (__gx->suSsize[reg]&~0x20000)|(_SHIFTL(s_enable,17,1));
3453 __gx->suTsize[reg] = (__gx->suTsize[reg]&~0x20000)|(_SHIFTL(t_enable,17,1));
3454
3455 if(!(__gx->texCoordManually&(_SHIFTL(1,texcoord,1)))) return;
3456
3457 GX_LOAD_BP_REG(__gx->suSsize[reg]);
3458 GX_LOAD_BP_REG(__gx->suTsize[reg]);
3459 }
3460
3461 void GX_SetTexCoordBias(u8 texcoord,u8 s_enable,u8 t_enable)
3462 {
3463 u32 reg;
3464
3465 reg = (texcoord&0x7);
3466 __gx->suSsize[reg] = (__gx->suSsize[reg]&~0x10000)|(_SHIFTL(s_enable,16,1));
3467 __gx->suTsize[reg] = (__gx->suTsize[reg]&~0x10000)|(_SHIFTL(t_enable,16,1));
3468
3469 if(!(__gx->texCoordManually&(_SHIFTL(1,texcoord,1)))) return;
3470
3471 GX_LOAD_BP_REG(__gx->suSsize[reg]);
3472 GX_LOAD_BP_REG(__gx->suTsize[reg]);
3473 }
3474
3475 GXTexRegionCallback GX_SetTexRegionCallback(GXTexRegionCallback cb)
3476 {
3477 u32 level;
3478 GXTexRegionCallback ret;
3479
3480 _CPU_ISR_Disable(level);
3481 ret = regionCB;
3482 regionCB = cb;
3483 _CPU_ISR_Restore(level);
3484
3485 return ret;
3486 }
3487
3488 GXTlutRegionCallback GX_SetTlutRegionCallback(GXTlutRegionCallback cb)
3489 {
3490 u32 level;
3491 GXTlutRegionCallback ret;
3492
3493 _CPU_ISR_Disable(level);
3494 ret = tlut_regionCB;
3495 tlut_regionCB = cb;
3496 _CPU_ISR_Restore(level);
3497
3498 return ret;
3499 }
3500
3501 void GX_SetBlendMode(u8 type,u8 src_fact,u8 dst_fact,u8 op)
3502 {
3503 __gx->peCMode0 = (__gx->peCMode0&~0x1);
3504 if(type==GX_BM_BLEND || type==GX_BM_SUBSTRACT) __gx->peCMode0 |= 0x1;
3505
3506 __gx->peCMode0 = (__gx->peCMode0&~0x800);
3507 if(type==GX_BM_SUBSTRACT) __gx->peCMode0 |= 0x800;
3508
3509 __gx->peCMode0 = (__gx->peCMode0&~0x2);
3510 if(type==GX_BM_LOGIC) __gx->peCMode0 |= 0x2;
3511
3512 __gx->peCMode0 = (__gx->peCMode0&~0xF000)|(_SHIFTL(op,12,4));
3513 __gx->peCMode0 = (__gx->peCMode0&~0xE0)|(_SHIFTL(dst_fact,5,3));
3514 __gx->peCMode0 = (__gx->peCMode0&~0x700)|(_SHIFTL(src_fact,8,3));
3515
3516 GX_LOAD_BP_REG(__gx->peCMode0);
3517 }
3518
3519 void GX_ClearVtxDesc()
3520 {
3521 __gx->vcdNrms = 0;
3522 __gx->vcdClear = ((__gx->vcdClear&~0x0600)|0x0200);
3523 __gx->vcdLo = __gx->vcdHi = 0;
3524 __gx->dirtyState |= 0x0008;
3525 }
3526
3527 void GX_SetLineWidth(u8 width,u8 fmt)
3528 {
3529 __gx->lpWidth = (__gx->lpWidth&~0xff)|(width&0xff);
3530 __gx->lpWidth = (__gx->lpWidth&~0x70000)|(_SHIFTL(fmt,16,3));
3531 GX_LOAD_BP_REG(__gx->lpWidth);
3532 }
3533
3534 void GX_SetPointSize(u8 width,u8 fmt)
3535 {
3536 __gx->lpWidth = (__gx->lpWidth&~0xFF00)|(_SHIFTL(width,8,8));
3537 __gx->lpWidth = (__gx->lpWidth&~0x380000)|(_SHIFTL(fmt,19,3));
3538 GX_LOAD_BP_REG(__gx->lpWidth);
3539 }
3540
3541 void GX_SetTevColor(u8 tev_regid,GXColor color)
3542 {
3543 u32 reg;
3544
3545 reg = (_SHIFTL((0xe0+(tev_regid<<1)),24,8)|(_SHIFTL(color.a,12,8))|(color.r&0xff));
3546 GX_LOAD_BP_REG(reg);
3547
3548 reg = (_SHIFTL((0xe1+(tev_regid<<1)),24,8)|(_SHIFTL(color.g,12,8))|(color.b&0xff));
3549 GX_LOAD_BP_REG(reg);
3550
3551 //this two calls should obviously flush the Write Gather Pipe.
3552 GX_LOAD_BP_REG(reg);
3553 GX_LOAD_BP_REG(reg);
3554 }
3555
3556 void GX_SetTevColorS10(u8 tev_regid,GXColorS10 color)
3557 {
3558 u32 reg;
3559
3560 reg = (_SHIFTL((0xe0+(tev_regid<<1)),24,8)|(_SHIFTL(color.a,12,11))|(color.r&0x7ff));
3561 GX_LOAD_BP_REG(reg);
3562
3563 reg = (_SHIFTL((0xe1+(tev_regid<<1)),24,8)|(_SHIFTL(color.g,12,11))|(color.b&0x7ff));
3564 GX_LOAD_BP_REG(reg);
3565
3566 //this two calls should obviously flush the Write Gather Pipe.
3567 GX_LOAD_BP_REG(reg);
3568 GX_LOAD_BP_REG(reg);
3569 }
3570
3571 void GX_SetTevKColor(u8 tev_kregid,GXColor color)
3572 {
3573 u32 reg;
3574
3575 reg = (_SHIFTL((0xe0+(tev_kregid<<1)),24,8)|(_SHIFTL(1,23,1))|(_SHIFTL(color.a,12,8))|(color.r&0xff));
3576 GX_LOAD_BP_REG(reg);
3577
3578 reg = (_SHIFTL((0xe1+(tev_kregid<<1)),24,8)|(_SHIFTL(1,23,1))|(_SHIFTL(color.g,12,8))|(color.b&0xff));
3579 GX_LOAD_BP_REG(reg);
3580
3581 //this two calls should obviously flush the Write Gather Pipe.
3582 GX_LOAD_BP_REG(reg);
3583 GX_LOAD_BP_REG(reg);
3584 }
3585
3586 void GX_SetTevKColorS10(u8 tev_kregid,GXColorS10 color)
3587 {
3588 u32 reg;
3589
3590 reg = (_SHIFTL((0xe0+(tev_kregid<<1)),24,8)|(_SHIFTL(1,23,1))|(_SHIFTL(color.a,12,11))|(color.r&0x7ff));
3591 GX_LOAD_BP_REG(reg);
3592
3593 reg = (_SHIFTL((0xe1+(tev_kregid<<1)),24,8)|(_SHIFTL(1,23,1))|(_SHIFTL(color.g,12,11))|(color.b&0x7ff));
3594 GX_LOAD_BP_REG(reg);
3595
3596 //this two calls should obviously flush the Write Gather Pipe.
3597 GX_LOAD_BP_REG(reg);
3598 GX_LOAD_BP_REG(reg);
3599 }
3600
3601 void GX_SetTevOp(u8 tevstage,u8 mode)
3602 {
3603 u8 defcolor = GX_CC_RASC;
3604 u8 defalpha = GX_CA_RASA;
3605
3606 if(tevstage!=GX_TEVSTAGE0) {
3607 defcolor = GX_CC_CPREV;
3608 defalpha = GX_CA_APREV;
3609 }
3610
3611 switch(mode) {
3612 case GX_MODULATE:
3613 GX_SetTevColorIn(tevstage,GX_CC_ZERO,GX_CC_TEXC,defcolor,GX_CC_ZERO);
3614 GX_SetTevAlphaIn(tevstage,GX_CA_ZERO,GX_CA_TEXA,defalpha,GX_CA_ZERO);
3615 break;
3616 case GX_DECAL:
3617 GX_SetTevColorIn(tevstage,defcolor,GX_CC_TEXC,GX_CC_TEXA,GX_CC_ZERO);
3618 GX_SetTevAlphaIn(tevstage,GX_CA_ZERO,GX_CA_ZERO,GX_CA_ZERO,defalpha);
3619 break;
3620 case GX_BLEND:
3621 GX_SetTevColorIn(tevstage,defcolor,GX_CC_ONE,GX_CC_TEXC,GX_CC_ZERO);
3622 GX_SetTevAlphaIn(tevstage,GX_CA_ZERO,GX_CA_TEXA,defalpha,GX_CA_RASA);
3623 break;
3624 case GX_REPLACE:
3625 GX_SetTevColorIn(tevstage,GX_CC_ZERO,GX_CC_ZERO,GX_CC_ZERO,GX_CC_TEXC);
3626 GX_SetTevAlphaIn(tevstage,GX_CA_ZERO,GX_CA_ZERO,GX_CA_ZERO,GX_CA_TEXA);
3627 break;
3628 case GX_PASSCLR:
3629 GX_SetTevColorIn(tevstage,GX_CC_ZERO,GX_CC_ZERO,GX_CC_ZERO,defcolor);
3630 GX_SetTevAlphaIn(tevstage,GX_CC_A2,GX_CC_A2,GX_CC_A2,defalpha);
3631 break;
3632 }
3633 GX_SetTevColorOp(tevstage,GX_TEV_ADD,GX_TB_ZERO,GX_CS_SCALE_1,GX_TRUE,GX_TEVPREV);
3634 GX_SetTevAlphaOp(tevstage,GX_TEV_ADD,GX_TB_ZERO,GX_CS_SCALE_1,GX_TRUE,GX_TEVPREV);
3635 }
3636
3637 void GX_SetTevColorIn(u8 tevstage,u8 a,u8 b,u8 c,u8 d)
3638 {
3639 u32 reg = (tevstage&0xf);
3640 __gx->tevColorEnv[reg] = (__gx->tevColorEnv[reg]&~0xF000)|(_SHIFTL(a,12,4));
3641 __gx->tevColorEnv[reg] = (__gx->tevColorEnv[reg]&~0xF00)|(_SHIFTL(b,8,4));
3642 __gx->tevColorEnv[reg] = (__gx->tevColorEnv[reg]&~0xF0)|(_SHIFTL(c,4,4));
3643 __gx->tevColorEnv[reg] = (__gx->tevColorEnv[reg]&~0xf)|(d&0xf);
3644
3645 GX_LOAD_BP_REG(__gx->tevColorEnv[reg]);
3646 }
3647
3648 void GX_SetTevAlphaIn(u8 tevstage,u8 a,u8 b,u8 c,u8 d)
3649 {
3650 u32 reg = (tevstage&0xf);
3651 __gx->tevAlphaEnv[reg] = (__gx->tevAlphaEnv[reg]&~0xE000)|(_SHIFTL(a,13,3));
3652 __gx->tevAlphaEnv[reg] = (__gx->tevAlphaEnv[reg]&~0x1C00)|(_SHIFTL(b,10,3));
3653 __gx->tevAlphaEnv[reg] = (__gx->tevAlphaEnv[reg]&~0x380)|(_SHIFTL(c,7,3));
3654 __gx->tevAlphaEnv[reg] = (__gx->tevAlphaEnv[reg]&~0x70)|(_SHIFTL(d,4,3));
3655
3656 GX_LOAD_BP_REG(__gx->tevAlphaEnv[reg]);
3657 }
3658
3659 void GX_SetTevColorOp(u8 tevstage,u8 tevop,u8 tevbias,u8 tevscale,u8 clamp,u8 tevregid)
3660 {
3661 /* set tev op add/sub*/
3662 u32 reg = (tevstage&0xf);
3663 __gx->tevColorEnv[reg] = (__gx->tevColorEnv[reg]&~0x40000)|(_SHIFTL(tevop,18,1));
3664 if(tevop<=GX_TEV_SUB) {
3665 __gx->tevColorEnv[reg] = (__gx->tevColorEnv[reg]&~0x300000)|(_SHIFTL(tevscale,20,2));
3666 __gx->tevColorEnv[reg] = (__gx->tevColorEnv[reg]&~0x30000)|(_SHIFTL(tevbias,16,2));
3667 } else {
3668 __gx->tevColorEnv[reg] = (__gx->tevColorEnv[reg]&~0x300000)|((_SHIFTL(tevop,19,4))&0x300000);
3669 __gx->tevColorEnv[reg] = (__gx->tevColorEnv[reg]&~0x30000)|0x30000;
3670 }
3671 __gx->tevColorEnv[reg] = (__gx->tevColorEnv[reg]&~0x80000)|(_SHIFTL(clamp,19,1));
3672 __gx->tevColorEnv[reg] = (__gx->tevColorEnv[reg]&~0xC00000)|(_SHIFTL(tevregid,22,2));
3673
3674 GX_LOAD_BP_REG(__gx->tevColorEnv[reg]);
3675 }
3676
3677 void GX_SetTevAlphaOp(u8 tevstage,u8 tevop,u8 tevbias,u8 tevscale,u8 clamp,u8 tevregid)
3678 {
3679 /* set tev op add/sub*/
3680 u32 reg = (tevstage&0xf);
3681 __gx->tevAlphaEnv[reg] = (__gx->tevAlphaEnv[reg]&~0x40000)|(_SHIFTL(tevop,18,1));
3682 if(tevop<=GX_TEV_SUB) {
3683 __gx->tevAlphaEnv[reg] = (__gx->tevAlphaEnv[reg]&~0x300000)|(_SHIFTL(tevscale,20,2));
3684 __gx->tevAlphaEnv[reg] = (__gx->tevAlphaEnv[reg]&~0x30000)|(_SHIFTL(tevbias,16,2));
3685 } else {
3686 __gx->tevAlphaEnv[reg] = (__gx->tevAlphaEnv[reg]&~0x300000)|((_SHIFTL(tevop,19,4))&0x300000);
3687 __gx->tevAlphaEnv[reg] = (__gx->tevAlphaEnv[reg]&~0x30000)|0x30000;
3688 }
3689 __gx->tevAlphaEnv[reg] = (__gx->tevAlphaEnv[reg]&~0x80000)|(_SHIFTL(clamp,19,1));
3690 __gx->tevAlphaEnv[reg] = (__gx->tevAlphaEnv[reg]&~0xC00000)|(_SHIFTL(tevregid,22,2));
3691
3692 GX_LOAD_BP_REG(__gx->tevAlphaEnv[reg]);
3693 }
3694
3695 void GX_SetCullMode(u8 mode)
3696 {
3697 static u8 cm2hw[] = { 0, 2, 1, 3 };
3698
3699 __gx->genMode = (__gx->genMode&~0xC000)|(_SHIFTL(cm2hw[mode],14,2));
3700 __gx->dirtyState |= 0x0004;
3701 }
3702
3703 void GX_SetCoPlanar(u8 enable)
3704 {
3705 __gx->genMode = (__gx->genMode&~0x80000)|(_SHIFTL(enable,19,1));
3706 GX_LOAD_BP_REG(0xFE080000);
3707 GX_LOAD_BP_REG(__gx->genMode);
3708 }
3709
3710 void GX_EnableTexOffsets(u8 coord,u8 line_enable,u8 point_enable)
3711 {
3712 u32 reg = (coord&0x7);
3713 __gx->suSsize[reg] = (__gx->suSsize[reg]&~0x40000)|(_SHIFTL(line_enable,18,1));
3714 __gx->suSsize[reg] = (__gx->suSsize[reg]&~0x80000)|(_SHIFTL(point_enable,19,1));
3715 GX_LOAD_BP_REG(__gx->suSsize[reg]);
3716 }
3717
3718 void GX_SetClipMode(u8 mode)
3719 {
3720 GX_LOAD_XF_REG(0x1005,(mode&1));
3721 }
3722
3723 void GX_SetScissor(u32 xOrigin,u32 yOrigin,u32 wd,u32 ht)
3724 {
3725 u32 xo = xOrigin+0x156;
3726 u32 yo = yOrigin+0x156;
3727 u32 nwd = xo+(wd-1);
3728 u32 nht = yo+(ht-1);
3729
3730 __gx->sciTLcorner = (__gx->sciTLcorner&~0x7ff)|(yo&0x7ff);
3731 __gx->sciTLcorner = (__gx->sciTLcorner&~0x7FF000)|(_SHIFTL(xo,12,11));
3732
3733 __gx->sciBRcorner = (__gx->sciBRcorner&~0x7ff)|(nht&0xfff);
3734 __gx->sciBRcorner = (__gx->sciBRcorner&~0x7FF000)|(_SHIFTL(nwd,12,11));
3735
3736 GX_LOAD_BP_REG(__gx->sciTLcorner);
3737 GX_LOAD_BP_REG(__gx->sciBRcorner);
3738 }
3739
3740 void GX_SetScissorBoxOffset(s32 xoffset,s32 yoffset)
3741 {
3742 s32 xoff = _SHIFTR((xoffset+0x156),1,24);
3743 s32 yoff = _SHIFTR((yoffset+0x156),1,24);
3744
3745 GX_LOAD_BP_REG((0x59000000|(_SHIFTL(yoff,10,10))|(xoff&0x3ff)));
3746 }
3747
3748 void GX_SetNumChans(u8 num)
3749 {
3750 __gx->genMode = (__gx->genMode&~0x70)|(_SHIFTL(num,4,3));
3751 __gx->dirtyState |= 0x01000004;
3752 }
3753
3754 void GX_SetTevOrder(u8 tevstage,u8 texcoord,u32 texmap,u8 color)
3755 {
3756 u8 colid;
3757 u32 texm,texc,tmp;
3758 u32 reg = 3+(_SHIFTR(tevstage,1,3));
3759
3760 __gx->tevTexMap[(tevstage&0xf)] = texmap;
3761
3762 texm = (texmap&~0x100);
3763 if(texm>=GX_MAX_TEXMAP) texm = 0;
3764 if(texcoord>=GX_MAXCOORD) {
3765 texc = 0;
3766 __gx->tevTexCoordEnable &= ~(_SHIFTL(1,tevstage,1));
3767 } else {
3768 texc = texcoord;
3769 __gx->tevTexCoordEnable |= (_SHIFTL(1,tevstage,1));
3770 }
3771
3772 if(tevstage&1) {
3773 __gx->tevRasOrder[reg] = (__gx->tevRasOrder[reg]&~0x7000)|(_SHIFTL(texm,12,3));
3774 __gx->tevRasOrder[reg] = (__gx->tevRasOrder[reg]&~0x38000)|(_SHIFTL(texc,15,3));
3775
3776 colid = GX_BUMP;
3777 if(color!=GX_COLORNULL) colid = _gxtevcolid[color];
3778 __gx->tevRasOrder[reg] = (__gx->tevRasOrder[reg]&~0x380000)|(_SHIFTL(colid,19,3));
3779
3780 tmp = 1;
3781 if(texmap==GX_TEXMAP_NULL || texmap&0x100) tmp = 0;
3782 __gx->tevRasOrder[reg] = (__gx->tevRasOrder[reg]&~0x40000)|(_SHIFTL(tmp,18,1));
3783 } else {
3784 __gx->tevRasOrder[reg] = (__gx->tevRasOrder[reg]&~0x7)|(texm&0x7);
3785 __gx->tevRasOrder[reg] = (__gx->tevRasOrder[reg]&~0x38)|(_SHIFTL(texc,3,3));
3786
3787 colid = GX_BUMP;
3788 if(color!=GX_COLORNULL) colid = _gxtevcolid[color];
3789 __gx->tevRasOrder[reg] = (__gx->tevRasOrder[reg]&~0x380)|(_SHIFTL(colid,7,3));
3790
3791 tmp = 1;
3792 if(texmap==GX_TEXMAP_NULL || texmap&0x100) tmp = 0;
3793 __gx->tevRasOrder[reg] = (__gx->tevRasOrder[reg]&~0x40)|(_SHIFTL(tmp,6,1));
3794 }
3795 GX_LOAD_BP_REG(__gx->tevRasOrder[reg]);
3796 __gx->dirtyState |= 0x0001;
3797 }
3798
3799 void GX_SetNumTevStages(u8 num)
3800 {
3801 __gx->genMode = (__gx->genMode&~0x3C00)|(_SHIFTL((num-1),10,4));
3802 __gx->dirtyState |= 0x0004;
3803 }
3804
3805 void GX_SetAlphaCompare(u8 comp0,u8 ref0,u8 aop,u8 comp1,u8 ref1)
3806 {
3807 u32 val = 0;
3808 val = (_SHIFTL(aop,22,2))|(_SHIFTL(comp1,19,3))|(_SHIFTL(comp0,16,3))|(_SHIFTL(ref1,8,8))|(ref0&0xff);
3809 GX_LOAD_BP_REG(0xf3000000|val);
3810 }
3811
3812 void GX_SetTevKColorSel(u8 tevstage,u8 sel)
3813 {
3814 u32 reg = (_SHIFTR(tevstage,1,3));
3815
3816 if(tevstage&1)
3817 __gx->tevSwapModeTable[reg] = (__gx->tevSwapModeTable[reg]&~0x7C000)|(_SHIFTL(sel,14,5));
3818 else
3819 __gx->tevSwapModeTable[reg] = (__gx->tevSwapModeTable[reg]&~0x1F0)|(_SHIFTL(sel,4,5));
3820 GX_LOAD_BP_REG(__gx->tevSwapModeTable[reg]);
3821 }
3822
3823 void GX_SetTevKAlphaSel(u8 tevstage,u8 sel)
3824 {
3825 u32 reg = (_SHIFTR(tevstage,1,3));
3826
3827 if(tevstage&1)
3828 __gx->tevSwapModeTable[reg] = (__gx->tevSwapModeTable[reg]&~0xF80000)|(_SHIFTL(sel,19,5));
3829 else
3830 __gx->tevSwapModeTable[reg] = (__gx->tevSwapModeTable[reg]&~0x3E00)|(_SHIFTL(sel,9,5));
3831 GX_LOAD_BP_REG(__gx->tevSwapModeTable[reg]);
3832 }
3833
3834 void GX_SetTevSwapMode(u8 tevstage,u8 ras_sel,u8 tex_sel)
3835 {
3836 u32 reg = (tevstage&0xf);
3837 __gx->tevAlphaEnv[reg] = (__gx->tevAlphaEnv[reg]&~0x3)|(ras_sel&0x3);
3838 __gx->tevAlphaEnv[reg] = (__gx->tevAlphaEnv[reg]&~0xC)|(_SHIFTL(tex_sel,2,2));
3839 GX_LOAD_BP_REG(__gx->tevAlphaEnv[reg]);
3840 }
3841
3842 void GX_SetTevSwapModeTable(u8 swapid,u8 r,u8 g,u8 b,u8 a)
3843 {
3844 u32 regA = 0+(_SHIFTL(swapid,1,3));
3845 u32 regB = 1+(_SHIFTL(swapid,1,3));
3846
3847 __gx->tevSwapModeTable[regA] = (__gx->tevSwapModeTable[regA]&~0x3)|(r&0x3);
3848 __gx->tevSwapModeTable[regA] = (__gx->tevSwapModeTable[regA]&~0xC)|(_SHIFTL(g,2,2));
3849 GX_LOAD_BP_REG(__gx->tevSwapModeTable[regA]);
3850
3851 __gx->tevSwapModeTable[regB] = (__gx->tevSwapModeTable[regB]&~0x3)|(b&0x3);
3852 __gx->tevSwapModeTable[regB] = (__gx->tevSwapModeTable[regB]&~0xC)|(_SHIFTL(a,2,2));
3853 GX_LOAD_BP_REG(__gx->tevSwapModeTable[regB]);
3854 }
3855
3856 void GX_SetTevIndirect(u8 tevstage,u8 indtexid,u8 format,u8 bias,u8 mtxid,u8 wrap_s,u8 wrap_t,u8 addprev,u8 utclod,u8 a)
3857 {
3858 u32 val = (0x10000000|(_SHIFTL(tevstage,24,4)))|(indtexid&3)|(_SHIFTL(format,2,2))|(_SHIFTL(bias,4,3))|(_SHIFTL(a,7,2))|(_SHIFTL(mtxid,9,4))|(_SHIFTL(wrap_s,13,3))|(_SHIFTL(wrap_t,16,3))|(_SHIFTL(utclod,19,1))|(_SHIFTL(addprev,20,1));
3859 GX_LOAD_BP_REG(val);
3860 }
3861
3862 void GX_SetTevDirect(u8 tevstage)
3863 {
3864 GX_SetTevIndirect(tevstage,GX_INDTEXSTAGE0,GX_ITF_8,GX_ITB_NONE,GX_ITM_OFF,GX_ITW_OFF,GX_ITW_OFF,GX_FALSE,GX_FALSE,GX_ITBA_OFF);
3865 }
3866
3867 void GX_SetNumIndStages(u8 nstages)
3868 {
3869 __gx->genMode = (__gx->genMode&~0x70000)|(_SHIFTL(nstages,16,3));
3870 __gx->dirtyState |= 0x0006;
3871 }
3872
3873 void GX_SetIndTexMatrix(u8 indtexmtx,f32 offset_mtx[2][3],s8 scale_exp)
3874 {
3875 u32 ma,mb;
3876 u32 val,s,idx;
3877
3878 if(indtexmtx>0x00 && indtexmtx<0x04) indtexmtx -= 0x01;
3879 else if(indtexmtx>0x04 && indtexmtx<0x08) indtexmtx -= 0x05;
3880 else if(indtexmtx>0x08 && indtexmtx<0x0C) indtexmtx -= 0x09;
3881 else indtexmtx = 0x00;
3882
3883 s = (scale_exp+17);
3884 idx = ((indtexmtx<<2)-indtexmtx);
3885
3886 ma = (u32)(offset_mtx[0][0]*1024.0F);
3887 mb = (u32)(offset_mtx[1][0]*1024.0F);
3888 val = (_SHIFTL((0x06+idx),24,8)|_SHIFTL(s,22,2)|_SHIFTL(mb,11,11)|_SHIFTL(ma,0,11));
3889 GX_LOAD_BP_REG(val);
3890
3891 ma = (u32)(offset_mtx[0][1]*1024.0F);
3892 mb = (u32)(offset_mtx[1][1]*1024.0F);
3893 val = (_SHIFTL((0x07+idx),24,8)|_SHIFTL((s>>2),22,2)|_SHIFTL(mb,11,11)|_SHIFTL(ma,0,11));
3894 GX_LOAD_BP_REG(val);
3895
3896 ma = (u32)(offset_mtx[0][2]*1024.0F);
3897 mb = (u32)(offset_mtx[1][2]*1024.0F);
3898 val = (_SHIFTL((0x08+idx),24,8)|_SHIFTL((s>>4),22,2)|_SHIFTL(mb,11,11)|_SHIFTL(ma,0,11));
3899 GX_LOAD_BP_REG(val);
3900 }
3901
3902 void GX_SetTevIndBumpST(u8 tevstage,u8 indstage,u8 mtx_sel)
3903 {
3904 u8 sel_s,sel_t;
3905
3906 switch(mtx_sel) {
3907 case GX_ITM_0:
3908 sel_s = GX_ITM_S0;
3909 sel_t = GX_ITM_T0;
3910 break;
3911 case GX_ITM_1:
3912 sel_s = GX_ITM_S1;
3913 sel_t = GX_ITM_T1;
3914 break;
3915 case GX_ITM_2:
3916 sel_s = GX_ITM_S2;
3917 sel_t = GX_ITM_T2;
3918 break;
3919 default:
3920 sel_s = GX_ITM_OFF;
3921 sel_t = GX_ITM_OFF;
3922 break;
3923 }
3924
3925 GX_SetTevIndirect((tevstage+0),indstage,GX_ITF_8,GX_ITB_ST,sel_s,GX_ITW_0,GX_ITW_0,GX_FALSE,GX_FALSE,GX_ITBA_OFF);
3926 GX_SetTevIndirect((tevstage+1),indstage,GX_ITF_8,GX_ITB_ST,sel_t,GX_ITW_0,GX_ITW_0,GX_TRUE,GX_FALSE,GX_ITBA_OFF);
3927 GX_SetTevIndirect((tevstage+2),indstage,GX_ITF_8,GX_ITB_NONE,GX_ITM_OFF,GX_ITW_OFF,GX_ITW_OFF,GX_TRUE,GX_FALSE,GX_ITBA_OFF);
3928 }
3929
3930 void GX_SetTevIndBumpXYZ(u8 tevstage,u8 indstage,u8 mtx_sel)
3931 {
3932 GX_SetTevIndirect(tevstage,indstage,GX_ITF_8,GX_ITB_STU,mtx_sel,GX_ITW_OFF,GX_ITW_OFF,GX_FALSE,GX_FALSE,GX_ITBA_OFF);
3933 }
3934
3935 void GX_SetTevIndRepeat(u8 tevstage)
3936 {
3937 GX_SetTevIndirect(tevstage,GX_INDTEXSTAGE0,GX_ITF_8,GX_ITB_NONE,GX_ITM_OFF,GX_ITW_0,GX_ITW_0,GX_TRUE,GX_FALSE,GX_ITBA_OFF);
3938 }
3939
3940 void GX_SetIndTexCoordScale(u8 indtexid,u8 scale_s,u8 scale_t)
3941 {
3942 switch(indtexid) {
3943 case GX_INDTEXSTAGE0:
3944 __gx->tevRasOrder[0] = (__gx->tevRasOrder[0]&~0x0f)|(scale_s&0x0f);
3945 __gx->tevRasOrder[0] = (__gx->tevRasOrder[0]&~0xF0)|(_SHIFTL(scale_t,4,4));
3946 GX_LOAD_BP_REG(__gx->tevRasOrder[0]);
3947 break;
3948 case GX_INDTEXSTAGE1:
3949 __gx->tevRasOrder[0] = (__gx->tevRasOrder[0]&~0xF00)|(_SHIFTL(scale_s,8,4));
3950 __gx->tevRasOrder[0] = (__gx->tevRasOrder[0]&~0xF000)|(_SHIFTL(scale_t,12,4));
3951 GX_LOAD_BP_REG(__gx->tevRasOrder[0]);
3952 break;
3953 case GX_INDTEXSTAGE2:
3954 __gx->tevRasOrder[1] = (__gx->tevRasOrder[1]&~0x0f)|(scale_s&0x0f);
3955 __gx->tevRasOrder[1] = (__gx->tevRasOrder[1]&~0xF0)|(_SHIFTL(scale_t,4,4));
3956 GX_LOAD_BP_REG(__gx->tevRasOrder[1]);
3957 break;
3958 case GX_INDTEXSTAGE3:
3959 __gx->tevRasOrder[1] = (__gx->tevRasOrder[1]&~0xF00)|(_SHIFTL(scale_s,8,4));
3960 __gx->tevRasOrder[1] = (__gx->tevRasOrder[1]&~0xF000)|(_SHIFTL(scale_t,12,4));
3961 GX_LOAD_BP_REG(__gx->tevRasOrder[1]);
3962 break;
3963 }
3964 }
3965
3966 void GX_SetTevIndTile(u8 tevstage,u8 indtexid,u16 tilesize_x,u16 tilesize_y,u16 tilespacing_x,u16 tilespacing_y,u8 indtexfmt,u8 indtexmtx,u8 bias_sel,u8 alpha_sel)
3967 {
3968 s32 wrap_s,wrap_t;
3969 f32 offset_mtx[2][3];
3970 f64 fdspace_x,fdspace_y;
3971 u32 fbuf_x[2] = { 0x43300000,tilespacing_x };
3972 u32 fbuf_y[2] = { 0x43300000,tilespacing_y };
3973
3974 wrap_s = GX_ITW_OFF;
3975 if(tilesize_x==0x0010) wrap_s = GX_ITW_16;
3976 else if(tilesize_x==0x0020) wrap_s = GX_ITW_32;
3977 else if(tilesize_x==0x0040) wrap_s = GX_ITW_64;
3978 else if(tilesize_x==0x0080) wrap_s = GX_ITW_128;
3979 else if(tilesize_x==0x0100) wrap_s = GX_ITW_256;
3980
3981 wrap_t = GX_ITW_OFF;
3982 if(tilesize_y==0x0010) wrap_t = GX_ITW_16;
3983 else if(tilesize_y==0x0020) wrap_t = GX_ITW_32;
3984 else if(tilesize_y==0x0040) wrap_t = GX_ITW_64;
3985 else if(tilesize_y==0x0080) wrap_t = GX_ITW_128;
3986 else if(tilesize_y==0x0100) wrap_t = GX_ITW_256;
3987
3988 fdspace_x = *(f64*)((void*)fbuf_x);
3989 fdspace_y = *(f64*)((void*)fbuf_y);
3990
3991 offset_mtx[0][0] = (f32)((fdspace_x - 4503599627370496.0F)*0.00097656250F);
3992 offset_mtx[0][1] = 0.0F;
3993 offset_mtx[0][2] = 0.0F;
3994 offset_mtx[1][0] = 0.0F;
3995 offset_mtx[1][1] = (f32)((fdspace_y - 4503599627370496.0F)*0.00097656250F);
3996 offset_mtx[1][2] = 0.0F;
3997
3998 GX_SetIndTexMatrix(indtexmtx,offset_mtx,10);
3999 GX_SetTevIndirect(tevstage,indtexid,indtexfmt,bias_sel,indtexmtx,wrap_s,wrap_t,GX_FALSE,GX_TRUE,alpha_sel);
4000 }
4001
4002 void GX_SetFog(u8 type,f32 startz,f32 endz,f32 nearz,f32 farz,GXColor col)
4003 {
4004 f32 A, B, B_mant, C, A_f;
4005 u32 b_expn, b_m, a_hex, c_hex,proj = 0;
4006
4007
4008 proj = (u32)((type >> 3) & 0x01);
4009
4010 // Calculate constants a, b, and c (TEV HW requirements).
4011 if(proj) { // Orthographic Fog Type
4012 if((farz==nearz) || (endz==startz)) {
4013 // take care of the odd-ball case.
4014 A_f = 0.0f;
4015 C = 0.0f;
4016 } else {
4017 A = 1.0f/(endz-startz);
4018 A_f = (farz-nearz) * A;
4019 C = (startz-nearz) * A;
4020 }
4021
4022 b_expn = 0;
4023 b_m = 0;
4024 } else { // Perspective Fog Type
4025 // Calculate constants a, b, and c (TEV HW requirements).
4026 if((farz==nearz) || (endz==startz)) {
4027 // take care of the odd-ball case.
4028 A = 0.0f;
4029 B = 0.5f;
4030 C = 0.0f;
4031 } else {
4032 A = (farz*nearz)/((farz-nearz)*(endz-startz));
4033 B = farz/(farz-nearz);
4034 C = startz/(endz-startz);
4035 }
4036
4037 B_mant = B;
4038 b_expn = 1;
4039 while(B_mant>1.0) {
4040 B_mant /= 2;
4041 b_expn++;
4042 }
4043
4044 while((B_mant>0) && (B_mant<0.5)) {
4045 B_mant *= 2;
4046 b_expn--;
4047 }
4048
4049 A_f = A/(1<<(b_expn));
4050 b_m = (u32)(B_mant * 8388638);
4051 }
4052 a_hex = (*(u32*)((void*)&A_f));
4053 c_hex = (*(u32*)((void*)&C));
4054
4055 GX_LOAD_BP_REG(0xee000000|(a_hex>>12));
4056 GX_LOAD_BP_REG(0xef000000|b_m);
4057 GX_LOAD_BP_REG(0xf0000000|b_expn);
4058 GX_LOAD_BP_REG(0xf1000000|((type<<21)|(proj<<20)|(c_hex>>12)));
4059 GX_LOAD_BP_REG(0xf2000000|(_SHIFTL(col.r,16,8)|_SHIFTL(col.g,8,8)|(col.b&0xff)));
4060 }
4061
4062 void GX_SetFogRangeAdj(u8 enable,u16 center,GXFogAdjTbl *table)
4063 {
4064 GX_LOAD_BP_REG(0xe8000156);
4065 }
4066
4067 void GX_SetColorUpdate(u8 enable)
4068 {
4069 __gx->peCMode0 = (__gx->peCMode0&~0x8)|(_SHIFTL(enable,3,1));
4070 GX_LOAD_BP_REG(__gx->peCMode0);
4071 }
4072
4073 void GX_SetAlphaUpdate(u8 enable)
4074 {
4075 __gx->peCMode0 = (__gx->peCMode0&~0x10)|(_SHIFTL(enable,4,1));
4076 GX_LOAD_BP_REG(__gx->peCMode0);
4077 }
4078
4079 void GX_SetZCompLoc(u8 before_tex)
4080 {
4081 __gx->peCntrl = (__gx->peCntrl&~0x40)|(_SHIFTL(before_tex,6,1));
4082 GX_LOAD_BP_REG(__gx->peCntrl);
4083 }
4084
4085 void GX_SetPixelFmt(u8 pix_fmt,u8 z_fmt)
4086 {
4087 u8 ms_en = 0;
4088 u32 realfmt[8] = {0,1,2,3,4,4,4,5};
4089
4090 __gx->peCntrl = (__gx->peCntrl&~0x7)|(realfmt[pix_fmt]&0x7);
4091 __gx->peCntrl = (__gx->peCntrl&~0x38)|(_SHIFTL(z_fmt,3,3));
4092 GX_LOAD_BP_REG(__gx->peCntrl);
4093 __gx->dirtyState |= 0x0004;
4094
4095 if(pix_fmt==GX_PF_RGB565_Z16) ms_en = 1;
4096 __gx->genMode = (__gx->genMode&~0x200)|(_SHIFTL(ms_en,9,1));
4097
4098 if(realfmt[pix_fmt]==GX_PF_Y8) {
4099 pix_fmt -= GX_PF_Y8;
4100 __gx->peCMode1 = (__gx->peCMode1&~0xC00)|(_SHIFTL(pix_fmt,10,2));
4101 GX_LOAD_BP_REG(__gx->peCMode1);
4102 }
4103 }
4104
4105 void GX_SetDither(u8 dither)
4106 {
4107 __gx->peCMode0 = (__gx->peCMode0&~0x4)|(_SHIFTL(dither,2,1));
4108 GX_LOAD_BP_REG(__gx->peCMode0);
4109 }
4110
4111 void GX_SetDstAlpha(u8 enable,u8 a)
4112 {
4113 __gx->peCMode1 = (__gx->peCMode1&~0xff)|(a&0xff);
4114 __gx->peCMode1 = (__gx->peCMode1&~0x100)|(_SHIFTL(enable,8,1));
4115 GX_LOAD_BP_REG(__gx->peCMode1);
4116 }
4117
4118 void GX_SetFieldMask(u8 even_mask,u8 odd_mask)
4119 {
4120 u32 val = 0;
4121
4122 val = (_SHIFTL(even_mask,1,1))|(odd_mask&1);
4123 GX_LOAD_BP_REG(0x44000000|val);
4124 }
4125
4126 void GX_SetFieldMode(u8 field_mode,u8 half_aspect_ratio)
4127 {
4128 __gx->lpWidth = (__gx->lpWidth&~0x400000)|(_SHIFTL(half_aspect_ratio,22,1));
4129 GX_LOAD_BP_REG(__gx->lpWidth);
4130
4131 __GX_FlushTextureState();
4132 GX_LOAD_BP_REG(0x68000000|(field_mode&1));
4133 __GX_FlushTextureState();
4134 }
4135
4136 void GX_PokeAlphaMode(u8 func,u8 threshold)
4137 {
4138 _peReg[3] = (_SHIFTL(func,8,8))|(threshold&0xFF);
4139 }
4140
4141 void GX_PokeAlphaRead(u8 mode)
4142 {
4143 _peReg[4] = (mode&~0x4)|0x4;
4144 }
4145
4146 void GX_PokeDstAlpha(u8 enable,u8 a)
4147 {
4148 _peReg[2] = (_SHIFTL(enable,8,1))|(a&0xff);
4149 }
4150
4151 void GX_PokeAlphaUpdate(u8 update_enable)
4152 {
4153 _peReg[1] = (_peReg[1]&~0x10)|(_SHIFTL(update_enable,4,1));
4154 }
4155
4156 void GX_PokeColorUpdate(u8 update_enable)
4157 {
4158 _peReg[1] = (_peReg[1]&~0x8)|(_SHIFTL(update_enable,3,1));
4159 }
4160
4161 void GX_PokeDither(u8 dither)
4162 {
4163 _peReg[1] = (_peReg[1]&~0x4)|(_SHIFTL(dither,2,1));
4164 }
4165
4166 void GX_PokeBlendMode(u8 type,u8 src_fact,u8 dst_fact,u8 op)
4167 {
4168 u32 regval = _peReg[1];
4169
4170 regval = (regval&~0x1);
4171 if(type==GX_BM_BLEND || type==GX_BM_SUBSTRACT) regval |= 0x1;
4172
4173 regval = (regval&~0x800);
4174 if(type==GX_BM_SUBSTRACT) regval |= 0x800;
4175
4176 regval = (regval&~0x2);
4177 if(type==GX_BM_LOGIC) regval |= 0x2;
4178
4179 regval = (regval&~0xF000)|(_SHIFTL(op,12,4));
4180 regval = (regval&~0xE0)|(_SHIFTL(dst_fact,5,3));
4181 regval = (regval&~0x700)|(_SHIFTL(src_fact,8,3));
4182
4183 regval |= 0x41000000;
4184 _peReg[1] = (u16)regval;
4185 }
4186
4187 void GX_PokeARGB(u16 x,u16 y,GXColor color)
4188 {
4189 u32 regval;
4190
4191 regval = 0xc8000000|(_SHIFTL(x,2,10));
4192 regval = (regval&~0x3FF000)|(_SHIFTL(y,12,10));
4193 *(u32*)regval = _SHIFTL(color.a,24,8)|_SHIFTL(color.r,16,8)|_SHIFTL(color.g,8,8)|(color.b&0xff);
4194 }
4195
4196 void GX_PeekARGB(u16 x,u16 y,GXColor *color)
4197 {
4198 u32 regval,val;
4199
4200 regval = 0xc8000000|(_SHIFTL(x,2,10));
4201 regval = (regval&~0x3FF000)|(_SHIFTL(y,12,10));
4202 val = *(u32*)regval;
4203 color->a = _SHIFTR(val,24,8);
4204 color->r = _SHIFTR(val,16,8);
4205 color->g = _SHIFTR(val,8,8);
4206 color->b = val&0xff;
4207 }
4208
4209 void GX_PokeZ(u16 x,u16 y,u32 z)
4210 {
4211 u32 regval;
4212
4213 regval = 0xc8000000|(_SHIFTL(x,2,10));
4214 regval = (regval&~0x3FF000)|(_SHIFTL(y,12,10));
4215 regval = (regval&~0xC00000)|0x400000;
4216 *(u32*)regval = z;
4217 }
4218
4219 void GX_PeekZ(u16 x,u16 y,u32 *z)
4220 {
4221 u32 regval;
4222
4223 regval = 0xc8000000|(_SHIFTL(x,2,10));
4224 regval = (regval&~0x3FF000)|(_SHIFTL(y,12,10));
4225 regval = (regval&~0xC00000)|0x400000;
4226 *z = *(u32*)regval;
4227 }
4228
4229 void GX_PokeZMode(u8 comp_enable,u8 func,u8 update_enable)
4230 {
4231 u16 regval;
4232 regval = comp_enable&0x1;
4233 regval = (regval&~0xE)|(_SHIFTL(func,1,3));
4234 regval = (regval&0x10)|(_SHIFTL(update_enable,4,1));
4235 _peReg[0] = regval;
4236 }
4237
4238 void GX_SetIndTexOrder(u8 indtexstage,u8 texcoord,u8 texmap)
4239 {
4240 switch(indtexstage) {
4241 case GX_INDTEXSTAGE0:
4242 __gx->tevRasOrder[2] = (__gx->tevRasOrder[2]&~0x7)|(texmap&0x7);
4243 __gx->tevRasOrder[2] = (__gx->tevRasOrder[2]&~0x38)|(_SHIFTL(texcoord,3,3));
4244 break;
4245 case GX_INDTEXSTAGE1:
4246 __gx->tevRasOrder[2] = (__gx->tevRasOrder[2]&~0x1C0)|(_SHIFTL(texmap,6,3));
4247 __gx->tevRasOrder[2] = (__gx->tevRasOrder[2]&~0xE00)|(_SHIFTL(texcoord,9,3));
4248 break;
4249 case GX_INDTEXSTAGE2:
4250 __gx->tevRasOrder[2] = (__gx->tevRasOrder[2]&~0x7000)|(_SHIFTL(texmap,12,3));
4251 __gx->tevRasOrder[2] = (__gx->tevRasOrder[2]&~0x38000)|(_SHIFTL(texcoord,15,3));
4252 break;
4253 case GX_INDTEXSTAGE3:
4254 __gx->tevRasOrder[2] = (__gx->tevRasOrder[2]&~0x1C0000)|(_SHIFTL(texmap,18,3));
4255 __gx->tevRasOrder[2] = (__gx->tevRasOrder[2]&~0xE00000)|(_SHIFTL(texcoord,21,3));
4256 break;
4257 }
4258 GX_LOAD_BP_REG(__gx->tevRasOrder[2]);
4259 __gx->dirtyState |= 0x0003;
4260 }
4261
4262 void GX_InitLightPos(GXLightObj *lit_obj,f32 x,f32 y,f32 z)
4263 {
4264 struct __gx_litobj *lit = (struct __gx_litobj*)lit_obj;
4265
4266 lit->px = x;
4267 lit->py = y;
4268 lit->pz = z;
4269 }
4270
4271 void GX_InitLightColor(GXLightObj *lit_obj,GXColor col)
4272 {
4273 struct __gx_litobj *lit = (struct __gx_litobj*)lit_obj;
4274 lit->col = ((_SHIFTL(col.r,24,8))|(_SHIFTL(col.g,16,8))|(_SHIFTL(col.b,8,8))|(col.a&0xff));
4275 }
4276
4277 void GX_LoadLightObj(GXLightObj *lit_obj,u8 lit_id)
4278 {
4279 u32 id;
4280 u16 reg;
4281 struct __gx_litobj *lit = (struct __gx_litobj*)lit_obj;
4282
4283 switch(lit_id) {
4284 case GX_LIGHT0:
4285 id = 0;
4286 break;
4287 case GX_LIGHT1:
4288 id = 1;
4289 break;
4290 case GX_LIGHT2:
4291 id = 2;
4292 break;
4293 case GX_LIGHT3:
4294 id = 3;
4295 break;
4296 case GX_LIGHT4:
4297 id = 4;
4298 break;
4299 case GX_LIGHT5:
4300 id = 5;
4301 break;
4302 case GX_LIGHT6:
4303 id = 6;
4304 break;
4305 case GX_LIGHT7:
4306 id = 7;
4307 break;
4308 default:
4309 id = 0;
4310 break;
4311 }
4312
4313 reg = 0x600|(_SHIFTL(id,4,8));
4314 GX_LOAD_XF_REGS(reg,16);
4315 wgPipe->U32 = 0;
4316 wgPipe->U32 = 0;
4317 wgPipe->U32 = 0;
4318 wgPipe->U32 = lit->col;
4319 wgPipe->F32 = lit->a0;
4320 wgPipe->F32 = lit->a1;
4321 wgPipe->F32 = lit->a2;
4322 wgPipe->F32 = lit->k0;
4323 wgPipe->F32 = lit->k1;
4324 wgPipe->F32 = lit->k2;
4325 wgPipe->F32 = lit->px;
4326 wgPipe->F32 = lit->py;
4327 wgPipe->F32 = lit->pz;
4328 wgPipe->F32 = lit->nx;
4329 wgPipe->F32 = lit->ny;
4330 wgPipe->F32 = lit->nz;
4331 }
4332
4333 void GX_LoadLightObjIdx(u32 litobjidx,u8 litid)
4334 {
4335 u32 reg;
4336 u32 idx = 0;
4337
4338 switch(litid) {
4339 case GX_LIGHT0:
4340 idx = 0;
4341 break;
4342 case GX_LIGHT1:
4343 idx = 1;
4344 break;
4345 case GX_LIGHT2:
4346 idx = 2;
4347 break;
4348 case GX_LIGHT3:
4349 idx = 3;
4350 break;
4351 case GX_LIGHT4:
4352 idx = 4;
4353 break;
4354 case GX_LIGHT5:
4355 idx = 5;
4356 break;
4357 case GX_LIGHT6:
4358 idx = 6;
4359 break;
4360 case GX_LIGHT7:
4361 idx = 7;
4362 break;
4363 default:
4364 idx = 0;
4365 break;
4366
4367 }
4368
4369 reg = 0xf600|(_SHIFTL(idx,4,8));
4370 reg = (reg&~0xffff0000)|(_SHIFTL(litobjidx,16,16));
4371
4372 wgPipe->U8 = 0x38;
4373 wgPipe->U32 = reg;
4374 }
4375
4376 void GX_InitLightDir(GXLightObj *lit_obj,f32 nx,f32 ny,f32 nz)
4377 {
4378 struct __gx_litobj *lit = (struct __gx_litobj*)lit_obj;
4379
4380 lit->nx = -(nx);
4381 lit->ny = -(ny);
4382 lit->nz = -(nz);
4383 }
4384
4385 void GX_InitLightDistAttn(GXLightObj *lit_obj,f32 ref_dist,f32 ref_brite,u8 dist_fn)
4386 {
4387 f32 k0,k1,k2;
4388 struct __gx_litobj *lit = (struct __gx_litobj*)lit_obj;
4389
4390 if(ref_dist<0.0f ||
4391 ref_brite<0.0f || ref_brite>=1.0f) dist_fn = GX_DA_OFF;
4392
4393 switch(dist_fn) {
4394 case GX_DA_GENTLE:
4395 k0 = 1.0f;
4396 k1 = (1.0f-ref_brite)/(ref_brite*ref_dist);
4397 k2 = 0.0f;
4398 break;
4399 case GX_DA_MEDIUM:
4400 k0 = 1.0f;
4401 k1 = 0.5f*(1.0f-ref_brite)/(ref_brite*ref_dist);
4402 k2 = 0.5f*(1.0f-ref_brite)/(ref_brite*ref_dist*ref_dist);
4403 break;
4404 case GX_DA_STEEP:
4405 k0 = 1.0f;
4406 k1 = 0.0f;
4407 k2 = (1.0f-ref_brite)/(ref_brite*ref_dist*ref_dist);
4408 break;
4409 case GX_DA_OFF:
4410 default:
4411 k0 = 1.0f;
4412 k1 = 0.0f;
4413 k2 = 0.0f;
4414 break;
4415 }
4416
4417 lit->k0 = k0;
4418 lit->k1 = k1;
4419 lit->k2 = k2;
4420 }
4421
4422 void GX_InitLightAttn(GXLightObj *lit_obj,f32 a0,f32 a1,f32 a2,f32 k0,f32 k1,f32 k2)
4423 {
4424 struct __gx_litobj *lit = (struct __gx_litobj*)lit_obj;
4425
4426 lit->a0 = a0;
4427 lit->a1 = a1;
4428 lit->a2 = a2;
4429 lit->k0 = k0;
4430 lit->k1 = k1;
4431 lit->k2 = k2;
4432 }
4433
4434 void GX_InitLightAttnA(GXLightObj *lit_obj,f32 a0,f32 a1,f32 a2)
4435 {
4436 struct __gx_litobj *lit = (struct __gx_litobj*)lit_obj;
4437
4438 lit->a0 = a0;
4439 lit->a1 = a1;
4440 lit->a2 = a2;
4441 }
4442
4443 void GX_InitLightAttnK(GXLightObj *lit_obj,f32 k0,f32 k1,f32 k2)
4444 {
4445 struct __gx_litobj *lit = (struct __gx_litobj*)lit_obj;
4446
4447 lit->k0 = k0;
4448 lit->k1 = k1;
4449 lit->k2 = k2;
4450 }
4451
4452 void GX_InitSpecularDirHA(GXLightObj *lit_obj,f32 nx,f32 ny,f32 nz,f32 hx,f32 hy,f32 hz)
4453 {
4454 f32 px, py, pz;
4455 struct __gx_litobj *lit = (struct __gx_litobj*)lit_obj;
4456
4457 px = (nx * LARGE_NUMBER);
4458 py = (ny * LARGE_NUMBER);
4459 pz = (nz * LARGE_NUMBER);
4460
4461 lit->px = px;
4462 lit->py = py;
4463 lit->pz = pz;
4464 lit->nx = hx;
4465 lit->ny = hy;
4466 lit->nz = hz;
4467 }
4468
4469 void GX_InitSpecularDir(GXLightObj *lit_obj,f32 nx,f32 ny,f32 nz)
4470 {
4471 f32 px, py, pz;
4472 f32 hx, hy, hz, mag;
4473 struct __gx_litobj *lit = (struct __gx_litobj*)lit_obj;
4474
4475 // Compute half-angle vector
4476 hx = -nx;
4477 hy = -ny;
4478 hz = (-nz + 1.0f);
4479 mag = ((hx * hx) + (hy * hy) + (hz * hz));
4480 if(mag!=0.0f) mag = 1.0f / sqrtf(mag);
4481
4482 hx *= mag;
4483 hy *= mag;
4484 hz *= mag;
4485
4486 px = (nx * LARGE_NUMBER);
4487 py = (ny * LARGE_NUMBER);
4488 pz = (nz * LARGE_NUMBER);
4489
4490 lit->px = px;
4491 lit->py = py;
4492 lit->pz = pz;
4493 lit->nx = hx;
4494 lit->ny = hy;
4495 lit->nz = hz;
4496 }
4497
4498 void GX_InitLightSpot(GXLightObj *lit_obj,f32 cut_off,u8 spotfn)
4499 {
4500 f32 r,d,cr,a0,a1,a2;
4501 struct __gx_litobj *lit = (struct __gx_litobj*)lit_obj;
4502
4503 if(cut_off<0.0f || cut_off>90.0f) spotfn = GX_SP_OFF;
4504
4505 r = (cut_off*M_PI)/180.0f;
4506 cr = cosf(r);
4507
4508 switch(spotfn) {
4509 case GX_SP_FLAT:
4510 a0 = -1000.0f*cr;
4511 a1 = 1000.0f;
4512 a2 = 0.0f;
4513 break;
4514 case GX_SP_COS:
4515 a0 = -cr/(1.0f-cr);
4516 a1 = 1.0f/(1.0f-cr);
4517 a2 = 0.0f;
4518 break;
4519 case GX_SP_COS2:
4520 a0 = 0.0f;
4521 a1 = -cr/(1.0f-cr);
4522 a2 = 1.0f/(1.0f-cr);
4523 break;
4524 case GX_SP_SHARP:
4525 d = (1.0f-cr)*(1.0f-cr);
4526 a0 = cr*(cr-2.0f);
4527 a1 = 2.0f/d;
4528 a2 = -1.0/d;
4529 break;
4530 case GX_SP_RING1:
4531 d = (1.0f-cr)*(1.0f-cr);
4532 a0 = -4.0f*cr/d;
4533 a1 = 4.0f*(1.0f+cr)/d;
4534 a2 = -4.0f/d;
4535 break;
4536 case GX_SP_RING2:
4537 d = (1.0f-cr)*(1.0f-cr);
4538 a0 = 1.0f-2.0f*cr*cr/d;
4539 a1 = 4.0f*cr/d;
4540 a2 = -2.0f/d;
4541 break;
4542 case GX_SP_OFF:
4543 default:
4544 a0 = 1.0f;
4545 a1 = 0.0f;
4546 a2 = 0.0f;
4547 break;
4548 }
4549
4550 lit->a0 = a0;
4551 lit->a1 = a1;
4552 lit->a2 = a2;
4553 }
4554
4555 void GX_SetGPMetric(u32 perf0,u32 perf1)
4556 {
4557 // check last setted perf0 counters
4558 if(__gx->perf0Mode>=GX_PERF0_TRIANGLES && __gx->perf0Mode<GX_PERF0_QUAD_0CVG)
4559 GX_LOAD_BP_REG(0x23000000);
4560 else if(__gx->perf0Mode>=GX_PERF0_QUAD_0CVG && __gx->perf0Mode<GX_PERF0_CLOCKS)
4561 GX_LOAD_BP_REG(0x24000000);
4562 else if(__gx->perf0Mode>=GX_PERF0_VERTICES && __gx->perf0Mode<=GX_PERF0_CLOCKS)
4563 GX_LOAD_XF_REG(0x1006,0);
4564
4565 // check last setted perf1 counters
4566 if(__gx->perf1Mode>=GX_PERF1_VC_ELEMQ_FULL && __gx->perf1Mode<GX_PERF1_FIFO_REQ) {
4567 __gx->cpPerfMode = (__gx->cpPerfMode&~0xf0);
4568 GX_LOAD_CP_REG(0x20,__gx->cpPerfMode);
4569 } else if(__gx->perf1Mode>=GX_PERF1_FIFO_REQ && __gx->perf1Mode<GX_PERF1_CLOCKS) {
4570 _cpReg[3] = 0;
4571 } else if(__gx->perf1Mode>=GX_PERF1_TEXELS && __gx->perf1Mode<=GX_PERF1_CLOCKS) {
4572 GX_LOAD_BP_REG(0x67000000);
4573 }
4574
4575 __gx->perf0Mode = perf0;
4576 switch(__gx->perf0Mode) {
4577 case GX_PERF0_CLOCKS:
4578 GX_LOAD_XF_REG(0x1006,0x00000273);
4579 break;
4580 case GX_PERF0_VERTICES:
4581 GX_LOAD_XF_REG(0x1006,0x0000014a);
4582 break;
4583 case GX_PERF0_CLIP_VTX:
4584 GX_LOAD_XF_REG(0x1006,0x0000016b);
4585 break;
4586 case GX_PERF0_CLIP_CLKS:
4587 GX_LOAD_XF_REG(0x1006,0x00000084);
4588 break;
4589 case GX_PERF0_XF_WAIT_IN:
4590 GX_LOAD_XF_REG(0x1006,0x000000c6);
4591 break;
4592 case GX_PERF0_XF_WAIT_OUT:
4593 GX_LOAD_XF_REG(0x1006,0x00000210);
4594 break;
4595 case GX_PERF0_XF_XFRM_CLKS:
4596 GX_LOAD_XF_REG(0x1006,0x00000252);
4597 break;
4598 case GX_PERF0_XF_LIT_CLKS:
4599 GX_LOAD_XF_REG(0x1006,0x00000231);
4600 break;
4601 case GX_PERF0_XF_BOT_CLKS:
4602 GX_LOAD_XF_REG(0x1006,0x000001ad);
4603 break;
4604 case GX_PERF0_XF_REGLD_CLKS:
4605 GX_LOAD_XF_REG(0x1006,0x000001ce);
4606 break;
4607 case GX_PERF0_XF_REGRD_CLKS:
4608 GX_LOAD_XF_REG(0x1006,0x00000021);
4609 break;
4610 case GX_PERF0_CLIP_RATIO:
4611 GX_LOAD_XF_REG(0x1006,0x00000153);
4612 break;
4613 case GX_PERF0_TRIANGLES:
4614 GX_LOAD_BP_REG(0x2300AE7F);
4615 break;
4616 case GX_PERF0_TRIANGLES_CULLED:
4617 GX_LOAD_BP_REG(0x23008E7F);
4618 break;
4619 case GX_PERF0_TRIANGLES_PASSED:
4620 GX_LOAD_BP_REG(0x23009E7F);
4621 break;
4622 case GX_PERF0_TRIANGLES_SCISSORED:
4623 GX_LOAD_BP_REG(0x23001E7F);
4624 break;
4625 case GX_PERF0_TRIANGLES_0TEX:
4626 GX_LOAD_BP_REG(0x2300AC3F);
4627 break;
4628 case GX_PERF0_TRIANGLES_1TEX:
4629 GX_LOAD_BP_REG(0x2300AC7F);
4630 break;
4631 case GX_PERF0_TRIANGLES_2TEX:
4632 GX_LOAD_BP_REG(0x2300ACBF);
4633 break;
4634 case GX_PERF0_TRIANGLES_3TEX:
4635 GX_LOAD_BP_REG(0x2300ACFF);
4636 break;
4637 case GX_PERF0_TRIANGLES_4TEX:
4638 GX_LOAD_BP_REG(0x2300AD3F);
4639 break;
4640 case GX_PERF0_TRIANGLES_5TEX:
4641 GX_LOAD_BP_REG(0x2300AD7F);
4642 break;
4643 case GX_PERF0_TRIANGLES_6TEX:
4644 GX_LOAD_BP_REG(0x2300ADBF);
4645 break;
4646 case GX_PERF0_TRIANGLES_7TEX:
4647 GX_LOAD_BP_REG(0x2300ADFF);
4648 break;
4649 case GX_PERF0_TRIANGLES_8TEX:
4650 GX_LOAD_BP_REG(0x2300AE3F);
4651 break;
4652 case GX_PERF0_TRIANGLES_0CLR:
4653 GX_LOAD_BP_REG(0x2300A27F);
4654 break;
4655 case GX_PERF0_TRIANGLES_1CLR:
4656 GX_LOAD_BP_REG(0x2300A67F);
4657 break;
4658 case GX_PERF0_TRIANGLES_2CLR:
4659 GX_LOAD_BP_REG(0x2300AA7F);
4660 break;
4661 case GX_PERF0_QUAD_0CVG:
4662 GX_LOAD_BP_REG(0x2402C0C6);
4663 break;
4664 case GX_PERF0_QUAD_NON0CVG:
4665 GX_LOAD_BP_REG(0x2402C16B);
4666 break;
4667 case GX_PERF0_QUAD_1CVG:
4668 GX_LOAD_BP_REG(0x2402C0E7);
4669 break;
4670 case GX_PERF0_QUAD_2CVG:
4671 GX_LOAD_BP_REG(0x2402C108);
4672 break;
4673 case GX_PERF0_QUAD_3CVG:
4674 GX_LOAD_BP_REG(0x2402C129);
4675 break;
4676 case GX_PERF0_QUAD_4CVG:
4677 GX_LOAD_BP_REG(0x2402C14A);
4678 break;
4679 case GX_PERF0_AVG_QUAD_CNT:
4680 GX_LOAD_BP_REG(0x2402C1AD);
4681 break;
4682 case GX_PERF0_NONE:
4683 break;
4684 }
4685
4686 __gx->perf1Mode = perf1;
4687 switch(__gx->perf1Mode) {
4688 case GX_PERF1_CLOCKS:
4689 GX_LOAD_BP_REG(0x67000042);
4690 break;
4691 case GX_PERF1_TEXELS:
4692 GX_LOAD_BP_REG(0x67000084);
4693 break;
4694 case GX_PERF1_TX_IDLE:
4695 GX_LOAD_BP_REG(0x67000063);
4696 break;
4697 case GX_PERF1_TX_REGS:
4698 GX_LOAD_BP_REG(0x67000129);
4699 break;
4700 case GX_PERF1_TX_MEMSTALL:
4701 GX_LOAD_BP_REG(0x67000252);
4702 break;
4703 case GX_PERF1_TC_CHECK1_2:
4704 GX_LOAD_BP_REG(0x67000021);
4705 break;
4706 case GX_PERF1_TC_CHECK3_4:
4707 GX_LOAD_BP_REG(0x6700014b);
4708 break;
4709 case GX_PERF1_TC_CHECK5_6:
4710 GX_LOAD_BP_REG(0x6700018d);
4711 break;
4712 case GX_PERF1_TC_CHECK7_8:
4713 GX_LOAD_BP_REG(0x670001cf);
4714 break;
4715 case GX_PERF1_TC_MISS:
4716 GX_LOAD_BP_REG(0x67000211);
4717 break;
4718 case GX_PERF1_VC_ELEMQ_FULL:
4719 __gx->cpPerfMode = (__gx->cpPerfMode&~0xf0)|0x20;
4720 GX_LOAD_CP_REG(0x20,__gx->cpPerfMode);
4721 break;
4722 case GX_PERF1_VC_MISSQ_FULL:
4723 __gx->cpPerfMode = (__gx->cpPerfMode&~0xf0)|0x30;
4724 GX_LOAD_CP_REG(0x20,__gx->cpPerfMode);
4725 break;
4726 case GX_PERF1_VC_MEMREQ_FULL:
4727 __gx->cpPerfMode = (__gx->cpPerfMode&~0xf0)|0x40;
4728 GX_LOAD_CP_REG(0x20,__gx->cpPerfMode);
4729 break;
4730 case GX_PERF1_VC_STATUS7:
4731 __gx->cpPerfMode = (__gx->cpPerfMode&~0xf0)|0x50;
4732 GX_LOAD_CP_REG(0x20,__gx->cpPerfMode);
4733 break;
4734 case GX_PERF1_VC_MISSREP_FULL:
4735 __gx->cpPerfMode = (__gx->cpPerfMode&~0xf0)|0x60;
4736 GX_LOAD_CP_REG(0x20,__gx->cpPerfMode);
4737 break;
4738 case GX_PERF1_VC_STREAMBUF_LOW:
4739 __gx->cpPerfMode = (__gx->cpPerfMode&~0xf0)|0x70;
4740 GX_LOAD_CP_REG(0x20,__gx->cpPerfMode);
4741 break;
4742 case GX_PERF1_VC_ALL_STALLS:
4743 __gx->cpPerfMode = (__gx->cpPerfMode&~0xf0)|0x90;
4744 GX_LOAD_CP_REG(0x20,__gx->cpPerfMode);
4745 break;
4746 case GX_PERF1_VERTICES:
4747 __gx->cpPerfMode = (__gx->cpPerfMode&~0xf0)|0x80;
4748 GX_LOAD_CP_REG(0x20,__gx->cpPerfMode);
4749 break;
4750 case GX_PERF1_FIFO_REQ:
4751 _cpReg[3] = 2;
4752 break;
4753 case GX_PERF1_CALL_REQ:
4754 _cpReg[3] = 3;
4755 break;
4756 case GX_PERF1_VC_MISS_REQ:
4757 _cpReg[3] = 4;
4758 break;
4759 case GX_PERF1_CP_ALL_REQ:
4760 _cpReg[3] = 5;
4761 break;
4762 case GX_PERF1_NONE:
4763 break;
4764 }
4765
4766 }
4767
4768 void GX_ClearGPMetric()
4769 {
4770 _cpReg[2] = 4;
4771 }
4772
4773 void GX_InitXfRasMetric()
4774 {
4775 GX_LOAD_BP_REG(0x2402C022);
4776 GX_LOAD_XF_REG(0x1006,0x31000);
4777 }
4778
4779 void GX_ReadXfRasMetric(u32 *xfwaitin,u32 *xfwaitout,u32 *rasbusy,u32 *clks)
4780 {
4781 *rasbusy = _SHIFTL(_cpReg[33],16,16)|(_cpReg[32]&0xffff);
4782 *clks = _SHIFTL(_cpReg[35],16,16)|(_cpReg[34]&0xffff);
4783 *xfwaitin = _SHIFTL(_cpReg[37],16,16)|(_cpReg[36]&0xffff);
4784 *xfwaitout = _SHIFTL(_cpReg[39],16,16)|(_cpReg[38]&0xffff);
4785 }
4786
4787 u32 GX_ReadClksPerVtx()
4788 {
4789 GX_DrawDone();
4790 _cpReg[49] = 0x1007;
4791 _cpReg[48] = 0x1007;
4792 return (_cpReg[50]<<8);
4793 }
4794
4795 void GX_ClearVCacheMetric()
4796 {
4797 GX_LOAD_CP_REG(0,0);
4798 }
4799
4800 void GX_ReadVCacheMetric(u32 *check,u32 *miss,u32 *stall)
4801 {
4802 *check = _SHIFTL(_cpReg[41],16,16)|(_cpReg[40]&0xffff);
4803 *miss = _SHIFTL(_cpReg[43],16,16)|(_cpReg[42]&0xffff);
4804 *stall = _SHIFTL(_cpReg[45],16,16)|(_cpReg[44]&0xffff);
4805 }
4806
4807 void GX_SetVCacheMetric(u32 attr)
4808 {
4809 }
4810
4811 void GX_GetGPStatus(u8 *overhi,u8 *underlow,u8 *readIdle,u8 *cmdIdle,u8 *brkpt)
4812 {
4813 _gxgpstatus = _cpReg[0];
4814 *overhi = !!(_gxgpstatus&1);
4815 *underlow = !!(_gxgpstatus&2);
4816 *readIdle = !!(_gxgpstatus&4);
4817 *cmdIdle = !!(_gxgpstatus&8);
4818 *brkpt = !!(_gxgpstatus&16);
4819 }
4820
4821 void GX_ReadGPMetric(u32 *cnt0,u32 *cnt1)
4822 {
4823 u32 tmp,reg1,reg2,reg3,reg4;
4824
4825 reg1 = (_SHIFTL(_cpReg[33],16,16))|(_cpReg[32]&0xffff);
4826 reg2 = (_SHIFTL(_cpReg[35],16,16))|(_cpReg[34]&0xffff);
4827 reg3 = (_SHIFTL(_cpReg[37],16,16))|(_cpReg[36]&0xffff);
4828 reg4 = (_SHIFTL(_cpReg[39],16,16))|(_cpReg[38]&0xffff);
4829
4830 *cnt0 = 0;
4831 if(__gx->perf0Mode==GX_PERF0_CLIP_RATIO) {
4832 tmp = reg2*1000;
4833 *cnt0 = tmp/reg1;
4834 } else if(__gx->perf0Mode>=GX_PERF0_VERTICES && __gx->perf0Mode<GX_PERF0_NONE) *cnt0 = reg1;
4835
4836 //further implementation needed.....
4837 // cnt1 fails....
4838 }
4839
4840 void GX_AdjustForOverscan(GXRModeObj *rmin,GXRModeObj *rmout,u16 hor,u16 ver)
4841 {
4842 if(rmin!=rmout) memcpy(rmout,rmin,sizeof(GXRModeObj));
4843
4844 rmout->fbWidth = rmin->fbWidth-(hor<<1);
4845 rmout->efbHeight = rmin->efbHeight-((rmin->efbHeight*(ver<<1))/rmin->xfbHeight);
4846 if(rmin->xfbMode==VI_XFBMODE_SF && !(rmin->viTVMode&VI_PROGRESSIVE)) rmout->xfbHeight = rmin->xfbHeight-ver;
4847 else rmout->xfbHeight = rmin->xfbHeight-(ver<<1);
4848
4849 rmout->viWidth = rmin->viWidth-(hor<<1);
4850 if(rmin->viTVMode&VI_PROGRESSIVE) rmout->viHeight = rmin->viHeight-(ver<<2);
4851 else rmout->viHeight = rmin->viHeight-(ver<<1);
4852
4853 rmout->viXOrigin += hor;
4854 rmout->viYOrigin += ver;
4855 }
4856
4857 f32 GX_GetYScaleFactor(u16 efbHeight,u16 xfbHeight)
4858 {
4859 u32 yScale,xfblines,cnt;
4860 f32 yscale;
4861
4862 yscale = (f32)efbHeight/(f32)xfbHeight;
4863 yScale = (u32)((f32)256.0/yscale)&0x1ff;
4864
4865 cnt = xfbHeight;
4866 xfblines = __GX_GetNumXfbLines(efbHeight,yScale);
4867 while(xfblines>=xfbHeight) {
4868 yscale = (f32)(cnt--)/(f32)efbHeight;
4869 yScale = (u32)((f32)256.0/yscale)&0x1ff;
4870 xfblines = __GX_GetNumXfbLines(efbHeight,yScale);
4871 }
4872
4873 while(xfblines<xfbHeight) {
4874 yscale = (f32)(cnt++)/(f32)efbHeight;
4875 yScale = (u32)((f32)256.0/yscale)&0x1ff;
4876 xfblines = __GX_GetNumXfbLines(efbHeight,yScale);
4877 }
4878 return yscale;
4879 }
4880
4881 #undef LARGE_NUMBER
inofficial libogc fork