libogc/ogc_crt0.S

   1 #include <asm.h>
   2
   3         .text
   4         .section .init
   5
   6         # crt0.s file for the GameCube V1.1 by Costis (costis@gbaemu.com)!
   7         #
   8         # Updates: Added support for clearing the BSS section so that global
   9         #            variables are cleared to 0 upon start-up.
  10         #
  11         # This is start-up code for initializing the GameCube system and hardware
  12         # before executing the actual user program code. It clears the GPR's,
  13         # initializes the FPR's, initializes the Data, Code, and L2 caches, clears
  14         # and initializes SPR's, and disables exceptions (interrupts).
  15         #
  16         # Have fun!!! Please e-mail any suggestions or bugs to costis@gbaemu.com.
  17
  18         # Entry Point
  19
  20         .extern __InitBATS
  21         .extern __InitPS
  22         .extern __InitFPRS
  23         .extern __InitCache
  24         .extern __InitSystem
  25         .extern __sbss_start, __bss_end, __CheckARGV
  26         .globl _start, __main, __system_argv
  27 _start:
  28         b       startup
  29         .long   0x5f617267
  30 __argv:
  31         .long   0               # argv magic
  32         .long 0         # command line
  33         .long 0         # command line length
  34         .long   0               # argc
  35         .long   0               #       argv
  36         .long 0         # end address of argv
  37
  38 startup:
  39         bl              __InitBATS                      # Initialize BATs to a clear and known state
  40         bl              __InitGPRS                      # Initialize the General Purpose Registers
  41         bl              __InitHardware          # Initialize some aspects of the Hardware
  42         bl              __InitSystem            # Initialize more cache aspects, clear a few SPR's, and disable interrupts.
  43
  44         bl              __CheckARGV             # check for argv & initialise struct
  45
  46         lis             r3,__isIPL@h
  47         ori             r3,r3,__isIPL@l
  48         cmplwi  r3,0
  49         bne             1f
  50
  51         # Clear the SBSS section!
  52         lis             r3,__sbss_start@h
  53         ori             r3,r3,__sbss_start@l
  54         li              r4,0
  55         lis             r5,__sbss_end@h
  56         ori             r5,r5,__sbss_end@l
  57         sub             r5,r5,r3
  58         bl              _memset
  59
  60         # Clear the BSS section!
  61         lis             r3,__bss_start@h
  62         ori             r3,r3,__bss_start@l
  63         li              r4,0
  64         lis             r5,__bss_end@h
  65         ori             r5,r5,__bss_end@l
  66         sub             r5,r5,r3
  67         bl              _memset
  68
  69 1:
  70         b      SYS_Init # Branch to the user code!
  71
  72 __InitGPRS:
  73         # Clear all of the GPR's to 0
  74         li      r0,0
  75         li      r3,0
  76         li      r4,0
  77         li      r5,0
  78         li      r6,0
  79         li      r7,0
  80         li      r8,0
  81         li      r9,0
  82         li      r10,0
  83         li      r11,0
  84         li      r12,0
  85         li      r14,0
  86         li      r15,0
  87         li      r16,0
  88         li      r17,0
  89         li      r18,0
  90         li      r19,0
  91         li      r20,0
  92         li      r21,0
  93         li      r22,0
  94         li      r23,0
  95         li      r24,0
  96         li      r25,0
  97         li      r26,0
  98         li      r27,0
  99         li      r28,0
 100         li      r29,0
 101         li      r30,0
 102         li      r31,0
 103
 104         lis             sp,__crt0stack@h                    # we take 0x8173FFF0 as the topmost starting point for our stack,this gives us ~128Kb Stack
 105         ori             sp,sp,__crt0stack@l
 106         addi    sp,sp,-4
 107         stw             r0,0(sp)
 108         stwu    sp,-56(sp)
 109
 110         lis     r2,_SDA2_BASE_@h
 111         ori     r2,r2,_SDA2_BASE_@l  # Set the Small Data 2 (Read Only) base register.
 112         lis     r13,_SDA_BASE_@h
 113         ori     r13,r13,_SDA_BASE_@l # Set the Small Data (Read\Write) base register.
 114         blr
 115
 116 __InitHardware:
 117         # Enable the Floating Point Registers
 118         mfmsr   r3
 119         ori     r3,r3,MSR_FP
 120         mtmsr   r3
 121
 122         mflr    r31
 123         bl              __InitPS                        # Initialize Paired Singles
 124         bl              __InitFPRS                      # Initialize the FPR's
 125         bl              __InitCache             # Initialize the system caches
 126         mtlr    r31
 127         blr
 128
 129         //r3 = ptr, r4 = fill, r5 = size
 130         .globl _memset
 131 _memset:
 132         clrlwi. r6,r5,29
 133         srwi    r5,r5,2
 134         subi    r3,r3,4
 135         mtctr   r5
 136 1:      stwu    r4,4(r3)
 137         bdnz    1b
 138         cmplwi  r6,0
 139         beq             3f
 140 2:      stbu    r4,1(r3)
 141         addic.  r6,r6,-1
 142         bne+    2b
 143 3:      blr
 144
 145         .section .bss
 146         .balign 8
 147 __crt0stack_end:
 148         .space 0x4000
 149 __crt0stack:
 150
 151         .globl __system_argv
 152         .section        .sdata,"aw",@progbits
 153         .align 2
 154         .type   __system_argv, @object
 155         .size   __system_argv, 4
 156 __system_argv:
 157         .long   __argv