ARM: lr addresses the next instruction after the failing one in undefined instruction...
commite623c6b7cc54e71a78e614e4f8e40bccf27f05ad
authorfunman <funman@a1c6a512-1295-4272-9138-f99709370657>
Sun, 24 Jan 2010 15:04:21 +0000 (24 15:04 +0000)
committerfunman <funman@a1c6a512-1295-4272-9138-f99709370657>
Sun, 24 Jan 2010 15:04:21 +0000 (24 15:04 +0000)
tree112b2df776d9e4ca404237c176f56433a4136471
parentf424acb9a4c87644aa4e1f4ebf105009195641bd
ARM: lr addresses the next instruction after the failing one in undefined instruction vector

Substract 4 before passing the argument to UIE so the correct address is displayed

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@24321 a1c6a512-1295-4272-9138-f99709370657
firmware/target/arm/crt0-pp.S
firmware/target/arm/crt0.S
firmware/target/arm/imx31/crt0.S
firmware/target/arm/pnx0101/crt0-pnx0101.S
firmware/target/arm/s3c2440/crt0.S
firmware/target/arm/s5l8700/crt0.S
firmware/target/arm/tcc77x/crt0.S
firmware/target/arm/tcc780x/crt0.S
firmware/target/arm/tms320dm320/crt0.S