| commit | cd57242904fc920d77d8c0229f2435acf03c863c | |
| author | jethead71 <jethead71@a1c6a512-1295-4272-9138-f99709370657> | |
| Sat, 22 Jan 2011 21:04:25 +0000 (22 21:04 +0000) | ||
| committer | jethead71 <jethead71@a1c6a512-1295-4272-9138-f99709370657> | |
| Sat, 22 Jan 2011 21:04:25 +0000 (22 21:04 +0000) | ||
| tree | 1aea8aee0f4845410b2f23d73fe84b981d341278 | treesnapshot (tar.gz zip) |
| parent | 6002bf9cb27bca5538fd9f025536d3dd9c715048 | commitdiff |
i.MX31: Allow interrupts in thread context, not just ISR context, during the lengthy DVFS voltage ramp-up delay. Also, explicitly enable them just before mc13783_init since that does anyway because of the PMIC write inside it.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@29116 a1c6a512-1295-4272-9138-f99709370657
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@29116 a1c6a512-1295-4272-9138-f99709370657
| firmware/target/arm/imx31/dvfs_dptc-imx31.c | diffblobblamehistory | |
| firmware/target/arm/imx31/gigabeat-s/kernel-gigabeat-s.c | diffblobblamehistory |