| commit | 5f9f5d97cdd987bd22a258a877986d87e1be77fd | |
| author | bertrik <bertrik@a1c6a512-1295-4272-9138-f99709370657> | |
| Tue, 7 Apr 2009 17:08:26 +0000 (7 17:08 +0000) | ||
| committer | bertrik <bertrik@a1c6a512-1295-4272-9138-f99709370657> | |
| Tue, 7 Apr 2009 17:08:26 +0000 (7 17:08 +0000) | ||
| tree | 89e80dab65d01d022a3f8e58fa2a158b38df8370 | treesnapshot (tar.gz zip) |
| parent | 141f977edda4851ce174fa965185b17e882cc68c | commitdiff |
Patch by Rafaël Carré - Sansa AMS: Fix a few mistakes in DMA code
DMAC_INT_TC_CLEAR is a write-only reg
HIGH bits of DMAC_SYNC mean synchronisation logic disabled.
Also, according to the OF and to tests, all the peripherals we use run at the same frequency (PCLK?).
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@20643 a1c6a512-1295-4272-9138-f99709370657
DMAC_INT_TC_CLEAR is a write-only reg
HIGH bits of DMAC_SYNC mean synchronisation logic disabled.
Also, according to the OF and to tests, all the peripherals we use run at the same frequency (PCLK?).
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@20643 a1c6a512-1295-4272-9138-f99709370657
| firmware/target/arm/as3525/dma-pl081.c | diffblobblamehistory |