src/arch/parisc.h

   1 /*
   2  * Copyright (C) 2003, 2004, 2005, 2006, 2007
   3  * Robert Lougher <rob@lougher.org.uk>.
   4  *
   5  * This file is part of JamVM.
   6  *
   7  * This program is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU General Public License
   9  * as published by the Free Software Foundation; either version 2,
  10  * or (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
  20  */
  21
  22 #define OS_ARCH "parisc"
  23
  24 #define HANDLER_TABLE_T static const void
  25 #define DOUBLE_1_BITS 0x3ff0000000000000LL
  26
  27 #define READ_DBL(v,p,l) v = ((u8)p[0]<<56)|((u8)p[1]<<48)|((u8)p[2]<<40) \
  28                             |((u8)p[3]<<32)|((u8)p[4]<<24)|((u8)p[5]<<16) \
  29                             |((u8)p[6]<<8)|(u8)p[7]; p+=8
  30
  31 /* Needed for i386 -- empty here */
  32 #define FPU_HACK
  33
  34 typedef struct {
  35   volatile unsigned int __attribute__ ((aligned (16))) lock;
  36 } CasLock;
  37
  38 extern CasLock cas_lock;
  39
  40 #define LDCW(addr)                                                   \
  41 ({                                                                   \
  42     unsigned int ret;                                                \
  43     __asm__ __volatile__("ldcw 0(%1),%0" : "=r" (ret) : "r" (addr)); \
  44     ret;                                                             \
  45 })
  46
  47 #define COMPARE_AND_SWAP(addr, old_val, new_val) \
  48 ({                                               \
  49     int result;                                  \
  50                                                  \
  51     while(LDCW(&cas_lock.lock) == 0);            \
  52                                                  \
  53     if(*addr == old_val) {                       \
  54         *addr = new_val;                         \
  55         result = 1;                              \
  56     } else                                       \
  57         result = 0;                              \
  58                                                  \
  59     cas_lock.lock = 1;                           \
  60     __asm__ __volatile__ ("":::"memory");        \
  61     result;                                      \
  62 })
  63
  64 #define LOCKWORD_READ(addr) *addr
  65 #define LOCKWORD_WRITE(addr, value) *addr = value
  66 #define LOCKWORD_COMPARE_AND_SWAP(addr, old_val, new_val) \
  67         COMPARE_AND_SWAP(addr, old_val, new_val)
  68
  69 #ifdef INLINING
  70 #error Inlining not supported as FLUSH_CACHE unimplemented \
  71        on this architecture
  72 #endif
  73
  74 #define MBARRIER() __asm__ __volatile__ ("" ::: "memory")
  75 #define UNLOCK_MBARRIER() __asm__ __volatile__ ("" ::: "memory")
  76 #define JMM_LOCK_MBARRIER() __asm__ __volatile__ ("" ::: "memory")
  77 #define JMM_UNLOCK_MBARRIER() __asm__ __volatile__ ("" ::: "memory")