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6069 libdisasm: instrlen arch op should have a sane default
[illumos-gate.git] / usr / src / lib / libdisasm / common / dis_sparc_instr.c
blobaa357837a0658f2bd5b683031b1273d82866fdb4
1 /*
2 * CDDL HEADER START
3 *
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License (the "License").
6 * You may not use this file except in compliance with the License.
7 *
8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 * or http://www.opensolaris.org/os/licensing.
10 * See the License for the specific language governing permissions
11 * and limitations under the License.
12 *
13 * When distributing Covered Code, include this CDDL HEADER in each
14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 * If applicable, add the following below this CDDL HEADER, with the
16 * fields enclosed by brackets "[]" replaced with your own identifying
17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 *
19 * CDDL HEADER END
20 */
21
22 /*
23 * Copyright 2009 Sun Microsystems, Inc. All rights reserved.
24 * Use is subject to license terms.
25 */
26
27 /*
28 * Copyright 2009 Jason King. All rights reserved.
29 * Use is subject to license terms.
30 */
31
32 #include "libdisasm.h"
33 #include "libdisasm_impl.h"
34 #include "dis_sparc.h"
35 #include "dis_sparc_fmt.h"
36
37 #define INVALID \
38 { \
39 .in_type = INST_NONE, \
40 .in_arch = 0, \
41 .in_data = { \
42 .in_tbl = NULL \
43 } \
44 }
45
46 #define INVALIDA(_arch) \
47 { \
48 .in_type = INST_NONE, \
49 .in_arch = _arch, \
50 .in_data = { \
51 .in_tbl = NULL \
52 } \
53 }
54
55 #define INST(_name, _arch, _flags) \
56 { \
57 .in_type = INST_DEF, \
58 .in_arch = _arch, \
59 .in_data = { \
60 .in_def = { \
61 .in_name = _name, \
62 .in_flags = _flags \
63 } \
64 } \
65 }
66
67 #define TABLE(_name, _arch) \
68 { \
69 .in_type = INST_TBL, \
70 .in_arch = _arch, \
71 .in_data = { \
72 .in_tbl = &_name \
73 } \
74 }
75
76 #define OVERLAY(_idx, _inst) \
77 { \
78 .ov_idx = _idx, \
79 .ov_inst = _inst \
80 }
81
82 #define OVERLAY_END { .ov_idx = -1, .ov_inst = INVALID }
83
84 #define V8 DIS_SPARC_V8
85 #define V9 DIS_SPARC_V9
86 #define V9S DIS_SPARC_V9_SGI
87 #define V9O DIS_SPARC_V9_OPL
88 #define VALL V8|V9|V9S|V9O
89
90 /* branches */
91 static const inst_t BPcc_table_def[16] = {
92 INST("bn", V9|V9S, FLG_PRED|FLG_RS1(REG_ICC)|FLG_DISP(DISP19)),
93 INST("be", V9|V9S, FLG_PRED|FLG_RS1(REG_ICC)|FLG_DISP(DISP19)),
94 INST("ble", V9|V9S, FLG_PRED|FLG_RS1(REG_ICC)|FLG_DISP(DISP19)),
95 INST("bl", V9|V9S, FLG_PRED|FLG_RS1(REG_ICC)|FLG_DISP(DISP19)),
96
97 INST("bleu", V9|V9S, FLG_PRED|FLG_RS1(REG_ICC)|FLG_DISP(DISP19)),
98 INST("bcs", V9|V9S, FLG_PRED|FLG_RS1(REG_ICC)|FLG_DISP(DISP19)),
99 INST("bneg", V9|V9S, FLG_PRED|FLG_RS1(REG_ICC)|FLG_DISP(DISP19)),
100 INST("bvs", V9|V9S, FLG_PRED|FLG_RS1(REG_ICC)|FLG_DISP(DISP19)),
101
102 INST("ba", V9|V9S, FLG_PRED|FLG_RS1(REG_ICC)|FLG_DISP(DISP19)),
103 INST("bne", V9|V9S, FLG_PRED|FLG_RS1(REG_ICC)|FLG_DISP(DISP19)),
104 INST("bg", V9|V9S, FLG_PRED|FLG_RS1(REG_ICC)|FLG_DISP(DISP19)),
105 INST("bge", V9|V9S, FLG_PRED|FLG_RS1(REG_ICC)|FLG_DISP(DISP19)),
106
107 INST("bgu", V9|V9S, FLG_PRED|FLG_RS1(REG_ICC)|FLG_DISP(DISP19)),
108 INST("bcc", V9|V9S, FLG_PRED|FLG_RS1(REG_ICC)|FLG_DISP(DISP19)),
109 INST("bpos", V9|V9S, FLG_PRED|FLG_RS1(REG_ICC)|FLG_DISP(DISP19)),
110 INST("bvc", V9|V9S, FLG_PRED|FLG_RS1(REG_ICC)|FLG_DISP(DISP19))
111 };
112
113
114 static const table_t BPcc_table = {
115 .tbl_field = 28,
116 .tbl_len = 4,
117 .tbl_ovp = NULL,
118 .tbl_fmt = fmt_branch,
119 .tbl_inp = BPcc_table_def
120 };
121
122 static const inst_t Bicc_table_def[16] = {
123 INST("bn", VALL, FLG_DISP(DISP22)|FLG_RS1(REG_NONE)),
124 INST("be", VALL, FLG_DISP(DISP22)|FLG_RS1(REG_NONE)),
125 INST("ble", VALL, FLG_DISP(DISP22)|FLG_RS1(REG_NONE)),
126 INST("bl", VALL, FLG_DISP(DISP22)|FLG_RS1(REG_NONE)),
127
128 INST("bleu", VALL, FLG_DISP(DISP22)|FLG_RS1(REG_NONE)),
129 /* docs say it's 'bcs' but disassembler calles it synonym 'blu' */
130 INST("blu", VALL, FLG_DISP(DISP22)|FLG_RS1(REG_NONE)),
131 INST("bneg", VALL, FLG_DISP(DISP22)|FLG_RS1(REG_NONE)),
132 INST("bvs", VALL, FLG_DISP(DISP22)|FLG_RS1(REG_NONE)),
133
134 INST("ba", VALL, FLG_DISP(DISP22)|FLG_RS1(REG_NONE)),
135 INST("bne", VALL, FLG_DISP(DISP22)|FLG_RS1(REG_NONE)),
136 INST("bg", VALL, FLG_DISP(DISP22)|FLG_RS1(REG_NONE)),
137 INST("bge", VALL, FLG_DISP(DISP22)|FLG_RS1(REG_NONE)),
138
139 INST("bgu", VALL, FLG_DISP(DISP22)|FLG_RS1(REG_NONE)),
140 /*
141 * while the docs say it's officially 'bcc', existing disassembler
142 * uses the synonym bgeu
143 */
144 INST("bgeu", VALL, FLG_DISP(DISP22)|FLG_RS1(REG_NONE)),
145 INST("bpos", VALL, FLG_DISP(DISP22)|FLG_RS1(REG_NONE)),
146 INST("bvc", VALL, FLG_DISP(DISP22)|FLG_RS1(REG_NONE))
147 };
148
149 static const table_t Bicc_table = {
150 .tbl_field = 28,
151 .tbl_len = 4,
152 .tbl_ovp = NULL,
153 .tbl_fmt = fmt_branch,
154 .tbl_inp = Bicc_table_def
155 };
156
157 static const inst_t BPr_table_def[16] = {
158 INVALID,
159 INST("brz", V9|V9S, FLG_PRED|FLG_DISP(DISP16)|FLG_RS1(REG_INT)),
160 INST("brlez", V9|V9S, FLG_PRED|FLG_DISP(DISP16)|FLG_RS1(REG_INT)),
161 INST("brlz", V9|V9S, FLG_PRED|FLG_DISP(DISP16)|FLG_RS1(REG_INT)),
162
163 INVALID,
164 INST("brnz", V9|V9S, FLG_PRED|FLG_DISP(DISP16)|FLG_RS1(REG_INT)),
165 INST("brgz", V9|V9S, FLG_PRED|FLG_DISP(DISP16)|FLG_RS1(REG_INT)),
166 INST("brgez", V9|V9S, FLG_PRED|FLG_DISP(DISP16)|FLG_RS1(REG_INT)),
167
168 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID
169 };
170
171 static const table_t BPr_table = {
172 .tbl_field = 28,
173 .tbl_len = 4,
174 .tbl_ovp = NULL,
175 .tbl_fmt = fmt_branch,
176 .tbl_inp = BPr_table_def
177 };
178
179 static const inst_t FBPfcc_table_def[16] = {
180 INST("fbn", V9|V9S, FLG_PRED|FLG_DISP(DISP19)|FLG_RS1(REG_FCC)),
181 INST("fbne", V9|V9S, FLG_PRED|FLG_DISP(DISP19)|FLG_RS1(REG_FCC)),
182 INST("fblg", V9|V9S, FLG_PRED|FLG_DISP(DISP19)|FLG_RS1(REG_FCC)),
183 INST("fbul", V9|V9S, FLG_PRED|FLG_DISP(DISP19)|FLG_RS1(REG_FCC)),
184
185 INST("fbl", V9|V9S, FLG_PRED|FLG_DISP(DISP19)|FLG_RS1(REG_FCC)),
186 INST("fbug", V9|V9S, FLG_PRED|FLG_DISP(DISP19)|FLG_RS1(REG_FCC)),
187 INST("fbg", V9|V9S, FLG_PRED|FLG_DISP(DISP19)|FLG_RS1(REG_FCC)),
188 INST("fbu", V9|V9S, FLG_PRED|FLG_DISP(DISP19)|FLG_RS1(REG_FCC)),
189
190 INST("fba", V9|V9S, FLG_PRED|FLG_DISP(DISP19)|FLG_RS1(REG_FCC)),
191 INST("fbe", V9|V9S, FLG_PRED|FLG_DISP(DISP19)|FLG_RS1(REG_FCC)),
192 INST("fbue", V9|V9S, FLG_PRED|FLG_DISP(DISP19)|FLG_RS1(REG_FCC)),
193 INST("fbge", V9|V9S, FLG_PRED|FLG_DISP(DISP19)|FLG_RS1(REG_FCC)),
194
195 INST("fbuge", V9|V9S, FLG_PRED|FLG_DISP(DISP19)|FLG_RS1(REG_FCC)),
196 INST("fble", V9|V9S, FLG_PRED|FLG_DISP(DISP19)|FLG_RS1(REG_FCC)),
197 INST("fbule", V9|V9S, FLG_PRED|FLG_DISP(DISP19)|FLG_RS1(REG_FCC)),
198 INST("fbo", V9|V9S, FLG_PRED|FLG_DISP(DISP19)|FLG_RS1(REG_FCC))
199 };
200
201 static const table_t FBPfcc_table = {
202 .tbl_field = 28,
203 .tbl_len = 4,
204 .tbl_ovp = NULL,
205 .tbl_fmt = fmt_branch,
206 .tbl_inp = FBPfcc_table_def
207 };
208
209 static const inst_t FBfcc_table_def[16] = {
210 INST("fbn", VALL, FLG_DISP(DISP22)|FLG_RS1(REG_NONE)),
211 INST("fbne", VALL, FLG_DISP(DISP22)|FLG_RS1(REG_NONE)),
212 INST("fblg", VALL, FLG_DISP(DISP22)|FLG_RS1(REG_NONE)),
213 INST("fbul", VALL, FLG_DISP(DISP22)|FLG_RS1(REG_NONE)),
214
215 INST("fbl", VALL, FLG_DISP(DISP22)|FLG_RS1(REG_NONE)),
216 INST("fbug", VALL, FLG_DISP(DISP22)|FLG_RS1(REG_NONE)),
217 INST("fbg", VALL, FLG_DISP(DISP22)|FLG_RS1(REG_NONE)),
218 INST("fbu", VALL, FLG_DISP(DISP22)|FLG_RS1(REG_NONE)),
219
220 INST("fba", VALL, FLG_DISP(DISP22)|FLG_RS1(REG_NONE)),
221 INST("fbe", VALL, FLG_DISP(DISP22)|FLG_RS1(REG_NONE)),
222 INST("fbue", VALL, FLG_DISP(DISP22)|FLG_RS1(REG_NONE)),
223 INST("fbge", VALL, FLG_DISP(DISP22)|FLG_RS1(REG_NONE)),
224
225 INST("fbuge", VALL, FLG_DISP(DISP22)|FLG_RS1(REG_NONE)),
226 INST("fble", VALL, FLG_DISP(DISP22)|FLG_RS1(REG_NONE)),
227 INST("fbule", VALL, FLG_DISP(DISP22)|FLG_RS1(REG_NONE)),
228 INST("fbo", VALL, FLG_DISP(DISP22)|FLG_RS1(REG_NONE))
229 };
230
231 static const table_t FBfcc_table = {
232 .tbl_field = 28,
233 .tbl_len = 4,
234 .tbl_ovp = NULL,
235 .tbl_fmt = fmt_branch,
236 .tbl_inp = FBfcc_table_def
237 };
238
239 static const inst_t CBccc_table_def[16] = {
240 INST("cbn", V8, FLG_DISP(DISP22)|FLG_RS1(REG_NONE)),
241 INST("cb123", V8, FLG_DISP(DISP22)|FLG_RS1(REG_NONE)),
242 INST("cb12", V8, FLG_DISP(DISP22)|FLG_RS1(REG_NONE)),
243 INST("cb13", V8, FLG_DISP(DISP22)|FLG_RS1(REG_NONE)),
244 INST("cb1", V8, FLG_DISP(DISP22)|FLG_RS1(REG_NONE)),
245 INST("cb23", V8, FLG_DISP(DISP22)|FLG_RS1(REG_NONE)),
246 INST("cb2", V8, FLG_DISP(DISP22)|FLG_RS1(REG_NONE)),
247 INST("cb3", V8, FLG_DISP(DISP22)|FLG_RS1(REG_NONE)),
248 INST("cba", V8, FLG_DISP(DISP22)|FLG_RS1(REG_NONE)),
249 INST("cb0", V8, FLG_DISP(DISP22)|FLG_RS1(REG_NONE)),
250 INST("cb03", V8, FLG_DISP(DISP22)|FLG_RS1(REG_NONE)),
251 INST("cb02", V8, FLG_DISP(DISP22)|FLG_RS1(REG_NONE)),
252 INST("cb023", V8, FLG_DISP(DISP22)|FLG_RS1(REG_NONE)),
253 INST("cb01", V8, FLG_DISP(DISP22)|FLG_RS1(REG_NONE)),
254 INST("cb013", V8, FLG_DISP(DISP22)|FLG_RS1(REG_NONE)),
255 INST("cb012", V8, FLG_DISP(DISP22)|FLG_RS1(REG_NONE))
256 };
257
258 static const table_t CBccc_table = {
259 .tbl_field = 28,
260 .tbl_len = 4,
261 .tbl_ovp = NULL,
262 .tbl_fmt = fmt_branch,
263 .tbl_inp = CBccc_table_def
264 };
265
266 static const inst_t branch_table_def[8] = {
267 INST("unimp", VALL, 0),
268 TABLE(BPcc_table, V9|V9S),
269 TABLE(Bicc_table, VALL),
270 TABLE(BPr_table, V9|V9S),
271
272 INST("sethi", VALL, 0),
273 TABLE(FBPfcc_table, V9|V9S),
274 TABLE(FBfcc_table, VALL),
275 TABLE(CBccc_table, V8)
276 };
277
278 static const overlay_t branch_ov_table[] = {
279 OVERLAY(0x00, INST("illtrap", V9|V9S, 0)),
280 OVERLAY_END
281 };
282
283 static const table_t branch_table = {
284 .tbl_field = 24,
285 .tbl_len = 3,
286 .tbl_ovp = branch_ov_table,
287 .tbl_fmt = fmt_sethi,
288 .tbl_inp = branch_table_def
289 };
290
291 /* load/stores */
292 static const inst_t ls_table_def[64] = {
293 /* 0x00 */
294 INST("ld", VALL, 0),
295 INST("ldub", VALL, 0),
296 INST("lduh", VALL, 0),
297 INST("ldd", VALL, 0),
298
299 INST("st", VALL, FLG_STORE),
300 INST("stb", VALL, FLG_STORE),
301 INST("sth", VALL, FLG_STORE),
302 INST("std", VALL, FLG_STORE),
303
304 /* 0x08 */
305 INST("ldsw", V9|V9S, 0),
306 INST("ldsb", VALL, 0),
307 INST("ldsh", VALL, 0),
308 INST("ldx", V9|V9S, 0),
309
310 INVALID,
311 INST("ldstub", VALL, 0),
312 INST("stx", V9|V9S, FLG_STORE),
313 INST("swap", VALL, 0),
314
315 /* 0x10 */
316 INST("lda", VALL, FLG_ASI),
317 INST("lduba", VALL, FLG_ASI),
318 INST("lduha", VALL, FLG_ASI),
319 INST("ldda", VALL, FLG_ASI),
320
321 INST("sta", VALL, FLG_STORE|FLG_ASI),
322 INST("stba", VALL, FLG_STORE|FLG_ASI),
323 INST("stha", VALL, FLG_STORE|FLG_ASI),
324 INST("stda", VALL, FLG_STORE|FLG_ASI),
325
326 /* 0x18 */
327 INST("ldswa", V9|V9S, FLG_ASI),
328 INST("ldsba", VALL, FLG_ASI),
329 INST("ldsha", VALL, FLG_ASI),
330 INST("ldxa", V9|V9S, FLG_ASI),
331
332 INVALID,
333 INST("ldstuba", VALL, FLG_ASI),
334 INST("stxa", V9|V9S, FLG_STORE|FLG_ASI),
335 INST("swapa", VALL, FLG_ASI),
336
337 /* 0x20 */
338 INST("ld", VALL, FLG_RD(REG_FP)),
339 /* ldx on v9 */
340 INST("ld", VALL, FLG_RD(REG_FSR)),
341 INST("ldq", V9|V9S, FLG_RD(REG_FPQ)),
342 INST("ldd", VALL, FLG_RD(REG_FPD)),
343
344 INST("st", VALL, FLG_STORE|FLG_RD(REG_FP)),
345 /* stx on v9 */
346 INST("st", VALL, FLG_STORE|FLG_RD(REG_FSR)),
347 INST("stq", VALL, FLG_STORE|FLG_RD(REG_FPQ)),
348 INST("std", VALL, FLG_STORE|FLG_RD(REG_FPD)),
349
350 /* 0x28 */
351 INVALID,
352 INVALID,
353 INVALID,
354 INVALID,
355
356 INVALID,
357 INST("prefetch", V9|V9S, 0),
358 INVALID,
359 INVALID,
360
361 /* 0x30 */
362 INST("ld", V8, FLG_RD(REG_CP)),
363 INST("ld", V8, FLG_RD(REG_CSR)),
364 INST("ldqa", V9|V9S, FLG_ASI|FLG_RD(REG_FPQ)),
365 INST("ldd", V8, FLG_RD(REG_CP)),
366
367 INST("st", V8, FLG_STORE|FLG_RD(REG_CP)),
368 INST("st", V8, FLG_STORE|FLG_RD(REG_CSR)),
369 INST("std", V8, FLG_STORE|FLG_RD(REG_CQ)),
370 INST("std", V8, FLG_STORE|FLG_RD(REG_CP)),
371
372 /* 0x38 */
373 INVALID,
374 INVALID,
375 INVALID,
376 INVALID,
377
378 INST("casa", V9|V9S, 0),
379 INST("prefetcha", V9|V9S, FLG_STORE|FLG_ASI),
380 INST("casxa", V9|V9S, 0),
381 INVALID
382 };
383
384 static const overlay_t ld_ov_table[] = {
385 OVERLAY(0x10, INST("lduwa", V9|V9S, FLG_ASI|FLG_RD(REG_INT))),
386 OVERLAY(0x14, INST("stwa", V9|V9S,
387 FLG_STORE|FLG_ASI|FLG_RD(REG_INT))),
388 OVERLAY(0x30, INST("lda", V9|V9S, FLG_ASI|FLG_RD(REG_FP))),
389 OVERLAY(0x33, INST("ldda", V9|V9S, FLG_ASI|FLG_RD(REG_FPD))),
390
391 OVERLAY(0x34, INST("sta", V9|V9S, FLG_STORE|FLG_ASI|FLG_RD(REG_FP))),
392 OVERLAY(0x36, INST("stqa", V9|V9S,
393 FLG_STORE|FLG_ASI|FLG_RD(REG_FPQ))),
394 OVERLAY(0x37, INST("stda", V9|V9S,
395 FLG_STORE|FLG_ASI|FLG_RD(REG_FPD))),
396
397 OVERLAY_END
398 };
399
400 static const table_t ls_table = {
401 .tbl_field = 24,
402 .tbl_len = 6,
403 .tbl_ovp = ld_ov_table,
404 .tbl_fmt = fmt_ls,
405 .tbl_inp = ls_table_def
406 };
407
408
409 /* ALU operations */
410 static const inst_t Tcc_table_def[16] = {
411 INST("tn", VALL, 0),
412 INST("te", VALL, 0),
413 INST("tle", VALL, 0),
414 INST("tl", VALL, 0),
415
416 INST("tleu", VALL, 0),
417 INST("tcs", VALL, 0),
418 INST("tneg", VALL, 0),
419 INST("tvs", VALL, 0),
420
421 INST("ta", VALL, 0),
422 INST("tne", VALL, 0),
423 INST("tg", VALL, 0),
424 INST("tge", VALL, 0),
425
426 INST("tgu", VALL, 0),
427 INST("tcc", VALL, 0),
428 INST("tpos", VALL, 0),
429 INST("tvc", VALL, 0)
430 };
431
432 static const table_t Tcc_table = {
433 .tbl_field = 28,
434 .tbl_len = 4,
435 .tbl_ovp = NULL,
436 .tbl_fmt = fmt_trap,
437 .tbl_inp = Tcc_table_def
438 };
439
440 static const inst_t rwin_table_def[32] = {
441 /* 0x00 */
442 INST("saved", V9|V9S, 0),
443 INST("restored", V9|V9S, 0),
444 INST("allclean", V9|V9S, 0),
445 INST("otherw", V9|V9S, 0),
446
447 INST("normalw", V9|V9S, 0),
448 INST("invalw", V9|V9S, 0),
449 INVALID,
450 INVALID,
451
452 /* 0x08 */
453 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
454
455 /* 0x10 */
456 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
457 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID
458 };
459
460 static const table_t rwin_table = {
461 .tbl_field = 29,
462 .tbl_len = 5,
463 .tbl_ovp = NULL,
464 .tbl_fmt = fmt_regwin,
465 .tbl_inp = rwin_table_def
466 };
467
468 static const inst_t tr_table_def[32] = {
469 /* 0x00 */
470 INST("done", V9|V9S, 0),
471 INST("retry", V9|V9S, 0),
472 INVALID,
473 INVALID,
474
475 INVALID,
476 INVALID,
477 INVALID,
478 INVALID,
479
480 /* 0x08 */
481 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
482 INST("jpriv", V9, FLG_DISP(DISP19)),
483
484 /* 0x10 */
485 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
486 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID
487 };
488
489 static const table_t tr_table = {
490 .tbl_field = 29,
491 .tbl_len = 5,
492 .tbl_ovp = NULL,
493 .tbl_fmt = fmt_trap_ret,
494 .tbl_inp = tr_table_def
495 };
496
497 static const inst_t movicc_table_def[16] = {
498 INST("movn", V9|V9S, 0),
499 INST("move", V9|V9S, 0),
500 INST("movle", V9|V9S, 0),
501 INST("movl", V9|V9S, 0),
502
503 INST("movleu", V9|V9S, 0),
504 INST("movcs", V9|V9S, 0),
505 INST("movneg", V9|V9S, 0),
506 INST("movvs", V9|V9S, 0),
507
508 INST("mova", V9|V9S, 0),
509 INST("movne", V9|V9S, 0),
510 INST("movg", V9|V9S, 0),
511 INST("movge", V9|V9S, 0),
512
513 INST("movgu", V9|V9S, 0),
514 INST("movcc", V9|V9S, 0),
515 INST("movpos", V9|V9S, 0),
516 INST("movvc", V9|V9S, 0)
517 };
518
519 static const inst_t movfcc_table_def[16] = {
520 INST("movn", V9|V9S, 0),
521 INST("movne", V9|V9S, 0),
522 INST("movlg", V9|V9S, 0),
523 INST("movul", V9|V9S, 0),
524
525 INST("movl", V9|V9S, 0),
526 INST("movug", V9|V9S, 0),
527 INST("movg", V9|V9S, 0),
528 INST("movu", V9|V9S, 0),
529
530 INST("mova", V9|V9S, 0),
531 INST("move", V9|V9S, 0),
532 INST("movue", V9|V9S, 0),
533 INST("movge", V9|V9S, 0),
534
535 INST("movuge", V9|V9S, 0),
536 INST("movle", V9|V9S, 0),
537 INST("movule", V9|V9S, 0),
538 INST("movo", V9|V9S, 0)
539 };
540
541 static const table_t movfcc_table = {
542 .tbl_field = 17,
543 .tbl_len = 4,
544 .tbl_ovp = NULL,
545 .tbl_fmt = fmt_movcc,
546 .tbl_inp = movfcc_table_def
547 };
548
549 static const table_t movicc_table = {
550 .tbl_field = 17,
551 .tbl_len = 4,
552 .tbl_ovp = NULL,
553 .tbl_fmt = fmt_movcc,
554 .tbl_inp = movicc_table_def
555 };
556
557 static const inst_t movcc_table_def[2] = {
558 TABLE(movfcc_table, V9|V9S),
559 TABLE(movicc_table, V9|V9S)
560 };
561
562 static const table_t movcc_table = {
563 .tbl_field = 18,
564 .tbl_len = 1,
565 .tbl_ovp = NULL,
566 .tbl_fmt = NULL,
567 .tbl_inp = movcc_table_def
568 };
569
570 static const inst_t movr_table_def[8] = {
571 INVALID,
572 /* aka movrz */
573 INST("movre", V9|V9S, 0),
574 INST("movrlez", V9|V9S, 0),
575 INST("movrlz", V9|V9S, 0),
576
577 INVALID,
578 /* aka movrnz */
579 INST("movrne", V9|V9S, 0),
580 INST("movrgz", V9|V9S, 0),
581 INST("movrgez", V9|V9S, 0)
582 };
583
584 static const table_t movr_table = {
585 .tbl_field = 12,
586 .tbl_len = 3,
587 .tbl_ovp = NULL,
588 .tbl_fmt = fmt_movr,
589 .tbl_inp = movr_table_def
590 };
591
592 static const inst_t FPop1_table_def[512] = {
593 /* 0x000 */
594 INVALID,
595 INST("fmovs", VALL,
596 FLG_P1(REG_NONE)|FLG_P2(REG_FP)|FLG_NOIMM|FLG_P3(REG_FP)),
597 INST("fmovd", V9|V9S,
598 FLG_P1(REG_NONE)|FLG_P2(REG_FPD)|FLG_NOIMM|FLG_P3(REG_FPD)),
599 INST("fmovq", V9|V9S,
600 FLG_P1(REG_NONE)|FLG_P2(REG_FPQ)|FLG_NOIMM|FLG_P3(REG_FPQ)),
601
602 INVALID,
603 INST("fnegs", VALL,
604 FLG_P1(REG_NONE)|FLG_P2(REG_FP)|FLG_NOIMM|FLG_P3(REG_FP)),
605 INST("fnegd", V9|V9S,
606 FLG_P1(REG_NONE)|FLG_P2(REG_FPD)|FLG_NOIMM|FLG_P3(REG_FPD)),
607 INST("fnegq", V9|V9S,
608 FLG_P1(REG_NONE)|FLG_P2(REG_FPQ)|FLG_NOIMM|FLG_P3(REG_FPQ)),
609
610 /* 0x008 */
611 INVALID,
612 INST("fabss", VALL,
613 FLG_P1(REG_NONE)|FLG_P2(REG_FP)|FLG_NOIMM|FLG_P3(REG_FP)),
614 INST("fabsd", V9|V9S,
615 FLG_P1(REG_NONE)|FLG_P2(REG_FPD)|FLG_NOIMM|FLG_P3(REG_FPD)),
616 INST("fabsq", V9|V9S,
617 FLG_P1(REG_NONE)|FLG_P2(REG_FPQ)|FLG_NOIMM|FLG_P3(REG_FPQ)),
618
619 INVALID, INVALID, INVALID, INVALID,
620
621 /* 0x010 */
622 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
623 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
624
625 /* 0x020 */
626 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
627
628 /* 0x028 */
629 INVALID,
630 INST("fsqrts", VALL,
631 FLG_P1(REG_NONE)|FLG_P2(REG_FP)|FLG_NOIMM|FLG_P3(REG_FP)),
632 INST("fsqrtd", VALL,
633 FLG_P1(REG_NONE)|FLG_P2(REG_FPD)|FLG_NOIMM|FLG_P3(REG_FPD)),
634 INST("fsqrtq", VALL,
635 FLG_P1(REG_NONE)|FLG_P2(REG_FPQ)|FLG_NOIMM|FLG_P3(REG_FPQ)),
636
637 INVALID, INVALID, INVALID, INVALID,
638
639 /* 0x30 */
640 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
641 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
642
643 /* 0x40 */
644 INVALID,
645 INST("fadds", VALL,
646 FLG_P1(REG_FP)|FLG_P2(REG_FP)|FLG_NOIMM|FLG_P3(REG_FP)),
647 INST("faddd", VALL,
648 FLG_P1(REG_FPD)|FLG_P2(REG_FPD)|FLG_NOIMM|FLG_P3(REG_FPD)),
649 INST("faddq", VALL,
650 FLG_P1(REG_FPQ)|FLG_P2(REG_FPQ)|FLG_NOIMM|FLG_P3(REG_FPQ)),
651
652 INVALID,
653 INST("fsubs", VALL,
654 FLG_P1(REG_FP)|FLG_P2(REG_FP)|FLG_NOIMM|FLG_P3(REG_FP)),
655 INST("fsubd", VALL,
656 FLG_P1(REG_FPD)|FLG_P2(REG_FPD)|FLG_NOIMM|FLG_P3(REG_FPD)),
657 INST("fsubq", VALL,
658 FLG_P1(REG_FPQ)|FLG_P2(REG_FPQ)|FLG_NOIMM|FLG_P3(REG_FPQ)),
659
660 /* 0x048 */
661 INVALID,
662 INST("fmuls", VALL,
663 FLG_P1(REG_FP)|FLG_P2(REG_FP)|FLG_NOIMM|FLG_P3(REG_FP)),
664 INST("fmuld", VALL,
665 FLG_P1(REG_FPD)|FLG_P2(REG_FPD)|FLG_NOIMM|FLG_P3(REG_FPD)),
666 INST("fmulq", VALL,
667 FLG_P1(REG_FPQ)|FLG_P2(REG_FPQ)|FLG_NOIMM|FLG_P3(REG_FPQ)),
668
669 INVALID,
670 INST("fdivs", VALL,
671 FLG_P1(REG_FP)|FLG_P2(REG_FP)|FLG_NOIMM|FLG_P3(REG_FP)),
672 INST("fdivd", VALL,
673 FLG_P1(REG_FPD)|FLG_P2(REG_FPD)|FLG_NOIMM|FLG_P3(REG_FPD)),
674 INST("fdivq", VALL,
675 FLG_P1(REG_FPQ)|FLG_P2(REG_FPQ)|FLG_NOIMM|FLG_P3(REG_FPQ)),
676
677 /* 0x050 */
678 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
679 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
680
681 /* 0x060 */
682 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
683
684 /* 0x068 */
685 INVALID,
686 INST("fsmuld", VALL,
687 FLG_P1(REG_FP)|FLG_P2(REG_FP)|FLG_NOIMM|FLG_P3(REG_FPD)),
688 INVALID,
689 INVALID,
690
691 INVALID,
692 INVALID,
693 INST("fdmulq", VALL,
694 FLG_P1(REG_FPD)|FLG_P2(REG_FPD)|FLG_NOIMM|FLG_P3(REG_FPQ)),
695 INVALID,
696
697 /* 0x070 */
698 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
699 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
700
701 /* 0x080 */
702 INVALID,
703 INST("fstox", V9|V9S,
704 FLG_P1(REG_NONE)|FLG_P2(REG_FP)|FLG_NOIMM|FLG_P3(REG_FPD)),
705 INST("fdtox", V9|V9S,
706 FLG_P1(REG_NONE)|FLG_P2(REG_FPD)|FLG_NOIMM|FLG_P3(REG_FPD)),
707 INST("fqtox", V9|V9S,
708 FLG_P1(REG_NONE)|FLG_P2(REG_FPQ)|FLG_NOIMM|FLG_P3(REG_FPD)),
709
710 INST("fxtos", V9|V9S, FLG_P1(REG_NONE)|FLG_P2(REG_FPD)|FLG_NOIMM|
711 FLG_P3(REG_FP)),
712 INVALID,
713 INVALID,
714 INVALID,
715
716 /* 0x088 */
717 INST("fxtod", V9|V9S,
718 FLG_P1(REG_NONE)|FLG_P2(REG_FPD)|FLG_NOIMM|FLG_P3(REG_FPD)),
719 INVALID,
720 INVALID,
721 INVALID,
722
723 INST("fxtoq", V9|V9S,
724 FLG_P1(REG_NONE)|FLG_P2(REG_FPD)|FLG_NOIMM|FLG_P3(REG_FPQ)),
725 INVALID,
726 INVALID,
727 INVALID,
728
729 /* 0x090 */
730 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
731 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
732
733 /* 0x0a0 */
734 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
735 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
736
737 /* 0x0b0 */
738 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
739 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
740
741 /* 0x0c0 */
742 INVALID, INVALID, INVALID, INVALID,
743
744 INST("fitos", VALL,
745 FLG_P1(REG_NONE)|FLG_P2(REG_FP)|FLG_NOIMM|FLG_P3(REG_FP)),
746 INVALID,
747 INST("fdtos", VALL,
748 FLG_P1(REG_NONE)|FLG_P2(REG_FPD)|FLG_NOIMM|FLG_P3(REG_FP)),
749 INST("fqtos", VALL,
750 FLG_P1(REG_NONE)|FLG_P2(REG_FPQ)|FLG_NOIMM|FLG_P3(REG_FP)),
751
752 /* 0x0c8 */
753 INST("fitod", VALL,
754 FLG_P1(REG_NONE)|FLG_P2(REG_FP)|FLG_NOIMM|FLG_P3(REG_FPD)),
755 INST("fstod", VALL,
756 FLG_P1(REG_NONE)|FLG_P2(REG_FP)|FLG_NOIMM|FLG_P3(REG_FPD)),
757 INVALID,
758 INST("fqtod", VALL,
759 FLG_P1(REG_NONE)|FLG_P2(REG_FPQ)|FLG_NOIMM|FLG_P3(REG_FPD)),
760
761 INST("fitoq", VALL,
762 FLG_P1(REG_NONE)|FLG_P2(REG_FP)|FLG_NOIMM|FLG_P3(REG_FPQ)),
763 INST("fstoq", VALL,
764 FLG_P1(REG_NONE)|FLG_P2(REG_FP)|FLG_NOIMM|FLG_P3(REG_FPQ)),
765 INST("fdtoq", VALL,
766 FLG_P1(REG_NONE)|FLG_P2(REG_FPD)|FLG_NOIMM|FLG_P3(REG_FPQ)),
767 INVALID,
768
769 /* 0x0d0 */
770 INVALID,
771 INST("fstoi", VALL,
772 FLG_P1(REG_NONE)|FLG_P2(REG_FP)|FLG_NOIMM|FLG_P3(REG_FP)),
773 INST("fdtoi", VALL,
774 FLG_P1(REG_NONE)|FLG_P2(REG_FPD)|FLG_NOIMM|FLG_P3(REG_FP)),
775 INST("fqtoi", VALL,
776 FLG_P1(REG_NONE)|FLG_P2(REG_FPQ)|FLG_NOIMM|FLG_P3(REG_FP)),
777 INVALID, INVALID, INVALID, INVALID,
778
779 /* 0x0d8 */
780 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
781
782 /* 0x0e0 */
783 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
784 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
785
786 /* 0x0f0 */
787 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
788 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
789
790 /* 0x100 */
791 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
792 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
793
794 /* 0x110 */
795 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
796 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
797
798 /* 0x120 */
799 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
800 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
801
802 /* 0x130 */
803 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
804 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
805
806 /* 0x140 */
807 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
808 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
809
810 /* 0x150 */
811 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
812 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
813
814 /* 0x160 */
815 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
816 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
817
818 /* 0x170 */
819 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
820 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
821
822 /* 0x180 */
823 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
824 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
825
826 /* 0x190 */
827 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
828 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
829
830 /* 0x1a0 */
831 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
832 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
833
834 /* 0x1b0 */
835 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
836 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
837
838 /* 0x1c0 */
839 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
840 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
841
842 /* 0x1d0 */
843 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
844 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
845
846 /* 0x1e0 */
847 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
848 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
849
850 /* 0x1f0 */
851 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
852 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID
853 };
854
855 static const table_t FPop1_table = {
856 .tbl_field = 13,
857 .tbl_len = 9,
858 .tbl_ovp = NULL,
859 .tbl_fmt = fmt_fpop1,
860 .tbl_inp = FPop1_table_def
861 };
862
863 static const inst_t FPop2_table_def[512] = {
864 /* 0x000 */
865 INVALID,
866 INST("fmovs", V9|V9S,
867 FLG_P1(REG_NONE)|FLG_P2(REG_FP)|FLG_NOIMM|FLG_P3(REG_FP)),
868 INST("fmovd", V9|V9S,
869 FLG_P1(REG_NONE)|FLG_P2(REG_FPD)|FLG_NOIMM|FLG_P3(REG_FPD)),
870 INST("fmovq", V9|V9S,
871 FLG_P1(REG_NONE)|FLG_P2(REG_FPQ)|FLG_NOIMM|FLG_P3(REG_FPQ)),
872
873 INVALID, INVALID, INVALID, INVALID,
874
875 /* 0x008 */
876 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
877
878 /* 0x010 */
879 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
880 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
881
882 /* 0x020 */
883 INVALID, INVALID, INVALID, INVALID,
884
885 INST("fmovrsz", V9|V9S,
886 FLG_P1(REG_INT)|FLG_NOIMM|FLG_P2(REG_FP)|FLG_P3(REG_FP)),
887 INST("fmovrdz", V9|V9S,
888 FLG_P1(REG_INT)|FLG_NOIMM|FLG_P2(REG_FPD)|FLG_P3(REG_FPD)),
889 INST("fmovrqz", V9|V9S,
890 FLG_P1(REG_INT)|FLG_NOIMM|FLG_P2(REG_FPQ)|FLG_P3(REG_FPQ)),
891 INVALID,
892
893 /* 0x028 */
894 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
895
896 /* 0x030 */
897 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
898 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
899
900 /* 0x040 */
901 INVALID,
902 INST("fmovs", V9|V9S,
903 FLG_P1(REG_NONE)|FLG_P2(REG_FP)|FLG_NOIMM|FLG_P3(REG_FP)),
904 INST("fmovd", V9|V9S,
905 FLG_P1(REG_NONE)|FLG_P2(REG_FPD)|FLG_NOIMM|FLG_P3(REG_FPD)),
906 INST("fmovq", V9|V9S,
907 FLG_P1(REG_NONE)|FLG_P2(REG_FPQ)|FLG_NOIMM|FLG_P3(REG_FPQ)),
908
909 INST("fmovrslez", V9|V9S,
910 FLG_P1(REG_INT)|FLG_NOIMM|FLG_P2(REG_FP)|FLG_P3(REG_FP)),
911 INST("fmovrdlez", V9|V9S,
912 FLG_P1(REG_INT)|FLG_NOIMM|FLG_P2(REG_FPD)|FLG_P3(REG_FPD)),
913 INST("fmovrqlez", V9|V9S,
914 FLG_P1(REG_INT)|FLG_NOIMM|FLG_P2(REG_FPQ)|FLG_P3(REG_FPQ)),
915 INVALID,
916
917 /* 0x048 */
918 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
919
920 /* 0x050 */
921 INVALID,
922 INST("fcmps", VALL, FLG_P1(REG_FP)|FLG_P2(REG_FP)|FLG_P3(REG_NONE)
923 |FLG_NOIMM),
924 INST("fcmpd", VALL, FLG_P1(REG_FPD)|FLG_P2(REG_FPD)|FLG_P3(REG_NONE)
925 |FLG_NOIMM),
926 INST("fcmpq", VALL, FLG_P1(REG_FPQ)|FLG_P2(REG_FPQ)|FLG_P3(REG_NONE)
927 |FLG_NOIMM),
928
929 INVALID,
930 INST("fcmpes", VALL, FLG_P1(REG_FP)|FLG_P2(REG_FP)|FLG_P3(REG_NONE)
931 |FLG_NOIMM),
932 INST("fcmped", VALL, FLG_P1(REG_FPD)|FLG_P2(REG_FPD)|FLG_P3(REG_NONE)
933 |FLG_NOIMM),
934 INST("fcmpeq", VALL, FLG_P1(REG_FPQ)|FLG_P2(REG_FPQ)|FLG_P3(REG_NONE)
935 |FLG_NOIMM),
936
937 /* 0x058 */
938 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
939
940 /* 0x060 */
941 INVALID, INVALID, INVALID, INVALID,
942
943 INVALID,
944 INST("fmovrslz", V9|V9S,
945 FLG_P1(REG_INT)|FLG_NOIMM|FLG_P2(REG_FP)|FLG_P3(REG_FP)),
946 INST("fmovrdlz", V9|V9S,
947 FLG_P1(REG_INT)|FLG_NOIMM|FLG_P2(REG_FPD)|FLG_P3(REG_FPD)),
948 INST("fmovrqlz", V9|V9S,
949 FLG_P1(REG_INT)|FLG_NOIMM|FLG_P2(REG_FPQ)|FLG_P3(REG_FPQ)),
950
951 /* 0x068 */
952 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
953
954 /* 0x070 */
955 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
956 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
957
958 /* 0x080 */
959 INVALID,
960 INST("fmovs", V9|V9S,
961 FLG_P1(REG_NONE)|FLG_P2(REG_FP)|FLG_NOIMM|FLG_P3(REG_FP)),
962 INST("fmovd", V9|V9S,
963 FLG_P1(REG_NONE)|FLG_P2(REG_FPD)|FLG_NOIMM|FLG_P3(REG_FPD)),
964 INST("fmovq", V9|V9S,
965 FLG_P1(REG_NONE)|FLG_P2(REG_FPQ)|FLG_NOIMM|FLG_P3(REG_FPQ)),
966
967 INVALID, INVALID, INVALID, INVALID,
968
969 /* 0x088 */
970 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
971
972 /* 0x090 */
973 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
974 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
975
976 /* 0x0a0 */
977 INVALID, INVALID, INVALID, INVALID,
978
979 INVALID,
980 INST("fmovrsnz", V9|V9S,
981 FLG_P1(REG_INT)|FLG_NOIMM|FLG_P2(REG_FP)|FLG_P3(REG_FP)),
982 INST("fmovrdnz", V9|V9S,
983 FLG_P1(REG_INT)|FLG_NOIMM|FLG_P2(REG_FPD)|FLG_P3(REG_FPD)),
984 INST("fmovrqnz", V9|V9S,
985 FLG_P1(REG_INT)|FLG_NOIMM|FLG_P2(REG_FPQ)|FLG_P3(REG_FPQ)),
986
987 /* 0x0a8 */
988 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
989
990 /* 0x0b0 */
991 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
992 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
993
994 /* 0x0c0 */
995 INVALID,
996 INST("fmovs", V9|V9S, FLG_P1(REG_NONE)|FLG_P2(REG_FP)|
997 FLG_NOIMM|FLG_P3(REG_FP)),
998 INST("fmovd", V9|V9S, FLG_P1(REG_NONE)|FLG_P2(REG_FPD)|
999 FLG_NOIMM|FLG_P3(REG_FPD)),
1000 INST("fmovq", V9|V9S, FLG_P1(REG_NONE)|FLG_P2(REG_FPQ)|
1001 FLG_NOIMM|FLG_P3(REG_FPQ)),
1002
1003 INVALID,
1004 INST("fmovrsgz", V9|V9S, FLG_P1(REG_INT)|FLG_NOIMM|
1005 FLG_P2(REG_FP)|FLG_P3(REG_FP)),
1006 INST("fmovrdgz", V9|V9S, FLG_P1(REG_INT)|FLG_NOIMM|
1007 FLG_P2(REG_FPD)|FLG_P3(REG_FPD)),
1008 INST("fmovrqgz", V9|V9S, FLG_P1(REG_INT)|FLG_NOIMM|
1009 FLG_P2(REG_FPQ)|FLG_P3(REG_FPQ)),
1010
1011 /* 0x0c8 */
1012 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
1013
1014 /* 0x0d0 */
1015 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
1016 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
1017
1018 /* 0x0e0 */
1019 INVALID, INVALID, INVALID, INVALID,
1020
1021 INVALID,
1022 INST("fmovrsgez", V9|V9S, FLG_P1(REG_INT)|FLG_NOIMM|
1023 FLG_P2(REG_FP)|FLG_P3(REG_FP)),
1024 INST("fmovrdgez", V9|V9S, FLG_P1(REG_INT)|FLG_NOIMM|
1025 FLG_P2(REG_FPD)|FLG_P3(REG_FPD)),
1026 INST("fmovrqgez", V9|V9S, FLG_P1(REG_INT)|FLG_NOIMM|
1027 FLG_P2(REG_FPQ)|FLG_P3(REG_FPQ)),
1028
1029 /* 0x0e8 */
1030 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
1031
1032 /* 0x0f0 */
1033 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
1034 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
1035
1036 /* 0x100 */
1037 INVALID,
1038 INST("fmovs", V9|V9S, FLG_P1(REG_NONE)|FLG_P2(REG_FP)|
1039 FLG_NOIMM|FLG_P3(REG_FP)),
1040 INST("fmovd", V9|V9S, FLG_P1(REG_NONE)|FLG_P2(REG_FPD)|
1041 FLG_NOIMM|FLG_P3(REG_FPD)),
1042 INST("fmovq", V9|V9S, FLG_P1(REG_NONE)|FLG_P2(REG_FPQ)|
1043 FLG_NOIMM|FLG_P3(REG_FPQ)),
1044
1045 INVALID, INVALID, INVALID, INVALID,
1046
1047 /* 0x108 */
1048 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
1049
1050 /* 0x110 */
1051 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
1052 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
1053
1054 /* 0x120 */
1055 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
1056 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
1057
1058 /* 0x130 */
1059 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
1060 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
1061
1062 /* 0x140 */
1063 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
1064 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
1065
1066 /* 0x150 */
1067 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
1068 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
1069
1070 /* 0x160 */
1071 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
1072 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
1073
1074 /* 0x170 */
1075 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
1076 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
1077
1078 /* 0x180 */
1079 INVALID,
1080 INST("fmovs", V9|V9S, FLG_P1(REG_NONE)|FLG_P2(REG_FP)|
1081 FLG_NOIMM|FLG_P3(REG_FP)),
1082 INST("fmovd", V9|V9S, FLG_P1(REG_NONE)|FLG_P2(REG_FPD)|
1083 FLG_NOIMM|FLG_P3(REG_FPD)),
1084 INST("fmovq", V9|V9S, FLG_P1(REG_NONE)|FLG_P2(REG_FPQ)|
1085 FLG_NOIMM|FLG_P3(REG_FPQ)),
1086
1087 INVALID, INVALID, INVALID, INVALID,
1088
1089 /* 0x188 */
1090 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
1091
1092 /* 0x190 */
1093 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
1094 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
1095
1096 /* 0x1a0 */
1097 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
1098 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
1099
1100 /* 0x1b0 */
1101 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
1102 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
1103
1104 /* 0x1c0 */
1105 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
1106 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
1107
1108 /* 0x1d0 */
1109 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
1110 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
1111
1112 /* 0x1e0 */
1113 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
1114 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
1115
1116 /* 0x1f0 */
1117 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
1118 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID
1119 };
1120
1121 static const table_t FPop2_table = {
1122 .tbl_field = 13,
1123 .tbl_len = 9,
1124 .tbl_ovp = NULL,
1125 .tbl_fmt = fmt_fpop2,
1126 .tbl_inp = FPop2_table_def
1127 };
1128
1129 static const inst_t vis_table_def[512] = {
1130 /* 0x000 */
1131 INST("edge8cc", V9S, FLG_NOIMM),
1132 INST("edge8n", V9S, FLG_NOIMM),
1133 INST("edge8lcc", V9S, FLG_NOIMM),
1134 INST("edge8ln", V9S, FLG_NOIMM),
1135
1136 INST("edge16cc", V9S, FLG_NOIMM),
1137 INST("edge16n", V9S, FLG_NOIMM),
1138 INST("edge16lcc", V9S, FLG_NOIMM),
1139 INST("edge16ln", V9S, FLG_NOIMM),
1140
1141 /* 0x008 */
1142 INST("edge32cc", V9S, FLG_NOIMM),
1143 INST("edge32n", V9S, FLG_NOIMM),
1144 INST("edge32lcc", V9S, FLG_NOIMM),
1145 INST("edge32ln", V9S, FLG_NOIMM),
1146
1147 INVALID, INVALID, INVALID, INVALID,
1148
1149 /* 0x010 */
1150 INST("array8", V9S, FLG_NOIMM),
1151 INST("addxc", V9, 0),
1152 INST("array16", V9S, FLG_NOIMM),
1153 INST("addxccc", V9, 0),
1154
1155 INST("array32", V9S, FLG_NOIMM),
1156 INST("random", V9, FLG_P1(REG_NONE)|FLG_P2(REG_NONE)|
1157 FLG_RD(REG_FPD)|FLG_NOIMM),
1158 INST("umulxhi", V9, FLG_P1(REG_INT)|FLG_NOIMM|
1159 FLG_P2(REG_INT)|FLG_P3(REG_INT)),
1160 INST("lzd", V9, FLG_P1(REG_NONE)|FLG_NOIMM|
1161 FLG_P2(REG_INT)|FLG_RD(REG_INT)),
1162
1163 /* 0x018 */
1164 INST("alignaddr", V9S, FLG_NOIMM),
1165 INST("bmask", V9S, FLG_P1(REG_INT)|FLG_P2(REG_INT)|FLG_RD(REG_INT)),
1166 INST("alignaddrl", V9S, FLG_NOIMM),
1167 INST("cmask8", V9, FLG_P1(REG_NONE)|FLG_NOIMM|
1168 FLG_P2(REG_INT)|FLG_P3(REG_NONE)),
1169 INVALID,
1170 INST("cmask16", V9, FLG_P1(REG_NONE)|FLG_NOIMM|
1171 FLG_P2(REG_INT)|FLG_P3(REG_NONE)),
1172 INVALID,
1173 INST("cmask32", V9, FLG_P1(REG_NONE)|FLG_NOIMM|
1174 FLG_P2(REG_INT)|FLG_P3(REG_NONE)),
1175
1176 /* 0x020 */
1177 INST("fcmple16", V9S, FLG_P1(REG_FPD)|FLG_NOIMM|
1178 FLG_P2(REG_FPD)|FLG_P3(REG_INT)),
1179 INST("fsll16", V9, FLG_P1(REG_FPD)|FLG_NOIMM|
1180 FLG_P2(REG_FPD)|FLG_P3(REG_FPD)),
1181 INST("fcmpne16", V9S, FLG_P1(REG_FPD)|FLG_NOIMM|
1182 FLG_P2(REG_FPD)|FLG_P3(REG_INT)),
1183 INST("fsrl16", V9, FLG_P1(REG_FPD)|FLG_NOIMM|
1184 FLG_P2(REG_FPD)|FLG_P3(REG_FPD)),
1185
1186 INST("fcmple32", V9S, FLG_P1(REG_FPD)|FLG_NOIMM|
1187 FLG_P2(REG_FPD)|FLG_P3(REG_INT)),
1188 INST("fsll32", V9, FLG_P1(REG_FPD)|FLG_NOIMM|
1189 FLG_P2(REG_FPD)|FLG_P3(REG_FPD)),
1190 INST("fcmpne32", V9S, FLG_P1(REG_FPD)|FLG_NOIMM|
1191 FLG_P2(REG_FPD)|FLG_P3(REG_INT)),
1192 INST("fsrl32", V9, FLG_P1(REG_FPD)|FLG_NOIMM|
1193 FLG_P2(REG_FPD)|FLG_P3(REG_FPD)),
1194
1195 /* 0x028 */
1196 INST("fcmpgt16", V9S, FLG_P1(REG_FPD)|FLG_NOIMM|
1197 FLG_P2(REG_FPD)|FLG_P3(REG_INT)),
1198 INST("fslas16", V9, FLG_P1(REG_FPD)|FLG_NOIMM|
1199 FLG_P2(REG_FPD)|FLG_P3(REG_FPD)),
1200 INST("fcmpeq16", V9S, FLG_P1(REG_FPD)|FLG_NOIMM|
1201 FLG_P2(REG_FPD)|FLG_P3(REG_INT)),
1202 INST("fsra16", V9, FLG_P1(REG_FPD)|FLG_NOIMM|
1203 FLG_P2(REG_FPD)|FLG_P3(REG_FPD)),
1204
1205 INST("fcmpgt32", V9S, FLG_P1(REG_FPD)|FLG_NOIMM|
1206 FLG_P2(REG_FPD)|FLG_P3(REG_INT)),
1207 INST("fslas32", V9, FLG_P1(REG_FPD)|FLG_NOIMM|
1208 FLG_P2(REG_FPD)|FLG_P3(REG_FPD)),
1209 INST("fcmpeq32", V9S, FLG_P1(REG_FPD)|FLG_NOIMM|
1210 FLG_P2(REG_FPD)|FLG_P3(REG_INT)),
1211 INST("fsra32", V9, FLG_P1(REG_FPD)|FLG_NOIMM|
1212 FLG_P2(REG_FPD)|FLG_P3(REG_FPD)),
1213
1214 /* 0x030 */
1215 INVALID,
1216 INST("fmul8x16", V9S, FLG_P1(REG_FP)|FLG_NOIMM|
1217 FLG_P2(REG_FPD)|FLG_P3(REG_FPD)),
1218 INVALID,
1219 INST("fmul8x16au", V9S, FLG_P1(REG_FP)|FLG_NOIMM|
1220 FLG_P2(REG_FP)|FLG_P3(REG_FPD)),
1221
1222 INVALID,
1223 INST("fmul8x16al", V9S, FLG_P1(REG_FP)|FLG_NOIMM|
1224 FLG_P2(REG_FP)|FLG_P3(REG_FPD)),
1225 INST("fmul8sux16", V9S, FLG_P1(REG_FP)|FLG_NOIMM|
1226 FLG_P2(REG_FPD)|FLG_P3(REG_FPD)),
1227 INST("fmul8ulx16", V9S, FLG_P1(REG_FP)|FLG_NOIMM|
1228 FLG_P2(REG_FPD)|FLG_P3(REG_FPD)),
1229
1230 /* 0x038 */
1231 INST("fmuld8sux16", V9S, FLG_P1(REG_FP)|FLG_NOIMM|
1232 FLG_P2(REG_FP)|FLG_P3(REG_FPD)),
1233 INST("fmuld8ulx16", V9S, FLG_P1(REG_FP)|FLG_NOIMM|
1234 FLG_P2(REG_FP)|FLG_P3(REG_FPD)),
1235 INST("fpack32", V9S, FLG_P1(REG_FPD)|FLG_NOIMM|
1236 FLG_P2(REG_FPD)|FLG_P3(REG_FPD)),
1237 INST("fpack16", V9S, FLG_P1(REG_NONE)|FLG_NOIMM|
1238 FLG_P2(REG_FPD)|FLG_P3(REG_FP)),
1239
1240 INVALID,
1241 INST("fpackfix", V9S, FLG_P1(REG_NONE)|FLG_NOIMM|
1242 FLG_P2(REG_FPD)|FLG_P3(REG_FP)),
1243 INST("pdist", V9S, FLG_P1(REG_FPD)|FLG_NOIMM|
1244 FLG_P2(REG_FPD)|FLG_P3(REG_FPD)),
1245 INST("pdistn", V9, FLG_P1(REG_FPD)|FLG_NOIMM|
1246 FLG_P2(REG_FPD)|FLG_P3(REG_INT)),
1247
1248 /* 0x040 */
1249 INST("fmean16", V9, FLG_P1(REG_FPD)|FLG_NOIMM|
1250 FLG_P2(REG_FPD)|FLG_P3(REG_FPD)),
1251 INVALID,
1252 INST("fpadd64", V9S, FLG_P1(REG_FPD)|FLG_NOIMM|
1253 FLG_P2(REG_FPD)|FLG_P3(REG_FPD)),
1254 INVALID,
1255 INST("fchksm16", V9, FLG_P1(REG_FPD)|FLG_NOIMM|
1256 FLG_P2(REG_FPD)|FLG_P3(REG_FPD)),
1257 INVALID,
1258 INST("fpsub64", V9S, FLG_P1(REG_FPD)|FLG_NOIMM|
1259 FLG_P2(REG_FPD)|FLG_P3(REG_FPD)),
1260 INVALID,
1261
1262 /* 0x048 */
1263 INST("faligndata", V9S, FLG_P1(REG_FPD)|FLG_NOIMM|
1264 FLG_P2(REG_FPD)|FLG_P3(REG_FPD)),
1265 INVALID,
1266 INVALID,
1267 INST("fpmerge", V9S, FLG_P1(REG_FP)|FLG_NOIMM|
1268 FLG_P2(REG_FP)|FLG_P3(REG_FPD)),
1269
1270 INST("bshuffle", V9S, FLG_P1(REG_FPD)|FLG_NOIMM|
1271 FLG_P2(REG_FPD)|FLG_P3(REG_FPD)),
1272 INST("fexpand", V9S, FLG_P1(REG_NONE)|FLG_NOIMM|
1273 FLG_P2(REG_FP)|FLG_P3(REG_FPD)),
1274 INVALID,
1275 INVALID,
1276
1277 /* 0x050 */
1278 INST("fpadd16", V9S, FLG_P1(REG_FPD)|FLG_NOIMM|
1279 FLG_P2(REG_FPD)|FLG_P3(REG_FPD)),
1280 INST("fpadd16s", V9S, FLG_P1(REG_FP)|FLG_NOIMM|
1281 FLG_P2(REG_FP)|FLG_P3(REG_FP)),
1282 INST("fpadd32", V9S, FLG_P1(REG_FPD)|FLG_NOIMM|
1283 FLG_P2(REG_FPD)|FLG_P3(REG_FPD)),
1284 INST("fpadd32s", V9S, FLG_P1(REG_FP)|FLG_NOIMM|
1285 FLG_P2(REG_FP)|FLG_P3(REG_FP)),
1286
1287 INST("fpsub16", V9S, FLG_P1(REG_FPD)|FLG_NOIMM|
1288 FLG_P2(REG_FPD)|FLG_P3(REG_FPD)),
1289 INST("fpsub16s", V9S, FLG_P1(REG_FP)|FLG_NOIMM|
1290 FLG_P2(REG_FP)|FLG_P3(REG_FP)),
1291 INST("fpsub32", V9S, FLG_P1(REG_FPD)|FLG_NOIMM|
1292 FLG_P2(REG_FPD)|FLG_P3(REG_FPD)),
1293 INST("fpsub32s", V9S, FLG_P1(REG_FP)|FLG_NOIMM|
1294 FLG_P2(REG_FP)|FLG_P3(REG_FP)),
1295
1296 /* 0x058 */
1297 INST("fpadds16", V9S, FLG_P1(REG_FPD)|FLG_NOIMM|
1298 FLG_P2(REG_FPD)|FLG_P3(REG_FPD)),
1299 INST("fpadds16s", V9S, FLG_P1(REG_FP)|FLG_NOIMM|
1300 FLG_P2(REG_FP)|FLG_P3(REG_FP)),
1301 INST("fpadds32", V9S, FLG_P1(REG_FPD)|FLG_NOIMM|
1302 FLG_P2(REG_FPD)|FLG_P3(REG_FPD)),
1303 INST("fpadds32s", V9S, FLG_P1(REG_FP)|FLG_NOIMM|
1304 FLG_P2(REG_FP)|FLG_P3(REG_FP)),
1305 INST("fpsubs16", V9S, FLG_P1(REG_FPD)|FLG_NOIMM|
1306 FLG_P2(REG_FPD)|FLG_P3(REG_FPD)),
1307 INST("fpsubs16s", V9S, FLG_P1(REG_FP)|FLG_NOIMM|
1308 FLG_P2(REG_FP)|FLG_P3(REG_FP)),
1309 INST("fpsubs32", V9S, FLG_P1(REG_FPD)|FLG_NOIMM|
1310 FLG_P2(REG_FPD)|FLG_P3(REG_FPD)),
1311 INST("fpsubs32s", V9S, FLG_P1(REG_FP)|FLG_NOIMM|
1312 FLG_P2(REG_FP)|FLG_P3(REG_FP)),
1313
1314 /* 0x060 */
1315 INST("fzero", V9S, FLG_P1(REG_NONE)|FLG_P2(REG_NONE)|
1316 FLG_P3(REG_FPD)),
1317 INST("fzeros", V9S, FLG_P1(REG_NONE)|FLG_P2(REG_NONE)|
1318 FLG_P3(REG_FP)),
1319 INST("fnor", V9S, FLG_P1(REG_FPD)|FLG_NOIMM|
1320 FLG_P2(REG_FPD)|FLG_P3(REG_FPD)),
1321 INST("fnors", V9S, FLG_P1(REG_FP)|FLG_NOIMM|
1322 FLG_P2(REG_FP)|FLG_P3(REG_FP)),
1323
1324 INST("fandnot2", V9S, FLG_P1(REG_FPD)|FLG_NOIMM|
1325 FLG_P2(REG_FPD)|FLG_P3(REG_FPD)),
1326 INST("fandnot2s", V9S, FLG_P1(REG_FP)|FLG_NOIMM|
1327 FLG_P2(REG_FP)|FLG_P3(REG_FP)),
1328 INST("fnot2", V9S, FLG_P1(REG_NONE)|FLG_P2(REG_FPD)|
1329 FLG_P3(REG_FPD)),
1330 INST("fnot2s", V9S, FLG_P1(REG_NONE)|FLG_P2(REG_FP)|
1331 FLG_P3(REG_FP)),
1332
1333 /* 0x068 */
1334 INST("fandnot1", V9S, FLG_P1(REG_FPD)|FLG_NOIMM|
1335 FLG_P2(REG_FPD)|FLG_P3(REG_FPD)),
1336 INST("fandnot1s", V9S, FLG_P1(REG_FP)|FLG_NOIMM|
1337 FLG_P2(REG_FP)|FLG_P3(REG_FP)),
1338 INST("fnot1", V9S, FLG_P1(REG_FPD)|FLG_P2(REG_NONE)|
1339 FLG_P3(REG_FPD)),
1340 INST("fnot1s", V9S, FLG_P1(REG_FP)|FLG_P2(REG_NONE)|
1341 FLG_P3(REG_FP)),
1342
1343 INST("fxor", V9S, FLG_P1(REG_FPD)|FLG_NOIMM|
1344 FLG_P2(REG_FPD)|FLG_P3(REG_FPD)),
1345 INST("fxors", V9S, FLG_P1(REG_FP)|FLG_NOIMM|
1346 FLG_P2(REG_FP)|FLG_P3(REG_FP)),
1347 INST("fnand", V9S, FLG_P1(REG_FPD)|FLG_NOIMM|
1348 FLG_P2(REG_FPD)|FLG_P3(REG_FPD)),
1349 INST("fnands", V9S, FLG_P1(REG_FP)|FLG_NOIMM|
1350 FLG_P2(REG_FP)|FLG_P3(REG_FP)),
1351
1352 /* 0x070 */
1353 INST("fand", V9S, FLG_P1(REG_FPD)|FLG_NOIMM|
1354 FLG_P2(REG_FPD)|FLG_P3(REG_FPD)),
1355 INST("fands", V9S, FLG_P1(REG_FP)|FLG_NOIMM|
1356 FLG_P2(REG_FP)|FLG_P3(REG_FP)),
1357 INST("fxnor", V9S, FLG_P1(REG_FPD)|FLG_NOIMM|
1358 FLG_P2(REG_FPD)|FLG_P3(REG_FPD)),
1359 INST("fxnors", V9S, FLG_P1(REG_FP)|FLG_NOIMM|
1360 FLG_P2(REG_FP)|FLG_P3(REG_FP)),
1361
1362 INST("fsrc1", V9S, FLG_P1(REG_FPD)|FLG_P2(REG_NONE)|
1363 FLG_P3(REG_FPD)),
1364 INST("fsrc1s", V9S, FLG_P1(REG_FP)|FLG_P2(REG_NONE)|
1365 FLG_P3(REG_FP)),
1366 INST("fornot2", V9S, FLG_P1(REG_FPD)|FLG_NOIMM|
1367 FLG_P2(REG_FPD)|FLG_P3(REG_FPD)),
1368 INST("fornot2s", V9S, FLG_P1(REG_FP)|FLG_NOIMM|
1369 FLG_P2(REG_FP)|FLG_P3(REG_FP)),
1370
1371 /* 0x078 */
1372 INST("fsrc2", V9S, FLG_P1(REG_NONE)|FLG_P2(REG_FPD)|
1373 FLG_P3(REG_FPD)),
1374 INST("fsrc2s", V9S, FLG_P1(REG_NONE)|FLG_P2(REG_FP)|
1375 FLG_P3(REG_FP)),
1376 INST("fornot1", V9S, FLG_P1(REG_FPD)|FLG_NOIMM|
1377 FLG_P2(REG_FPD)|FLG_P3(REG_FPD)),
1378 INST("fornot1s", V9S, FLG_P1(REG_FP)|FLG_NOIMM|
1379 FLG_P2(REG_FP)|FLG_P3(REG_FP)),
1380
1381 INST("for", V9S, FLG_P1(REG_FPD)|FLG_NOIMM|
1382 FLG_P2(REG_FPD)|FLG_P3(REG_FPD)),
1383 INST("fors", V9S, FLG_P1(REG_FP)|FLG_NOIMM|
1384 FLG_P2(REG_FP)|FLG_P3(REG_FP)),
1385 INST("fone", V9S, FLG_P1(REG_NONE)|FLG_P2(REG_NONE)|
1386 FLG_P3(REG_FPD)),
1387 INST("fones", V9S, FLG_P1(REG_NONE)|FLG_P2(REG_NONE)|
1388 FLG_P3(REG_FP)),
1389
1390 /* 0x080 */
1391 INST("shutdown", V9S, 0),
1392 INST("siam", V9S, 0),
1393 INVALID,
1394 INVALID,
1395
1396 INVALID, INVALID, INVALID, INVALID,
1397
1398 /* 0x088 */
1399 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
1400
1401 /* 0x090 */
1402 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
1403 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
1404
1405 /* 0x0a0 */
1406 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
1407 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
1408
1409 /* 0x0b0 */
1410 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
1411 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
1412
1413 /* 0x0c0 */
1414 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
1415 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
1416
1417 /* 0x0d0 */
1418 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
1419 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
1420
1421 /* 0x0e0 */
1422 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
1423 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
1424
1425 /* 0x0f0 */
1426 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
1427 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
1428
1429 /* 0x100 */
1430 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
1431 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
1432
1433 /* 0x110 */
1434 INST("movdtox", V9, FLG_P1(REG_NONE)|FLG_NOIMM|
1435 FLG_P2(REG_FPD)|FLG_RD(REG_INT)),
1436 INST("movstouw", V9, FLG_P1(REG_NONE)|FLG_NOIMM|
1437 FLG_P2(REG_FP)|FLG_RD(REG_INT)),
1438 INVALID,
1439 INST("movstosw", V9, FLG_P1(REG_NONE)|FLG_NOIMM|
1440 FLG_P2(REG_FP)|FLG_RD(REG_INT)),
1441 INVALID,
1442 INST("xmulx", V9, FLG_P1(REG_INT)|FLG_NOIMM|
1443 FLG_P2(REG_INT)|FLG_P3(REG_INT)),
1444 INST("xmulxhi", V9, FLG_P1(REG_INT)|FLG_NOIMM|
1445 FLG_P2(REG_INT)|FLG_P3(REG_INT)),
1446 INVALID,
1447 INST("movxtod", V9, FLG_P1(REG_NONE)|FLG_NOIMM|
1448 FLG_P2(REG_INT)|FLG_RD(REG_FPD)),
1449 INST("movwtos", V9, FLG_P1(REG_NONE)|FLG_NOIMM|
1450 FLG_P2(REG_INT)|FLG_RD(REG_FP)),
1451 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
1452
1453 /* 0x120 */
1454 INST("fucmple8", V9, FLG_P1(REG_FPD)|FLG_NOIMM|
1455 FLG_P2(REG_FPD)|FLG_RD(REG_INT)),
1456 INVALID,
1457 INST("fucmpne8", V9, FLG_P1(REG_FPD)|FLG_NOIMM|
1458 FLG_P2(REG_FPD)|FLG_RD(REG_INT)),
1459 INVALID, INVALID, INVALID, INVALID, INVALID,
1460 INST("fucmpgt8", V9, FLG_P1(REG_FPD)|FLG_NOIMM|
1461 FLG_P2(REG_FPD)|FLG_RD(REG_INT)),
1462 INVALID,
1463 INST("fucmpeq8", V9, FLG_P1(REG_FPD)|FLG_NOIMM|
1464 FLG_P2(REG_FPD)|FLG_RD(REG_INT)),
1465 INVALID, INVALID, INVALID, INVALID, INVALID,
1466
1467 /* 0x130 */
1468 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
1469 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
1470
1471 /* 0x140 */
1472 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
1473 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
1474
1475 /* 0x150 */
1476 INVALID,
1477 INST("flcmps", V9, FLG_P1(REG_FP)|FLG_P2(REG_FP)|FLG_P3(REG_FCC)
1478 |FLG_NOIMM),
1479 INST("flcmpd", V9, FLG_P1(REG_FPD)|FLG_P2(REG_FPD)|FLG_P3(REG_FCC)
1480 |FLG_NOIMM),
1481 INVALID, INVALID, INVALID, INVALID, INVALID,
1482 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
1483
1484 /* 0x160 */
1485 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
1486 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
1487
1488 /* 0x170 */
1489 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
1490 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
1491
1492 /* 0x180 */
1493 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
1494 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
1495
1496 /* 0x190 */
1497 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
1498 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
1499
1500 /* 0x1a0 */
1501 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
1502 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
1503
1504 /* 0x1b0 */
1505 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
1506 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
1507
1508 /* 0x1c0 */
1509 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
1510 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
1511
1512 /* 0x1d0 */
1513 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
1514 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
1515
1516 /* 0x1e0 */
1517 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
1518 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
1519
1520 /* 0x1f0 */
1521 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
1522 INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID
1523 };
1524
1525 static const table_t vis_table = {
1526 .tbl_field = 13,
1527 .tbl_len = 9,
1528 .tbl_ovp = NULL,
1529 .tbl_fmt = fmt_vis,
1530 .tbl_inp = vis_table_def
1531 };
1532
1533 static const inst_t fused_table_def[16] = {
1534 /* 0x0 */
1535 INVALID,
1536 INST("fmadds", V9, FLG_P1(REG_FP)),
1537 INST("fmaddd", V9, FLG_P1(REG_FPD)),
1538 INVALID,
1539
1540 /* 0x4 */
1541 INVALID,
1542 INST("fmsubs", V9, FLG_P1(REG_FP)),
1543 INST("fmsubd", V9, FLG_P1(REG_FPD)),
1544 INVALID,
1545
1546 /* 0x8 */
1547 INVALID,
1548 INST("fnmsubs", V9, FLG_P1(REG_FP)),
1549 INST("fnmsubd", V9, FLG_P1(REG_FPD)),
1550 INVALID,
1551
1552 /* 0xc */
1553 INVALID,
1554 INST("fnmadds", V9, FLG_P1(REG_FP)),
1555 INST("fnmaddd", V9, FLG_P1(REG_FPD)),
1556 INVALID
1557 };
1558
1559 static const table_t fused_table = {
1560 .tbl_field = 8,
1561 .tbl_len = 4,
1562 .tbl_ovp = NULL,
1563 .tbl_fmt = fmt_fused,
1564 .tbl_inp = fused_table_def
1565 };
1566
1567 static const inst_t alu_table_def[64] = {
1568 /* 0x00 */
1569 INST("add", VALL, 0),
1570 INST("and", VALL, 0),
1571 INST("or", VALL, 0),
1572 INST("xor", VALL, 0),
1573
1574 INST("sub", VALL, 0),
1575 INST("andn", VALL, 0),
1576 INST("orn", VALL, 0),
1577 INST("xnor", VALL, 0),
1578
1579 /* 0x08 */
1580 INST("addx", VALL, 0),
1581 INST("mulx", V9|V9S, 0),
1582 INST("umul", VALL, 0),
1583 INST("smul", VALL, 0),
1584
1585 INST("subx", VALL, 0),
1586 INST("udivx", V9|V9S, 0),
1587 INST("udiv", VALL, 0),
1588 INST("sdiv", VALL, 0),
1589
1590 /* 0x10 */
1591 INST("addcc", VALL, 0),
1592 INST("andcc", VALL, 0),
1593 INST("orcc", VALL, 0),
1594 INST("xorcc", VALL, 0),
1595
1596 INST("subcc", VALL, 0),
1597 INST("andncc", VALL, 0),
1598 INST("orncc", VALL, 0),
1599 INST("xnorcc", VALL, 0),
1600
1601 /* 0x18 */
1602 INST("addxcc", VALL, 0),
1603 INVALID,
1604 INST("umulcc", VALL, 0),
1605 INST("smulcc", VALL, 0),
1606
1607 INST("subxcc", VALL, 0),
1608 INVALID,
1609 INST("udivcc", VALL, 0),
1610 INST("sdivcc", VALL, 0),
1611
1612 /* 0x20 */
1613 INST("taddcc", VALL, 0),
1614 INST("tsubcc", VALL, 0),
1615 INST("taddcctv", VALL, 0),
1616 INST("tsubcctv", VALL, 0),
1617
1618 INST("mulscc", VALL, 0),
1619 INST("sll", VALL, 0),
1620 INST("srl", VALL, 0),
1621 INST("sra", VALL, 0),
1622
1623 /* 0x28 */
1624 INST("rd", VALL, 0),
1625 INST("rd", V8, 0),
1626 INST("rd", V8, 0),
1627 INST("rd", V8, 0),
1628
1629 TABLE(movcc_table, V9|V9S),
1630 INST("sdivx", V9|V9S, 0),
1631 INST("popc", V9|V9S,
1632 FLG_P1(REG_NONE)|FLG_P2(REG_INT)|FLG_P3(REG_INT)),
1633 TABLE(movr_table, V9|V9S),
1634
1635 /* 0x30 */
1636 INST("wr", VALL, 0),
1637 INST("wr", V8, 0),
1638 INST("wr", V8, 0),
1639 INST("wr", V8, 0),
1640
1641 TABLE(FPop1_table, VALL),
1642 TABLE(FPop2_table, VALL),
1643 INST("cpop1", V8, 0),
1644 INST("cpop2", V8, 0), /* impdep2 */
1645
1646 /* 0x38 */
1647 INST("jmpl", VALL, 0),
1648 INST("rett", VALL, 0),
1649 TABLE(Tcc_table, VALL),
1650 INST("flush", VALL, 0),
1651
1652 INST("save", VALL, 0),
1653 INST("restore", VALL, 0),
1654 TABLE(tr_table, V9|V9S),
1655 INVALID
1656 };
1657
1658
1659 static const overlay_t alu_ov_table[] = {
1660 OVERLAY(0x08, INST("addc", V9|V9S, 0)),
1661 OVERLAY(0x0c, INST("subc", V9|V9S, 0)),
1662 OVERLAY(0x18, INST("addccc", V9|V9S, 0)),
1663 OVERLAY(0x1c, INST("subccc", V9|V9S, 0)),
1664
1665 OVERLAY(0x29, INST("rdhpr", V9|V9S, 0)),
1666 OVERLAY(0x2a, INST("rdpr", V9|V9S, 0)),
1667 OVERLAY(0x2b, INST("flushw", V9|V9S, 0)),
1668 OVERLAY(0x31, TABLE(rwin_table, V9|V9S)),
1669
1670 OVERLAY(0x32, INST("wrpr", V9|V9S, 0)),
1671 OVERLAY(0x33, INST("wrhpr", V9|V9S, 0)),
1672 OVERLAY(0x36, TABLE(vis_table, V9S)),
1673 OVERLAY(0x37, TABLE(fused_table, VALL)),
1674 OVERLAY(0x39, INST("return", VALL, 0)),
1675
1676 OVERLAY_END
1677 };
1678
1679 static const table_t alu_table = {
1680 .tbl_field = 24,
1681 .tbl_len = 6,
1682 .tbl_ovp = alu_ov_table,
1683 .tbl_fmt = fmt_alu,
1684 .tbl_inp = alu_table_def
1685 };
1686
1687 static const inst_t initial_table_def[4] = {
1688 TABLE(branch_table, VALL),
1689 INST("call", VALL, 0),
1690 TABLE(alu_table, VALL),
1691 TABLE(ls_table, VALL)
1692 };
1693
1694 /* NOTE: this must not be made static */
1695 const table_t initial_table = {
1696 .tbl_field = 31,
1697 .tbl_len = 2,
1698 .tbl_ovp = NULL,
1699 .tbl_fmt = fmt_call,
1700 .tbl_inp = initial_table_def
1701 };
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