usr/src/uts/i86pc/sys/apic_common.h

   1 /*
   2  * CDDL HEADER START
   3  *
   4  * The contents of this file are subject to the terms of the
   5  * Common Development and Distribution License (the "License").
   6  * You may not use this file except in compliance with the License.
   7  *
   8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
   9  * or http://www.opensolaris.org/os/licensing.
  10  * See the License for the specific language governing permissions
  11  * and limitations under the License.
  12  *
  13  * When distributing Covered Code, include this CDDL HEADER in each
  14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
  15  * If applicable, add the following below this CDDL HEADER, with the
  16  * fields enclosed by brackets "[]" replaced with your own identifying
  17  * information: Portions Copyright [yyyy] [name of copyright owner]
  18  *
  19  * CDDL HEADER END
  20  */
  21 /*
  22  * Copyright (c) 2010, Oracle and/or its affiliates. All rights reserved.
  23  */
  24 /*
  25  * Copyright (c) 2013, Joyent, Inc.  All rights reserved.
  26  */
  27
  28 #ifndef _SYS_APIC_COMMON_H
  29 #define _SYS_APIC_COMMON_H
  30
  31 #include <sys/psm_types.h>
  32 #include <sys/avintr.h>
  33 #include <sys/privregs.h>
  34 #include <sys/pci.h>
  35 #include <sys/cyclic.h>
  36
  37 #ifdef  __cplusplus
  38 extern "C" {
  39 #endif
  40
  41 /*
  42  * Functions & Variables common to pcplusmp & apix
  43  */
  44
  45 #include <sys/psm_common.h>
  46
  47 /* Methods for multiple IOAPIC */
  48 enum apic_ioapic_method_type {
  49         APIC_MUL_IOAPIC_NONE,           /* use to disable pcplusmp fallback */
  50         APIC_MUL_IOAPIC_MASK,           /* Set RT Entry Mask bit before EOI */
  51         APIC_MUL_IOAPIC_DEOI,           /* Directed EOI */
  52         APIC_MUL_IOAPIC_IOXAPIC,        /* IOxAPIC */
  53         APIC_MUL_IOAPIC_IIR,            /* IOMMU interrup remapping */
  54         APIC_MUL_IOAPIC_PCPLUSMP        /* Fall back to old pcplusmp */
  55 };
  56
  57 #define APIX_IS_DIRECTED_EOI(type)      \
  58         ((type) == APIC_MUL_IOAPIC_DEOI || (type) == APIC_MUL_IOAPIC_IIR)
  59 #define APIX_IS_MASK_RDT(type)  \
  60         ((type) == APIC_MUL_IOAPIC_NONE || (type) == APIC_MUL_IOAPIC_MASK)
  61
  62 extern int      apix_enable;
  63 extern int      apix_loaded(void);
  64 extern enum apic_ioapic_method_type apix_mul_ioapic_method;
  65
  66 extern int      apic_oneshot;
  67 /* to allow disabling one-shot capability */
  68 extern int      apic_oneshot_enable;
  69
  70 /* Now the ones for Dynamic Interrupt distribution */
  71 extern int      apic_enable_dynamic_migration;
  72
  73 extern int apic_have_32bit_cr8;
  74
  75 extern struct psm_ops *psmops;
  76
  77 /*
  78  * These variables are frequently accessed in apic_intr_enter(),
  79  * apic_intr_exit and apic_setspl, so group them together
  80  */
  81 extern volatile uint32_t *apicadr;      /* virtual addr of local APIC   */
  82 extern uchar_t  apic_io_vectbase[MAX_IO_APIC];
  83 extern uchar_t  apic_io_vectend[MAX_IO_APIC];
  84 extern uchar_t  apic_io_ver[MAX_IO_APIC];
  85 extern int      apic_io_max;
  86 extern int      apic_nvidia_io_max;
  87 extern int apic_setspl_delay;           /* apic_setspl - delay enable   */
  88 extern int apic_clkvect;
  89
  90 /* vector at which error interrupts come in */
  91 extern int apic_errvect;
  92 extern int apic_enable_error_intr;
  93 extern int apic_error_display_delay;
  94
  95 /* vector at which performance counter overflow interrupts come in */
  96 extern int apic_cpcovf_vect;
  97 extern int apic_enable_cpcovf_intr;
  98
  99 /* vector at which CMCI interrupts come in */
 100 extern int apic_cmci_vect;
 101 extern int cmi_enable_cmci;
 102 extern void cmi_cmci_trap(void);
 103
 104 extern kmutex_t cmci_cpu_setup_lock;    /* protects cmci_cpu_setup_registered */
 105 extern int cmci_cpu_setup_registered;
 106
 107 extern int      apic_forceload;
 108
 109 extern int      apic_coarse_hrtime;     /* 0 - use accurate slow gethrtime() */
 110                                         /* 1 - use gettime() for performance */
 111 extern int      apic_flat_model;                /* 0 - clustered. 1 - flat */
 112
 113 extern int      apic_panic_on_nmi;
 114 extern int      apic_panic_on_apic_error;
 115
 116 extern int      apic_verbose;
 117
 118 #ifdef DEBUG
 119 extern int      apic_debug;
 120 extern int      apic_restrict_vector;
 121
 122 extern int      apic_debug_msgbuf[APIC_DEBUG_MSGBUFSIZE];
 123 extern int      apic_debug_msgbufindex;
 124
 125 #endif /* DEBUG */
 126
 127 extern uint_t   apic_nsec_per_intr;
 128 extern uint_t   apic_nticks;
 129 extern uint_t   apic_skipped_redistribute;
 130
 131 extern uint_t   last_count_read;
 132 extern lock_t   apic_mode_switch_lock;
 133 extern lock_t   apic_gethrtime_lock;
 134 extern volatile int     apic_hrtime_stamp;
 135 extern volatile hrtime_t apic_nsec_since_boot;
 136 extern uint_t   apic_hertz_count;
 137
 138 extern uint64_t apic_ticks_per_SFnsecs; /* # of ticks in SF nsecs */
 139
 140 extern int      apic_hrtime_error;
 141 extern int      apic_remote_hrterr;
 142 extern int      apic_num_nmis;
 143 extern int      apic_apic_error;
 144 extern int      apic_num_apic_errors;
 145 extern int      apic_num_cksum_errors;
 146
 147 extern int      apic_error;
 148
 149 /* use to make sure only one cpu handles the nmi */
 150 extern lock_t   apic_nmi_lock;
 151 /* use to make sure only one cpu handles the error interrupt */
 152 extern lock_t   apic_error_lock;
 153
 154 /* Patchable global variables. */
 155 extern int      apic_kmdb_on_nmi;       /* 0 - no, 1 - yes enter kmdb */
 156 extern uint32_t apic_divide_reg_init;   /* 0 - divide by 2 */
 157
 158 extern apic_intrmap_ops_t *apic_vt_ops;
 159
 160 #ifdef  DEBUG
 161 extern int      apic_break_on_cpu;
 162 extern int      apic_stretch_interrupts;
 163 extern int      apic_stretch_ISR;       /* IPL of 3 matches nothing now */
 164 #endif
 165
 166 extern cyclic_id_t apic_cyclic_id;
 167
 168 extern void apic_nmi_intr(caddr_t arg, struct regs *rp);
 169 extern int      apic_clkinit();
 170 extern hrtime_t apic_gettime();
 171 extern hrtime_t apic_gethrtime();
 172 extern int      apic_cpu_start(processorid_t cpuid, caddr_t ctx);
 173 extern int      apic_cpu_stop(processorid_t cpuid, caddr_t ctx);
 174 extern int      apic_cpu_add(psm_cpu_request_t *reqp);
 175 extern int      apic_cpu_remove(psm_cpu_request_t *reqp);
 176 extern int      apic_cpu_ops(psm_cpu_request_t *reqp);
 177 extern void     apic_switch_ipi_callback(boolean_t enter);
 178 extern void     apic_send_ipi(int cpun, int ipl);
 179 extern void     apic_set_idlecpu(processorid_t cpun);
 180 extern void     apic_unset_idlecpu(processorid_t cpun);
 181 extern void     apic_shutdown(int cmd, int fcn);
 182 extern void     apic_preshutdown(int cmd, int fcn);
 183 extern processorid_t    apic_get_next_processorid(processorid_t cpun);
 184 extern uint_t   apic_calibrate(volatile uint32_t *, uint16_t *);
 185
 186 extern int apic_error_intr();
 187 extern void apic_cpcovf_mask_clear(void);
 188 extern int cmci_cpu_setup(cpu_setup_t what, int cpuid, void *arg);
 189 extern void apic_intrmap_init(int apic_mode);
 190 extern processorid_t apic_find_cpu(int flag);
 191 extern processorid_t apic_get_next_bind_cpu(void);
 192
 193 extern int      apic_support_msi;
 194 extern int      apic_multi_msi_enable;
 195 extern int      apic_msix_enable;
 196
 197 extern uint32_t apic_get_localapicid(uint32_t cpuid);
 198 extern uchar_t apic_get_ioapicid(uchar_t ioapicindex);
 199
 200 #ifdef  __cplusplus
 201 }
 202 #endif
 203
 204 #endif  /* _SYS_APIC_COMMON_H */