| blob | 11232881e13c3fbdf8a48400c6ff862b1ef29336 |
1 /*
2 * CDDL HEADER START
3 *
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License (the "License").
6 * You may not use this file except in compliance with the License.
7 *
8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 * or http://www.opensolaris.org/os/licensing.
10 * See the License for the specific language governing permissions
11 * and limitations under the License.
12 *
13 * When distributing Covered Code, include this CDDL HEADER in each
14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 * If applicable, add the following below this CDDL HEADER, with the
16 * fields enclosed by brackets "[]" replaced with your own identifying
17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 *
19 * CDDL HEADER END
20 */
22 /*
23 * Copyright (c) 2009, 2010, Oracle and/or its affiliates. All rights reserved.
24 * Copyright 2014 Nexenta Systems, Inc. All rights reserved.
25 * Copyright (c) 2014, Joyent, Inc. All rights reserved.
26 * Copyright 2014 OmniTI Computer Consulting, Inc. All rights reserved.
27 * Copyright (c) 2014, Tegile Systems Inc. All rights reserved.
28 */
30 /*
31 * Copyright (c) 2000 to 2010, LSI Corporation.
32 * All rights reserved.
33 *
34 * Redistribution and use in source and binary forms of all code within
35 * this file that is exclusively owned by LSI, with or without
36 * modification, is permitted provided that, in addition to the CDDL 1.0
37 * License requirements, the following conditions are met:
38 *
39 * Neither the name of the author nor the names of its contributors may be
40 * used to endorse or promote products derived from this software without
41 * specific prior written permission.
42 *
43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
44 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
45 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
46 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
47 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
48 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
49 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
50 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
51 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
52 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
53 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
54 * DAMAGE.
55 */
57 /*
58 * mptsas - This is a driver based on LSI Logic's MPT2.0/2.5 interface.
59 *
60 */
62 #if defined(lint) || defined(DEBUG)
63 #define MPTSAS_DEBUG
64 #endif
66 /*
67 * standard header files.
68 */
69 #include <sys/note.h>
70 #include <sys/scsi/scsi.h>
71 #include <sys/pci.h>
72 #include <sys/file.h>
73 #include <sys/policy.h>
74 #include <sys/model.h>
75 #include <sys/sysevent.h>
76 #include <sys/sysevent/eventdefs.h>
77 #include <sys/sysevent/dr.h>
78 #include <sys/sata/sata_defs.h>
79 #include <sys/scsi/generic/sas.h>
80 #include <sys/scsi/impl/scsi_sas.h>
82 #pragma pack(1)
83 #include <sys/scsi/adapters/mpt_sas/mpi/mpi2_type.h>
84 #include <sys/scsi/adapters/mpt_sas/mpi/mpi2.h>
85 #include <sys/scsi/adapters/mpt_sas/mpi/mpi2_cnfg.h>
86 #include <sys/scsi/adapters/mpt_sas/mpi/mpi2_init.h>
87 #include <sys/scsi/adapters/mpt_sas/mpi/mpi2_ioc.h>
88 #include <sys/scsi/adapters/mpt_sas/mpi/mpi2_sas.h>
89 #include <sys/scsi/adapters/mpt_sas/mpi/mpi2_tool.h>
90 #include <sys/scsi/adapters/mpt_sas/mpi/mpi2_raid.h>
91 #pragma pack()
93 /*
94 * private header files.
95 *
96 */
97 #include <sys/scsi/impl/scsi_reset_notify.h>
98 #include <sys/scsi/adapters/mpt_sas/mptsas_var.h>
99 #include <sys/scsi/adapters/mpt_sas/mptsas_ioctl.h>
100 #include <sys/scsi/adapters/mpt_sas/mptsas_smhba.h>
101 #include <sys/scsi/adapters/mpt_sas/mptsas_hash.h>
102 #include <sys/raidioctl.h>
106 /*
107 * FMA header files
108 */
109 #include <sys/ddifm.h>
110 #include <sys/fm/protocol.h>
111 #include <sys/fm/util.h>
112 #include <sys/fm/io/ddi.h>
114 /*
115 * autoconfiguration data and routines.
116 */
121 /*
122 * cb_ops function
123 */
126 #ifdef __sparc
132 /*
133 * Resource initilaization for hardware
134 */
158 /*
159 * SCSA function prototypes
160 */
187 /*
188 * SMP functions
189 */
192 /*
193 * internal function prototypes.
194 */
234 pMpi2ReplyDescriptorsUnion_t reply_desc_union);
236 pMpi2ReplyDescriptorsUnion_t reply_desc);
238 pMpi2ReplyDescriptorsUnion_t reply_desc);
324 /*
325 * helper functions
326 */
361 mptsas_phymask_t phymask);
365 /*
366 * Enumeration / DR functions
367 */
401 uint_t flags);
419 /*
420 * Power management functions
421 */
425 /*
426 * MPT MSI tunable:
427 *
428 * By default MSI is enabled on all supported platforms.
429 */
433 /*
434 * Global switch for use of MPI2.5 FAST PATH.
435 * We don't really know what FAST PATH actually does, so if it is suspected
436 * to cause problems it can be turned off by setting this variable to B_FALSE.
437 */
445 /*
446 * FMA Prototypes
447 */
454 /*
455 * This device is created by the SCSI pseudo nexus driver (SCSI vHCI). It is
456 * under this device that the paths to a physical device are created when
457 * MPxIO is used.
458 */
461 /*
462 * Tunable timeout value for Inquiry VPD page 0x83
463 * By default the value is 30 seconds.
464 */
467 /*
468 * This is used to allocate memory for message frame storage, not for
469 * data I/O DMA. All message frames must be stored in the first 4G of
470 * physical memory.
471 */
472 ddi_dma_attr_t mptsas_dma_attrs = {
485 };
487 /*
488 * This is used for data I/O DMA memory allocation. (full 64-bit DMA
489 * physical addresses are supported.)
490 */
491 ddi_dma_attr_t mptsas_dma_attrs64 = {
504 };
506 ddi_device_acc_attr_t mptsas_dev_attr = {
507 DDI_DEVICE_ATTR_V1,
508 DDI_STRUCTURE_LE_ACC,
509 DDI_STRICTORDER_ACC,
510 DDI_DEFAULT_ACC
511 };
531 nodev /* awrite */
532 };
542 #ifdef __sparc
543 mptsas_reset,
544 #else
550 #ifdef __sparc
551 ddi_quiesce_not_needed
552 #else
553 mptsas_quiesce /* quiesce */
555 };
564 };
568 };
577 /*
578 * Local static data
579 */
580 #if defined(MPTSAS_DEBUG)
581 /*
582 * Flags to indicate which debug messages are to be printed and which go to the
583 * debug log ring buffer. Default is to not print anything, and to log
584 * everything except the watchsubr() output which normally happens every second.
585 */
606 /*
607 * Default length for extended auto request sense buffers.
608 * All sense buffers need to be under the same alloc because there
609 * is only one common top 32bits (of 64bits) address register.
610 * Most requests only require 32 bytes, but some request >256.
611 * We use rmalloc()/rmfree() on this additional memory to manage the
612 * "extended" requests.
613 */
616 /*
617 * We believe that all software resrictions of having to run with DMA
618 * attributes to limit allocation to the first 4G are removed.
619 * However, this flag remains to enable quick switchback should suspicious
620 * problems emerge.
621 * Note that scsi_alloc_consistent_buf() does still adhere to allocating
622 * 32 bit addressable memory, but we can cope if that is changed now.
623 */
626 /*
627 * warlock directives
628 */
630 mptsas_cmd NcrTableIndirect buf scsi_cdb scsi_status))
636 /*
637 * SM - HBA statics
638 */
641 #ifdef MPTSAS_DEBUG
643 #endif
645 /*
646 * Notes:
647 * - scsi_hba_init(9F) initializes SCSI HBA modules
648 * - must call scsi_hba_fini(9F) if modload() fails
649 */
650 int
652 {
654 /* CONSTCOND */
660 MPTSAS_INITIAL_SOFT_SPACE);
663 }
668 }
680 }
683 }
685 /*
686 * Notes:
687 * - scsi_hba_fini(9F) uninitializes SCSI HBA modules
688 */
689 int
691 {
693 /* CONSTCOND */
704 }
706 }
708 /*
709 * The loadable-module _info(9E) entry point
710 */
711 int
713 {
714 /* CONSTCOND */
719 }
721 static int
723 {
728 }
730 static int
732 {
740 }
742 static int
744 {
752 }
754 static int
756 {
761 }
763 static uint64_t
765 {
770 }
772 static int
774 {
783 }
785 static void
787 {
789 }
791 static void
793 {
795 }
797 static void
799 {
806 }
810 }
815 }
817 static int
819 {
842 /* CONSTCOND */
850 /*
851 * If this a scsi-iport node, nothing to do here.
852 */
857 }
862 NULL) {
866 }
874 NULL) {
878 }
880 /*
881 * Overwrite parent's tran_hba_private to iport's tran vector
882 */
887 /*
888 * Get SAS address for initiator port according dev_handle
889 */
894 DDI_PROP_SUCCESS) {
896 MPTSAS_VIRTUAL_PORT);
900 }
902 }
911 }
912 }
919 }
925 else
928 /*
929 * Update PHY info for smhba
930 */
936 }
943 numphys++;
944 }
945 }
953 DDI_PROP_SUCCESS) {
959 }
962 DDI_PROP_SUCCESS) {
965 }
969 DDI_PROP_SUCCESS) {
974 }
978 DDI_PROP_SUCCESS) {
983 }
986 DDI_PROP_SUCCESS) {
988 MPTSAS_VIRTUAL_PORT);
992 }
1005 attached_devhdl);
1008 }
1017 }
1018 }
1023 attached_sas_wwn);
1026 DDI_PROP_SUCCESS) {
1030 }
1032 /* Create kstats for each phy on this iport */
1036 /*
1037 * register sas hba iport with mdi (MPxIO/vhci)
1038 */
1042 }
1044 }
1046 /*
1047 * Notes:
1048 * Set up all device state and allocate data structures,
1049 * mutexes, condition variables, etc. for device operation.
1050 * Add interrupts needed.
1051 * Return DDI_SUCCESS if device is ready, else return DDI_FAILURE.
1052 */
1053 static int
1055 {
1073 /* CONSTCOND */
1078 }
1092 }
1094 /*
1095 * Reset hardware and softc to "no outstanding commands"
1096 * Note that a check condition can result on first command
1097 * to a target.
1098 */
1101 /*
1102 * raise power.
1103 */
1111 /*
1112 * The pm_raise_power() call above failed,
1113 * and that can only occur if we were unable
1114 * to reset the hardware. This is probably
1115 * due to unhealty hardware, and because
1116 * important filesystems(such as the root
1117 * filesystem) could be on the attached disks,
1118 * it would not be a good idea to continue,
1119 * as we won't be entirely certain we are
1120 * writing correct data. So we panic() here
1121 * to not only prevent possible data corruption,
1122 * but to give developers or end users a hope
1123 * of identifying and correcting any problems.
1124 */
1127 }
1128 }
1132 /*
1133 * Reinitialize ioc
1134 */
1140 }
1142 }
1143 /*
1144 * mptsas_update_driver_data needs interrupts so enable them
1145 * first.
1146 */
1150 /* start requests, if possible */
1155 /*
1156 * Restart watch thread
1157 */
1161 mptsas_tick);
1163 }
1166 /* report idle status to pm framework */
1169 }
1176 }
1180 /*
1181 * Allocate softc information.
1182 */
1187 }
1195 }
1197 /* Indicate that we are 'sizeof (scsi_*(9S))' clean. */
1203 /* Make a per-instance copy of the structures */
1209 }
1213 /*
1214 * Size of individual request sense buffer
1215 */
1218 /*
1219 * Initialize FMA
1220 */
1232 }
1234 /*
1235 * Setup configuration space
1236 */
1240 }
1241 config_setup++;
1247 }
1248 map_setup++;
1250 /*
1251 * A taskq is created for dealing with the event handler
1252 */
1257 }
1258 event_taskq_create++;
1260 /*
1261 * A taskq is created for dealing with dr events
1262 */
1269 }
1270 dr_taskq_create++;
1295 MPTSAS_DONEQ_THREAD_ACTIVE;
1305 }
1307 doneq_thread_create++;
1308 }
1310 /*
1311 * Disable hardware interrupt since we're not ready to
1312 * handle it yet.
1313 */
1317 intr_added++;
1319 /* Initialize mutex used in interrupt handler */
1329 }
1336 mutex_init_done++;
1339 /*
1340 * Initialize power management component
1341 */
1348 }
1349 }
1351 /*
1352 * Initialize chip using Message Unit Reset, if allowed
1353 */
1359 }
1361 /*
1362 * Fill in the phy_info structure and get the base WWID
1363 */
1368 }
1374 }
1380 }
1384 /*
1385 * Register the iport for multiple port HBA
1386 */
1389 /*
1390 * initialize SCSI HBA transport structure
1391 */
1394 hba_attach_setup++;
1398 smp_attach_setup++;
1407 "scsi_reset_delay of 0 is not recommended,"
1410 }
1412 /*
1413 * Initialize the wait and done FIFO queue
1414 */
1420 /*
1421 * ioc cmd queue initialize
1422 */
1428 /*
1429 * enable event notification
1430 */
1435 }
1438 /*
1439 * used for mptsas_watch
1440 */
1453 }
1455 added_watchdog++;
1457 /*
1458 * Initialize PHY info for smhba.
1459 * This requires watchdog to be enabled otherwise if interrupts
1460 * don't work the system will hang.
1461 */
1466 }
1468 /* Check all dma handles allocated in attach */
1482 }
1484 /* Check all acc handles allocated in attach */
1501 }
1503 /*
1504 * After this point, we are not going to fail the attach.
1505 */
1507 /* Print message of HBA present */
1510 /* report idle status to pm framework */
1513 }
1517 fail:
1522 /* deallocate in reverse order */
1534 }
1536 }
1542 }
1545 }
1554 }
1557 }
1568 }
1572 }
1576 }
1583 }
1586 }
1589 }
1597 }
1603 }
1607 }
1610 }
1617 }
1619 }
1621 static int
1623 {
1629 }
1637 }
1644 }
1646 /*
1647 * Cancel timeout threads for this mpt
1648 */
1655 }
1663 }
1669 /*
1670 * Cancel watch threads if all mpts suspended
1671 */
1676 }
1681 timeout_id_t tid;
1690 }
1697 }
1698 }
1703 /*
1704 * If this mpt is not in full power(PM_LEVEL_D0), just return.
1705 */
1710 }
1712 /* Disable HBA interrupts in hardware */
1714 /*
1715 * Send RAID action system shutdown to sync IR
1716 */
1721 /* drain the taskq */
1726 }
1728 #ifdef __sparc
1729 /*ARGSUSED*/
1730 static int
1732 {
1736 /*
1737 * If this call is for iport, just return.
1738 */
1748 /*
1749 * Send RAID action system shutdown to sync IR. Disable HBA
1750 * interrupts in hardware first.
1751 */
1756 }
1758 /*
1759 * quiesce(9E) entry point.
1760 *
1761 * This function is called when the system is single-threaded at high
1762 * PIL with preemption disabled. Therefore, this function must not be
1763 * blocked.
1764 *
1765 * This function returns DDI_SUCCESS on success, or DDI_FAILURE on failure.
1766 * DDI_FAILURE indicates an error condition and should almost never happen.
1767 */
1768 static int
1770 {
1774 /*
1775 * If this call is for iport, just return.
1776 */
1786 /* Disable HBA interrupts in hardware */
1788 /* Send RAID action system shutdonw to sync IR */
1792 }
1795 /*
1796 * detach(9E). Remove all device allocations and system resources;
1797 * disable device interrupts.
1798 * Return DDI_SUCCESS if done; DDI_FAILURE if there's a problem.
1799 */
1800 static int
1802 {
1803 /* CONSTCOND */
1816 }
1817 /* NOTREACHED */
1818 }
1820 static int
1822 {
1839 }
1840 /*
1841 * Still have pathinfo child, should not detach mpt driver
1842 */
1845 /*
1846 * MPxIO enabled for the iport
1847 */
1853 }
1859 }
1863 }
1868 }
1870 /* Make sure power level is D0 before accessing registers */
1875 DDI_SUCCESS) {
1881 }
1882 }
1883 }
1885 /*
1886 * Send RAID action system shutdown to sync IR. After action, send a
1887 * Message Unit Reset. Since after that DMA resource will be freed,
1888 * set ioc to READY state will avoid HBA initiated DMA operation.
1889 */
1909 }
1913 }
1917 }
1924 }
1930 /*
1931 * Cancel timeout threads for this mpt
1932 */
1940 }
1948 }
1952 /*
1953 * last mpt? ... if active, CANCEL watch threads.
1954 */
1957 timeout_id_t tid;
1958 /*
1959 * Clear mptsas_timeouts_enable so that the watch thread
1960 * gets restarted on DDI_ATTACH
1961 */
1969 }
1976 }
1977 }
1980 /*
1981 * Delete Phy stats
1982 */
1987 /*
1988 * Delete nt_active.
1989 */
1994 /* deallocate everything that was allocated in mptsas_attach */
2000 /* Lower the power informing PM Framework */
2004 "!mptsas%d: Lower power request failed "
2007 }
2014 }
2034 }
2036 static void
2038 {
2045 }
2048 }
2050 static void
2052 {
2054 /*
2055 * Remove device instance from the global linked list
2056 */
2065 }
2066 }
2069 }
2070 }
2074 }
2076 }
2078 static int
2080 {
2081 ddi_dma_attr_t task_dma_attrs;
2088 /* allocate Task Management ddi_dma resources */
2093 }
2097 }
2099 static void
2101 {
2106 }
2108 static int
2110 {
2114 /* Allocate a transport structure */
2116 SCSI_HBA_CANSLEEP);
2153 /*
2154 * All children of the HBA are iports. We need tran was cloned.
2155 * So we pass the flags to SCSA. SCSI_HBA_TRAN_CLONE will be
2156 * inherited to iport's tran vector.
2157 */
2166 }
2168 }
2170 static void
2172 {
2177 }
2178 }
2180 static void
2182 {
2185 /*
2186 * initial value of mask is 0
2187 */
2208 }
2209 }
2215 }
2216 }
2221 /*
2222 * register a iport
2223 */
2226 }
2228 /*
2229 * register a virtual port for RAID volume always
2230 */
2233 }
2235 static int
2237 {
2247 }
2248 /*
2249 * Initialize smp hash table
2250 */
2255 KM_SLEEP);
2259 }
2261 static void
2263 {
2268 }
2270 }
2272 static int
2274 {
2278 /*
2279 * create kmem cache for packets
2280 */
2290 }
2292 /*
2293 * create kmem cache for extra SGL frames if SGL cannot
2294 * be accomodated into main request frame.
2295 */
2305 }
2308 }
2310 static void
2312 {
2313 /* deallocate in reverse order */
2317 }
2321 }
2322 }
2324 static int
2326 {
2327 #ifndef __lock_lint
2329 #endif
2341 }
2345 /*
2346 * If the device is busy, don't lower its power level
2347 */
2351 }
2356 /*
2357 * Wait up to 30 seconds for IOC to come out of reset.
2358 */
2364 }
2366 }
2367 /*
2368 * If IOC is not in operational state, try to hard reset it.
2369 */
2371 MPI2_IOC_STATE_OPERATIONAL) {
2378 }
2379 }
2391 }
2394 }
2396 /*
2397 * Initialize configuration space and figure out which
2398 * chip and revison of the chip the mpt driver is using.
2399 */
2400 static int
2402 {
2412 }
2414 /*
2415 * This is a workaround for a XMITS ASIC bug which does not
2416 * drive the CBE upper bits.
2417 */
2419 PCI_STAT_PERROR) {
2421 PCI_STAT_PERROR);
2422 }
2426 /*
2427 * Get the chip device id:
2428 */
2431 /*
2432 * Save the revision.
2433 */
2436 /*
2437 * Save the SubSystem Vendor and Device IDs
2438 */
2442 /*
2443 * Set the latency timer to 0x40 as specified by the upa -> pci
2444 * bridge chip design team. This may be done by the sparc pci
2445 * bus nexus driver, but the driver should make sure the latency
2446 * timer is correct for performance reasons.
2447 */
2449 MPTSAS_LATENCY_TIMER);
2453 }
2455 static void
2457 {
2462 }
2463 }
2465 static void
2467 {
2468 ushort_t cmdreg;
2470 /*
2471 * Set the command register to the needed values.
2472 */
2478 }
2480 static void
2482 {
2483 ushort_t cmdreg;
2485 /*
2486 * Clear the master enable bit in the PCI command register.
2487 * This prevents any bus mastering activity like DMA.
2488 */
2492 }
2494 int
2496 {
2497 ddi_dma_attr_t attrs;
2508 }
2511 }
2513 void
2515 {
2519 }
2521 int
2523 {
2524 ddi_dma_attr_t attrs;
2525 ddi_dma_handle_t dma_handle;
2526 caddr_t memp;
2527 ddi_acc_handle_t accessp;
2539 }
2547 }
2552 }
2554 static int
2556 {
2557 ddi_dma_attr_t frame_dma_attrs;
2558 caddr_t memp;
2559 ddi_dma_cookie_t cookie;
2562 /*
2563 * re-alloc when it has already alloced
2564 */
2569 /*
2570 * The size of the request frame pool is:
2571 * Number of Request Frames * Request Frame Size
2572 */
2575 /*
2576 * set the DMA attributes. System Request Message Frames must be
2577 * aligned on a 16-byte boundry.
2578 */
2583 /*
2584 * allocate the request frame pool.
2585 */
2590 }
2592 /*
2593 * Store the request frame memory address. This chip uses this
2594 * address to dma to and from the driver's frame. The second
2595 * address is the address mpt uses to fill in the frame.
2596 */
2600 /*
2601 * Clear the request frame pool.
2602 */
2606 }
2608 static int
2610 {
2611 ddi_dma_attr_t sense_dma_attrs;
2612 caddr_t memp;
2613 ddi_dma_cookie_t cookie;
2617 /*
2618 * re-alloc when it has already alloced
2619 */
2624 }
2626 /*
2627 * The size of the request sense pool is:
2628 * (Number of Request Frames - 2 ) * Request Sense Size +
2629 * extra memory for extended sense requests.
2630 */
2632 mptsas_extreq_sense_bufsize;
2634 /*
2635 * set the DMA attributes. ARQ buffers
2636 * aligned on a 16-byte boundry.
2637 */
2642 /*
2643 * allocate the request sense buffer pool.
2644 */
2649 }
2651 /*
2652 * Store the request sense base memory address. This chip uses this
2653 * address to dma the request sense data. The second
2654 * address is the address mpt uses to access the data.
2655 * The third is the base for the extended rqsense buffers.
2656 */
2662 /*
2663 * The extra memory is divided up into multiples of the base
2664 * buffer size in order to allocate via rmalloc().
2665 * Note that the rmallocmap cannot start at zero!
2666 */
2672 /*
2673 * Clear the pool.
2674 */
2678 }
2680 static int
2682 {
2683 ddi_dma_attr_t frame_dma_attrs;
2684 caddr_t memp;
2685 ddi_dma_cookie_t cookie;
2688 /*
2689 * re-alloc when it has already alloced
2690 */
2694 }
2696 /*
2697 * The size of the reply frame pool is:
2698 * Number of Reply Frames * Reply Frame Size
2699 */
2702 /*
2703 * set the DMA attributes. System Reply Message Frames must be
2704 * aligned on a 4-byte boundry. This is the default.
2705 */
2709 /*
2710 * allocate the reply frame pool
2711 */
2716 }
2718 /*
2719 * Store the reply frame memory address. This chip uses this
2720 * address to dma to and from the driver's frame. The second
2721 * address is the address mpt uses to process the frame.
2722 */
2726 /*
2727 * Clear the reply frame pool.
2728 */
2732 }
2734 static int
2736 {
2737 ddi_dma_attr_t frame_dma_attrs;
2738 caddr_t memp;
2739 ddi_dma_cookie_t cookie;
2742 /*
2743 * re-alloc when it has already alloced
2744 */
2748 }
2750 /*
2751 * The reply free queue size is:
2752 * Reply Free Queue Depth * 4
2753 * The "4" is the size of one 32 bit address (low part of 64-bit
2754 * address)
2755 */
2758 /*
2759 * set the DMA attributes The Reply Free Queue must be aligned on a
2760 * 16-byte boundry.
2761 */
2766 /*
2767 * allocate the reply free queue
2768 */
2773 }
2775 /*
2776 * Store the reply free queue memory address. This chip uses this
2777 * address to read from the reply free queue. The second address
2778 * is the address mpt uses to manage the queue.
2779 */
2783 /*
2784 * Clear the reply free queue memory.
2785 */
2789 }
2791 static int
2793 {
2794 ddi_dma_attr_t frame_dma_attrs;
2795 caddr_t memp;
2796 ddi_dma_cookie_t cookie;
2799 /*
2800 * re-alloc when it has already alloced
2801 */
2805 }
2807 /*
2808 * The reply descriptor post queue size is:
2809 * Reply Descriptor Post Queue Depth * 8
2810 * The "8" is the size of each descriptor (8 bytes or 64 bits).
2811 */
2814 /*
2815 * set the DMA attributes. The Reply Descriptor Post Queue must be
2816 * aligned on a 16-byte boundry.
2817 */
2822 /*
2823 * allocate the reply post queue
2824 */
2829 }
2831 /*
2832 * Store the reply descriptor post queue memory address. This chip
2833 * uses this address to write to the reply descriptor post queue. The
2834 * second address is the address mpt uses to manage the queue.
2835 */
2839 /*
2840 * Clear the reply post queue memory.
2841 */
2845 }
2847 static void
2849 {
2853 }
2854 }
2856 static int
2858 {
2864 }
2866 }
2868 }
2870 static void
2872 {
2877 }
2878 }
2880 static void
2882 {
2885 }
2887 static void
2889 {
2892 /*
2893 * Free up any allocated memory
2894 */
2898 }
2904 }
2909 }
2914 }
2919 }
2924 }
2925 }
2927 static int
2929 {
2935 /* Get the target num */
2941 /*
2942 * Stick in the address of form "pPHY,LUN"
2943 */
2948 /*
2949 * Stick in the address of the form "wWWN,LUN"
2950 */
2955 }
2961 }
2963 }
2965 /*
2966 * tran_tgt_init(9E) - target device instance initialization
2967 */
2968 static int
2971 {
2972 #ifndef __lock_lint
2974 #endif
2976 /*
2977 * At this point, the scsi_device structure already exists
2978 * and has been initialized.
2979 *
2980 * Use this function to allocate target-private data structures,
2981 * if needed by this HBA. Add revised flow-control and queue
2982 * properties for child here, if desired and if you can tell they
2983 * support tagged queueing by now.
2984 */
2993 mptsas_target_addr_t addr;
3005 }
3006 /*
3007 * phymask is 0 means the virtual port for RAID
3008 */
3013 /*
3014 * Very bad news if this occurs. Somehow scsi_vhci has
3015 * lost the pathinfo node for this target.
3016 */
3018 }
3021 DDI_PROP_SUCCESS) {
3024 }
3030 }
3032 }
3038 DDI_PROP_SUCCESS) {
3041 }
3045 }
3046 }
3057 sas_wwn);
3059 }
3062 KM_SLEEP);
3066 }
3070 }
3075 MPI2_SAS_DEVICE_INFO_ATAPI_DEVICE)) {
3087 /*
3088 * According SCSI/ATA Translation -2 (SAT-2) revision 01a
3089 * chapter 12.4.2 VPD page 89h includes 512 bytes ATA IDENTIFY
3090 * DEVICE data or ATA IDENTIFY PACKET DEVICE data.
3091 */
3099 }
3104 }
3113 /*
3114 * split model into into vid/pid
3115 */
3121 /*
3122 * terminate vid, establish pid
3123 */
3126 /*
3127 * vid will stay "ATA ", the rule is same
3128 * as sata framework implementation.
3129 */
3131 /*
3132 * model is all pid
3133 */
3135 }
3137 /*
3138 * override SCSA "inquiry-*" properties
3139 */
3151 }
3154 }
3157 }
3158 /*
3159 * tran_tgt_free(9E) - target device instance deallocation
3160 */
3161 static void
3164 {
3165 #ifndef __lock_lint
3167 #endif
3174 }
3175 }
3177 /*
3178 * scsi_pkt handling
3179 *
3180 * Visible to the external world via the transport structure.
3181 */
3183 /*
3184 * Notes:
3185 * - transport the command to the addressed SCSI target/lun device
3186 * - normal operation is to schedule the command to be transported,
3187 * and return TRAN_ACCEPT if this is successful.
3188 * - if NO_INTR, tran_start must poll device for command completion
3189 */
3190 static int
3192 {
3193 #ifndef __lock_lint
3195 #endif
3206 /*
3207 * prepare the pkt before taking mutex.
3208 */
3212 }
3214 /*
3215 * Send the command to target/lun, however your HBA requires it.
3216 * If busy, return TRAN_BUSY; if there's some other formatting error
3217 * in the packet, return TRAN_BADPKT; otherwise, fall through to the
3218 * return of TRAN_ACCEPT.
3219 *
3220 * Remember that access to shared resources, including the mptsas_t
3221 * data structure and the HBA hardware registers, must be protected
3222 * with mutexes, here and everywhere.
3223 *
3224 * Also remember that at interrupt time, you'll get an argument
3225 * to the interrupt handler which is a pointer to your mptsas_t
3226 * structure; you'll have to remember which commands are outstanding
3227 * and which scsi_pkt is the currently-running command so the
3228 * interrupt handler can refer to the pkt to set completion
3229 * status, call the target driver back through pkt_comp, etc.
3230 *
3231 * If the instance lock is held by other thread, don't spin to wait
3232 * for it. Instead, queue the cmd and next time when the instance lock
3233 * is not held, accept all the queued cmd. A extra tx_waitq is
3234 * introduced to protect the queue.
3235 *
3236 * The polled cmd will not be queud and accepted as usual.
3237 *
3238 * Under the tx_waitq mutex, record whether a thread is draining
3239 * the tx_waitq. An IO requesting thread that finds the instance
3240 * mutex contended appends to the tx_waitq and while holding the
3241 * tx_wait mutex, if the draining flag is not set, sets it and then
3242 * proceeds to spin for the instance mutex. This scheme ensures that
3243 * the last cmd in a burst be processed.
3244 *
3245 * we enable this feature only when the helper threads are enabled,
3246 * at which we think the loads are heavy.
3247 *
3248 * per instance mutex m_tx_waitq_mutex is introduced to protect the
3249 * m_tx_waitqtail, m_tx_waitq, m_tx_draining.
3250 */
3262 /*
3263 * ptgt->m_dr_flag is protected by m_mutex or
3264 * m_tx_waitq_mutex. In this case, m_tx_waitq_mutex
3265 * is acquired.
3266 */
3269 /*
3270 * The command should be allowed to
3271 * retry by returning TRAN_BUSY to
3272 * to stall the I/O's which come from
3273 * scsi_vhci since the device/path is
3274 * in unstable state now.
3275 */
3279 /*
3280 * The device is offline, just fail the
3281 * command by returning
3282 * TRAN_FATAL_ERROR.
3283 */
3286 }
3287 }
3299 }
3300 }
3303 /*
3304 * ptgt->m_dr_flag is protected by m_mutex or m_tx_waitq_mutex
3305 * in this case, m_mutex is acquired.
3306 */
3309 /*
3310 * commands should be allowed to retry by
3311 * returning TRAN_BUSY to stall the I/O's
3312 * which come from scsi_vhci since the device/
3313 * path is in unstable state now.
3314 */
3318 /*
3319 * The device is offline, just fail the
3320 * command by returning TRAN_FATAL_ERROR.
3321 */
3324 }
3325 }
3328 }
3331 }
3333 /*
3334 * Accept all the queued cmds(if any) before accept the current one.
3335 */
3336 static int
3338 {
3343 /*
3344 * The call to mptsas_accept_tx_waitq() must always be performed
3345 * because that is where mpt->m_tx_draining is cleared.
3346 */
3350 /*
3351 * ptgt->m_dr_flag is protected by m_mutex or m_tx_waitq_mutex
3352 * in this case, m_mutex is acquired.
3353 */
3356 /*
3357 * The command should be allowed to retry by returning
3358 * TRAN_BUSY to stall the I/O's which come from
3359 * scsi_vhci since the device/path is in unstable state
3360 * now.
3361 */
3364 /*
3365 * The device is offline, just fail the command by
3366 * return TRAN_FATAL_ERROR.
3367 */
3369 }
3370 }
3374 }
3376 static int
3378 {
3391 }
3392 }
3394 /*
3395 * reset the throttle if we were draining
3396 */
3402 }
3404 /*
3405 * If HBA is being reset, the DevHandles are being re-initialized,
3406 * which means that they could be invalid even if the target is still
3407 * attached. Check if being reset and if DevHandle is being
3408 * re-initialized. If this is the case, return BUSY so the I/O can be
3409 * retried later.
3410 */
3419 }
3420 }
3422 /*
3423 * If device handle has already been invalidated, just
3424 * fail the command. In theory, command from scsi_vhci
3425 * client is impossible send down command with invalid
3426 * devhdl since devhdl is set after path offline, target
3427 * driver is not suppose to select a offlined path.
3428 */
3439 }
3440 }
3441 /*
3442 * The first case is the normal case. mpt gets a command from the
3443 * target driver and starts it.
3444 * Since SMID 0 is reserved and the TM slot is reserved, the actual max
3445 * commands is m_max_requests - 2.
3446 */
3457 }
3459 /*
3460 * Add this pkt to the work queue
3461 */
3467 /*
3468 * Only flush the doneq if this is not a TM
3469 * cmd. For TM cmds the flushing of the
3470 * doneq will be done in those routines.
3471 */
3474 }
3475 }
3476 }
3478 }
3480 int
3482 {
3489 /*
3490 * Account for reserved TM request slot and reserved SMID of 0.
3491 */
3494 /*
3495 * Find the next available slot, beginning at m_rotor. If no slot is
3496 * available, we'll return FALSE to indicate that. This mechanism
3497 * considers only the normal slots, not the reserved slot 0 nor the
3498 * task management slot m_n_normal + 1. The rotor is left to point to
3499 * the normal slot after the one we select, unless we select the last
3500 * normal slot in which case it returns to slot 1.
3501 */
3521 /*
3522 * only increment per target ncmds if this is not a
3523 * command that has no target associated with it (i.e. a
3524 * event acknoledgment)
3525 */
3527 /*
3528 * Expiration time is set in mptsas_start_cmd
3529 */
3533 /*
3534 * Initialize expiration time for passthrough commands,
3535 */
3538 }
3540 }
3542 /*
3543 * prepare the pkt:
3544 * the pkt may have been resubmitted or just reused so
3545 * initialize some fields and do some checks.
3546 */
3547 static int
3549 {
3554 /*
3555 * Reinitialize some fields that need it; the packet may
3556 * have been resubmitted
3557 */
3565 /*
3566 * zero status byte.
3567 */
3573 /*
3574 * consistent packets need to be sync'ed first
3575 * (only for data going out)
3576 */
3580 DDI_DMA_SYNC_FORDEV);
3581 }
3582 }
3589 }
3591 /*
3592 * tran_init_pkt(9E) - allocate scsi_pkt(9S) for command
3593 *
3594 * One of three possibilities:
3595 * - allocate scsi_pkt
3596 * - allocate scsi_pkt and DMA resources
3597 * - allocate DMA resources to an already-allocated pkt
3598 */
3603 {
3607 uint_t oldcookiec;
3616 tran_tgt_private;
3620 }
3629 #ifdef MPTSAS_TEST_EXTRN_ALLOC
3631 #endif
3637 /*
3638 * Allocate the new packet.
3639 */
3641 ddi_dma_handle_t save_dma_handle;
3663 }
3669 /*
3670 * if extern alloc fails, all will be
3671 * deallocated, including cmd
3672 */
3675 }
3677 /*
3678 * if extern allocation fails, it will
3679 * deallocate the new pkt as well
3680 */
3682 }
3683 }
3689 }
3692 /* grab cmd->cmd_cookiec here as oldcookiec */
3696 /*
3697 * If the dma was broken up into PARTIAL transfers cmd_nwin will be
3698 * greater than 0 and we'll need to grab the next dma window
3699 */
3700 /*
3701 * SLM-not doing extra command frame right now; may add later
3702 */
3706 /*
3707 * Make sure we havn't gone past the the total number
3708 * of windows
3709 */
3712 }
3717 }
3719 }
3724 }
3726 /*
3727 * DMA resource allocation. This version assumes your
3728 * HBA has some sort of bus-mastering or onboard DMA capability, with a
3729 * scatter-gather list of length MPTSAS_MAX_DMA_SEGS, as given in the
3730 * ddi_dma_attr_t structure and passed to scsi_impl_dmaget.
3731 */
3738 /*
3739 * Set up DMA memory and position to the next DMA segment.
3740 */
3749 }
3753 }
3757 }
3759 /*
3760 * workaround for byte hole issue on psycho and
3761 * schizo pre 2.1
3762 */
3767 }
3793 }
3797 }
3799 }
3801 get_dma_cookies:
3811 }
3813 }
3815 /*
3816 * Allocate extra SGL buffer if needed.
3817 */
3821 DDI_FAILURE) {
3827 }
3829 }
3830 }
3832 /*
3833 * Always use scatter-gather transfer
3834 * Use the loop below to store physical addresses of
3835 * DMA segments, from the DMA cookies, into your HBA's
3836 * scatter-gather list.
3837 * We need to ensure we have enough kmem alloc'd
3838 * for the sg entries since we are no longer using an
3839 * array inside mptsas_cmd_t.
3840 *
3841 * We check cmd->cmd_cookiec against oldcookiec so
3842 * the scatter-gather list is correctly allocated
3843 */
3848 oldcookiec);
3850 }
3851 }
3859 "unable to kmem_alloc enough memory "
3861 /*
3862 * if we have an ENOMEM condition we need to behave
3863 * the same way as the rest of this routine
3864 */
3869 }
3871 }
3872 }
3878 /*
3879 * store the first segment into the S/G list
3880 */
3887 /*
3888 * dmacount counts the size of the dma for this window
3889 * (if partial dma is being used). totaldmacount
3890 * keeps track of the total amount of dma we have
3891 * transferred for all the windows (needed to calculate
3892 * the resid value below).
3893 */
3897 /*
3898 * We already stored the first DMA scatter gather segment,
3899 * start at 1 if we need to store more.
3900 */
3902 /*
3903 * Get next DMA cookie
3904 */
3907 dmap++;
3912 /*
3913 * store the segment parms into the S/G list
3914 */
3920 }
3922 /*
3923 * If this was partially allocated we set the resid
3924 * the amount of data NOT transferred in this window
3925 * If there is only one window, the resid will be 0
3926 */
3930 }
3932 }
3934 /*
3935 * tran_destroy_pkt(9E) - scsi_pkt(9s) deallocation
3936 *
3937 * Notes:
3938 * - also frees DMA resources if allocated
3939 * - implicit DMA synchonization
3940 */
3941 static void
3943 {
3953 }
3958 }
3969 }
3970 }
3972 /*
3973 * kmem cache constructor and destructor:
3974 * When constructing, we bzero the cmd and allocate the dma handle
3975 * When destructing, just free the dma handle
3976 */
3977 static int
3979 {
3988 /*
3989 * allocate a dma handle
3990 */
3995 }
3997 }
3999 static void
4001 {
4002 #ifndef __lock_lint
4004 #endif
4012 }
4013 }
4015 static int
4017 {
4020 ddi_dma_attr_t frame_dma_attr;
4022 ddi_dma_cookie_t cookie;
4023 uint_t ncookie;
4036 }
4048 }
4059 }
4061 /*
4062 * Store the SGL memory address. This chip uses this
4063 * address to dma to and from the driver. The second
4064 * address is the address mpt uses to fill in the SGL.
4065 */
4069 }
4071 static void
4073 {
4074 #ifndef __lock_lint
4076 #endif
4086 }
4088 }
4090 /*
4091 * Figure out if we need to use a different method for the request
4092 * sense buffer and allocate from the map if necessary.
4093 */
4094 static boolean_t
4096 {
4100 /* Sense length is limited to an 8 bit value in MPI Spec. */
4117 }
4120 }
4122 /*
4123 * allocate and deallocate external pkt space (ie. not part of mptsas_cmd)
4124 * for non-standard length cdb, pkt_private, status areas
4125 * if allocation fails, then deallocate all external space and the pkt
4126 */
4127 /* ARGSUSED */
4128 static int
4131 {
4145 }
4148 }
4152 }
4155 }
4159 }
4163 /* allocate sense data buf for DMA */
4168 }
4170 fail:
4173 }
4175 /*
4176 * deallocate external pkt space and deallocate the pkt
4177 */
4178 static void
4180 {
4187 /* NOTREACHED */
4188 }
4192 }
4195 }
4198 }
4201 }
4204 }
4206 /*
4207 * tran_sync_pkt(9E) - explicit DMA synchronization
4208 */
4209 /*ARGSUSED*/
4210 static void
4212 {
4222 }
4223 }
4225 /*
4226 * tran_dmafree(9E) - deallocate DMA resources allocated for command
4227 */
4228 /*ARGSUSED*/
4229 static void
4231 {
4241 }
4244 }
4246 static void
4248 {
4252 DDI_DMA_SYNC_FORCPU);
4253 }
4255 }
4257 static void
4260 {
4261 pMpi2SGESimple64_t sge;
4278 MPI2_SGE_FLAGS_SYSTEM_ADDRESS |
4279 MPI2_SGE_FLAGS_64_BIT_ADDRESSING) <<
4280 MPI2_SGE_FLAGS_SHIFT);
4282 /*
4283 * If this is the last cookie, we set the flags
4284 * to indicate so
4285 */
4288 }
4291 MPI2_SGE_FLAGS_SHIFT);
4294 MPI2_SGE_FLAGS_SHIFT);
4295 }
4297 dmap++;
4298 sge++;
4299 }
4300 }
4302 static void
4305 {
4306 pMpi2SGESimple64_t sge;
4307 pMpi2SGEChain64_t sgechain;
4309 uint_t cookiec;
4313 /*
4314 * Save the number of entries in the DMA
4315 * Scatter/Gather list
4316 */
4319 /*
4320 * Hereby we start to deal with multiple frames.
4321 * The process is as follows:
4322 * 1. Determine how many frames are needed for SGL element
4323 * storage; Note that all frames are stored in contiguous
4324 * memory space and in 64-bit DMA mode each element is
4325 * 3 double-words (12 bytes) long.
4326 * 2. Fill up the main frame. We need to do this separately
4327 * since it contains the SCSI IO request header and needs
4328 * dedicated processing. Note that the last 4 double-words
4329 * of the SCSI IO header is for SGL element storage
4330 * (MPI2_SGE_IO_UNION).
4331 * 3. Fill the chain element in the main frame, so the DMA
4332 * engine can use the following frames.
4333 * 4. Enter a loop to fill the remaining frames. Note that the
4334 * last frame contains no chain element. The remaining
4335 * frames go into the mpt SGL buffer allocated on the fly,
4336 * not immediately following the main message frame, as in
4337 * Gen1.
4338 * Some restrictions:
4339 * 1. For 64-bit DMA, the simple element and chain element
4340 * are both of 3 double-words (12 bytes) in size, even
4341 * though all frames are stored in the first 4G of mem
4342 * range and the higher 32-bits of the address are always 0.
4343 * 2. On some controllers (like the 1064/1068), a frame can
4344 * hold SGL elements with the last 1 or 2 double-words
4345 * (4 or 8 bytes) un-used. On these controllers, we should
4346 * recognize that there's not enough room for another SGL
4347 * element and move the sge pointer to the next frame.
4348 */
4355 /*
4356 * Sgemax is the number of SGE's that will fit
4357 * each extra frame and frames is total
4358 * number of frames we'll need. 1 sge entry per
4359 * frame is reseverd for the chain element thus the -1 below.
4360 */
4365 /*
4366 * A little check to see if we need to round up the number
4367 * of frames we need
4368 */
4374 }
4378 /*
4379 * First fill in the main frame
4380 */
4384 MPI2_SGE_FLAGS_SHIFT));
4387 j++;
4389 /*
4390 * Fill in the chain element in the main frame.
4391 * About calculation on ChainOffset:
4392 * 1. Struct msg_scsi_io_request has 4 double-words (16 bytes)
4393 * in the end reserved for SGL element storage
4394 * (MPI2_SGE_IO_UNION); we should count it in our
4395 * calculation. See its definition in the header file.
4396 * 2. Constant j is the counter of the current SGL element
4397 * that will be processed, and (j - 1) is the number of
4398 * SGL elements that have been processed (stored in the
4399 * main frame).
4400 * 3. ChainOffset value should be in units of double-words (4
4401 * bytes) so the last value should be divided by 4.
4402 */
4409 MPI2_SGE_FLAGS_SYSTEM_ADDRESS |
4410 MPI2_SGE_FLAGS_64_BIT_ADDRESSING);
4413 /*
4414 * The size of the next frame is the accurate size of space
4415 * (in bytes) used to store the SGL elements. j is the counter
4416 * of SGL elements. (j - 1) is the number of SGL elements that
4417 * have been processed (stored in frames).
4418 */
4427 }
4435 /*
4436 * If there are more than 2 frames left we have to
4437 * fill in the next chain offset to the location of
4438 * the chain element in the next frame.
4439 * sgemax is the number of simple elements in an extra
4440 * frame. Note that the value NextChainOffset should be
4441 * in double-words (4 bytes).
4442 */
4448 }
4450 /*
4451 * Jump to next frame;
4452 * Starting here, chain buffers go into the per command SGL.
4453 * This buffer is allocated when chain buffers are needed.
4454 */
4458 /*
4459 * Start filling in frames with SGE's. If we
4460 * reach the end of frame and still have SGE's
4461 * to fill we need to add a chain element and
4462 * use another frame. j will be our counter
4463 * for what cookie we are at and i will be
4464 * the total cookiec. k is the current frame
4465 */
4469 /*
4470 * If we have reached the end of frame
4471 * and we have more SGE's to fill in
4472 * we have to fill the final entry
4473 * with a chain element and then
4474 * continue to the next frame
4475 */
4478 j--;
4479 chainflags = (
4480 MPI2_SGE_FLAGS_CHAIN_ELEMENT |
4481 MPI2_SGE_FLAGS_SYSTEM_ADDRESS |
4482 MPI2_SGE_FLAGS_64_BIT_ADDRESSING);
4485 /*
4486 * k is the frame counter and (k + 1)
4487 * is the number of the next frame.
4488 * Note that frames are in contiguous
4489 * memory space.
4490 */
4495 nframe_phys_addr);
4500 /*
4501 * If there are more than 2 frames left
4502 * we have to next chain offset to
4503 * the location of the chain element
4504 * in the next frame and fill in the
4505 * length of the next chain
4506 */
4519 /*
4520 * This is the last frame. Set
4521 * the NextChainOffset to 0 and
4522 * Length is the total size of
4523 * all remaining simple elements
4524 */
4532 }
4534 /* Jump to the next frame */
4540 }
4553 MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
4554 MPI2_SGE_FLAGS_SYSTEM_ADDRESS |
4555 MPI2_SGE_FLAGS_64_BIT_ADDRESSING) <<
4556 MPI2_SGE_FLAGS_SHIFT);
4558 /*
4559 * If we are at the end of the frame and
4560 * there is another frame to fill in
4561 * we set the last simple element as last
4562 * element
4563 */
4567 MPI2_SGE_FLAGS_SHIFT);
4568 }
4570 /*
4571 * If this is the final cookie we
4572 * indicate it by setting the flags
4573 */
4577 MPI2_SGE_FLAGS_END_OF_BUFFER |
4578 MPI2_SGE_FLAGS_END_OF_LIST) <<
4579 MPI2_SGE_FLAGS_SHIFT);
4580 }
4582 flags |=
4584 MPI2_SGE_FLAGS_SHIFT);
4586 flags |=
4588 MPI2_SGE_FLAGS_SHIFT);
4589 }
4592 dmap++;
4593 sge++;
4594 }
4595 }
4597 /*
4598 * Sync DMA with the chain buffers that were just created
4599 */
4601 }
4603 static void
4606 {
4607 pMpi2IeeeSgeSimple64_t ieeesge;
4626 MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR);
4628 /*
4629 * If this is the last cookie, we set the flags
4630 * to indicate so
4631 */
4634 }
4637 dmap++;
4638 ieeesge++;
4639 }
4640 }
4642 static void
4645 {
4646 pMpi2IeeeSgeSimple64_t ieeesge;
4647 pMpi25IeeeSgeChain64_t ieeesgechain;
4649 uint_t cookiec;
4653 /*
4654 * Save the number of entries in the DMA
4655 * Scatter/Gather list
4656 */
4661 /*
4662 * Hereby we start to deal with multiple frames.
4663 * The process is as follows:
4664 * 1. Determine how many frames are needed for SGL element
4665 * storage; Note that all frames are stored in contiguous
4666 * memory space and in 64-bit DMA mode each element is
4667 * 4 double-words (16 bytes) long.
4668 * 2. Fill up the main frame. We need to do this separately
4669 * since it contains the SCSI IO request header and needs
4670 * dedicated processing. Note that the last 4 double-words
4671 * of the SCSI IO header is for SGL element storage
4672 * (MPI2_SGE_IO_UNION).
4673 * 3. Fill the chain element in the main frame, so the DMA
4674 * engine can use the following frames.
4675 * 4. Enter a loop to fill the remaining frames. Note that the
4676 * last frame contains no chain element. The remaining
4677 * frames go into the mpt SGL buffer allocated on the fly,
4678 * not immediately following the main message frame, as in
4679 * Gen1.
4680 * Restrictions:
4681 * For 64-bit DMA, the simple element and chain element
4682 * are both of 4 double-words (16 bytes) in size, even
4683 * though all frames are stored in the first 4G of mem
4684 * range and the higher 32-bits of the address are always 0.
4685 */
4692 /*
4693 * Sgemax is the number of SGE's that will fit
4694 * each extra frame and frames is total
4695 * number of frames we'll need. 1 sge entry per
4696 * frame is reseverd for the chain element thus the -1 below.
4697 */
4702 /*
4703 * A little check to see if we need to round up the number
4704 * of frames we need
4705 */
4711 }
4716 /*
4717 * First fill in the main frame
4718 */
4723 j++;
4725 /*
4726 * Fill in the chain element in the main frame.
4727 * About calculation on ChainOffset:
4728 * 1. Struct msg_scsi_io_request has 4 double-words (16 bytes)
4729 * in the end reserved for SGL element storage
4730 * (MPI2_SGE_IO_UNION); we should count it in our
4731 * calculation. See its definition in the header file.
4732 * 2. Constant j is the counter of the current SGL element
4733 * that will be processed, and (j - 1) is the number of
4734 * SGL elements that have been processed (stored in the
4735 * main frame).
4736 * 3. ChainOffset value should be in units of quad-words (16
4737 * bytes) so the last value should be divided by 16.
4738 */
4745 MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR);
4748 /*
4749 * The size of the next frame is the accurate size of space
4750 * (in bytes) used to store the SGL elements. j is the counter
4751 * of SGL elements. (j - 1) is the number of SGL elements that
4752 * have been processed (stored in frames).
4753 */
4763 }
4771 /*
4772 * If there are more than 2 frames left we have to
4773 * fill in the next chain offset to the location of
4774 * the chain element in the next frame.
4775 * sgemax is the number of simple elements in an extra
4776 * frame. Note that the value NextChainOffset should be
4777 * in double-words (4 bytes).
4778 */
4784 }
4786 /*
4787 * Jump to next frame;
4788 * Starting here, chain buffers go into the per command SGL.
4789 * This buffer is allocated when chain buffers are needed.
4790 */
4794 /*
4795 * Start filling in frames with SGE's. If we
4796 * reach the end of frame and still have SGE's
4797 * to fill we need to add a chain element and
4798 * use another frame. j will be our counter
4799 * for what cookie we are at and i will be
4800 * the total cookiec. k is the current frame
4801 */
4805 /*
4806 * If we have reached the end of frame
4807 * and we have more SGE's to fill in
4808 * we have to fill the final entry
4809 * with a chain element and then
4810 * continue to the next frame
4811 */
4814 j--;
4815 chainflags =
4816 MPI2_IEEE_SGE_FLAGS_CHAIN_ELEMENT |
4817 MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR;
4820 /*
4821 * k is the frame counter and (k + 1)
4822 * is the number of the next frame.
4823 * Note that frames are in contiguous
4824 * memory space.
4825 */
4830 nframe_phys_addr);
4835 /*
4836 * If there are more than 2 frames left
4837 * we have to next chain offset to
4838 * the location of the chain element
4839 * in the next frame and fill in the
4840 * length of the next chain
4841 */
4856 /*
4857 * This is the last frame. Set
4858 * the NextChainOffset to 0 and
4859 * Length is the total size of
4860 * all remaining simple elements
4861 */
4869 }
4871 /* Jump to the next frame */
4877 }
4888 MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR);
4890 /*
4891 * If we are at the end of the frame and
4892 * there is another frame to fill in
4893 * do we need to do anything?
4894 * if ((l == sgemax) && (k != frames)) {
4895 * }
4896 */
4898 /*
4899 * If this is the final cookie set end of list.
4900 */
4903 }
4906 dmap++;
4907 ieeesge++;
4908 }
4909 }
4911 /*
4912 * Sync DMA with the chain buffers that were just created
4913 */
4915 }
4917 static void
4920 {
4925 /*
4926 * Set read/write bit in control.
4927 */
4932 }
4936 /*
4937 * We have 4 cases here. First where we can fit all the
4938 * SG elements into the main frame, and the case
4939 * where we can't. The SG element is also different when using
4940 * MPI2.5 interface.
4941 * If we have more cookies than we can attach to a frame
4942 * we will need to use a chain element to point
4943 * a location of memory where the rest of the S/G
4944 * elements reside.
4945 */
4950 MPI25_IEEE_SGE_FLAGS_END_OF_LIST);
4955 | MPI2_SGE_FLAGS_END_OF_BUFFER
4957 MPI2_SGE_FLAGS_SHIFT));
4958 }
4964 }
4965 }
4966 }
4968 /*
4969 * Interrupt handling
4970 * Utility routine. Poll for status of a command sent to HBA
4971 * without interrupts (a FLAG_NOINTR command).
4972 */
4973 int
4975 {
4982 }
4984 /*
4985 * Wait, using drv_usecwait(), long enough for the command to
4986 * reasonably return from the target if the target isn't
4987 * "dead". A polled command may well be sent from scsi_poll, and
4988 * there are retries built in to scsi_poll if the transport
4989 * accepted the packet (TRAN_ACCEPT). scsi_poll waits 1 second
4990 * and retries the transport up to scsi_poll_busycnt times
4991 * (currently 60) if
4992 * 1. pkt_reason is CMD_INCOMPLETE and pkt_state is 0, or
4993 * 2. pkt_reason is CMD_CMPLT and *pkt_scbp has STATUS_BUSY
4994 *
4995 * limit the waiting to avoid a hang in the event that the
4996 * cmd never gets started but we are still receiving interrupts
4997 */
5003 }
5004 }
5008 /*
5009 * this isn't supposed to happen, the hba must be wedged
5010 * Mark this cmd as a timeout.
5011 */
5023 /* find and remove it from the waitq */
5026 }
5028 }
5032 }
5034 /*
5035 * Used for polling cmds and TM function
5036 */
5037 static int
5039 {
5041 pMpi2ReplyDescriptorsUnion_t reply_desc_union;
5048 /*
5049 * Get the current interrupt mask and disable interrupts. When
5050 * re-enabling ints, set mask to saved value.
5051 */
5055 /*
5056 * Keep polling for at least (polltime * 1000) seconds
5057 */
5060 DDI_DMA_SYNC_FORCPU);
5071 }
5073 /*
5074 * The reply is valid, process it according to its
5075 * type.
5076 */
5081 }
5083 /*
5084 * Update the global reply index
5085 */
5090 /*
5091 * Re-enable interrupts and quit.
5092 */
5094 int_mask);
5097 }
5099 /*
5100 * Clear polling flag, re-enable interrupts and quit.
5101 */
5105 }
5107 static void
5109 pMpi2ReplyDescriptorsUnion_t reply_desc)
5110 {
5111 pMpi2SCSIIOSuccessReplyDescriptor_t scsi_io_success;
5122 /*
5123 * This is a success reply so just complete the IO. First, do a sanity
5124 * check on the SMID. The final slot is used for TM requests, which
5125 * would not come into this reply handler.
5126 */
5129 SMID);
5132 }
5136 /*
5137 * print warning and return if the slot is empty
5138 */
5143 }
5147 STATE_GOT_STATUS);
5150 }
5159 }
5162 /*
5163 * The target returned QFULL or busy, do not add tihs
5164 * pkt to the doneq since the hba will retry
5165 * this cmd.
5166 *
5167 * The pkt has already been resubmitted in
5168 * mptsas_handle_qfull() or in mptsas_check_scsi_io_error().
5169 * Remove this cmd_flag here.
5170 */
5174 }
5175 }
5177 static void
5179 pMpi2ReplyDescriptorsUnion_t reply_desc)
5180 {
5181 pMpi2AddressReplyDescriptor_t address_reply;
5182 pMPI2DefaultReply_t reply;
5199 /*
5200 * If reply frame is not in the proper range we should ignore this
5201 * message and exit the interrupt handler.
5202 */
5213 }
5216 DDI_DMA_SYNC_FORCPU);
5218 reply_frame_dma_baseaddr));
5224 /*
5225 * don't get slot information and command for events since these values
5226 * don't exist
5227 */
5230 /*
5231 * This could be a TM reply, which use the last allocated SMID,
5232 * so allow for that.
5233 */
5238 DDI_SERVICE_UNAFFECTED);
5240 }
5244 /*
5245 * print warning and return if the slot is empty
5246 */
5251 }
5262 }
5264 }
5265 /*
5266 * Depending on the function, we need to handle
5267 * the reply frame (and cmd) differently.
5268 */
5276 cmd);
5289 /*
5290 * Record the event if its type is enabled in
5291 * this mpt instance by ioctl.
5292 */
5295 /*
5296 * Handle time critical events
5297 * NOT_RESPONDING/ADDED only now
5298 */
5300 /*
5301 * Would not return main process,
5302 * just let taskq resolve ack action
5303 * and ack would be sent in taskq thread
5304 */
5306 }
5311 }
5317 /*
5318 * Return the reply frame to the free queue.
5319 */
5324 DDI_DMA_SYNC_FORDEV);
5327 }
5331 }
5334 /*
5335 * If SMID is 0, this implies that the reply is due to a
5336 * release function with a status that the buffer has been
5337 * released. Set the buffer flags accordingly.
5338 */
5345 pBuffer =
5350 }
5352 /*
5353 * Normal handling of diag post reply with SMID.
5354 */
5357 /*
5358 * print warning and return if the slot is empty
5359 */
5364 }
5368 }
5373 }
5375 /*
5376 * Return the reply frame to the free queue.
5377 */
5380 reply_addr);
5382 DDI_DMA_SYNC_FORDEV);
5385 }
5393 /*
5394 * The target returned QFULL or busy, do not add this
5395 * pkt to the doneq since the hba will retry
5396 * this cmd.
5397 *
5398 * The pkt has already been resubmitted in
5399 * mptsas_handle_qfull() or in mptsas_check_scsi_io_error().
5400 * Remove this cmd_flag here.
5401 */
5405 }
5406 }
5408 #ifdef MPTSAS_DEBUG
5410 #endif
5412 static void
5415 {
5442 }
5449 scsi_state);
5450 }
5459 /*
5460 * if loginfo PL_LOGINFO_CODE_IO_DEVICE_MISSING_DELAY_RETRY
5461 * 0x31170000 comes, that means the device missing delay
5462 * is in progressing, the command need retry later.
5463 */
5466 }
5470 MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE)) {
5475 DRAIN_THROTTLE);
5476 }
5478 }
5486 }
5487 }
5500 }
5503 }
5512 DDI_DMA_SYNC_FORKERNEL);
5513 #ifdef MPTSAS_DEBUG
5517 #endif
5520 cmd_rqs_len));
5523 /*
5524 * Set proper status for pkt if autosense was valid
5525 */
5529 }
5531 /*
5532 * ASC=0x47 is parity error
5533 * ASC=0x48 is initiator detected error received
5534 */
5539 }
5541 /*
5542 * ASC/ASCQ=0x3F/0x0E means report_luns data changed
5543 * ASC/ASCQ=0x25/0x00 means invalid lun
5544 */
5555 KM_NOSLEEP);
5558 "resource for handle SAS dynamic"
5561 }
5570 mptsas_handle_dr,
5576 "for handle SAS dynamic reconfigure"
5578 }
5579 }
5588 }
5610 }
5614 /*
5615 * When timeout requested, propagate
5616 * proper reason and statistics to
5617 * target drivers.
5618 */
5623 STAT_BUS_RESET);
5624 }
5639 /*
5640 * set throttles to drain
5641 */
5645 }
5647 /*
5648 * retry command
5649 */
5662 }
5679 }
5680 }
5682 static void
5685 {
5703 }
5716 /*
5717 * Check for invalid DevHandle of 0 in case application
5718 * sends bad command. DevHandle of 0 could cause problems.
5719 */
5725 task_type);
5726 }
5730 task_type);
5733 }
5734 }
5736 static void
5738 {
5749 }
5754 }
5758 }
5760 }
5766 }
5769 /*
5770 * mpt interrupt handler.
5771 */
5772 static uint_t
5774 {
5776 pMpi2ReplyDescriptorsUnion_t reply_desc_union;
5783 /*
5784 * If interrupts are shared by two channels then check whether this
5785 * interrupt is genuinely for this channel by making sure first the
5786 * chip is in high power state.
5787 */
5792 }
5794 /*
5795 * If polling, interrupt was triggered by some shared interrupt because
5796 * IOC interrupts are disabled during polling, so polling routine will
5797 * handle any replies. Considering this, if polling is happening,
5798 * return with interrupt unclaimed.
5799 */
5804 }
5806 /*
5807 * Read the istat register.
5808 */
5810 /*
5811 * read fifo until empty.
5812 */
5813 #ifndef __lock_lint
5815 #endif
5818 DDI_DMA_SYNC_FORCPU);
5827 }
5829 /*
5830 * The reply is valid, process it according to its
5831 * type. Also, set a flag for updating the reply index
5832 * after they've all been processed.
5833 */
5838 /*
5839 * Increment post index and roll over if needed.
5840 */
5843 }
5844 }
5846 /*
5847 * Update the global reply index if at least one reply was
5848 * processed.
5849 */
5853 }
5857 }
5860 /*
5861 * If no helper threads are created, process the doneq in ISR. If
5862 * helpers are created, use the doneq length as a metric to measure the
5863 * load on the interrupt CPU. If it is long enough, which indicates the
5864 * load is heavy, then we deliver the IO completions to the helpers.
5865 * This measurement has some limitations, although it is simple and
5866 * straightforward and works well for most of the cases at present.
5867 */
5873 }
5875 /*
5876 * If there are queued cmd, start them now.
5877 */
5880 }
5884 }
5886 static void
5888 pMpi2ReplyDescriptorsUnion_t reply_desc_union)
5889 {
5894 /*
5895 * The reply is valid, process it according to its
5896 * type. Also, set a flag for updated the reply index
5897 * after they've all been processed.
5898 */
5910 }
5912 /*
5913 * Clear the reply descriptor for re-use and increment
5914 * index.
5915 */
5920 DDI_DMA_SYNC_FORDEV);
5921 }
5923 /*
5924 * handle qfull condition
5925 */
5926 static void
5928 {
5933 /*
5934 * We have exhausted the retries on QFULL, or,
5935 * the target driver has indicated that it
5936 * wants to handle QFULL itself by setting
5937 * qfull-retries capability to 0. In either case
5938 * we want the target driver's QFULL handling
5939 * to kick in. We do this by having pkt_reason
5940 * as CMD_CMPLT and pkt_scbp as STATUS_QFULL.
5941 */
5947 }
5955 /*
5956 * when target gives queue full status with no commands
5957 * outstanding (m_t_ncmds == 0), throttle is set to 0
5958 * (HOLD_THROTTLE), and the queue full handling start
5959 * (see psarc/1994/313); if there are commands outstanding,
5960 * throttle is set to (m_t_ncmds - 2)
5961 */
5963 /*
5964 * By setting throttle to QFULL_THROTTLE, we
5965 * avoid submitting new commands and in
5966 * mptsas_restart_cmd find out slots which need
5967 * their throttles to be cleared.
5968 */
5974 }
5975 }
5976 }
5977 }
5979 mptsas_phymask_t
5981 {
5989 /*
5990 * If physport is 0xFF, this is a RAID volume. Use phymask of 0.
5991 */
5994 }
6002 }
6003 }
6007 }
6009 /*
6010 * mpt free device handle after device gone, by use of passthrough
6011 */
6012 static int
6014 {
6015 Mpi2SasIoUnitControlRequest_t req;
6016 Mpi2SasIoUnitControlReply_t rep;
6021 /*
6022 * Need to compose a SAS IO Unit Control request message
6023 * and call mptsas_do_passthru() function
6024 */
6038 }
6040 /* do passthrough success, check the ioc status */
6045 }
6048 }
6050 static void
6052 {
6083 }
6084 }
6090 }
6091 }
6096 /*
6097 * register a iport, if the port has already been existed
6098 * SCSA will do nothing and just return.
6099 */
6102 }
6105 }
6107 /*
6108 * mptsas_handle_dr is a task handler for DR, the DR action includes:
6109 * 1. Directly attched Device Added/Removed.
6110 * 2. Expander Device Added/Removed.
6111 * 3. Indirectly Attached Device Added/Expander.
6112 * 4. LUNs of a existing device status change.
6113 * 5. RAID volume created/deleted.
6114 * 6. Member of RAID volume is released because of RAID deletion.
6115 * 7. Physical disks are removed because of RAID creation.
6116 */
6117 static void
6127 uint_t event;
6144 /*
6145 * Direct attached or expander attached device added
6146 * into system or a Phys Disk that is being unhidden.
6147 */
6149 }
6152 /*
6153 * New expander added into system, it must be the head
6154 * of topo_change_list_t
6155 */
6161 }
6162 /*
6163 * All cases port_update == 1 may cause initiator port form change
6164 */
6167 /*
6168 * mpt->m_port_chng flag indicates some PHYs of initiator
6169 * port have changed to online. So when expander added or
6170 * directly attached device online event come, we force to
6171 * update port information by issueing SAS IO Unit Page and
6172 * update PHYMASKs.
6173 */
6177 }
6186 MPTSAS_DR_EVENT_OFFLINE_SMP)) {
6187 /*
6188 * For all offline events, phymask is known
6189 */
6192 }
6195 }
6199 }
6202 MPTSAS_TOPO_FLAG_RAID_PHYSDRV_ASSOCIATED) &&
6204 /*
6205 * There is no any field in IR_CONFIG_CHANGE
6206 * event indicate physport/phynum, let's get
6207 * parent after SAS Device Page0 request.
6208 */
6210 }
6214 /*
6215 * If the direct attached device added or a
6216 * phys disk is being unhidden, argument
6217 * physport actually is PHY#, so we have to get
6218 * phymask according PHY#.
6219 */
6221 }
6223 /*
6224 * Translate physport to phymask so that we can search
6225 * parent dip.
6226 */
6228 physport);
6231 find_parent:
6233 /*
6234 * For RAID topology change node, write the iport name
6235 * as v0.
6236 */
6240 /*
6241 * phymask can bo 0 if the drive has been
6242 * pulled by the time an add event is
6243 * processed. If phymask is 0, just skip this
6244 * event and continue.
6245 */
6257 }
6259 }
6261 phy_mask_name);
6266 }
6268 }
6270 handle_topo_change:
6273 /*
6274 * If HBA is being reset, don't perform operations depending
6275 * on the IOC. We must free the topo list, however.
6276 */
6279 else
6290 /*
6291 * If direct attached device associated, make sure
6292 * reset the parent before start the next one. But
6293 * all devices associated with expander shares the
6294 * parent. Also, reset parent if this is for RAID.
6295 */
6297 }
6298 }
6299 out:
6301 }
6303 static void
6306 {
6329 {
6334 /*
6335 * Get latest RAID info.
6336 */
6344 }
6347 /*
6348 * If a Phys Disk was deleted, RAID info needs to be
6349 * updated to reflect the new topology.
6350 */
6353 /*
6354 * Get sas device page 0 by DevHandle to make sure if
6355 * SSP/SATA end device exist.
6356 */
6358 MPI2_SAS_DEVICE_PGAD_FORM_MASK) |
6365 "mptsas_handle_topo_change: target %d is "
6370 "mptsas_handle_topo_change: could not "
6372 }
6373 /*
6374 * If rval is DEV_INFO_PHYS_DISK than there is nothing
6375 * else to do, just leave.
6376 */
6379 }
6380 }
6392 phy_mask_name);
6399 }
6400 }
6408 /*
6409 * hold nexus for bus configure
6410 */
6414 /*
6415 * release nexus for bus configure
6416 */
6420 /*
6421 * Add parent's props for SMHBA support
6422 */
6429 parent,
6430 SCSI_ADDR_PROP_ATTACHED_PORT,
6431 attached_wwnstr)
6434 parent,
6435 SCSI_ADDR_PROP_ATTACHED_PORT);
6439 }
6442 DDI_PROP_SUCCESS) {
6448 }
6450 /*
6451 * Update PHY info for smhba
6452 */
6459 }
6462 /*
6463 * topo_node->un.physport is really the PHY#
6464 * for direct attached devices
6465 */
6471 DDI_PROP_SUCCESS) {
6475 "mptsas virtual-port"
6478 }
6479 }
6480 }
6487 }
6489 {
6505 }
6510 MPTSAS_TOPO_FLAG_RAID_PHYSDRV_ASSOCIATED)) {
6511 /*
6512 * Get latest RAID info if RAID volume status changes
6513 * or Phys Disk status changes
6514 */
6516 }
6517 /*
6518 * Abort all outstanding command on the device
6519 */
6526 }
6541 /*
6542 * Clear parent's props for SMHBA support
6543 */
6549 DDI_PROP_SUCCESS) {
6551 SCSI_ADDR_PROP_ATTACHED_PORT);
6555 }
6558 DDI_PROP_SUCCESS) {
6560 MPTSAS_NUM_PHYS);
6564 }
6567 DDI_PROP_SUCCESS) {
6569 MPTSAS_VIRTUAL_PORT);
6573 }
6574 }
6583 /*
6584 * clean DR_INTRANSITION flag to allow I/O down to
6585 * PHCI driver since failover finished.
6586 * Invalidate the devhdl
6587 */
6593 }
6595 /*
6596 * Send SAS IO Unit Control to free the dev handle
6597 */
6604 rval));
6605 }
6608 }
6610 {
6612 /*
6613 * If this is the remove handle event, do a reset first.
6614 */
6621 }
6622 }
6624 /*
6625 * Send SAS IO Unit Control to free the dev handle
6626 */
6630 rval));
6632 }
6634 {
6635 mptsas_smp_t smp;
6647 }
6652 }
6661 }
6663 {
6671 /*
6672 * The mptsas_smp_t data is released only if the dip is offlined
6673 * successfully.
6674 */
6683 DEVINFO_DIRECT_ATTACHED) {
6686 DDI_PROP_SUCCESS) {
6688 MPTSAS_VIRTUAL_PORT);
6692 }
6693 /*
6694 * Check whether the smp connected to the iport,
6695 */
6698 DDI_PROP_SUCCESS) {
6700 MPTSAS_NUM_PHYS);
6704 }
6705 /*
6706 * Clear parent's attached-port props
6707 */
6711 DDI_PROP_SUCCESS) {
6713 SCSI_ADDR_PROP_ATTACHED_PORT);
6717 }
6718 }
6727 }
6732 }
6735 }
6736 }
6738 /*
6739 * Record the event if its type is enabled in mpt instance by ioctl.
6740 */
6741 static void
6743 {
6745 pMpi2EventNotificationReply_t eventreply;
6762 /*
6763 * Generate a system event to let anyone who cares know that a
6764 * LOG_ENTRY_ADDED event has occurred. This is sent no matter what the
6765 * event mask is set to.
6766 */
6769 }
6771 /*
6772 * Record the event only if it is not masked. Determine which dword
6773 * and bit of event mask to test.
6774 */
6786 /*
6787 * Limit data to size in m_event entry
6788 */
6791 }
6796 }
6798 /*
6799 * check for index wrap-around
6800 */
6803 }
6806 /*
6807 * Set flag to send the event.
6808 */
6810 }
6811 }
6813 /*
6814 * Generate a system event if flag is set to let anyone who cares know
6815 * that an event has occurred.
6816 */
6820 }
6821 }
6823 #define SMP_RESET_IN_PROGRESS MPI2_EVENT_SAS_TOPO_LR_SMP_RESET_IN_PROGRESS
6824 /*
6825 * handle sync events from ioc in interrupt
6826 * return value:
6827 * DDI_SUCCESS: The event is handled by this func
6828 * DDI_FAILURE: Event is not handled
6829 */
6830 static int
6832 {
6834 pMpi2EventNotificationReply_t eventreply;
6837 uint_t iocstatus;
6854 "!mptsas_handle_event_sync: event 0x%x, "
6855 "IOCStatus=0x%x, "
6861 "mptsas_handle_event_sync: event 0x%x, "
6862 "IOCStatus=0x%x, "
6866 }
6867 }
6869 /*
6870 * figure out what kind of event we got and handle accordingly
6871 */
6874 {
6875 pMpi2EventDataSasTopologyChangeList_t sas_topo_change_list;
6914 /*
6915 * New expander device added
6916 */
6920 KM_SLEEP);
6932 }
6944 KM_SLEEP);
6957 }
6967 }
6970 }
6981 /*
6982 * Filter out processing of Phy Vacant Status unless
6983 * the reason code is "Not Responding". Process all
6984 * other combinations of Phy Status and Reason Codes.
6985 */
6987 MPI2_EVENT_SAS_TOPO_PHYSTATUS_VACANT) &&
6989 MPI2_EVENT_SAS_TOPO_RC_TARG_NOT_RESPONDING)) {
6991 }
6997 {
7004 MPI2_EVENT_SAS_TOPO_LR_CURRENT_MASK) >>
7005 MPI2_EVENT_SAS_TOPO_LR_CURRENT_SHIFT;
7042 }
7043 /*
7044 * New target device added into the system.
7045 * Set association flag according to if an
7046 * expander is used or not.
7047 */
7048 exp_flag =
7049 MPTSAS_TOPO_FLAG_EXPANDER_ATTACHED_DEVICE;
7051 MPTSAS_TOPO_FLAG_EXPANDER_ASSOCIATED) {
7053 }
7056 KM_SLEEP);
7059 MPTSAS_DR_EVENT_RECONFIG_TARGET;
7061 /*
7062 * Per MPI 2, if expander dev handle
7063 * is 0, it's a directly attached
7064 * device. So driver use PHY to decide
7065 * which iport is associated
7066 */
7069 }
7079 }
7081 }
7083 {
7087 /*
7088 * Set association flag according to if an
7089 * expander is used or not.
7090 */
7091 exp_flag =
7092 MPTSAS_TOPO_FLAG_EXPANDER_ATTACHED_DEVICE;
7094 MPTSAS_TOPO_FLAG_EXPANDER_ASSOCIATED) {
7096 }
7097 /*
7098 * Target device is removed from the system
7099 * Before the device is really offline from
7100 * from system.
7101 */
7104 /*
7105 * If ptgt is NULL here, it means that the
7106 * DevHandle is not in the hash table. This is
7107 * reasonable sometimes. For example, if a
7108 * disk was pulled, then added, then pulled
7109 * again, the disk will not have been put into
7110 * the hash table because the add event will
7111 * have an invalid phymask. BUT, this does not
7112 * mean that the DevHandle is invalid. The
7113 * controller will still have a valid DevHandle
7114 * that must be removed. To do this, use the
7115 * MPTSAS_TOPO_FLAG_REMOVE_HANDLE event.
7116 */
7120 KM_SLEEP);
7124 MPTSAS_TOPO_FLAG_REMOVE_HANDLE;
7130 topo_node;
7134 }
7136 }
7138 /*
7139 * Update DR flag immediately avoid I/O failure
7140 * before failover finish. Pay attention to the
7141 * mutex protect, we need grab m_tx_waitq_mutex
7142 * during set m_dr_flag because we won't add
7143 * the following command into waitq, instead,
7144 * we need return TRAN_BUSY in the tran_start
7145 * context.
7146 */
7153 KM_SLEEP);
7158 MPTSAS_DR_EVENT_OFFLINE_TARGET;
7167 }
7169 }
7174 MPI2_EVENT_SAS_TOPO_LR_CURRENT_MASK) >>
7175 MPI2_EVENT_SAS_TOPO_LR_CURRENT_SHIFT;
7182 ESC_SAS_PHY_EVENT,
7183 SAS_PHY_REMOVE,
7186 negotiated_link_rate
7193 ESC_SAS_PHY_EVENT,
7194 SAS_PHY_OFFLINE,
7211 }
7213 ESC_SAS_PHY_EVENT,
7214 SAS_PHY_ONLINE,
7223 }
7225 ESC_SAS_PHY_EVENT,
7226 SAS_PHY_ONLINE,
7235 }
7237 ESC_SAS_PHY_EVENT,
7238 SAS_PHY_ONLINE,
7247 }
7249 ESC_SAS_PHY_EVENT,
7250 SAS_PHY_ONLINE,
7257 }
7260 MPI2_EVENT_SAS_TOPO_LR_PREV_MASK) >>
7261 MPI2_EVENT_SAS_TOPO_LR_PREV_SHIFT;
7296 }
7304 "target not responding, delaying "
7307 }
7310 prev));
7311 }
7313 /*
7314 * Launch DR taskq to handle topology change
7315 */
7324 }
7327 }
7328 }
7330 }
7332 {
7360 {
7366 KM_SLEEP);
7370 MPTSAS_DR_EVENT_RECONFIG_TARGET;
7374 MPTSAS_TOPO_FLAG_RAID_ASSOCIATED;
7381 }
7383 }
7386 {
7394 /*
7395 * Clear any flags related to volume
7396 */
7399 /*
7400 * Update DR flag immediately avoid I/O failure
7401 */
7408 KM_SLEEP);
7413 MPTSAS_DR_EVENT_OFFLINE_TARGET;
7416 MPTSAS_TOPO_FLAG_RAID_ASSOCIATED;
7423 }
7425 }
7428 {
7434 /*
7435 * Update DR flag immediately avoid I/O failure
7436 */
7443 KM_SLEEP);
7448 MPTSAS_DR_EVENT_OFFLINE_TARGET;
7451 MPTSAS_TOPO_FLAG_RAID_PHYSDRV_ASSOCIATED;
7458 }
7460 }
7463 {
7464 /*
7465 * The physical drive is released by a IR
7466 * volume. But we cannot get the the physport
7467 * or phynum from the event data, so we only
7468 * can get the physport/phynum after SAS
7469 * Device Page0 request for the devhdl.
7470 */
7473 KM_SLEEP);
7477 MPTSAS_DR_EVENT_RECONFIG_TARGET;
7480 MPTSAS_TOPO_FLAG_RAID_PHYSDRV_ASSOCIATED;
7488 }
7490 }
7493 }
7494 }
7497 /*
7498 * Launch DR taskq to handle topology change
7499 */
7508 }
7511 }
7512 }
7514 }
7517 }
7520 }
7522 /*
7523 * handle events from ioc
7524 */
7525 static void
7527 {
7529 pMpi2EventNotificationReply_t eventreply;
7534 uint_t iocstatus;
7541 /*
7542 * If HBA is being reset, drop incoming event.
7543 */
7548 }
7559 "!mptsas_handle_event: IOCStatus=0x%x, "
7565 "mptsas_handle_event: IOCStatus=0x%x, "
7569 }
7570 }
7572 /*
7573 * figure out what kind of event we got and handle accordingly
7574 */
7582 iocloginfo));
7591 {
7596 sasdiscovery =
7617 }
7623 }
7628 {
7629 pMpi2EventDataTaskSetFull_t taskfull;
7637 }
7639 {
7640 /*
7641 * SAS TOPOLOGY CHANGE LIST Event has already been handled
7642 * in mptsas_handle_event_sync() of interrupt context
7643 */
7645 }
7647 {
7648 pMpi2EventDataSasEnclDevStatusChange_t encstatus;
7666 }
7672 }
7674 /*
7675 * MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE is handled by
7676 * mptsas_handle_event_sync,in here just send ack message.
7677 */
7679 {
7680 pMpi2EventDataSasDeviceStatusChange_t statuschange;
7699 wwn));
7751 }
7753 }
7755 {
7756 /*
7757 * IR TOPOLOGY CHANGE LIST Event has already been handled
7758 * in mpt_handle_event_sync() of interrupt context
7759 */
7761 }
7763 {
7791 rc);
7792 }
7798 }
7800 {
7801 pMpi2EventDataSasBroadcastPrimitive_t sas_broadcast;
7816 ESC_SAS_HBA_PORT_BROADCAST,
7817 SAS_PORT_BROADCAST_CHANGE,
7822 ESC_SAS_HBA_PORT_BROADCAST,
7823 SAS_PORT_BROADCAST_SES,
7828 ESC_SAS_HBA_PORT_BROADCAST,
7829 SAS_PORT_BROADCAST_D01_4,
7834 ESC_SAS_HBA_PORT_BROADCAST,
7835 SAS_PORT_BROADCAST_D04_7,
7840 ESC_SAS_HBA_PORT_BROADCAST,
7841 SAS_PORT_BROADCAST_D16_7,
7846 ESC_SAS_HBA_PORT_BROADCAST,
7847 SAS_PORT_BROADCAST_D29_7,
7852 ESC_SAS_HBA_PORT_BROADCAST,
7853 SAS_PORT_BROADCAST_D24_0,
7858 ESC_SAS_HBA_PORT_BROADCAST,
7859 SAS_PORT_BROADCAST_D27_4,
7867 }
7872 }
7874 {
7889 /*
7890 * Get latest RAID info and then find the DevHandle for this
7891 * event in the configuration. If the DevHandle is not found
7892 * just exit the event.
7893 */
7902 }
7903 }
7904 }
7907 }
7911 {
7914 state;
7918 ", auto-config of hot-swap drives is %s"
7919 ", write caching is %s"
7922 MPI2_RAIDVOL0_SETTING_AUTO_CONFIG_HSWAP_DISABLE
7924 i == MPI2_RAIDVOL0_SETTING_UNCHANGED
7926 i == MPI2_RAIDVOL0_SETTING_DISABLE_WRITE_CACHING
7928 i == MPI2_RAIDVOL0_SETTING_ENABLE_WRITE_CACHING
7933 }
7935 {
7941 state == MPI2_RAID_VOL_STATE_OPTIMAL
7943 state == MPI2_RAID_VOL_STATE_DEGRADED
7945 state == MPI2_RAID_VOL_STATE_ONLINE
7947 state == MPI2_RAID_VOL_STATE_INITIALIZING
7949 state == MPI2_RAID_VOL_STATE_FAILED
7951 state == MPI2_RAID_VOL_STATE_MISSING
7955 }
7957 {
7963 vol,
7964 state & MPI2_RAIDVOL0_STATUS_FLAG_ENABLED
7966 state & MPI2_RAIDVOL0_STATUS_FLAG_QUIESCED
7968 state & MPI2_RAIDVOL0_STATUS_FLAG_VOLUME_INACTIVE
7970 state &
7971 MPI2_RAIDVOL0_STATUS_FLAG_BAD_BLOCK_TABLE_FULL
7973 state &
7974 MPI2_RAIDVOL0_STATUS_FLAG_RESYNC_IN_PROGRESS
7976 state & MPI2_RAIDVOL0_STATUS_FLAG_BACKGROUND_INIT
7978 state &
7979 MPI2_RAIDVOL0_STATUS_FLAG_CAPACITY_EXPANSION
7981 state &
7982 MPI2_RAIDVOL0_STATUS_FLAG_CONSISTENCY_CHECK
7984 state & MPI2_RAIDVOL0_STATUS_FLAG_DATA_SCRUB
7987 }
7990 }
7992 }
7994 {
8020 " PhysDiskNum %d with DevHandle 0x%x in slot %d "
8021 "for enclosure with handle 0x%x is now in hot "
8030 " PhysDiskNum %d with DevHandle 0x%x in slot %d "
8031 "for enclosure with handle 0x%x is now "
8033 enchandle,
8034 status & MPI2_PHYSDISK0_STATUS_FLAG_INACTIVE_VOLUME
8036 status & MPI2_PHYSDISK0_STATUS_FLAG_OUT_OF_SYNC
8038 status & MPI2_PHYSDISK0_STATUS_FLAG_QUIESCED
8040 status &
8041 MPI2_PHYSDISK0_STATUS_FLAG_WRITE_CACHE_ENABLED
8043 status & MPI2_PHYSDISK0_STATUS_FLAG_OCE_TARGET
8049 " PhysDiskNum %d with DevHandle 0x%x in slot %d "
8052 state == MPI2_RAID_PD_STATE_OPTIMAL
8054 state == MPI2_RAID_PD_STATE_REBUILDING
8056 state == MPI2_RAID_PD_STATE_DEGRADED
8058 state == MPI2_RAID_PD_STATE_HOT_SPARE
8060 state == MPI2_RAID_PD_STATE_ONLINE
8062 state == MPI2_RAID_PD_STATE_OFFLINE
8064 state == MPI2_RAID_PD_STATE_NOT_COMPATIBLE
8066 state == MPI2_RAID_PD_STATE_NOT_CONFIGURED
8070 }
8072 }
8077 }
8079 /*
8080 * Return the reply frame to the free queue.
8081 */
8085 DDI_DMA_SYNC_FORDEV);
8088 }
8092 }
8094 /*
8095 * invoked from timeout() to restart qfull cmds with throttle == 0
8096 */
8097 static void
8099 {
8112 MAX_THROTTLE);
8113 }
8114 }
8115 }
8118 }
8120 void
8122 {
8130 /*
8131 * Task Management cmds are removed in their own routines. Also,
8132 * we don't want to modify timeout based on TM cmds.
8133 */
8136 }
8140 /*
8141 * remove the cmd.
8142 */
8149 /*
8150 * only decrement per target ncmds if command
8151 * has a target associated with it.
8152 */
8155 /*
8156 * reset throttle if we just ran an untagged command
8157 * to a tagged target
8158 */
8162 }
8164 /*
8165 * Remove this command from the active queue.
8166 */
8169 cmd_active_link);
8171 }
8172 }
8173 }
8175 /*
8176 * This is all we need to do for ioc commands.
8177 */
8181 }
8184 }
8186 /*
8187 * accept all cmds on the tx_waitq if any and then
8188 * start a fresh request from the top of the device queue.
8189 *
8190 * since there are always cmds queued on the tx_waitq, and rare cmds on
8191 * the instance waitq, so this function should not be invoked in the ISR,
8192 * the mptsas_restart_waitq() is invoked in the ISR instead. otherwise, the
8193 * burden belongs to the IO dispatch CPUs is moved the interrupt CPU.
8194 */
8195 static void
8197 {
8203 }
8206 }
8208 /*
8209 * start a fresh request from the top of the device queue
8210 */
8211 static void
8213 {
8221 /*
8222 * If there is a reset delay, don't start any cmds. Otherwise, start
8223 * as many cmds as possible.
8224 * Since SMID 0 is reserved and the TM slot is reserved, the actual max
8225 * commands is m_max_requests - 2.
8226 */
8233 /*
8234 * passthru command get slot need
8235 * set CFLAG_PREPARED.
8236 */
8240 }
8243 }
8246 /*
8247 * Send the config page request and delete it
8248 * from the waitq.
8249 */
8253 }
8256 }
8259 /*
8260 * Send the FW Diag request and delete if from
8261 * the waitq.
8262 */
8266 }
8269 }
8275 }
8283 }
8284 }
8286 }
8287 }
8288 /*
8289 * Cmds are queued if tran_start() doesn't get the m_mutexlock(no wait).
8290 * Accept all those queued cmds before new cmd is accept so that the
8291 * cmds are sent in order.
8292 */
8293 static void
8295 {
8301 /*
8302 * A Bus Reset could occur at any time and flush the tx_waitq,
8303 * so we cannot count on the tx_waitq to contain even one cmd.
8304 * And when the m_tx_waitq_mutex is released and run
8305 * mptsas_accept_pkt(), the tx_waitq may be flushed.
8306 */
8312 }
8315 }
8322 }
8323 }
8326 /*
8327 * mpt tag type lookup
8328 */
8332 static int
8334 {
8338 pMpi2SCSIIORequest_t io_request;
8351 /*
8352 * Set SMID and increment index. Rollover to 1 instead of 0 if index
8353 * is at the max. 0 is an invalid SMID, so we call the first index 1.
8354 */
8357 /*
8358 * It is possible for back to back device reset to
8359 * happen before the reset delay has expired. That's
8360 * ok, just let the device reset go out on the bus.
8361 */
8364 }
8366 /*
8367 * if a non-tagged cmd is submitted to an active tagged target
8368 * then drain before submitting this cmd; SCSI-2 allows RQSENSE
8369 * to be untagged
8370 */
8381 }
8386 }
8388 }
8390 /*
8391 * Set correct tag bits.
8392 */
8408 }
8412 }
8414 }
8418 }
8423 /*
8424 * Mapping of the buffer was done in mptsas_pkt_alloc_extern().
8425 * Calculate the DMA address with the same offset.
8426 */
8439 }
8446 MPI2_FUNCTION_SCSI_IO_REQUEST);
8458 }
8460 /*
8461 * setup the Scatter/Gather DMA list for this request
8462 */
8468 MPI2_SGE_FLAGS_END_OF_BUFFER |
8469 MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
8471 }
8473 /*
8474 * save ARQ information
8475 */
8486 DDI_DMA_SYNC_FORDEV);
8488 /*
8489 * Build request descriptor and write it to the request desc post reg.
8490 */
8495 /*
8496 * Start timeout.
8497 */
8500 #ifdef MPTSAS_TEST
8501 /*
8502 * Force timeouts to happen immediately.
8503 */
8506 #endif
8510 /*
8511 * Common case is that this is the last pending expiration
8512 * (or queue is empty). Insert at head of the queue.
8513 */
8516 /*
8517 * Queue is not empty and first element expires later than
8518 * this command. Search for element expiring sooner.
8519 */
8525 }
8526 }
8528 /*
8529 * No element found expiring sooner, append to
8530 * non-empty queue.
8531 */
8533 cmd_active_link);
8534 }
8535 }
8541 }
8543 }
8545 /*
8546 * Select a helper thread to handle current doneq
8547 */
8548 static void
8550 {
8557 /*
8558 * If the completed command on help thread[i] less than
8559 * doneq_thread_threshold, then pick the thread[i]. Otherwise
8560 * pick a thread which has least completed command.
8561 */
8568 }
8572 }
8574 }
8579 }
8581 /*
8582 * move the current global doneq to the doneq of thead[t]
8583 */
8584 static void
8586 {
8594 }
8600 }
8601 }
8603 void
8605 {
8608 /* Check all acc and dma handles */
8610 DDI_SUCCESS) ||
8612 DDI_SUCCESS) ||
8614 DDI_SUCCESS) ||
8616 DDI_SUCCESS) ||
8618 DDI_SUCCESS) ||
8620 DDI_SUCCESS) ||
8622 DDI_SUCCESS) ||
8624 DDI_SUCCESS)) {
8626 DDI_SERVICE_UNAFFECTED);
8628 DDI_FME_VER0);
8631 }
8633 DDI_SUCCESS) ||
8635 DDI_SUCCESS) ||
8637 DDI_SUCCESS) ||
8639 DDI_SUCCESS) ||
8641 DDI_SUCCESS) ||
8643 DDI_SUCCESS)) {
8645 DDI_SERVICE_UNAFFECTED);
8648 }
8654 }
8657 DDI_SUCCESS) ||
8659 DDI_SUCCESS)))) {
8663 }
8664 }
8666 /*
8667 * These routines manipulate the queue of commands that
8668 * are waiting for their completion routines to be called.
8669 * The queue is usually in FIFO order but on an MP system
8670 * it's possible for the completion routines to get out
8671 * of order. If that's a problem you need to add a global
8672 * mutex around the code that calls the completion routine
8673 * in the interrupt handler.
8674 */
8675 static void
8677 {
8689 /*
8690 * only add scsi pkts that have completion routines to
8691 * the doneq. no intr cmds do not have callbacks.
8692 */
8697 }
8698 }
8702 {
8706 /* pop one off the done queue */
8708 /* if the queue is now empty fix the tail pointer */
8712 }
8715 }
8717 }
8719 static void
8721 {
8733 /*
8734 * run the completion routines of all the
8735 * completed commands
8736 */
8740 /* run this command's completion routine */
8745 }
8748 }
8749 }
8751 /*
8752 * These routines manipulate the target's queue of pending requests
8753 */
8754 void
8756 {
8765 }
8771 }
8772 }
8776 {
8789 }
8790 }
8792 }
8794 /*
8795 * remove specified cmd from the middle of the wait queue.
8796 */
8797 static void
8799 {
8808 }
8819 }
8831 }
8833 }
8835 }
8839 {
8848 }
8850 /*
8851 * remove specified cmd from the middle of the tx_waitq.
8852 */
8853 static void
8855 {
8870 }
8882 }
8884 }
8886 }
8888 /*
8889 * device and bus reset handling
8890 *
8891 * Notes:
8892 * - RESET_ALL: reset the controller
8893 * - RESET_TARGET: reset the target specified in scsi_address
8894 */
8895 static int
8897 {
8907 }
8909 level));
8912 /*
8913 * if we are not in panic set up a reset delay for this target
8914 */
8919 }
8923 /*
8924 * The transport layer expect to only see TRUE and
8925 * FALSE. Therefore, we will adjust the return value
8926 * if mptsas_do_scsi_reset returns FAILED.
8927 */
8931 }
8933 static int
8935 {
8943 devhdl);
8944 }
8946 /*
8947 * Issue a Target Reset message to the target specified but not to a
8948 * disk making up a raid volume. Just look through the RAID config
8949 * Phys Disk list of DevHandles. If the target's DevHandle is in this
8950 * list, then don't reset this target.
8951 */
8957 }
8958 }
8959 }
8966 }
8968 static int
8971 {
8978 }
8980 static int
8982 {
8994 }
8995 }
8997 static int
8999 {
9001 }
9003 void
9005 {
9009 /*
9010 * if the bus is draining/quiesced, no changes to the throttles
9011 * are allowed. Not allowing change of throttles during draining
9012 * limits error recovery but will reduce draining time
9013 *
9014 * all throttles should have been set to HOLD_THROTTLE
9015 */
9018 }
9024 }
9025 }
9027 /*
9028 * Clean up from a device reset.
9029 * For the case of target reset, this function clears the waitq of all
9030 * commands for a particular target. For the case of abort task set, this
9031 * function clears the waitq of all commonds for a particular target/lun.
9032 */
9033 static void
9035 {
9039 uchar_t reason;
9040 uint_t stat;
9041 hrtime_t timestamp;
9047 /*
9048 * Make sure the I/O Controller has flushed all cmds
9049 * that are associated with this target for a target reset
9050 * and target/lun for abort task set.
9051 * Account for TM requests, which use the last SMID.
9052 */
9062 /*
9063 * When timeout requested, propagate
9064 * proper reason and statistics to
9065 * target drivers.
9066 */
9069 }
9072 tasktype));
9077 }
9082 /*FALLTHROUGH*/
9088 tasktype));
9092 stat);
9094 }
9098 }
9099 }
9101 /*
9102 * Flush the waitq and tx_waitq of this target's cmds
9103 */
9118 }
9120 }
9132 }
9134 }
9140 /*FALLTHROUGH*/
9149 }
9151 }
9163 }
9165 }
9170 tasktype);
9172 }
9173 }
9175 /*
9176 * Clean up hba state, abort all outstanding command and commands in waitq
9177 * reset timeout of all targets.
9178 */
9179 static void
9181 {
9188 /*
9189 * The I/O Controller should have already sent back
9190 * all commands via the scsi I/O reply frame. Make
9191 * sure all commands have been flushed.
9192 * Account for TM request, which use the last SMID.
9193 */
9199 /*
9200 * Need to make sure to tell everyone that might be
9201 * waiting on this command that it's going to fail. If
9202 * we get here, this command will never timeout because
9203 * the active command table is going to be re-allocated,
9204 * so there will be nothing to check against a time out.
9205 * Instead, mark the command as failed due to reset.
9206 */
9208 STAT_BUS_RESET);
9215 }
9217 }
9220 slot));
9226 }
9228 /*
9229 * Flush the waitq.
9230 */
9242 }
9243 }
9245 /*
9246 * Flush the tx_waitq
9247 */
9254 }
9257 /*
9258 * Drain the taskqs prior to reallocating resources.
9259 */
9264 }
9266 /*
9267 * set pkt_reason and OR in pkt_statistics flag
9268 */
9269 static void
9271 uint_t stat)
9272 {
9273 #ifndef __lock_lint
9275 #endif
9283 }
9285 }
9286 }
9288 static void
9290 {
9299 }
9301 }
9303 static void
9305 {
9315 }
9318 }
9320 /*
9321 * mptsas_watch_reset_delay(_subr) is invoked by timeout() and checks every
9322 * mpt instance for active reset delays
9323 */
9324 static void
9326 {
9327 #ifndef __lock_lint
9329 #endif
9343 }
9347 }
9352 }
9353 }
9355 static int
9357 {
9370 MPTSAS_WATCH_RESET_DELAY_TICK;
9374 MAX_THROTTLE);
9375 restart++;
9378 }
9379 }
9380 }
9384 }
9386 }
9388 #ifdef MPTSAS_TEST
9389 static void
9391 {
9397 }
9400 }
9401 }
9402 }
9403 #endif
9405 /*
9406 * abort handling:
9407 *
9408 * Notes:
9409 * - if pkt is not NULL, abort just that command
9410 * - if pkt is NULL, abort all outstanding commands for target
9411 */
9412 static int
9414 {
9421 tran_tgt_private;
9432 }
9434 static int
9436 {
9443 /*
9444 * Abort the command pkt on the target/lun in ap. If pkt is
9445 * NULL, abort all outstanding commands on that target/lun.
9446 * If you can abort them, return 1, else return 0.
9447 * Each packet that's aborted should be sent back to the target
9448 * driver through the callback routine, with pkt_reason set to
9449 * CMD_ABORTED.
9450 *
9451 * abort cmd pkt on HBA hardware; clean out of outstanding
9452 * command lists, etc.
9453 */
9455 /* abort the specified packet */
9463 STAT_ABORTED);
9467 }
9469 /*
9470 * Have mpt firmware abort this command
9471 */
9478 /*
9479 * The transport layer expects only TRUE and FALSE.
9480 * Therefore, if mptsas_ioc_task_management returns
9481 * FAILED we will return FALSE.
9482 */
9486 }
9487 }
9489 /*
9490 * If pkt is NULL then abort task set
9491 */
9495 /*
9496 * The transport layer expects only TRUE and FALSE.
9497 * Therefore, if mptsas_ioc_task_management returns
9498 * FAILED we will return FALSE.
9499 */
9503 #ifdef MPTSAS_TEST
9506 }
9507 #endif
9509 done:
9512 }
9514 /*
9515 * capability handling:
9516 * (*tran_getcap). Get the capability named, and return its value.
9517 */
9518 static int
9520 {
9533 }
9573 MPI2_IOCFACTS_CAPABILITY_TLR)
9575 else
9581 }
9587 }
9589 /*
9590 * (*tran_setcap). Set the capability named to the value given.
9591 */
9592 static int
9594 {
9604 }
9611 }
9621 /*
9622 * None of these are settable via
9623 * the capability interface.
9624 */
9627 /*
9628 * We cannot turn off arq so return false if asked to
9629 */
9634 }
9639 MAX_THROTTLE);
9656 }
9659 }
9661 /*
9662 * Utility routine for mptsas_ifsetcap/ifgetcap
9663 */
9664 /*ARGSUSED*/
9665 static int
9667 {
9675 }
9677 static int
9679 {
9684 /*
9685 * if there are active commands, then we cannot
9686 * change size of active slots array.
9687 */
9695 }
9696 /*
9697 * Since SMID 0 is reserved and the TM slot is reserved, the
9698 * number of slots that can be used at any one time is
9699 * m_max_requests - 2.
9700 */
9709 }
9711 static void
9713 {
9722 }
9724 /*
9725 * Error logging, printing, and debug print routines.
9726 */
9729 /*PRINTFLIKE3*/
9730 void
9732 {
9740 }
9752 }
9755 }
9757 #ifdef MPTSAS_DEBUG
9758 /*
9759 * Use a circular buffer to log messages to private memory.
9760 * Increment idx atomically to minimize risk to miss lines.
9761 * It's fast and does not hold up the proceedings too much.
9762 */
9768 /*PRINTFLIKE1*/
9769 void
9771 {
9782 }
9784 /*PRINTFLIKE1*/
9785 void
9787 {
9797 #ifdef PROM_PRINTF
9799 #else
9801 #endif
9803 }
9804 #endif
9806 /*
9807 * timeout handling
9808 */
9809 static void
9811 {
9812 #ifndef __lock_lint
9814 #endif
9826 /* Skip device if not powered on */
9834 }
9835 }
9837 /*
9838 * Check if controller is in a FAULT state. If so, reset it.
9839 */
9849 }
9850 }
9852 /*
9853 * For now, always call mptsas_watchsubr.
9854 */
9860 }
9863 }
9870 }
9872 static void
9874 {
9884 #ifdef MPTSAS_TEST
9886 mptsas_test_untagged++;
9887 }
9888 #endif
9890 /*
9891 * Check for commands stuck in active slot
9892 * Account for TM requests, which use the last SMID.
9893 */
9898 /*
9899 * There seems to be a command stuck
9900 * in the active slot. Drain throttle.
9901 */
9904 DRAIN_THROTTLE);
9907 CFLAG_FW_DIAG)) {
9908 /*
9909 * passthrough command timeout
9910 */
9912 CFLAG_TIMEOUT);
9916 }
9917 }
9918 }
9919 }
9923 /*
9924 * If we were draining due to a qfull condition,
9925 * go back to full throttle.
9926 */
9932 }
9939 /*
9940 * Earliest command timeout expired. Drain throttle.
9941 */
9944 /*
9945 * Check for remaining commands.
9946 */
9949 /*
9950 * Wait for remaining commands to complete or
9951 * time out.
9952 */
9955 }
9957 /*
9958 * All command timeouts expired.
9959 */
9970 }
9971 }
9972 }
9974 /*
9975 * timeout recovery
9976 */
9977 static void
9979 {
9992 }
9999 /*
10000 * Abort all outstanding commands on the device.
10001 */
10006 }
10007 }
10009 /*
10010 * Device / Hotplug control
10011 */
10012 static int
10014 {
10023 }
10025 static int
10027 {
10036 }
10038 static int
10040 {
10046 /* Set all the throttles to zero */
10050 }
10052 /* If there are any outstanding commands in the queue */
10058 /*
10059 * Quiesce has been interrupted
10060 */
10065 }
10073 }
10077 /* Bus has been quiesced */
10083 }
10084 }
10085 /* Bus was not busy - QUIESCED */
10089 }
10091 static int
10093 {
10102 }
10106 }
10108 static void
10110 {
10118 /* Command queue has been drained */
10121 /*
10122 * The throttle may have been reset because
10123 * of a SCSI bus reset
10124 */
10128 }
10133 }
10134 }
10136 }
10138 /*ARGSUSED*/
10139 static void
10141 {
10152 }
10160 }
10162 static void
10164 pMpi2SGESimple64_t sgep)
10165 {
10168 ddi_dma_cookie_t data_cookie;
10169 ddi_dma_cookie_t dataout_cookie;
10179 MPI2_SGE_FLAGS_END_OF_BUFFER |
10180 MPI2_SGE_FLAGS_HOST_TO_IOC |
10181 MPI2_SGE_FLAGS_64_BIT_ADDRESSING) <<
10182 MPI2_SGE_FLAGS_SHIFT);
10190 sgep++;
10191 }
10194 MPI2_SGE_FLAGS_LAST_ELEMENT |
10195 MPI2_SGE_FLAGS_END_OF_BUFFER |
10196 MPI2_SGE_FLAGS_END_OF_LIST |
10197 MPI2_SGE_FLAGS_64_BIT_ADDRESSING) <<
10198 MPI2_SGE_FLAGS_SHIFT);
10201 MPI2_SGE_FLAGS_SHIFT);
10204 MPI2_SGE_FLAGS_SHIFT);
10205 }
10207 sge_flags);
10213 }
10215 static void
10217 pMpi2IeeeSgeSimple64_t ieeesgep)
10218 {
10221 ddi_dma_cookie_t data_cookie;
10222 ddi_dma_cookie_t dataout_cookie;
10230 MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR);
10239 ieeesgep++;
10240 }
10248 }
10250 static void
10252 {
10253 caddr_t memp;
10254 pMPI2RequestHeader_t request_hdrp;
10273 /*
10274 * Store the passthrough message in memory location
10275 * corresponding to our slot number
10276 */
10283 }
10290 /*
10291 * Add an SGE, even if the length is zero.
10292 */
10301 }
10306 pMpi2SCSIIORequest_t scsi_io_req;
10307 caddr_t arsbuf;
10315 /*
10316 * Mapping of the buffer was done in
10317 * mptsas_do_passthru().
10318 * Calculate the DMA address with the same offset.
10319 */
10333 }
10338 ars_dmaaddrlow);
10340 /*
10341 * Put SGE for data and data_out buffer at the end of
10342 * scsi_io_request message header.(64 bytes in total)
10343 * Set SGLOffset0 value
10344 */
10348 /*
10349 * Setup descriptor info. RAID passthrough must use the
10350 * default request descriptor which is already set, so if this
10351 * is a SCSI IO request, change the descriptor to SCSI IO.
10352 */
10357 }
10359 DDI_DMA_SYNC_FORDEV);
10360 }
10362 /*
10363 * We must wait till the message has been completed before
10364 * beginning the next message so we wait for this one to
10365 * finish.
10366 */
10374 }
10375 }
10390 /*
10391 * Prepare the pt for a SAS2 FW_DOWNLOAD request.
10392 */
10393 static void
10395 {
10396 pMpi2FWDownloadTCSGE_t tcsge;
10397 pMpi2FWDownloadRequest req;
10399 /*
10400 * If SAS3, call separate function.
10401 */
10405 }
10407 /*
10408 * User requests should come in with the Transaction
10409 * context element where the SGL will go. Putting the
10410 * SGL after that seems to work, but don't really know
10411 * why. Other drivers tend to create an extra SGL and
10412 * refer to the TCE through that.
10413 */
10419 }
10432 }
10434 /*
10435 * Prepare the pt for a SAS3 FW_DOWNLOAD request.
10436 */
10437 static void
10439 {
10440 pMpi2FWDownloadTCSGE_t tcsge;
10441 pMpi2FWDownloadRequest req2;
10442 pMpi25FWDownloadRequest req25;
10444 /*
10445 * User requests should come in with the Transaction
10446 * context element where the SGL will go. The new firmware
10447 * Doesn't use TCE and has space in the main request for
10448 * this information. So move to the right place.
10449 */
10456 }
10470 }
10472 /*
10473 * Prepare the pt for a SAS2 FW_UPLOAD request.
10474 */
10475 static void
10477 {
10478 pMpi2FWUploadTCSGE_t tcsge;
10479 pMpi2FWUploadRequest_t req;
10481 /*
10482 * If SAS3, call separate function.
10483 */
10487 }
10489 /*
10490 * User requests should come in with the Transaction
10491 * context element where the SGL will go. Putting the
10492 * SGL after that seems to work, but don't really know
10493 * why. Other drivers tend to create an extra SGL and
10494 * refer to the TCE through that.
10495 */
10501 }
10514 }
10516 /*
10517 * Prepare the pt a SAS3 FW_UPLOAD request.
10518 */
10519 static void
10521 {
10522 pMpi2FWUploadTCSGE_t tcsge;
10523 pMpi2FWUploadRequest_t req2;
10524 pMpi25FWUploadRequest_t req25;
10526 /*
10527 * User requests should come in with the Transaction
10528 * context element where the SGL will go. The new firmware
10529 * Doesn't use TCE and has space in the main request for
10530 * this information. So move to the right place.
10531 */
10538 }
10552 }
10554 /*
10555 * Prepare the pt for an IOC_FACTS request.
10556 */
10557 static void
10559 {
10560 #ifndef __lock_lint
10562 #endif
10574 }
10576 /*
10577 * Prepare the pt for a PORT_FACTS request.
10578 */
10579 static void
10581 {
10582 #ifndef __lock_lint
10584 #endif
10596 }
10598 /*
10599 * Prepare pt for a SATA_PASSTHROUGH request.
10600 */
10601 static void
10603 {
10604 #ifndef __lock_lint
10606 #endif
10617 }
10619 static void
10621 {
10622 #ifndef __lock_lint
10624 #endif
10635 }
10637 /*
10638 * Prepare pt for a CONFIG request.
10639 */
10640 static void
10642 {
10643 #ifndef __lock_lint
10645 #endif
10656 }
10658 /*
10659 * Prepare pt for a SCSI_IO_REQ request.
10660 */
10661 static void
10663 {
10664 #ifndef __lock_lint
10666 #endif
10677 }
10679 /*
10680 * Prepare the mptsas_cmd for a SAS_IO_UNIT_CONTROL request.
10681 */
10682 static void
10684 {
10685 #ifndef __lock_lint
10687 #endif
10689 }
10691 /*
10692 * A set of functions to prepare an mptsas_cmd for the various
10693 * supported requests.
10694 */
10696 U8 Function;
10705 mpi_pre_sata_passthrough },
10707 mpi_pre_smp_passthrough},
10709 mpi_pre_scsi_io_req},
10712 mpi_pre_sas_io_unit_control },
10714 };
10716 static void
10718 {
10719 pMPI2RequestHeader_t hdr;
10731 }
10732 }
10737 }
10740 static int
10745 {
10746 mptsas_pt_request_t pt;
10747 mptsas_dma_alloc_state_t data_dma_state;
10748 mptsas_dma_alloc_state_t dataout_dma_state;
10749 caddr_t memp;
10753 pMPI2RequestHeader_t request_hdrp;
10754 pMPI2RequestHeader_t request_msg;
10755 pMPI2DefaultReply_t reply_msg;
10756 Mpi2SCSIIOReply_t rep_msg;
10768 /*
10769 * copy in the request buffer since it could be used by
10770 * another thread when the pt request into waitq
10771 */
10777 }
10784 pMpi2SCSITaskManagementRequest_t task;
10789 mode);
10794 }
10796 }
10805 }
10817 }
10818 }
10820 }
10823 }
10832 }
10843 }
10844 }
10848 }
10854 }
10873 /*
10874 * Form a blank cmd/pkt to store the acknowledgement message
10875 */
10887 boolean_t ret;
10902 }
10911 }
10918 /*
10919 * Save the command in a slot
10920 */
10922 /*
10923 * Once passthru command get slot, set cmd_flags
10924 * CFLAG_PREPARED.
10925 */
10930 }
10934 }
10944 }
10951 }
10954 /*
10955 * cmd_rfm is zero means the command reply is a CONTEXT
10956 * reply and no PCI Write to post the free reply SMFA
10957 * because no reply message frame is used.
10958 * cmd_rfm is non-zero means the reply is a ADDRESS
10959 * reply and reply message frame is used.
10960 */
10963 DDI_DMA_SYNC_FORCPU);
10967 }
10974 }
10979 }
10985 }
10999 }
11003 mode)) {
11009 }
11010 }
11019 }
11020 }
11021 }
11026 DDI_DMA_SYNC_FORCPU);
11030 mode)) {
11036 }
11037 }
11038 }
11039 }
11041 out:
11042 /*
11043 * Put the reply frame back on the free queue, increment the free
11044 * index, and write the new index to the free index register. But only
11045 * if this reply is an ADDRESS reply.
11046 */
11052 DDI_DMA_SYNC_FORDEV);
11055 }
11058 }
11063 }
11067 }
11068 }
11073 DDI_SUCCESS) {
11075 DDI_SERVICE_UNAFFECTED);
11077 }
11079 }
11082 DDI_SUCCESS) {
11084 DDI_SERVICE_UNAFFECTED);
11086 }
11088 }
11092 }
11093 }
11099 }
11101 static int
11103 {
11104 /*
11105 * If timeout is 0, set timeout to default of 60 seconds.
11106 */
11109 }
11122 }
11123 /*
11124 * Send passthru request messages
11125 */
11136 }
11137 }
11139 static uint8_t
11141 {
11147 }
11148 }
11151 }
11153 static void
11155 {
11156 pMpi2DiagBufferPostRequest_t pDiag_post_msg;
11157 pMpi2DiagReleaseRequest_t pDiag_release_msg;
11165 /*
11166 * Form the diag message depending on the post or release function.
11167 */
11184 i++) {
11188 }
11207 }
11209 /*
11210 * Send the message
11211 */
11213 DDI_DMA_SYNC_FORDEV);
11215 MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
11219 DDI_SUCCESS) ||
11221 DDI_SUCCESS)) {
11223 }
11224 }
11226 static int
11229 {
11230 mptsas_diag_request_t diag;
11234 pMpi2DiagBufferPostReply_t reply;
11238 /*
11239 * If buffer is not enabled, just leave.
11240 */
11245 }
11247 /*
11248 * Clear some flags initially.
11249 */
11254 /*
11255 * Get a cmd buffer from the cmd buffer pool
11256 */
11261 }
11272 /*
11273 * Form a blank cmd/pkt to store the acknowledgement message
11274 */
11281 /*
11282 * Save the command in a slot
11283 */
11285 /*
11286 * Once passthru command get slot, set cmd_flags
11287 * CFLAG_PREPARED.
11288 */
11293 }
11297 }
11303 }
11305 /*
11306 * cmd_rfm points to the reply message if a reply was given. Check the
11307 * IOCStatus to make sure everything went OK with the FW diag request
11308 * and set buffer flags.
11309 */
11313 DDI_DMA_SYNC_FORCPU);
11318 /*
11319 * Get the reply message data
11320 */
11328 /*
11329 * If post failed quit.
11330 */
11337 }
11339 /*
11340 * Post was successful.
11341 */
11346 }
11348 out:
11349 /*
11350 * Put the reply frame back on the free queue, increment the free
11351 * index, and write the new index to the free index register. But only
11352 * if this reply is an ADDRESS reply.
11353 */
11359 DDI_DMA_SYNC_FORDEV);
11362 }
11365 }
11369 }
11372 }
11375 }
11377 static int
11381 {
11382 mptsas_diag_request_t diag;
11386 pMpi2DiagReleaseReply_t reply;
11390 /*
11391 * If buffer is not enabled, just leave.
11392 */
11399 }
11401 /*
11402 * Clear some flags initially.
11403 */
11408 /*
11409 * Get a cmd buffer from the cmd buffer pool
11410 */
11416 }
11427 /*
11428 * Form a blank cmd/pkt to store the acknowledgement message
11429 */
11436 /*
11437 * Save the command in a slot
11438 */
11440 /*
11441 * Once passthru command get slot, set cmd_flags
11442 * CFLAG_PREPARED.
11443 */
11448 }
11452 }
11458 }
11460 /*
11461 * cmd_rfm points to the reply message if a reply was given. Check the
11462 * IOCStatus to make sure everything went OK with the FW diag request
11463 * and set buffer flags.
11464 */
11468 DDI_DMA_SYNC_FORCPU);
11473 /*
11474 * Get the reply message data
11475 */
11481 /*
11482 * If release failed quit.
11483 */
11489 iocloginfo));
11491 }
11493 /*
11494 * Release was successful.
11495 */
11499 /*
11500 * If this was for an UNREGISTER diag type command, clear the
11501 * unique ID.
11502 */
11505 }
11506 }
11508 out:
11509 /*
11510 * Put the reply frame back on the free queue, increment the free
11511 * index, and write the new index to the free index register. But only
11512 * if this reply is an ADDRESS reply.
11513 */
11519 DDI_DMA_SYNC_FORDEV);
11522 }
11525 }
11529 }
11532 }
11535 }
11537 static int
11540 {
11554 /*
11555 * Check for valid buffer type
11556 */
11560 }
11562 /*
11563 * Get the current buffer and look up the unique ID. The unique ID
11564 * should not be found. If it is, the ID is already in use.
11565 */
11571 }
11573 /*
11574 * The buffer's unique ID should not be registered yet, and the given
11575 * unique ID cannot be 0.
11576 */
11581 }
11583 /*
11584 * If this buffer is already posted as immediate, just change owner.
11585 */
11591 }
11593 /*
11594 * Post a new buffer after checking if it's enabled. The DMA buffer
11595 * that is allocated will be contiguous (sgl_len = 1).
11596 */
11600 }
11608 }
11610 /*
11611 * Copy the given info to the diag buffer and post the buffer.
11612 */
11617 i++) {
11620 }
11621 }
11627 DDI_SUCCESS) {
11632 }
11634 /*
11635 * In case there was a failure, free the DMA buffer.
11636 */
11639 }
11642 }
11644 static int
11647 {
11657 /*
11658 * Get the current buffer and look up the unique ID. The unique ID
11659 * should be there.
11660 */
11665 }
11669 /*
11670 * Try to release the buffer from FW before freeing it. If release
11671 * fails, don't free the DMA buffer in case FW tries to access it
11672 * later. If buffer is not owned by firmware, can't release it.
11673 */
11679 }
11681 /*
11682 * At this point, return the current status no matter what happens with
11683 * the DMA buffer.
11684 */
11688 DDI_SUCCESS) {
11692 DDI_SERVICE_UNAFFECTED);
11693 }
11695 }
11698 }
11700 static int
11703 {
11712 /*
11713 * If ID is valid, query on ID.
11714 * If ID is invalid, query on buffer type.
11715 */
11721 }
11727 }
11728 }
11730 /*
11731 * Fill query structure with the diag buffer info.
11732 */
11738 i++) {
11741 }
11742 }
11749 /*
11750 * Set/Clear application flags
11751 */
11756 }
11759 MPTSAS_FW_DIAG_FLAG_BUFFER_VALID;
11763 }
11766 MPTSAS_FW_DIAG_FLAG_FW_BUFFER_ACCESS;
11770 }
11773 }
11775 static int
11779 {
11789 /*
11790 * Get the current buffer and look up the unique ID. The unique ID
11791 * should be there.
11792 */
11797 }
11801 /*
11802 * Make sure requested read is within limits
11803 */
11808 }
11810 /*
11811 * Copy the requested data from DMA to the diag_read_buffer. The DMA
11812 * buffer that was allocated is one contiguous buffer.
11813 */
11817 DDI_DMA_SYNC_FORCPU);
11822 }
11823 }
11826 /*
11827 * Set or clear the Force Release flag.
11828 */
11833 }
11835 /*
11836 * If buffer is to be reregistered, make sure it's not already owned by
11837 * firmware first.
11838 */
11843 return_code);
11844 }
11845 }
11848 }
11850 static int
11853 {
11863 /*
11864 * Get the current buffer and look up the unique ID. The unique ID
11865 * should be there.
11866 */
11871 }
11875 /*
11876 * If buffer is not owned by firmware, it's already been released.
11877 */
11881 }
11883 /*
11884 * Release the buffer.
11885 */
11887 MPTSAS_FW_DIAG_TYPE_RELEASE);
11889 }
11891 static int
11894 {
11895 mptsas_fw_diag_register_t diag_register;
11896 mptsas_fw_diag_unregister_t diag_unregister;
11897 mptsas_fw_diag_query_t diag_query;
11898 mptsas_diag_read_buffer_t diag_read_buffer;
11899 mptsas_fw_diag_release_t diag_release;
11912 MPTSAS_FW_DIAG_ERROR_INVALID_PARAMETER;
11915 }
11919 }
11921 return_code);
11927 MPTSAS_FW_DIAG_ERROR_INVALID_PARAMETER;
11930 }
11934 }
11936 return_code);
11942 MPTSAS_FW_DIAG_ERROR_INVALID_PARAMETER;
11945 }
11949 }
11951 return_code);
11956 }
11957 }
11964 }
11970 MPTSAS_FW_DIAG_ERROR_INVALID_PARAMETER;
11973 }
11977 ioctl_mode);
11983 }
11984 }
11990 MPTSAS_FW_DIAG_ERROR_INVALID_PARAMETER;
11993 }
11997 }
11999 return_code);
12006 }
12012 }
12015 }
12017 static int
12019 {
12021 mptsas_diag_action_t driver_data;
12025 /*
12026 * Copy the user data to a driver data buffer.
12027 */
12030 /*
12031 * Send diag action request if Action is valid
12032 */
12041 mode);
12050 }
12053 }
12056 }
12059 }
12062 }
12064 /*
12065 * This routine handles the "event query" ioctl.
12066 */
12067 static int
12070 {
12072 mptsas_event_query_t driverdata;
12080 }
12088 }
12091 }
12093 /*
12094 * This routine handles the "event enable" ioctl.
12095 */
12096 static int
12099 {
12101 mptsas_event_enable_t driverdata;
12108 }
12115 }
12117 }
12119 /*
12120 * This routine handles the "event report" ioctl.
12121 */
12122 static int
12125 {
12127 mptsas_event_report_t driverdata;
12149 }
12153 }
12154 }
12158 }
12161 }
12165 }
12167 static void
12169 {
12171 uint_t reglen;
12173 /*
12174 * Lookup the 'reg' property and extract the other data
12175 */
12178 DDI_PROP_SUCCESS) {
12179 /*
12180 * Extract the PCI data from the 'reg' property first DWORD.
12181 * The entry looks like the following:
12182 * First DWORD:
12183 * Bits 0 - 7 8-bit Register number
12184 * Bits 8 - 10 3-bit Function number
12185 * Bits 11 - 15 5-bit Device number
12186 * Bits 16 - 23 8-bit Bus number
12187 * Bits 24 - 25 2-bit Address Space type identifier
12188 *
12189 */
12198 /*
12199 * If we can't determine the PCI data then we fill in FF's for
12200 * the data to indicate this.
12201 */
12205 }
12207 /*
12208 * Saved in the mpt->m_fwversion
12209 */
12211 }
12213 static void
12215 {
12220 MPTIOCTL_ADAPTER_TYPE_SAS3 :
12221 MPTIOCTL_ADAPTER_TYPE_SAS2;
12229 }
12231 static void
12233 {
12235 uint_t reglen;
12237 /*
12238 * Lookup the 'reg' property and extract the other data
12239 */
12242 DDI_PROP_SUCCESS) {
12243 /*
12244 * Extract the PCI data from the 'reg' property first DWORD.
12245 * The entry looks like the following:
12246 * First DWORD:
12247 * Bits 8 - 10 3-bit Function number
12248 * Bits 11 - 15 5-bit Device number
12249 * Bits 16 - 23 8-bit Bus number
12250 */
12256 /*
12257 * If we can't determine the PCI info then we fill in FF's for
12258 * the data to indicate this.
12259 */
12263 }
12265 /*
12266 * Now get the interrupt vector and the pci header. The vector can
12267 * only be 0 right now. The header is the first 256 bytes of config
12268 * space.
12269 */
12273 i);
12274 }
12275 }
12277 static int
12279 {
12281 mptsas_reg_access_t driverdata;
12286 /*
12287 * IO access is not supported.
12288 */
12306 }
12319 }
12322 }
12326 }
12328 static int
12330 {
12332 mptsas_led_control_t lc;
12337 }
12346 }
12352 /* Locate the target we're interrogating... */
12357 /* We could not find a target for that enclosure/slot. */
12360 }
12363 /* Update our internal LED state. */
12367 /* Flush it to the controller. */
12371 }
12373 /* Return our internal LED state. */
12379 }
12382 }
12384 static int
12386 {
12402 }
12404 /* Find out how many targets there are. */
12408 count++;
12409 }
12412 /*
12413 * If we haven't been asked to copy out information on each target,
12414 * then just return the count.
12415 */
12420 /*
12421 * If we haven't been given a large enough buffer to copy out into,
12422 * let the caller know.
12423 */
12428 }
12436 /*
12437 * The number of targets changed while we weren't
12438 * looking, so give up.
12439 */
12444 }
12449 i++;
12450 }
12454 /* Copy out the disk information to the caller. */
12458 }
12462 copy_out:
12466 }
12469 }
12471 static int
12474 {
12477 mptsas_update_flash_t flashdata;
12478 mptsas_pass_thru_t passthru_data;
12479 mptsas_adapter_data_t adapter_data;
12480 mptsas_pci_info_t pci_info;
12493 }
12497 /*
12498 * Called from iport node, get the states
12499 */
12504 }
12506 }
12507 /* Make sure power level is D0 before accessing registers */
12514 DDI_SUCCESS) {
12516 "mptsas%d: mptsas_ioctl: Raise power "
12520 }
12523 }
12526 }
12532 }
12533 /*
12534 * The following code control the OK2RM LED, it doesn't affect
12535 * the ioctl return status.
12536 */
12540 NDI_SUCCESS) {
12542 }
12550 }
12556 }
12563 }
12567 }
12569 }
12582 }
12589 }
12591 /*
12592 * Reset the chip to start using the new
12593 * firmware. Reset if failed also.
12594 */
12598 }
12602 /*
12603 * The user has requested to pass through a command to
12604 * be executed by the MPT firmware. Call our routine
12605 * which does this. Only allow one passthru IOCTL at
12606 * one time. Other threads will block on
12607 * m_passthru_mutex, which is of adaptive variant.
12608 */
12613 }
12622 /*
12623 * The user has requested to read adapter data. Call
12624 * our routine which does this.
12625 */
12631 }
12645 }
12649 }
12652 /*
12653 * The user has requested to read pci info. Call
12654 * our routine which does this.
12655 */
12663 }
12672 }
12676 /*
12677 * The user has done a diag buffer action. Call our
12678 * routine which does this. Only allow one diag action
12679 * at one time.
12680 */
12685 }
12693 /*
12694 * The user has done an event query. Call our routine
12695 * which does this.
12696 */
12701 /*
12702 * The user has done an event enable. Call our routine
12703 * which does this.
12704 */
12709 /*
12710 * The user has done an event report. Call our routine
12711 * which does this.
12712 */
12717 /*
12718 * The user has requested register access. Call our
12719 * routine which does this.
12720 */
12726 rval);
12728 }
12730 out:
12732 }
12734 int
12736 {
12742 /*
12743 * Set a flag telling I/O path that we're processing a reset. This is
12744 * needed because after the reset is complete, the hash table still
12745 * needs to be rebuilt. If I/Os are started before the hash table is
12746 * rebuilt, I/O errors will occur. This flag allows I/Os to be marked
12747 * so that they can be retried.
12748 */
12751 /*
12752 * Set all throttles to HOLD
12753 */
12757 }
12759 /*
12760 * Disable interrupts
12761 */
12764 /*
12765 * Abort all commands: outstanding commands, commands in waitq and
12766 * tx_waitq.
12767 */
12770 /*
12771 * Reinitialize the chip.
12772 */
12775 }
12777 /*
12778 * Enable interrupts again
12779 */
12782 /*
12783 * If mptsas_init_chip was successful, update the driver data.
12784 */
12787 }
12789 /*
12790 * Reset the throttles
12791 */
12795 }
12803 }
12805 /*
12806 * Clear the reset flag so that I/Os can continue.
12807 */
12811 }
12813 static int
12815 {
12816 ddi_dma_cookie_t cookie;
12820 /*
12821 * Check to see if the firmware image is valid
12822 */
12824 MPI2_DIAG_FLASH_BAD_SIG) {
12827 }
12829 /*
12830 * Reset the chip
12831 */
12836 }
12840 }
12841 /*
12842 * Setup configuration space
12843 */
12848 }
12850 /*
12851 * IOC facts can change after a diag reset so all buffers that are
12852 * based on these numbers must be de-allocated and re-allocated. Get
12853 * new IOC facts each time chip is initialized.
12854 */
12858 }
12868 }
12869 /*
12870 * Allocate request message frames, reply free queue, reply descriptor
12871 * post queue, and reply message frames using latest IOC facts.
12872 */
12876 }
12880 }
12884 }
12888 }
12892 }
12894 mur:
12895 /*
12896 * Re-Initialize ioc to operational state
12897 */
12901 }
12905 /*
12906 * Initialize reply post index. Reply free index is initialized after
12907 * the next loop.
12908 */
12911 /*
12912 * Initialize the Reply Free Queue with the physical addresses of our
12913 * reply frames.
12914 */
12921 }
12923 DDI_DMA_SYNC_FORDEV);
12925 /*
12926 * Initialize the reply free index to one past the last frame on the
12927 * queue. This will signify that the queue is empty to start with.
12928 */
12932 /*
12933 * Initialize the reply post queue to 0xFFFFFFFF,0xFFFFFFFF's.
12934 */
12939 }
12941 DDI_DMA_SYNC_FORDEV);
12943 /*
12944 * Enable ports
12945 */
12949 }
12951 /*
12952 * enable events
12953 */
12958 }
12960 /*
12961 * We need checks in attach and these.
12962 * chip_init is called in mult. places
12963 */
12966 DDI_SUCCESS) ||
12968 DDI_SUCCESS) ||
12970 DDI_SUCCESS) ||
12972 DDI_SUCCESS) ||
12974 DDI_SUCCESS) ||
12976 DDI_SUCCESS)) {
12979 }
12981 /* Check all acc handles */
12984 DDI_SUCCESS) ||
12986 DDI_SUCCESS) ||
12988 DDI_SUCCESS) ||
12990 DDI_SUCCESS) ||
12992 DDI_SUCCESS) ||
12994 DDI_SUCCESS) ||
12996 DDI_SUCCESS)) {
12999 }
13003 fail:
13005 }
13007 static int
13009 {
13014 /*
13015 * Check if capabilities list is supported and if so,
13016 * get initial capabilities pointer and clear bits 0,1.
13017 */
13024 }
13026 /*
13027 * Walk capabilities if supported.
13028 */
13031 /*
13032 * Check that we haven't exceeded the maximum number of
13033 * capabilities and that the pointer is in a valid range.
13034 */
13039 }
13043 caps_ptr);
13045 }
13047 /*
13048 * Get next capability and check that it is valid.
13049 * For now, we only support power management.
13050 */
13059 /* Save PMCSR offset */
13062 /*
13063 * The following capabilities are valid. Any others
13064 * will cause a message to be logged.
13065 */
13074 "?mptsas%d unrecognized capability "
13077 }
13079 /*
13080 * Get next capabilities pointer and clear bits 0,1.
13081 */
13084 }
13086 }
13088 static int
13090 {
13093 NULL,
13096 NULL
13097 };
13102 }
13103 /*
13104 * If PCI's capability does not support PM, then don't need
13105 * to registe the pm-components
13106 */
13109 /*
13110 * If power management is supported by this chip, create
13111 * pm-components property for the power management framework
13112 */
13122 }
13124 /*
13125 * Power on device.
13126 */
13134 PCI_PMCSR_D0);
13135 }
13139 }
13141 /*
13142 * Set pm idle delay.
13143 */
13148 }
13150 static int
13152 {
13158 /* Get supported interrupt types */
13163 }
13167 /*
13168 * Try MSI, but fall back to FIXED
13169 */
13175 }
13176 }
13185 }
13186 }
13189 }
13191 static void
13193 {
13195 }
13197 /*
13198 * mptsas_add_intrs:
13199 *
13200 * Register FIXED or MSI interrupts.
13201 */
13202 static int
13204 {
13211 /* Get number of interrupts */
13218 }
13220 /* Get number of available interrupts */
13227 }
13232 }
13234 /* Mpt only have one interrupt routine */
13237 }
13239 /* Allocate an array of interrupt handles */
13245 /* call ddi_intr_alloc() */
13251 ret);
13254 }
13256 /* use interrupt count returned or abort? */
13260 }
13264 /*
13265 * Get priority for first msi, assume remaining are all the same
13266 */
13271 /* Free already allocated intr */
13274 }
13278 }
13280 /* Test for high level mutex */
13285 /* Free already allocated intr */
13288 }
13292 }
13294 /* Call ddi_intr_add_handler() */
13301 /* Free already allocated intr */
13304 }
13308 }
13309 }
13315 /* Free already allocated intr */
13318 }
13322 }
13324 /*
13325 * Enable interrupts
13326 */
13328 /* Call ddi_intr_block_enable() for MSI interrupts */
13331 /* Call ddi_intr_enable for MSI or FIXED interrupts */
13334 }
13335 }
13337 }
13339 /*
13340 * mptsas_rem_intrs:
13341 *
13342 * Unregister FIXED or MSI interrupts
13343 */
13344 static void
13346 {
13351 /* Disable all interrupts */
13353 /* Call ddi_intr_block_disable() */
13358 }
13359 }
13361 /* Call ddi_intr_remove_handler() */
13365 }
13368 }
13370 /*
13371 * The IO fault service error handling callback function
13372 */
13373 /*ARGSUSED*/
13374 static int
13376 {
13377 /*
13378 * as the driver can always deal with an error in any dma or
13379 * access handle, we can just return the fme_status value.
13380 */
13383 }
13385 /*
13386 * mptsas_fm_init - initialize fma capabilities and register with IO
13387 * fault services.
13388 */
13389 static void
13391 {
13392 /*
13393 * Need to change iblock to priority for new MSI intr
13394 */
13395 ddi_iblock_cookie_t fm_ibc;
13397 /* Only register with IO Fault Services if we have some capability */
13399 /* Adjust access and dma attributes for FMA */
13404 /*
13405 * Register capabilities with IO Fault Services.
13406 * mpt->m_fm_capabilities will be updated to indicate
13407 * capabilities actually supported (not requested.)
13408 */
13411 /*
13412 * Initialize pci ereport capabilities if ereport
13413 * capable (should always be.)
13414 */
13418 }
13420 /*
13421 * Register error callback if error callback capable.
13422 */
13426 }
13427 }
13428 }
13430 /*
13431 * mptsas_fm_fini - Releases fma capabilities and un-registers with IO
13432 * fault services.
13433 *
13434 */
13435 static void
13437 {
13438 /* Only unregister FMA capabilities if registered */
13441 /*
13442 * Un-register error callback if error callback capable.
13443 */
13447 }
13449 /*
13450 * Release any resources allocated by pci_ereport_setup()
13451 */
13456 }
13458 /* Unregister from IO Fault Services */
13461 /* Adjust access and dma attributes for FMA */
13466 }
13467 }
13469 int
13471 {
13472 ddi_fm_error_t de;
13478 }
13480 int
13482 {
13483 ddi_fm_error_t de;
13489 }
13491 void
13493 {
13502 }
13503 }
13505 static int
13508 {
13512 mptsas_phymask_t phymask;
13527 }
13530 MPI2_SAS_DEVICE_INFO_SATA_DEVICE |
13534 }
13536 /*
13537 * Check if the dev handle is for a Phys Disk. If so, set return value
13538 * and exit. Don't add Phys Disks to hash.
13539 */
13546 }
13547 }
13548 }
13550 /*
13551 * Get SATA Device Name from SAS device page0 for
13552 * sata device, if device name doesn't exist, set mta_wwn to
13553 * 0 for direct attached SATA. For the device behind the expander
13554 * we still can use STP address assigned by expander.
13555 */
13557 MPI2_SAS_DEVICE_INFO_ATAPI_DEVICE)) {
13559 /* alloc a tmp_tgt to send the cmd */
13561 KM_SLEEP);
13575 }
13576 }
13586 }
13591 }
13593 uint64_t
13595 {
13606 inq83_retry:
13613 }
13614 /* According to SAT2, the first descriptor is logic unit name */
13619 }
13628 /* The data is not ready, wait and retry */
13629 inq83_retry--;
13632 }
13636 }
13637 out:
13640 }
13642 static int
13645 {
13662 }
13676 }
13678 }
13681 }
13683 }
13685 static int
13689 {
13695 /*
13696 * scsi_hba_tran_t->tran_tgt_private is used to pass the address
13697 * information to scsi_init_pkt, allocate a scsi_hba_tran structure
13698 * to simulate the cmds from sd
13699 */
13704 }
13711 }
13722 }
13727 }
13730 }
13733 }
13736 out:
13739 }
13742 }
13745 }
13747 }
13748 static int
13750 {
13762 ptr++;
13765 }
13777 }
13788 }
13795 }
13802 out:
13809 }
13811 /*
13812 * mptsas_parse_smp_name() is to parse sas wwn string
13813 * which format is "wWWN"
13814 */
13815 static int
13817 {
13822 }
13824 ptr++;
13827 }
13829 }
13831 static int
13834 {
13849 }
13854 }
13855 /*
13856 * Hold the nexus across the bus_config
13857 */
13862 /* parse wwid/target name out of name given */
13866 }
13867 ptr++;
13869 /*
13870 * This is a SMP target device
13871 */
13876 }
13879 /*
13880 * OBP could pass down a non-canonical form
13881 * bootpath without LUN part when LUN is 0.
13882 * So driver need adjust the string.
13883 */
13888 ptr++;
13889 }
13891 /*
13892 * The device path is wWWID format and the device
13893 * is not SMP target device.
13894 */
13899 }
13906 childp);
13907 }
13909 /*
13910 * If this is CD/DVD device in OBP path, the
13911 * ndi_busop_bus_config can be skipped as config one
13912 * operation is done above.
13913 */
13919 }
13923 }
13925 /*
13926 * DDI group instructed us to use this flag.
13927 */
13935 }
13940 }
13947 }
13949 static int
13952 {
13966 }
13970 }
13972 static int
13975 {
13981 /*
13982 * Get the physical port associated to the iport
13983 */
13989 /*
13990 * didn't match any device by searching
13991 */
13993 }
13994 /*
13995 * If the LUN already exists and the status is online,
13996 * we just return the pointer to dev_info_t directly.
13997 * For the mdi_pathinfo node, we'll handle it in
13998 * mptsas_create_virt_lun()
13999 * TODO should be also in mptsas_handle_dr
14000 */
14004 /*
14005 * TODO Another senario is, we hotplug the same disk
14006 * on the same slot, the devhdl changed, is this
14007 * possible?
14008 * tgt_private->t_private != ptgt
14009 */
14011 /*
14012 * The device has changed although the devhdl is the
14013 * same (Enclosure mapping mode, change drive on the
14014 * same slot)
14015 */
14017 }
14019 }
14022 /*
14023 * Configure IR volume
14024 */
14027 }
14031 }
14033 static int
14036 {
14039 mptsas_phymask_t phymask;
14042 /*
14043 * Get the physical port associated to the iport
14044 */
14050 /*
14051 * didn't match any device by searching
14052 */
14054 }
14056 /*
14057 * If the LUN already exists and the status is online,
14058 * we just return the pointer to dev_info_t directly.
14059 * For the mdi_pathinfo node, we'll handle it in
14060 * mptsas_create_virt_lun().
14061 */
14066 }
14071 }
14073 static int
14076 {
14083 /* determine report luns addressing type */
14085 /*
14086 * Vendors in the field have been found to be concatenating
14087 * bus/target/lun to equal the complete lun value instead
14088 * of switching to flat space addressing
14089 */
14090 /* 00b - peripheral device addressing method */
14092 /* FALLTHRU */
14093 /* 10b - logical unit addressing method */
14095 /* FALLTHRU */
14096 /* 01b - flat space addressing method */
14098 /* byte0 bit0-5=msb lun byte1 bit0-7=lsb lun */
14106 }
14107 }
14109 static int
14111 {
14138 /*
14139 * It's a SATA without Device Name
14140 * So don't try multi-LUNs
14141 */
14145 /*
14146 * need configure and create node
14147 */
14149 }
14150 }
14152 /*
14153 * WWN (SAS address or Device Name exist)
14154 */
14156 MPI2_SAS_DEVICE_INFO_ATAPI_DEVICE)) {
14157 /*
14158 * SATA device with Device Name
14159 * So don't try multi-LUNs
14160 */
14165 }
14166 }
14175 retry++;
14177 }
14189 retry++;
14191 }
14197 }
14206 /*
14207 * find out the number of luns returned by the SCSI ReportLun call
14208 * and allocate buffer space
14209 */
14215 }
14220 }
14224 else
14226 ptgt);
14229 MPTSAS_DEV_GONE);
14230 }
14231 }
14236 }
14238 static int
14240 {
14254 }
14265 }
14269 }
14271 /*
14272 * configure all RAID volumes for virtual iport
14273 */
14274 static void
14276 {
14282 /*
14283 * Get latest RAID info and search for any Volume DevHandles. If any
14284 * are found, configure the volume.
14285 */
14297 }
14298 }
14299 }
14301 }
14303 static void
14306 {
14331 }
14336 }
14339 DDI_SUCCESS) {
14341 }
14348 }
14349 }
14352 }
14354 /*
14355 * The lun has not been there already
14356 */
14358 NDI_DEVI_REMOVE);
14359 }
14360 }
14372 }
14377 }
14384 }
14385 }
14388 }
14391 /*
14392 * The lun has not been there already
14393 */
14395 NDI_DEVI_REMOVE);
14396 }
14397 }
14398 }
14400 void
14402 {
14407 mptsas_smp_t smp_node;
14409 /*
14410 * Get latest RAID info.
14411 */
14421 }
14424 }
14426 /*
14427 * Config target devices
14428 */
14431 /*
14432 * Do loop to get sas device page 0 by GetNextHandle till the
14433 * the last handle. If the sas device is a SATA/SSP target,
14434 * we try to config it.
14435 */
14438 page_address =
14440 MPI2_SAS_DEVICE_PGAD_FORM_MASK) |
14447 }
14450 }
14452 }
14454 void
14456 {
14462 /*
14463 * TODO after hard reset, update the driver data structures
14464 * 1. update port/phymask mapping table mpt->m_phy_info
14465 * 2. invalid all the entries in hash table
14466 * m_devhdl = 0xffff and m_deviceinfo = 0
14467 * 3. call sas_device_page/expander_page to update hash table
14468 */
14470 /*
14471 * Invalid the existing entries
14472 *
14473 * XXX - It seems like we should just delete everything here. We are
14474 * holding the lock and are about to refresh all the targets in both
14475 * hashes anyway. Given the path we're in, what outstanding async
14476 * event could possibly be trying to reference one of these things
14477 * without taking the lock, and how would that be useful anyway?
14478 */
14484 }
14489 }
14494 }
14496 static void
14498 {
14502 mptsas_phymask_t phy_mask;
14506 /*
14507 * Get the phymask associated to the iport
14508 */
14512 /*
14513 * Enumerate RAID volumes here (phymask == 0).
14514 */
14518 }
14524 }
14534 }
14535 }
14544 }
14545 }
14547 }
14549 static int
14551 {
14557 /*
14558 * The return value means the SCMD_REPORT_LUNS
14559 * did not execute successfully. The target maybe
14560 * doesn't support such command.
14561 */
14563 }
14565 }
14567 /*
14568 * Return fail if not all the childs/paths are freed.
14569 * if there is any path under the HBA, the return value will be always fail
14570 * because we didn't call mdi_pi_free for path
14571 */
14572 static int
14574 {
14590 }
14593 }
14599 }
14602 NDI_DEVI_REMOVE);
14607 DDI_PROP_SUCCESS) {
14609 "unable to create property for "
14611 }
14612 }
14613 }
14622 }
14626 }
14632 }
14635 NDI_DEVI_REMOVE);
14636 /*
14637 * driver will not invoke mdi_pi_free, so path will not
14638 * be freed forever, return DDI_FAILURE.
14639 */
14641 }
14643 }
14645 static int
14648 {
14661 }
14663 /*
14664 * Make sure node is attached otherwise
14665 * it won't have related cache nodes to
14666 * clean up. i_ddi_devi_attached is
14667 * similiar to i_ddi_node_state(cdip) >=
14668 * DS_ATTACHED.
14669 */
14672 /* Get full devname */
14675 /* Clean cache */
14677 DV_CLEAN_FORCE);
14679 }
14685 }
14688 }
14691 }
14695 {
14706 }
14711 }
14714 }
14716 }
14718 static int
14720 {
14733 /*
14734 * Make sure node is attached otherwise
14735 * it won't have related cache nodes to
14736 * clean up. i_ddi_devi_attached is
14737 * similiar to i_ddi_node_state(cdip) >=
14738 * DS_ATTACHED.
14739 */
14742 /* Get full devname */
14745 /* Clean cache */
14747 DV_CLEAN_FORCE);
14749 }
14754 }
14758 {
14772 }
14776 }
14779 }
14784 }
14789 {
14802 }
14806 {
14815 }
14819 {
14828 }
14832 {
14846 }
14848 static int
14851 {
14857 ddi_devid_t devid;
14863 /*
14864 * For DVD/CD ROM and tape devices and optical
14865 * devices, we won't try to enumerate them under
14866 * scsi_vhci, so no need to try page83
14867 */
14873 /*
14874 * The LCA returns good SCSI status, but corrupt page 83 data the first
14875 * time it is queried. The solution is to keep trying to request page83
14876 * and verify the GUID is not (DDI_NOT_WELL_FORMED) in
14877 * mptsas_inq83_retry_timeout seconds. If the timeout expires, driver
14878 * give up to get VPD page at this stage and fail the enumeration.
14879 */
14892 }
14893 /*
14894 * create DEVID from inquiry data
14895 */
14900 /*
14901 * extract GUID from DEVID
14902 */
14905 /*
14906 * Do not enable MPXIO if the strlen(guid) is greater
14907 * than MPTSAS_MAX_GUID_LEN, this constrain would be
14908 * handled by framework later.
14909 */
14915 "lun:%x doesn't have a valid GUID, "
14916 "multipathing for this drive is "
14918 }
14919 }
14921 /*
14922 * devid no longer needed
14923 */
14927 /*
14928 * return value of ddi_devid_scsi_encode equal to
14929 * DDI_NOT_WELL_FORMED means DEVID_RETRY, it worth
14930 * to retry inquiry page 0x83 and get GUID.
14931 */
14940 }
14941 }
14946 }
14950 create_lun:
14954 }
14959 }
14960 out:
14962 /*
14963 * guid no longer needed
14964 */
14966 }
14970 }
14972 static int
14975 {
15015 }
15024 /*
15025 * Same path back online again.
15026 */
15035 ptgt);
15039 }
15043 lun);
15046 }
15049 /*
15050 * The GUID of the LUN has changed which maybe
15051 * because customer mapped another volume to the
15052 * same LUN.
15053 */
15055 "target:%x, lun:%x was changed, maybe "
15056 "because someone mapped another volume "
15063 "target:%x, lun:%x offline "
15068 }
15069 }
15073 lun);
15077 }
15078 }
15085 }
15086 }
15090 /*
15091 * if nodename can't be determined then print a message and skip it
15092 */
15098 }
15101 /* The property is needed by MPAPI */
15111 }
15125 }
15134 }
15140 target);
15143 }
15146 DDI_PROP_SUCCESS) {
15152 }
15156 "create prop for target %d lun %d "
15162 /*
15163 * Direct attached SATA device without DeviceName
15164 */
15166 "create prop for SAS target %d lun %d "
15170 }
15174 MPI2_SAS_DEVICE_PGAD_FORM_MASK) |
15185 }
15198 }
15202 /*
15203 * If this device direct attached to the controller
15204 * set the attached-port to the base wwid
15205 */
15209 pdev_sas_wwn);
15211 /*
15212 * Update the iport's attached-port to guid
15213 */
15218 }
15221 DDI_PROP_SUCCESS) {
15223 "mptsas unable to create "
15224 "property for iport target-port"
15226 wwn_str);
15229 }
15233 }
15237 DDI_PROP_SUCCESS) {
15240 attached_wwn_str);
15243 }
15248 /*
15249 * set obp path for pathinfo
15250 */
15255 DDI_SUCCESS) {
15258 component);
15261 }
15262 }
15266 MPI2_SAS_DEVICE_INFO_ATAPI_DEVICE)) {
15269 DDI_PROP_SUCCESS) {
15271 "failed to create pm-capable "
15275 }
15276 }
15277 /*
15278 * Create the phy-num property
15279 */
15287 }
15295 }
15298 }
15299 virt_create_done:
15304 }
15305 }
15310 }
15313 }
15316 }
15319 }
15321 static int
15324 {
15360 /*
15361 * generate compatible property with binding-set "mpt"
15362 */
15366 /*
15367 * if nodename can't be determined then print a message and skip it
15368 */
15373 }
15378 /*
15379 * if lun alloc success, set props
15380 */
15385 DDI_PROP_SUCCESS) {
15391 }
15396 DDI_PROP_SUCCESS) {
15402 }
15411 }
15413 /*
15414 * We need the SAS WWN for non-multipath devices, so
15415 * we'll use the same property as that multipathing
15416 * devices need to present for MPAPI. If we don't have
15417 * a WWN (e.g. parallel SCSI), don't create the prop.
15418 */
15425 "create property for SAS target %d lun %d "
15429 }
15436 "create property for SAS target %d lun %d "
15442 DDI_PROP_SUCCESS)) {
15443 /*
15444 * Direct attached SATA device without DeviceName
15445 */
15447 "create property for SAS target %d lun %d "
15451 }
15456 "create property for SAS target %d lun %d"
15460 }
15464 "to create guid property for target %d "
15468 }
15470 /*
15471 * The following code is to set properties for SM-HBA support,
15472 * it doesn't apply to RAID volumes
15473 */
15480 MPI2_SAS_DEVICE_PGAD_FORM_MASK) |
15492 }
15505 }
15509 /*
15510 * If this device direct attached to the controller
15511 * set the attached-port to the base wwid
15512 */
15516 pdev_sas_wwn);
15518 /*
15519 * Update the iport's attached-port to guid
15520 */
15525 }
15528 DDI_PROP_SUCCESS) {
15530 "mptsas unable to create "
15531 "property for iport target-port"
15533 wwn_str);
15536 }
15540 }
15544 DDI_PROP_SUCCESS) {
15546 "mptsas unable to create "
15548 attached_wwn_str);
15551 }
15556 DDI_PROP_SUCCESS) {
15558 "mptsas unable to create "
15562 }
15563 }
15568 DDI_PROP_SUCCESS) {
15570 "mptsas unable to create "
15574 }
15575 }
15577 phys_raid_lun:
15578 /*
15579 * if this is a SAS controller, and the target is a SATA
15580 * drive, set the 'pm-capable' property for sd and if on
15581 * an OPL platform, also check if this is an ATAPI
15582 * device.
15583 */
15586 MPI2_SAS_DEVICE_INFO_ATAPI_DEVICE)) {
15592 DDI_PROP_SUCCESS) {
15594 "failed to create pm-capable "
15598 }
15600 }
15603 /*
15604 * add 'obp-path' properties for devinfo
15605 */
15615 }
15619 "unable to set obp-path for SAS "
15623 }
15624 }
15625 /*
15626 * Create the phy-num property for non-raid disk
15627 */
15631 DDI_PROP_SUCCESS) {
15633 "failed to create phy-num property for "
15637 }
15638 }
15639 phys_create_done:
15640 /*
15641 * If props were setup ok, online the lun
15642 */
15644 /*
15645 * Try to online the new node
15646 */
15648 }
15654 }
15656 /*
15657 * If success set rtn flag, else unwire alloc'd lun
15658 */
15665 }
15666 }
15672 }
15675 }
15679 }
15681 static int
15683 {
15687 /* XXX An HBA driver should not be allocating an smp_device. */
15695 }
15697 static int
15699 {
15705 /*
15706 * Get the physical port associated to the iport
15707 * PHYMASK TODO
15708 */
15711 /*
15712 * Find the smp node in hash table with specified sas address and
15713 * physical port
15714 */
15718 }
15723 }
15725 static int
15728 {
15733 mptsas_smp_t dev_info;
15752 /*
15753 * Probe smp device, prevent the node of removed device from being
15754 * configured succesfully
15755 */
15758 }
15762 }
15766 /*
15767 * if lun alloc success, set props
15768 */
15770 /*
15771 * Set the flavor of the child to be SMP flavored
15772 */
15777 DDI_PROP_SUCCESS) {
15780 wwn_str);
15783 }
15787 DDI_PROP_SUCCESS) {
15790 wwn_str);
15793 }
15804 "mptsas unable to get expander "
15808 }
15812 MPI2_SAS_DEVICE_PGAD_FORM_MASK) |
15823 }
15826 MPI2_SAS_DEVICE_PGAD_FORM_MASK) |
15838 }
15841 /*
15842 * If this smp direct attached to the controller
15843 * set the attached-port to the base wwid
15844 */
15848 sas_wwn);
15852 }
15856 DDI_PROP_SUCCESS) {
15859 attached_wwn_str);
15862 }
15868 wwn_str);
15871 }
15873 /*
15874 * check the smp to see whether it direct
15875 * attached to the controller
15876 */
15880 }
15885 }
15886 /*
15887 * this iport is an old iport, we need to
15888 * reconfig the props for it.
15889 */
15892 DDI_PROP_SUCCESS) {
15894 MPTSAS_VIRTUAL_PORT);
15898 }
15910 }
15911 }
15915 numphys++;
15916 }
15917 }
15918 /*
15919 * Update PHY info for smhba
15920 */
15926 }
15934 DDI_PROP_SUCCESS) {
15936 MPTSAS_NUM_PHYS);
15940 }
15941 /*
15942 * Add parent's props for SMHBA support
15943 */
15946 DDI_PROP_SUCCESS) {
15948 SCSI_ADDR_PROP_ATTACHED_PORT);
15952 }
15954 smp_create_done:
15955 /*
15956 * If props were setup ok, online the lun
15957 */
15959 /*
15960 * Try to online the new node
15961 */
15963 }
15965 /*
15966 * If success set rtn flag, else unwire alloc'd lun
15967 */
15973 }
15974 }
15977 }
15979 /* smp transport routine */
15981 {
15983 Mpi2SmpPassthroughRequest_t req;
15984 Mpi2SmpPassthroughReply_t rep;
15994 /*
15995 * Need to compose a SMP request message
15996 * and call mptsas_do_passthru() function
15997 */
16008 }
16016 }
16019 }
16033 }
16034 /* do passthrough success, check the smp status */
16051 }
16053 }
16059 }
16062 }
16064 /*
16065 * If we didn't get a match, we need to get sas page0 for each device, and
16066 * untill we get a match. If failed, return NULL
16067 */
16070 {
16077 /*
16078 * PHY named device must be direct attached and attaches to
16079 * narrow port, if the iport is not parent of the device which
16080 * we are looking for.
16081 */
16084 j++;
16085 }
16090 /*
16091 * Must be a narrow port and single device attached to the narrow port
16092 * So the physical port num of device which is equal to the iport's
16093 * port num is the device what we are looking for.
16094 */
16106 }
16111 }
16113 /* If didn't get a match, come here */
16124 }
16128 }
16133 }
16134 }
16138 }
16140 /*
16141 * The ptgt->m_addr.mta_wwn contains the wwid for each disk.
16142 * For Raid volumes, we need to check m_raidvol[x].m_raidwwid
16143 * If we didn't get a match, we need to get sas page0 for each device, and
16144 * untill we get a match
16145 * If failed, return NULL
16146 */
16149 {
16154 mptsas_target_addr_t addr;
16163 }
16166 /*
16167 * It's IR volume
16168 */
16172 }
16175 }
16180 }
16182 /* If didn't get a match, come here */
16194 }
16198 }
16204 }
16205 }
16209 }
16213 {
16218 mptsas_target_addr_t addr;
16227 }
16232 }
16234 /* If didn't get a match, come here */
16244 }
16251 }
16252 }
16256 }
16258 mptsas_target_t *
16261 {
16263 mptsas_target_addr_t addr;
16273 }
16278 }
16284 /* Initialized the tgt structure */
16294 }
16296 static void
16298 {
16303 }
16307 {
16308 mptsas_target_addr_t addr;
16314 /*
16315 * If there's already a matching SMP target, update its fields
16316 * in place. Since the address is not changing, it's safe to do
16317 * this. We cannot just bcopy() here because the structure we've
16318 * been given has invalid hash links.
16319 */
16323 }
16329 }
16331 /*
16332 * Functions for SGPIO LED support
16333 */
16336 {
16347 }
16350 {
16358 }
16363 }
16365 }
16367 static int
16369 {
16372 /* Build an MPI2 Slot Status based on our view of the world */
16380 /* Write it to the controller */
16384 MPI2_SEP_REQ_ACTION_WRITE_STATUS));
16385 }
16387 /*
16388 * send sep request, use enclosure/slot addressing
16389 */
16390 static int
16393 {
16394 Mpi2SepRequest_t req;
16395 Mpi2SepReply_t rep;
16400 /*
16401 * We only support SEP control of directly-attached targets, in which
16402 * case the "SEP" we're talking to is a virtual one contained within
16403 * the HBA itself. This is necessary because DA targets typically have
16404 * no other mechanism for LED control. Targets for which a separate
16405 * enclosure service processor exists should be controlled via ses(7d)
16406 * or sgen(7d). Furthermore, since such requests can time out, they
16407 * should be made in user context rather than in response to
16408 * asynchronous fabric changes.
16409 *
16410 * In addition, we do not support this operation for RAID volumes,
16411 * since there is no slot associated with them.
16412 */
16416 }
16428 }
16435 }
16436 /* do passthrough success, check the ioc status */
16462 }
16463 }
16466 }
16469 }
16471 int
16475 {
16476 ddi_dma_cookie_t new_cookie;
16478 uint_t ncookie;
16486 }
16494 }
16503 }
16506 }
16508 void
16510 {
16518 }